Multilayer substrate, method for manufacturing multilayer substrate, and electronic device

Abstract

The present invention addresses the problem of providing a multilayer substrate that enables transmission of a metal layer at higher speeds without a chemically bonding coating having to be applied to the metal layer, a method for manufacturing the multilayer substrate, and an electronic device. As a solution, a plurality of laminated articles (56) are provided in layers, said laminate articles (56) having: a first insulating layer (26) in which a patterned first metal layer (40) is formed on a first surface (26a), a second insulating layer (24) laminated on a second surface (26b) of the first insulating layer (26), and formed by embedding a patterned second metal layer (22) on a third surface (24a); a third insulating layer (44) and a fourth insulating layer (48) laminated in the stated order on the first surface (26a) so as to embed the first metal layer (40); a first via (34) formed through the first insulating layer (26) and the second insulating layer (24); and a second via (54) formed through the third insulating layer (44) and the fourth insulating layer (48). At least the second insulating layer (24) and the fourth insulating layer (48) are made of a material having a low dielectric loss tangent.

Description

Multilayer substrate, multilayer substrate manufacturing method, and electronic device

[0001] The present invention relates to a multilayer substrate, a method for manufacturing a multilayer substrate, and an electronic device.

[0002] 2. Description of the Related Art Circuit boards having a multilayer structure (hereinafter sometimes referred to as "multilayer boards") are generally well known.

[0003] For example, Patent Document 1 (JP 2021-190602 A) discloses a multilayer substrate in which multiple laminates each having two metal layers are stacked. Conventional build-up multilayer substrates are multiplied by the number of layers, so that the yield per layer is reflected in the overall yield. However, the multilayer substrate disclosed in Patent Document 1 can achieve the above-mentioned improvement in yield by preparing the laminates in advance.

[0004] Japanese Patent Application Laid-Open No. 2021-190602

[0005] In a multilayer board such as that disclosed in Patent Document 1, a chemical adhesive coating may be applied to the surface of the metal layer without roughening it to enable high-speed transmission. However, even if an insulating layer is laminated on the metal layer with the chemical adhesive coating and via holes are drilled in the insulating layer using a laser or the like, the chemical adhesive coating at the via connection portion of the metal layer may not be completely removed, resulting in poor connection between the metal layer and the via. In other words, applying a chemical adhesive coating to the metal layer in a multilayer board reduces the reliability of the multilayer board.

[0006] Therefore, the present invention has been made to solve the above-mentioned problems, and its object is to provide a multilayer substrate, a method for manufacturing a multilayer substrate, and an electronic device that can achieve high-speed transmission in a metal layer without applying a chemical adhesive coating to the metal layer.

[0007] That is, the disclosed multilayer substrate has a plurality of laminated bodies each having a first insulating layer having a patterned first metal layer formed on a first surface, a second insulating layer laminated on a second surface of the first insulating layer and having a patterned second metal layer embedded on a third surface opposite the first insulating layer, a third insulating layer laminated on the first surface so that the first metal layer is embedded, and a fourth insulating layer laminated on the third insulating layer, a first via formed to penetrate the first insulating layer and the second insulating layer and electrically connect the first metal layer and the second metal layer, and a second via formed to penetrate the third insulating layer and the fourth insulating layer, and at least the second insulating layer and the fourth insulating layer are made of a material with a low dielectric tangent.

[0008] The disclosed multilayer substrate also has a requirement that a plurality of laminates are stacked, each laminate having: a first insulating layer having a patterned first metal layer formed on a first surface; a second insulating layer laminated on a second surface of the first insulating layer and having a patterned second metal layer embedded on a third surface opposite the first insulating layer; a fifth insulating layer laminated on the first surface so that the first metal layer is embedded; a sixth insulating layer laminated on the fifth insulating layer; and a seventh insulating layer laminated on the sixth insulating layer; a first via formed to penetrate the first insulating layer and the second insulating layer and electrically connect the first metal layer and the second metal layer; and a second via formed to penetrate the fifth insulating layer, the sixth insulating layer, and the seventh insulating layer; and that at least the second insulating layer, the fifth insulating layer, and the seventh insulating layer are made of a material with a low dielectric tangent.

[0009] The disclosed multilayer substrate also has a requirement that a plurality of laminates are stacked, each laminate having: a first insulating layer; an eighth insulating layer laminated on a first surface of the first insulating layer and having a patterned first metal layer formed on a fourth surface opposite the first insulating layer; a second insulating layer laminated on a second surface of the first insulating layer and having a patterned second metal layer formed on a third surface opposite the first insulating layer; a fifth insulating layer laminated on the fourth surface so that the first metal layer is embedded; a sixth insulating layer laminated on the fifth insulating layer; and a seventh insulating layer laminated on the sixth insulating layer; a first via formed to penetrate the first insulating layer, the second insulating layer, and the eighth insulating layer and electrically connect the first metal layer and the second metal layer; and a second via formed to penetrate the fifth insulating layer, the sixth insulating layer, and the seventh insulating layer; and at least the second insulating layer, the fifth insulating layer, the seventh insulating layer, and the eighth insulating layer are made of a material with a low dielectric tangent.

[0010] The disclosed method for manufacturing a multilayer substrate includes a second metal layer forming step of forming a second metal layer on a three-layer metal foil by etching, a first lamination step of laminating a second insulating layer on the second metal layer so as to bury the second metal layer, a second lamination step of laminating a first insulating layer on the second insulating layer, a first via forming step of forming a first via in the first insulating layer and the second insulating layer, a first metal layer forming step of forming a first metal layer on the first insulating layer, and a second lamination step of laminating a first metal layer on the first insulating layer so as to bury the first metal layer. The method includes a third lamination step of laminating a third insulating layer, an etching step of etching the three-layer metal foil to remove all but the second metal layer, a fourth lamination step of laminating a fourth insulating layer on the third insulating layer, and a second via formation step of forming a second via in the third insulating layer and the fourth insulating layer, thereby forming a laminate, and a fifth lamination step of laminating a plurality of the laminates, wherein at least the second insulating layer and the fourth insulating layer are made of a material with a low dielectric tangent.

[0011] The disclosed method for manufacturing a multilayer substrate includes a second metal layer forming step of forming a second metal layer on a three-layer metal foil by etching, a first lamination step of laminating a second insulating layer on the second metal layer so as to bury the second metal layer, a second lamination step of laminating a first insulating layer on the second insulating layer, a first via forming step of forming a first via in the first insulating layer and the second insulating layer, a first metal layer forming step of forming a first metal layer on the first insulating layer, and a fifth insulating layer and a sixth insulating layer so as to bury the first metal layer. a third lamination step of laminating layers, followed by an etching step of etching the three-layer metal foil to remove all layers except the second metal layer, a fourth lamination step of laminating a seventh insulating layer on the sixth insulating layer, and a second via formation step of forming second vias in the fifth insulating layer, the sixth insulating layer, and the seventh insulating layer, to form a laminate; and a fifth lamination step of laminating a plurality of the laminates, wherein at least the second insulating layer, the fifth insulating layer, and the seventh insulating layer are made of a material with a low dielectric tangent.

[0012] The disclosed method for manufacturing a multilayer substrate includes a second metal layer forming step of forming a second metal layer on a three-layer metal foil by etching, a first lamination step of laminating a second insulating layer on the second metal layer so as to bury the second metal layer, a second lamination step of laminating a first insulating layer and an eighth insulating layer on the second insulating layer, a first via forming step of forming a first via in the first insulating layer, the second insulating layer, and the eighth insulating layer, a first metal layer forming step of forming a first metal layer on the eighth insulating layer, and a fifth insulating layer and a fifth insulating layer so as to bury the first metal layer. The method includes a third lamination step of laminating a sixth insulating layer, an etching step of etching the three-layer metal foil to remove all but the second metal layer, a fourth lamination step of laminating a seventh insulating layer on the sixth insulating layer, and a second via formation step of forming second vias in the fifth insulating layer, the sixth insulating layer, and the seventh insulating layer, thereby forming a laminate, and a fifth lamination step of laminating a plurality of the laminates, wherein at least the second insulating layer, the fifth insulating layer, the seventh insulating layer, and the eighth insulating layer are made of a material with a low dielectric tangent.

[0013] The disclosed electronic device is required to include any one of the multilayer substrates described above and an electronic component.

[0014] According to the present invention, it is possible to realize a multilayer substrate, a method for manufacturing a multilayer substrate, and an electronic device that enable high-speed transmission of metal layers without applying a chemical adhesive coating to the metal layers.

[0015] FIG. 1 is a schematic cross-sectional view (part 1) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 2 is a schematic cross-sectional view (part 2) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 3 is a schematic cross-sectional view (part 3) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 4 is a schematic cross-sectional view (part 4) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 5 is a schematic cross-sectional view (part 5) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 6 is a schematic cross-sectional view (part 6) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 7 is a schematic cross-sectional view (part 7) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 8 is a schematic cross-sectional view (part 8) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 9 is a schematic cross-sectional view (part 9) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 10 is a schematic cross-sectional view (part 10) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 11 is a schematic cross-sectional view (No. 11) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 12 is a schematic cross-sectional view (No. 12) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 13 is a schematic cross-sectional view (No. 13) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 14 is a schematic cross-sectional view (No. 14) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 15 is a schematic cross-sectional view (No. 15) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 16 is a schematic cross-sectional view (No. 16) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 17 is a schematic cross-sectional view (No. 17) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 18 is a schematic cross-sectional view (No. 18) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. FIG. 19 is a schematic cross-sectional view (No. 19) showing an example of a method for manufacturing a multilayer substrate according to the first embodiment. 20 and 21 are schematic cross-sectional views (part 20 and part 21) illustrating an example of a method for manufacturing a multilayer substrate according to the first embodiment.FIG. 22 is a schematic cross-sectional view (No. 22) showing an example of a method for manufacturing a multilayer substrate in the first embodiment. FIG. 23 is a schematic cross-sectional view (No. 23) showing an example of a method for manufacturing a multilayer substrate in the second embodiment. FIG. 24 is a schematic cross-sectional view (No. 24) showing an example of a method for manufacturing a multilayer substrate in the second embodiment. FIG. 25 is a schematic cross-sectional view (No. 25) showing an example of a method for manufacturing a multilayer substrate in the second embodiment. FIG. 26 is a schematic cross-sectional view (No. 26) showing an example of a method for manufacturing a multilayer substrate in the second embodiment. FIG. 27 is a schematic cross-sectional view (No. 27) showing an example of a method for manufacturing a multilayer substrate in the second embodiment. FIG. 28 is a schematic cross-sectional view (No. 28) showing an example of a method for manufacturing a multilayer substrate in the second embodiment. FIG. 29 is a schematic cross-sectional view (No. 29) showing an example of a method for manufacturing a multilayer substrate in the second embodiment. FIG. 30 is a schematic cross-sectional view (No. 30) showing an example of a method for manufacturing a multilayer substrate in the second embodiment. FIG. 31 is a schematic cross-sectional view (No. 31) showing an example of a method for manufacturing a multilayer substrate in the second embodiment. FIG. 32 is a schematic cross-sectional view (No. 32) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. FIG. 33 is a schematic cross-sectional view (No. 33) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. FIG. 34 is a schematic cross-sectional view (No. 34) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. FIG. 35 is a schematic cross-sectional view (No. 35) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. FIG. 36 is a schematic cross-sectional view (No. 36) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. FIG. 37 is a schematic cross-sectional view (No. 37) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. FIG. 38 is a schematic cross-sectional view (No. 38) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. FIG. 39 is a schematic cross-sectional view (No. 39) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. Fig. 40 is a schematic cross-sectional view (No. 40) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. Fig. 41 is a schematic cross-sectional view (No. 41) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. Fig. 42 is a schematic cross-sectional view (No. 42) showing an example of a method for manufacturing a multilayer substrate in the third embodiment.Fig. 43 is a schematic cross-sectional view (No. 43) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. Fig. 44 is a schematic cross-sectional view (No. 44) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. Fig. 45 is a schematic cross-sectional view (No. 45) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. Fig. 46 is a schematic cross-sectional view (No. 46) showing an example of a method for manufacturing a multilayer substrate in the third embodiment. Fig. 47 is a schematic cross-sectional view of a semiconductor package.

[0016] Hereinafter, the multilayer substrates 200, 300, and 400 according to each embodiment will be described in detail with reference to the drawings. FIG. 22 is a diagram showing an example of a method for manufacturing the multilayer substrate 200 according to the first embodiment, and is a schematic cross-sectional view of the multilayer substrate 200. FIG. 31 is a diagram showing an example of a method for manufacturing the multilayer substrate 300 according to the second embodiment, and is a schematic cross-sectional view of the multilayer substrate 300. FIG. 46 is a diagram showing an example of a method for manufacturing the multilayer substrate 400 according to the third embodiment, and is a schematic cross-sectional view of the multilayer substrate 400. In all the drawings used to explain each embodiment, components having the same function are designated by the same reference numerals, and repeated description thereof may be omitted.

[0017] Furthermore, in the multilayer substrates 200, 300, and 400, for convenience, the upper and lower layers may be described as "upper layer" or "lower layer" based on the up-down direction in the drawings, but this also includes cases where the upper and lower layers in the multilayer substrates 200, 300, and 400 do not match the actual up-down direction.

[0018] Furthermore, for the sake of convenience, the multilayer substrates 200, 300, and 400 may be referred to as "top surfaces" or "bottom surfaces" based on the up-down direction in the drawings, but this also includes cases where the top and bottom surfaces of the multilayer substrates 200, 300, and 400 do not match the actual up-down direction. Furthermore, the multilayer substrates 200, 300, and 400 may be referred to as "side surfaces," but the side surfaces refer to the side surfaces in contrast to the above-mentioned top and bottom surfaces.

[0019] <First embodiment> <<Multilayer substrate>> As shown in Fig. 22, a multilayer substrate 200 in the first embodiment has a configuration in which a plurality of laminates 56 are stacked. More specifically, the multilayer substrate 200 includes a plurality of laminates 56, a metal layer 72 located in the uppermost layer, and a laminate 58 located in the lowermost layer.

[0020] <<<<First Insulating Layer>>> The laminate 56 has a first insulating layer 26 having a patterned first metal layer 40 formed on a first surface 26a.

[0021] The first insulating layer 26 is usually flat. The average thickness of the first insulating layer 26 may be, for example, 10 μm to 200 μm, or 30 μm to 100 μm, but is not particularly limited and can be appropriately selected depending on the purpose.

[0022] Furthermore, the first insulating layer 26 is not particularly limited as long as it is an insulating layer used in a multilayer substrate, and can be appropriately selected depending on the purpose. For example, the first insulating layer 26 can be made of an inorganic base material such as an inorganic woven fabric or inorganic nonwoven fabric using glass cloth or the like, or a base material whose hardness is reinforced by an organic base material such as an organic woven fabric or organic nonwoven fabric.

[0023] More specifically, for example, the first insulating layer 26 may be made of a glass epoxy substrate (a glass woven fabric substrate impregnated with epoxy resin, a glass nonwoven fabric substrate impregnated with epoxy resin), a glass woven fabric substrate impregnated with bismaleimide triazine resin, an aramid nonwoven fabric substrate impregnated with epoxy resin, or a glass woven fabric substrate impregnated with modified polyphenylene ether resin.

[0024] At least the second insulating layer 24 and the fourth insulating layer 48, which will be described later, are made of a material with a low dielectric tangent, but the first insulating layer 26 may also be made of a material with a low dielectric tangent, which will be described later. This allows the multilayer substrate 200 to achieve even higher transmission speeds. When a material with a low dielectric tangent is used for the first insulating layer 26, the first insulating layer 26 is configured to be in close contact with the first via 34, which will be described later.

[0025] <<<First Metal Layer>>> A first metal layer 40 having a predetermined pattern is formed on a first surface (the upper surface of the first insulating layer 26 in FIG. 22 ) of the first insulating layer 26. As an example, the first metal layer 40 is formed to a thickness of approximately 10 μm to 60 μm, but is not limited to this and can be appropriately selected depending on the purpose.

[0026] Furthermore, the first metal layer 40 is preferably subjected to a surface roughening treatment, but is not limited to this and can be appropriately selected depending on the purpose.

[0027] <<<<Second Insulating Layer>>> A second insulating layer 24 is laminated on the second surface of the first insulating layer 26 (the lower surface of the first insulating layer 26 in FIG. 22, the surface opposite to the first surface 26a).

[0028] The average thickness of the second insulating layer 24 may be, for example, 10 μm or more and 200 μm or less, or 30 μm or more and 100 μm or less, but is not particularly limited and can be selected appropriately depending on the purpose.

[0029] The second insulating layer 24 is made of a material with a low dielectric dissipation factor. Here, a low dielectric dissipation factor refers, for example, to a material (particularly a resin material) having a dielectric dissipation factor of 0.002 or less at 10 GHz. Therefore, the second insulating layer 24 preferably has a dielectric dissipation factor of 0.002 or less at 10 GHz. The low dielectric dissipation factor material also has adhesion to metal layers that have not been roughened. Therefore, the second insulating layer 24 is preferably a material that has adhesion to metal layers that have not been roughened. That is, the second insulating layer 24 is in close contact with the second metal layer 22, which will be described later. The lower limit of the dielectric dissipation factor is not particularly limited, but is typically 0.0009 or more.

[0030] <<<<Second Metal Layer>>> A second metal layer 22 having a predetermined pattern is formed on a third surface 24a of the second insulating layer 24 (in FIG. 22, the underside of the second insulating layer 24, the surface opposite the opposing first insulating layer 26). More specifically, the second metal layer 22 having a predetermined pattern is embedded in the third surface of the second insulating layer 24. As an example, the second metal layer 22 is formed to a thickness of approximately 10 μm to 60 μm, but is not limited to this and can be appropriately selected depending on the purpose.

[0031] It is also preferable that the surface of the second metal layer 22 is not roughened, so that the surface of the second metal layer 22 does not have minute irregularities, thereby preventing transmission delays due to the irregularities.

[0032] As described above, since the second metal layer 22 is covered with and adheres to the second insulating layer 24, high-speed transmission of the second metal layer 22 can be achieved without applying a chemical adhesion film to the second metal layer 22.

[0033] <<<<Third Insulating Layer>>> A third insulating layer 44 is laminated on the first surface 26a of the first insulating layer 26 so that the first metal layer 40 is buried therein.

[0034] The third insulating layer 44 is not particularly limited as long as it is an insulating base material used in a multilayer substrate, and can be appropriately selected depending on the purpose. More specifically, as one example, a thermosetting resin can be used for the third insulating layer 44. Preferred thermosetting resins include fluororesin, polyphenylene ether resin (PPE / PPO resin), polyimide resin (PI resin), and bismaleimide triazine resin (BT resin).

[0035] Alternatively, an inorganic base material such as an inorganic woven fabric or inorganic nonwoven fabric using glass cloth or the like, or a base material whose hardness is reinforced by an organic base material such as an organic woven fabric or organic nonwoven fabric may be used as the third insulating layer 44. More specifically, the third insulating layer 44 may be a glass epoxy base material, a glass woven fabric base material impregnated with bismaleimide triazine resin, an aramid nonwoven fabric base material impregnated with epoxy resin, a glass woven fabric base material impregnated with modified polyphenylene ether resin, or the like.

[0036] The third insulating layer 44 may be made of a material with a low dielectric loss tangent, thereby enabling the multilayer substrate 200 to achieve even higher transmission speeds. When a material with a low dielectric loss tangent is used for the third insulating layer 44, the third insulating layer 44 is configured to be in close contact with the second via 54, which will be described later.

[0037] <<<<Fourth Insulating Layer>>> Furthermore, a fourth insulating layer 48 is laminated on the third insulating layer 44 .

[0038] The fourth insulating layer 48 is made of a material with a low dielectric loss tangent. More specifically, the fourth insulating layer 48 preferably has a dielectric loss tangent of 0.002 or less at 10 GHz. The fourth insulating layer 48 is also preferably made of a material that adheres well to metal layers that have not been roughened. That is, the fourth insulating layer 48 adheres well to the second metal layer 22 in the other laminates. The fourth insulating layer 48 may be made of the same material as the second insulating layer 24, but is not limited to this material and may be made of any material suitable for the purpose.

[0039] Furthermore, as will be described later, the fourth insulating layer 48 is in a semi-cured state when the multiple laminates 56 are stacked, and serves as an adhesive layer.

[0040] <<<First Via>>> A through hole 32 is drilled through the first insulating layer 26 and the second insulating layer 24, and a first via 34 is formed in the through hole 32 to electrically connect the first metal layer 40 and the second metal layer 22.

[0041] Furthermore, the size (opening diameter) of the through hole 32 may be, for example, 50 μm or more and 500 μm or less, or 100 μm or more and 300 μm or less, but is not limited to these and can be selected appropriately depending on the purpose.

[0042] In addition, the through holes 32 are formed in a shape (tapered shape) in which the diameter gradually decreases from the drilling side, for example, but are not limited to this and can be appropriately selected depending on the purpose. As another example, the through holes 32 may be formed in a shape that is drilled perpendicular to the first insulating layer 26 and the second insulating layer 24.

[0043] The through holes 32 are filled with first vias 34. The first vias 34 are, for example, plated vias containing copper, but are not limited to this and can be selected appropriately depending on the purpose.

[0044] As another example, the first via 34 may be a conductive paste. The conductive paste may contain, for example, a conductive filler and a binder resin, but is not limited thereto and may be appropriately selected depending on the purpose. The conductive filler may be, for example, metal particles such as copper, gold, silver, palladium, nickel, tin, or bismuth. These metal particles may be used alone or in combination of two or more types. The binder resin may be, for example, a thermosetting resin such as epoxy resin or polyimide resin, but is not limited thereto and may be appropriately selected depending on the purpose.

[0045] <<<<Second Via>>> In addition, through holes 52 are drilled through the third insulating layer 44 and the fourth insulating layer 48, and second vias 54 are formed in the through holes 52 to electrically connect the first metal layer 40 to the second metal layer 22 or metal layer 72 of another laminate 56.

[0046] Furthermore, the size (opening diameter) of the through hole 52 may be, for example, 50 μm or more and 500 μm or less, or 100 μm or more and 300 μm or less, but is not limited to these and can be selected appropriately depending on the purpose.

[0047] In addition, the through holes 52 are formed in a shape (tapered shape) in which the diameter gradually decreases from the drilling side, for example, but are not limited to this and can be appropriately selected depending on the purpose. As another example, the through holes 52 may be formed in a shape that is drilled perpendicular to the third insulating layer 44 and the fourth insulating layer 48.

[0048] The through holes 52 are filled with second vias 54. The second vias 54 may be, for example, the conductive paste described as the first vias 34, but are not limited thereto and may be appropriately selected depending on the purpose. As another example, the second vias 54 may be the plated vias described as the first vias 34.

[0049] <<<Metal Layer>>> Furthermore, a metal layer 72 having a predetermined pattern is formed on the upper surface of the uppermost laminate 56. As an example, the metal layer 72 is formed to a thickness of approximately 10 μm to 60 μm, but is not limited to this and can be appropriately selected depending on the purpose.

[0050] <<<Lowermost Layer Stack>>> When the multilayer substrate 200 has an even number of metal layers, the laminate 58 is stacked as the lowermost layer. As an example, the laminate 58 has a ninth insulating layer 64 having a patterned third metal layer 74 formed on its lower surface, a tenth insulating layer 66 stacked on the ninth insulating layer 64, and a third via 68 formed to penetrate the ninth insulating layer 64 and the tenth insulating layer 66. The third metal layer 74 is electrically connected to the second metal layer 22 of the laminate 56 immediately above it via the third via 68.

[0051] The ninth insulating layer 64 may be similar to the first insulating layer 26 described above, and the tenth insulating layer 66 may be similar to the fourth insulating layer 48 described above. The third metal layer 74 may be similar to the first metal layer 40 or the second metal layer 22 described above, but it is preferable that the third metal layer 74 be exposed from the ninth insulating layer 64. The third via 68 may be similar to the first via 34 or the second via 54 described above.

[0052] When the multilayer substrate 200 has an odd number of metal layers, the laminate 58 is not stacked, and the configuration of the lowest laminate 56 is different (not shown). That is, it is preferable that the metal layer 22 of the lowest laminate 56 is exposed from the second insulating layer 24.

[0053] The multilayer substrate 200 of the present embodiment described above can achieve high-speed transmission without applying a surface roughening treatment or a chemical adhesive coating to the second metal layer 22. This is particularly advantageous when the second metal layer 22 is used as a signal layer and the first metal layer 40 is used as a ground layer, as in the multilayer substrate 200 of the present embodiment.

[0054] <<Method of Manufacturing Multilayer Substrate>> Next, a method of manufacturing the multilayer substrate 200 according to the first embodiment will be described in detail. The method of manufacturing the multilayer substrate 200 includes a laminate formation step of forming the laminate 56 and a fifth lamination step of stacking the plurality of laminates 56.

[0055] As shown in Fig. 1, first, a three-layer metal foil 10 is prepared. As an example, the three-layer metal foil 10 is formed by laminating a copper foil 12, a metal foil 14 different from the copper foil 12, and a metal support (particularly, a copper support) 16 in this order. The metal foil 14 is not particularly limited as long as it is a metal that can be selectively etched with a selective etchant that does not react with the copper foil 12 or the copper support 16, and can be appropriately selected depending on the purpose.

[0056] Next, as shown in Figures 2 to 4, a second metal layer 22 is formed on the three-layer metal foil 10 (second metal layer formation process). Specifically, as shown in Figure 2, a film-like dry film resist 18 is attached to the surface of the copper foil 12, and then exposed to light in a predetermined pattern corresponding to the pattern of the second metal layer 22 to remove unnecessary portions. Next, as shown in Figure 3, the metal foil 12 is etched (half-etched) to form the second metal layer 22 in the predetermined pattern. Next, as shown in Figure 4, the dry film resist 18 is removed from the surface of the second metal layer 22.

[0057] 5, a second insulating layer (particularly, an uncured second insulating layer) 24 is laminated on the second metal layer 22 so as to bury the second metal layer 22 (first lamination step). Next, a first insulating layer (particularly, an uncured first insulating layer) 26 and a metal foil 28 are laminated in this order on the second insulating layer 24 (second lamination step).

[0058] Next, as shown in FIGS. 6 to 10, first vias 34 are formed in the first insulating layer 26 and the second insulating layer 24 (first via forming step).

[0059] Specifically, first, as shown in Fig. 6, a film-like dry film resist 30 is attached to the surface of the metal foil 28, and the portions corresponding to the openings of the through holes 32 of the first vias 34 are exposed to light to remove unnecessary portions. Next, as shown in Fig. 7, etching (half etching) is performed to form a metal layer 28 on the metal layer 28 except for the portions corresponding to the through holes 32. Next, as shown in Fig. 8, the dry film resist 30 is removed from the surface of the metal layer 28.

[0060] 9, through holes 32 are drilled in the first insulating layer 26 and the second insulating layer 24. The through holes 32 can be formed by laser processing, for example. ２ Examples of the laser include, but are not limited to, a laser and a YAG laser, and can be appropriately selected depending on the purpose.

[0061] 10, plating (copper plating) 34 is applied to the inside of the through hole 32 by plating processing to form a first via (plated via) 34. Note that a conductive paste may be filled in place of the plated via.

[0062] If the first via 34 is a plated via, the metal layer on the first surface 26a of the first insulating layer 26 may become too thick. In this case, it is preferable to adjust the metal layer to a predetermined thickness by half etching, as shown in FIG.

[0063] 12 and 13, a first metal layer 40 is formed on the first surface 26a of the first insulating layer 26 (first metal layer forming step). Specifically, as shown in Fig. 12, a film-like dry film resist 38 is attached to the surface of the metal layer 28, and is exposed to light in a predetermined pattern corresponding to the pattern of the first metal layer 40 to remove unnecessary portions. Next, as shown in Fig. 13, the metal layer 28 is etched (half-etched) to form the first metal layer 40 in the predetermined pattern, and the dry film resist 18 is removed from the surface of the first metal layer 40.

[0064] 14, a third insulating layer 44 is laminated on the first insulating layer 26 so that the first metal layer 40 is buried (third lamination step). A metal layer 46 is further laminated on the third insulating layer 44. This ensures the flatness of the third insulating layer 44, and improves the reliability of the multilayer board.

[0065] Next, as shown in FIG. 15, the metal layer 46 and the metal support 16 are removed by etching, and then, as shown in FIG. 16, the metal foil 14 is removed by etching (particularly, selective etching) (etching step).

[0066] 17, the fourth insulating layer 48 is laminated on the third insulating layer 44 (fourth lamination step). More specifically, the semi-cured fourth insulating layer 48 and the resin film 50 are laminated in this order on the third insulating layer 44.

[0067] 18 and 19, second vias 54 are formed in the third insulating layer 44 and the fourth insulating layer 48 (second via forming step). Specifically, as shown in FIG. 18, through holes 52 are drilled in the third insulating layer 44 and the fourth insulating layer 48. The through holes 52 can be formed by laser processing, for example. Types of laser processing include CO ２ 19, the through holes 52 are filled with a conductive paste 54. By carrying out the steps up to this point, a laminate 56 is completed.

[0068] 20 and 21 , a plurality of laminates 56 are stacked (fifth stacking step). More specifically, when the multilayer substrate 200 has an even number of layers, the laminate 58, the plurality of laminates 56, and the metal layer 70 are stacked in this order and thermocompression bonded. When the multilayer substrate 200 has an odd number of layers, a laminate (not shown) in which the pre-etched second metal layer 22 is exposed from the second insulating layer 24, the plurality of laminates 56, and the metal layer 70 are stacked in this order and thermocompression bonded. In either case, the second via 54 in one laminate 56 is electrically connected to the metal layer 70 or the second metal layer 22 in another laminate 56.

[0069] Next, as shown in FIG. 22, the metal layers 70 and 60 of the laminated (thermocompression bonded) multilayer substrate 200 are etched to form metal layers 72 and 74 in a predetermined pattern.

[0070] Second Embodiment <<Multilayer Substrate>> Next, a multilayer substrate 300 according to the second embodiment will be described in detail. The multilayer substrate 300 according to the second embodiment has a fifth insulating layer 76, a sixth insulating layer 78, and a seventh insulating layer 82 instead of the third insulating layer 44 and the fourth insulating layer 48 of the multilayer substrate 200 according to the first embodiment. Furthermore, at least the second insulating layer 24, the fifth insulating layer 76, and the seventh insulating layer 82 are made of a material with a low dielectric tangent. The remaining configuration of the multilayer substrate 300 is the same as that of the multilayer substrate 200. The fifth insulating layer 76, the sixth insulating layer 78, and the seventh insulating layer 82 will be described below.

[0071] <<<Fifth Insulating Layer>>> A fifth insulating layer 76 is laminated on the first surface 26a of the first insulating layer 26 so that the first metal layer 40 is buried therein.

[0072] The fifth insulating layer 76 is made of a material with a low dielectric loss tangent. More specifically, the fifth insulating layer 76 preferably has a dielectric loss tangent of 0.002 or less at 10 GHz. The fifth insulating layer 76 is also preferably made of a material that has adhesion to metal layers that have not been roughened. That is, the fifth insulating layer 76 is in close contact with the first metal layer 40. The fifth insulating layer 76 may be made of the same material as the second insulating layer 24, but is not limited to this material and may be made of any material suitable for the purpose.

[0073] In this embodiment, it is preferable that the first metal layer 40 is not subjected to a surface roughening treatment.

[0074] <<<Sixth Insulating Layer>>> A sixth insulating layer 78 is laminated on the surface of the fifth insulating layer 76. The sixth insulating layer 78 can have the same configuration as the first insulating layer 26.

[0075] <<<Seventh Insulating Layer>>> A seventh insulating layer 82 is laminated on the surface of the sixth insulating layer 78. The seventh insulating layer 82 may have the same configuration as the fourth insulating layer 48.

[0076] The multilayer substrate 300 of the present embodiment described above can achieve high-speed transmission in each metal layer without roughening the first metal layer 40 and the second metal layer 22 or applying a chemical adhesive coating thereto.

[0077] <<Method of Manufacturing Multilayer Substrate>> Next, a method of manufacturing a multilayer substrate in the second embodiment will be described in detail. The method of manufacturing a multilayer substrate 300 includes a laminate formation step of forming a laminate 90 and a fifth lamination step of laminating a plurality of laminates 90. The method of manufacturing a multilayer substrate 300 in the second embodiment differs from the method of manufacturing a multilayer substrate in the first embodiment in the steps from the third lamination step onwards, but other configurations are the same as the method of manufacturing a multilayer substrate 200 in the first embodiment.

[0078] In the method for manufacturing a multilayer substrate according to the second embodiment, following the first metal layer forming step, a fifth insulating layer 76 and a sixth insulating layer 78 are laminated on the first insulating layer 26 so that the first metal layer 40 is buried (third lamination step), as shown in Fig. 23. A metal layer 80 is further laminated on the sixth insulating layer 78. This ensures the flatness of the fifth insulating layer 76 and the sixth insulating layer 78, thereby improving the reliability of the multilayer substrate.

[0079] Next, as shown in FIG. 24, the metal layer 80 and the metal support 16 are removed by etching, and then, as shown in FIG. 25, the metal foil 14 is removed by etching (particularly, selective etching) (etching step).

[0080] 26, the seventh insulating layer 82 is laminated on the sixth insulating layer 78 (fourth lamination step). More specifically, the semi-cured seventh insulating layer 82 and the resin film 84 are laminated in this order on the sixth insulating layer 78.

[0081] 27 and 28, second vias 88 are formed in the fifth insulating layer 76, the sixth insulating layer 78, and the seventh insulating layer 82 (second via formation step). Specifically, as shown in FIG. 27, through holes 86 are drilled in the fifth insulating layer 76, the sixth insulating layer 78, and the seventh insulating layer 82. The through holes 86 can be formed by laser processing, for example. Types of laser processing include CO ２ 28, the through holes 86 are filled with conductive paste 88. Through these steps, a laminate 90 is completed.

[0082] 29 and 30 , multiple laminates 90 are stacked (fifth stacking step). More specifically, when the multilayer substrate 300 has an even number of layers, the laminate 92, the multiple laminates 90, and the metal layer 104 are stacked in this order and thermocompression bonded. When the multilayer substrate 300 has an odd number of layers, the laminate (not shown) in which the pre-etched second metal layer 22 is exposed from the second insulating layer 24, the multiple laminates 90, and the metal layer 104 are stacked in this order and thermocompression bonded. In either case, the second via 54 in one laminate 90 is electrically connected to the metal layer 104 or the second metal layer 22 in another laminate 90.

[0083] Next, as shown in FIG. 31, the metal layers 104 and 94 of the laminated (thermocompression bonded) multilayer substrate 300 are etched to form metal layers 108 and 106 in a predetermined pattern.

[0084] <Third Embodiment> <<Multilayer Substrate>> Next, a multilayer substrate 400 according to the third embodiment will be described in detail. The multilayer substrate 400 according to the third embodiment has a first insulating layer 26 and an eighth insulating layer 120 instead of the first insulating layer 26 of the multilayer substrate 300 according to the second embodiment. Furthermore, at least the second insulating layer 24, the fifth insulating layer 76, the seventh insulating layer 82, and the eighth insulating layer 120 are made of a material with a low dielectric tangent. The remaining configuration of the multilayer substrate 400 is the same as that of the multilayer substrate 300. The first insulating layer 26, the fifth insulating layer 76, and the eighth insulating layer 120 will be described in detail below.

[0085] <<<<First Insulating Layer>>> In the third embodiment, instead of forming a patterned metal layer on the first surface 26a of the first insulating layer 26, an eighth insulating layer 120 is laminated. The first insulating layer 26 is preferably formed thinner than the first insulating layer 26 in the first and second embodiments by the amount of the eighth insulating layer 120 laminated thereon.

[0086] A patterned first metal layer 40 is formed on a fourth surface 120a of the eighth insulating layer 120 (i.e., the surface of the eighth insulating layer 120 opposite to the first insulating layer 26). Therefore, the first via 34 is formed penetrating the first insulating layer 26, the second insulating layer 24, and the eighth insulating layer 120, and electrically connects the first metal layer 40 and the second metal layer 22.

[0087] <<<Eighth Insulating Layer>>> The eighth insulating layer 120 is made of a material with a low dielectric loss tangent. More specifically, the eighth insulating layer 120 preferably has a dielectric loss tangent of 0.002 or less at 10 GHz. The eighth insulating layer 120 is preferably made of a material that adheres well to metal layers that have not been roughened. That is, the eighth insulating layer 120 adheres well to the first metal layer 40 (particularly the back surface side of the first metal layer 40). The eighth insulating layer 120 may be made of the same material as the second insulating layer 24 described above, but is not limited thereto and may be made of any material suitable for the purpose.

[0088] The multilayer substrate 400 of the present embodiment described above can achieve high-speed transmission in each metal layer without roughening the first metal layer 40 and the second metal layer 22 or applying a chemical adhesive coating thereto.

[0089] <<Method of Manufacturing Multilayer Substrate>> Next, a method of manufacturing a multilayer substrate according to the third embodiment will be described in detail. The method of manufacturing the multilayer substrate 400 includes a laminate formation step of forming the laminate 130 and a fifth lamination step of stacking a plurality of laminates 130. The method of manufacturing the multilayer substrate 400 according to the third embodiment differs from the method of manufacturing the multilayer substrate 300 according to the second embodiment in the second lamination step, the first via formation step, and the first metal layer formation step, but the remaining configuration is the same as the method of manufacturing the multilayer substrate 300 according to the second embodiment.

[0090] In the first lamination process in the third embodiment, as shown in Figures 32 and 33, a first insulating layer (particularly, an uncured first insulating layer) 26 and an eighth insulating layer (particularly, an uncured eighth insulating layer) 120 are laminated in this order on the second insulating layer 24.

[0091] Next, in the first via formation step in the third embodiment, as shown in FIGS. 34 and 35, a first via 34 is formed in the first insulating layer 26 and the eighth insulating layer 120.

[0092] Specifically, first, as shown in Fig. 34, through holes 32 are drilled in the first insulating layer 26, the second insulating layer 24, and the eighth insulating layer 120. The through holes 32 can be formed by laser processing, for example. ２ Examples of the laser include, but are not limited to, a laser and a YAG laser, and can be appropriately selected depending on the purpose.

[0093] 35 , the surfaces of the through holes 32 and the eighth insulating layer 120 are plated (copper plated) by a plating process to form first vias (plated vias) 34. At this time, the upper surfaces of the first vias 34 and the eighth insulating layer 120 are also plated with copper. Note that a conductive paste may be filled in place of the plated vias.

[0094] <<<First Metal Layer Forming Step>>> Next, in the first metal layer forming step in the third embodiment, a first metal layer 40 is formed on the first surface 120a of the eighth insulating layer 120, as shown in Figures 36 and 37. The method for forming the first metal layer 40 can be carried out in the same manner as the first metal layer forming step in the first and second embodiments.

[0095] As shown in Figures 38 to 46, the third and subsequent lamination steps are carried out in order to obtain a laminate 130, and a multilayer substrate 400 can be formed by a fifth lamination step in which a plurality of laminates 130 are laminated.

[0096] Electronic Device Next, a description will be given of the electronic device 500 in each embodiment. The electronic device 500 includes at least the multilayer substrate 200, the multilayer substrate 300, or the multilayer substrate 400 and electronic components, and may further include other members as necessary.

[0097] There are no particular limitations on the electronic device 500 and it can be appropriately selected depending on the purpose, such as a personal computer (notebook computer or desktop computer), a telephone, a mobile phone, a tablet-type mobile terminal, a smartphone, a copy machine, a facsimile machine, various printers, a digital camera, a television, a video, a CD device, a DVD device, an air conditioner, a remote control device, etc.

[0098] Fig. 47 shows a schematic cross-sectional view of a semiconductor package. The semiconductor package of Fig. 47 has a motherboard 460 having solder balls 455, an interposer 470 connected to the motherboard 460 via bumps 465, and a semiconductor element 480 arranged on the interposer 470. An example of the semiconductor element 480 is an FPGA (Field Programmable Gate Array) chip.

[0099] Here, the multilayer substrate 200, the multilayer substrate 300, or the multilayer substrate 400 can be used as the motherboard 460 in FIG. 47, as an interposer 470, and further as a circuit board that constitutes the semiconductor element 480.

[0100] The present invention is not limited to the above-described embodiments, and various modifications are possible without departing from the spirit and scope of the present invention. (Supplementary Note 1) A multilayer substrate comprising a plurality of laminates, each laminate having: a first insulating layer having a patterned first metal layer formed on a first surface; a second insulating layer laminated on a second surface of the first insulating layer and having a patterned second metal layer embedded on a third surface opposite the first insulating layer; a third insulating layer laminated on the first surface so that the first metal layer is embedded; and a fourth insulating layer laminated on the third insulating layer; a first via formed to penetrate the first insulating layer and the second insulating layer and electrically connect the first metal layer and the second metal layer; and a second via formed to penetrate the third insulating layer and the fourth insulating layer; and at least the second insulating layer and the fourth insulating layer are made of a material with a low dielectric loss tangent. (Supplementary Note 2) The multilayer substrate according to Supplementary Note 1, wherein the second insulating layer and the fourth insulating layer have a dielectric loss tangent of 0.002 or less at 10 GHz. (Supplementary Note 3) The multilayer substrate according to Supplementary Note 1 or Supplementary Note 2, wherein the second metal layer has a surface that is not roughened. a first insulating layer having a patterned first metal layer formed on a first surface; a second insulating layer laminated on a second surface of the first insulating layer and having a patterned second metal layer formed on a third surface opposite the first insulating layer, the third insulating layer being on the opposite side to the first insulating layer; a fifth insulating layer laminated on the first surface so that the first metal layer is embedded, a sixth insulating layer laminated on the fifth insulating layer, and a seventh insulating layer laminated on the sixth insulating layer; a first via formed to penetrate the first insulating layer and the second insulating layer and electrically connect the first metal layer and the second metal layer; and a second via formed to penetrate the fifth insulating layer, the sixth insulating layer, and the seventh insulating layer; (Supplementary Note 5) The multilayer substrate according to Supplementary Note 4, wherein the second insulating layer, the fifth insulating layer, and the seventh insulating layer have a dielectric loss tangent of 0.002 or less at 10 GHz.(Appendix 6) The multilayer substrate according to appendix 4 or appendix 5, wherein the first metal layer and the second metal layer are not subjected to a surface roughening treatment. a first insulating layer; an eighth insulating layer laminated on a first surface of the first insulating layer and having a patterned first metal layer formed on a fourth surface opposite the first insulating layer; a second insulating layer laminated on a second surface of the first insulating layer and having a patterned second metal layer formed on a third surface opposite the first insulating layer; a fifth insulating layer laminated on the fourth surface so that the first metal layer is embedded, a sixth insulating layer laminated on the fifth insulating layer, and a seventh insulating layer laminated on the sixth insulating layer; a first via formed to penetrate the first insulating layer, the second insulating layer, and the eighth insulating layer, and electrically connecting the first metal layer and the second metal layer; and a second via formed to penetrate the fifth insulating layer, the sixth insulating layer, and the seventh insulating layer; (Supplementary Note 8) The multilayer substrate according to Supplementary Note 7, wherein the second insulating layer, the fifth insulating layer, the seventh insulating layer, and the eighth insulating layer have a dielectric loss tangent of 0.002 or less at 10 GHz. (Supplementary Note 9) The multilayer substrate according to Supplementary Note 7 or Supplementary Note 8, wherein the first metal layer and the second metal layer are not subjected to a surface roughening treatment.(Supplementary Note 10) A method for manufacturing a multilayer substrate, comprising: a second metal layer forming step of forming a second metal layer on a three-layer metal foil by etching; a first lamination step of laminating a second insulating layer on the second metal layer so as to bury the second metal layer; a second lamination step of laminating a first insulating layer on the second insulating layer; a first via forming step of forming a first via in the first insulating layer and the second insulating layer; a first metal layer forming step of forming a first metal layer on the first insulating layer; a third lamination step of laminating a third insulating layer so as to bury the first metal layer; an etching step of removing parts other than the second metal layer from the three-layer metal foil by etching; a fourth lamination step of laminating a fourth insulating layer on the third insulating layer; and a second via forming step of forming a second via in the third insulating layer and the fourth insulating layer, thereby forming a laminate; and a fifth lamination step of laminating a plurality of the laminates. The method for manufacturing a multilayer substrate according to claim 10, wherein at least the second insulating layer and the fourth insulating layer are made of a material with a low dielectric loss tangent. (Appendix 11) The method for manufacturing a multilayer substrate according to claim 10, wherein the second insulating layer and the fourth insulating layer have a dielectric loss tangent of 0.002 or less at 10 GHz.(Supplementary Note 12) A method for manufacturing a multilayer substrate, comprising: a second metal layer forming step of forming a second metal layer on a three-layer metal foil by etching; a first lamination step of laminating a second insulating layer on the second metal layer so as to bury the second metal layer; a second lamination step of laminating a first insulating layer on the second insulating layer; a first via forming step of forming a first via in the first insulating layer and the second insulating layer; a first metal layer forming step of forming a first metal layer on the first insulating layer; a third lamination step of laminating a fifth insulating layer and a sixth insulating layer so as to bury the first metal layer; an etching step of removing parts other than the second metal layer from the three-layer metal foil by etching; a fourth lamination step of laminating a seventh insulating layer on the sixth insulating layer; and a second via forming step of forming second vias in the fifth insulating layer, the sixth insulating layer, and the seventh insulating layer, thereby forming a laminate; and a fifth lamination step of laminating a plurality of the laminates. The method for manufacturing a multilayer substrate according to claim 12, wherein at least the second insulating layer, the fifth insulating layer, and the seventh insulating layer are made of a material with a low dielectric loss tangent. (Appendix 13) The method for manufacturing a multilayer substrate according to claim 12, wherein the second insulating layer, the fifth insulating layer, and the seventh insulating layer have a dielectric loss tangent of 0.002 or less at 10 GHz.(Supplementary Note 14) A method for manufacturing a multilayer board, comprising: a second metal layer forming step of forming a second metal layer on a three-layer metal foil by etching; a first laminating step of laminating a second insulating layer on the second metal layer so as to bury the second metal layer; a second laminating step of laminating a first insulating layer and an eighth insulating layer on the second insulating layer; a first via forming step of forming a first via in the first insulating layer, the second insulating layer, and the eighth insulating layer; a first metal layer forming step of forming a first metal layer on the eighth insulating layer; a third laminating step of laminating a fifth insulating layer and a sixth insulating layer so as to bury the first metal layer; an etching step of removing parts other than the second metal layer from the three-layer metal foil by etching; a fourth laminating step of laminating a seventh insulating layer on the sixth insulating layer; and a second via forming step of forming a second via in the fifth insulating layer, the sixth insulating layer, and the seventh insulating layer, thereby forming a laminate; and a fifth lamination step of laminating a plurality of the laminates, wherein at least the second insulating layer, the fifth insulating layer, the seventh insulating layer, and the eighth insulating layer are made of a material with a low dielectric tangent. (Supplementary Note 15) The method for manufacturing a multilayer substrate according to Supplementary Note 14, wherein the second insulating layer, the fifth insulating layer, the seventh insulating layer, and the eighth insulating layer have a dielectric tangent of 0.002 or less at 10 GHz. (Supplementary Note 16) An electronic device comprising the multilayer substrate according to Supplementary Note 1, Supplementary Note 4, or Supplementary Note 7, and an electronic component.

Claims

1. A multilayer substrate comprising a plurality of laminated bodies each having: a first insulating layer having a patterned first metal layer formed on its first surface; a second insulating layer laminated on the second surface of said first insulating layer and having a patterned second metal layer embedded on its third surface opposite said first insulating layer; a third insulating layer laminated on said first surface so that the first metal layer is embedded; and a fourth insulating layer laminated on said third insulating layer; a first via formed to penetrate said first insulating layer and second insulating layer and electrically connect said first metal layer and said second metal layer; and a second via formed to penetrate said third insulating layer and fourth insulating layer; and at least said second insulating layer and said fourth insulating layer are made of a material with a low dielectric loss tangent.

2. The multilayer board according to claim 1, characterized in that the second insulating layer and the fourth insulating layer have a dielectric loss tangent of 0.002 or less at 10 GHz.

3. The multilayer board according to claim 1 or claim 2, characterized in that the second metal layer has no surface roughening treatment.

4. A multilayer substrate comprising a plurality of laminated bodies each having: a first insulating layer having a patterned first metal layer formed on its first surface; a second insulating layer laminated on the second surface of said first insulating layer and having a patterned second metal layer embedded on its third surface opposite said first insulating layer; a fifth insulating layer laminated on said first surface so that the first metal layer is embedded; a sixth insulating layer laminated on said fifth insulating layer; and a seventh insulating layer laminated on said sixth insulating layer; a first via formed to penetrate said first insulating layer and said second insulating layer and electrically connect said first metal layer and said second metal layer; and a second via formed to penetrate said fifth insulating layer, said sixth insulating layer, and said seventh insulating layer; and at least said second insulating layer, said fifth insulating layer, and said seventh insulating layer are made of a material with a low dielectric loss tangent.

5. The multilayer board according to claim 4, wherein the second insulating layer, the fifth insulating layer, and the seventh insulating layer have a dielectric loss tangent of 0.002 or less at 10 GHz.

6. A multilayer board as claimed in claim 4 or claim 5, characterized in that the first metal layer and the second metal layer have not undergone surface roughening treatment.

7. A multilayer substrate comprising a plurality of laminated bodies, each of which has: a first insulating layer; an eighth insulating layer laminated on a first surface of the first insulating layer and having a patterned first metal layer formed on its fourth surface opposite the first insulating layer; a second insulating layer laminated on a second surface of the first insulating layer and having a patterned second metal layer embedded on its third surface opposite the first insulating layer; a fifth insulating layer laminated on the fourth surface so that the first metal layer is embedded, a sixth insulating layer laminated on the fifth insulating layer, and a seventh insulating layer laminated on the sixth insulating layer; a first via formed to penetrate the first insulating layer, the second insulating layer, and the eighth insulating layer and electrically connect the first metal layer and the second metal layer; and a second via formed to penetrate the fifth insulating layer, the sixth insulating layer, and the seventh insulating layer; and at least the second insulating layer, the fifth insulating layer, the seventh insulating layer, and the eighth insulating layer are made of a material with a low dielectric tangent.

8. The multilayer board according to claim 7, wherein the second insulating layer, the fifth insulating layer, the seventh insulating layer, and the eighth insulating layer have a dielectric loss tangent of 0.002 or less at 10 GHz.

9. A multilayer board as claimed in claim 7 or claim 8, characterized in that the first metal layer and the second metal layer have no surface roughening treatment.

10. A method for manufacturing a multilayer substrate, comprising: a second metal layer forming step of etching a three-layer metal foil to form a second metal layer; a first lamination step of laminating a second insulating layer on the second metal layer so as to bury the second metal layer; a second lamination step of laminating a first insulating layer on the second insulating layer; a first via forming step of forming a first via in the first insulating layer and the second insulating layer; a first metal layer forming step of forming a first metal layer on the first insulating layer; a third lamination step of laminating a third insulating layer so as to bury the first metal layer; an etching step of etching the three-layer metal foil to remove all but the second metal layer; a fourth lamination step of laminating a fourth insulating layer on the third insulating layer; and a second via forming step of forming a second via in the third insulating layer and the fourth insulating layer to form a laminate; and a fifth lamination step of laminating a plurality of the laminates.

10. A method for manufacturing a multilayer substrate, wherein at least the second insulating layer and the fourth insulating layer are made of a material with a low dielectric tangent.

11. The method for manufacturing a multilayer substrate according to claim 10, wherein the second insulating layer and the fourth insulating layer have a dielectric loss tangent of 0.002 or less at 10 GHz.

12. A method for manufacturing a multilayer substrate, comprising: a second metal layer forming step of etching a three-layer metal foil to form a second metal layer; a first lamination step of laminating a second insulating layer on the second metal layer so as to bury the second metal layer; a second lamination step of laminating a first insulating layer on the second insulating layer; a first via forming step of forming a first via in the first insulating layer and the second insulating layer; a first metal layer forming step of forming a first metal layer on the first insulating layer; a third lamination step of laminating a fifth insulating layer and a sixth insulating layer so as to bury the first metal layer; an etching step of etching the three-layer metal foil to remove all layers other than the second metal layer; a fourth lamination step of laminating a seventh insulating layer on the sixth insulating layer; and a second via forming step of forming second vias in the fifth insulating layer, the sixth insulating layer, and the seventh insulating layer to form a laminate; and a fifth lamination step of laminating a plurality of the laminates.

10. A method for manufacturing a multilayer substrate, wherein at least the second insulating layer, the fifth insulating layer, and the seventh insulating layer are made of a material with a low dielectric tangent.

13. The method for manufacturing a multilayer substrate according to claim 12, wherein the second insulating layer, the fifth insulating layer and the seventh insulating layer have a dielectric loss tangent of 0.002 or less at 10 GHz.

14. A method for manufacturing a multilayer board, comprising: a second metal layer forming step of etching a three-layer metal foil to form a second metal layer; a first lamination step of laminating a second insulating layer on the second metal layer so as to bury the second metal layer; a second lamination step of laminating a first insulating layer and an eighth insulating layer on the second insulating layer; a first via forming step of forming a first via in the first insulating layer, the second insulating layer, and the eighth insulating layer; a first metal layer forming step of forming a first metal layer on the eighth insulating layer; a third lamination step of laminating a fifth insulating layer and a sixth insulating layer so as to bury the first metal layer; an etching step of etching the three-layer metal foil to remove all layers except the second metal layer; a fourth lamination step of laminating a seventh insulating layer on the sixth insulating layer; and a second via forming step of forming a second via in the fifth insulating layer, the sixth insulating layer, and the seventh insulating layer, thereby forming a laminate. and a fifth lamination step of laminating a plurality of the laminates, wherein at least the second insulating layer, the fifth insulating layer, the seventh insulating layer, and the eighth insulating layer are made of a material with a low dielectric tangent.

15. The method for manufacturing a multilayer substrate according to claim 14, wherein the second insulating layer, the fifth insulating layer, the seventh insulating layer, and the eighth insulating layer have a dielectric loss tangent of 0.002 or less at 10 GHz.

16. An electronic device comprising a multilayer substrate according to claim 1, claim 4 or claim 7 and an electronic component.

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