Display module, electronic device and voltage adjustment method

Abstract

Provided in the present application are a display module, an electronic device and a voltage adjustment method. The method is applied to the display module, and the display module comprises a display driving chip and a display screen. The method comprises: a display screen being in a first display mode, a display driving chip determining, on the basis of received first information, to switch the display screen to be in a second display mode, wherein a first input voltage and a first output voltage that correspond to the second display mode are a first voltage value and a second voltage value; the display driving chip receiving a first voltage, which is output by a first power source, as the first input voltage, wherein the first voltage is the voltage that is output by the first power source on the basis of the received first voltage value; and the display driving chip outputting the first output voltage to the display screen on the basis of the second voltage value, for example, the first input voltage and the first output voltage are gate voltages. By means of the present application, the input voltage and output voltage of a display driving chip can be dynamically adjusted on the basis of a display mode of a display screen, so that the power consumption is reduced while ensuring the normal display of the display screen.

Description

Display modules, electronic devices, and voltage regulation methods

[0001] This application claims priority to Chinese Patent Application No. 202410698156.5, filed with the China National Intellectual Property Administration on May 30, 2024, entitled "Display Module, Electronic Device and Voltage Adjustment Method", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of computer technology, and in particular to a display module, electronic device, and voltage adjustment method. Background Technology

[0003] With the development of display technology, displays are gradually evolving towards higher brightness. However, achieving higher brightness also increases the power consumption of the display driver chip and the display itself, leading to a series of problems such as overheating. The display driver chip can receive the voltage output from the power supply as an input voltage, such as the input gate voltage. The display driver chip can process this input voltage and output the processed output voltage to the display. For example, the display driver chip can process the input gate voltage and output the processed gate voltage to the gate of the transistor in the display to obtain the output gate voltage. Currently, the input and output voltages of the display driver chip are fixed. Furthermore, to ensure normal display at maximum brightness, the input and output voltages of the display driver chip are set according to the maximum brightness of the display, resulting in high power consumption of the display driver chip. Summary of the Invention

[0004] This application discloses a display module, electronic device, and voltage adjustment method, which can dynamically adjust the input voltage and output voltage of the display driver chip according to the display mode of the display screen, such as dynamically adjusting the input gate voltage and output gate voltage of the display driver chip, thereby reducing the power consumption of the display driver chip while ensuring normal display of the display screen.

[0005] In a first aspect, this application provides a display module, including a display driver chip and a display screen. The display screen is in a first display mode. The display driver chip is used to receive first information, determine to switch the display screen to a second display mode based on the first information, determine a first input voltage corresponding to the second display mode as a first voltage value based on the second display mode, the first input voltage being a voltage output by a first power supply to the display driver chip, determine a first output voltage corresponding to the second display mode as a second voltage value based on the second display mode, and the first output voltage being a voltage output by the display driver chip to the display screen. The display driver chip is also used to send the first voltage value to the first power supply; the display driver chip is also used to receive a first voltage output by the first power supply as a first input voltage, the first voltage being output by the first power supply based on the first voltage value; and the display driver chip is also used to output a first output voltage to the display screen based on the second voltage value.

[0006] In some examples, the display driver chip receives first information sent by the processor, the first information including the brightness of the second display mode. In some examples, the first input voltage is an input gate voltage, the first output voltage is an output gate voltage, and the first output voltage is the voltage output by the display driver chip to the gate of the transistor in the display screen. In some examples, the first voltage value of the second display mode with a first brightness is greater than the first voltage value of the second display mode with a second brightness, and the second voltage value of the second display mode with a first brightness is greater than the second voltage value of the second display mode with a second brightness, meaning the first brightness is greater than the second brightness.

[0007] The display module can determine the corresponding first input voltage as the first voltage value and the corresponding first output voltage as the second voltage value according to the second display mode. The display module can send the first voltage value to the first power supply so that the first power supply outputs the first input voltage to the display driver chip according to the first voltage value. In addition, the display driver chip can output the first output voltage to the display screen according to the second voltage value, thereby setting the display screen's display mode to the second display mode. That is to say, the display module can dynamically adjust the first input voltage and the first output voltage according to the display screen's display mode. For example, it can use a higher first input voltage and the first output voltage under high brightness to ensure the display effect, and use a lower first input voltage and the first output voltage under low brightness to save power consumption, thereby reducing the power consumption of the display driver chip while ensuring the normal display of the display screen.

[0008] In one possible implementation, the display screen includes multiple pixel circuits, each pixel circuit including M transistors, where M is a positive integer, the first input voltage is an input gate voltage, the first output voltage includes M output gate voltages, the second voltage value includes M voltage values, and the display driver chip is further configured to determine, according to the second display mode, that the M output gate voltages corresponding to the second display mode are M voltage values, and to output the M output gate voltages to the M transistors according to the M voltage values.

[0009] Different transistors in the pixel circuit can receive different output gate voltages. For example, the output gate voltage received by each transistor can be the actual voltage required by that transistor, thus achieving a more refined voltage output, instead of all M transistors receiving the same output gate voltage. This avoids the power consumption waste caused by the overflow of the output gate voltage received by some transistors, and further reduces the power consumption of the display driver chip.

[0010] In one possible implementation, the display screen includes a gate driving circuit, which includes M scanning circuits, each of which is connected to M transistors in a pixel circuit. The display driver chip is further configured to output M output gate voltages to the M transistors and the M scanning circuits, respectively. The display driver chip outputs the same first output gate voltage to a first transistor and a first scanning circuit. The first transistor is any one of the M transistors, and the first scanning circuit is the scanning circuit connected to the first transistor among the M scanning circuits.

[0011] Different scanning circuits in the gate driving circuit can receive output gate voltages of different values. For example, the output gate voltage received by each scanning circuit can be the actual voltage required by that scanning circuit, so as to achieve a more refined voltage output, instead of all M scanning circuits receiving the same output gate voltage. This avoids the power consumption waste caused by the overflow of the output gate voltage received by some scanning circuits, and further reduces the power consumption of the display driver chip.

[0012] In one possible implementation, the first input voltage corresponding to the first display mode is a third voltage value, and the display driver chip is further configured to determine that the first voltage value and the third voltage value are different before sending the first voltage value to the first power supply; the first output voltage corresponding to the first display mode is a fourth voltage value, and the display driver chip is further configured to determine that the second voltage value and the fourth voltage value are different before outputting the first output voltage to the display screen according to the second voltage value.

[0013] In one possible implementation, the display driver chip is further configured to determine that the first voltage value and the third voltage value are the same and that the second voltage value and the fourth voltage value are different, receive the second voltage output by the first power supply as the first input voltage, wherein the second voltage is output by the first power supply based on the third voltage value, and output the first output voltage to the display screen based on the second voltage value; or, the display driver chip is further configured to determine that the first voltage value and the third voltage value are different and that the second voltage value and the fourth voltage value are the same, send the first voltage value to the first power supply, receive the first voltage output by the first power supply as the first input voltage, and output the first output voltage to the display screen based on the fourth voltage value; or, the display driver chip is further configured to determine that the first voltage value and the third voltage value are the same and that the second voltage value and the fourth voltage value are the same, receive the second voltage output by the first power supply as the first input voltage, wherein the second voltage is output by the first power supply based on the third voltage value, and output the first output voltage to the display screen based on the fourth voltage value.

[0014] The display driver chip can determine whether the third voltage value of the first input voltage corresponding to the first display mode is the same as the first voltage value of the first input voltage corresponding to the second display mode, and whether the fourth voltage value of the first output voltage corresponding to the first display mode is the same as the second voltage value of the first output voltage corresponding to the second display mode. If the third voltage value is different from the first voltage value, the display driver chip can send the first voltage value to the first power supply so that the first power supply adjusts the first input voltage to the first voltage value. If the third voltage value is the same as the first voltage value, the display driver chip can not send the first voltage value so that the first power supply continues to output the first input voltage of the third voltage value. If the fourth voltage value is different from the second voltage value, the display driver chip can adjust the first output voltage to the second voltage value. If the fourth voltage value is the same as the second voltage value, the display driver chip can not adjust the first output voltage and continue to output the first output voltage of the fourth voltage value. In other words, the display driver chip can select whether to adjust the first input voltage and whether to adjust the first output voltage according to the first display mode and the second display mode, dynamically realizing effective voltage adjustment in different scenarios and covering a wider range of scenarios.

[0015] In one possible implementation, the display driver chip is further configured to determine that a first voltage value is greater than a third voltage value and a second voltage value is greater than a fourth voltage value, send the first voltage value to a first power supply at a first moment, output a first output voltage to the display screen based on the second voltage value at a second moment after the first moment, and output the first output voltage to the display screen based on the fourth voltage value before the second moment; or, the display driver chip is further configured to determine that a first voltage value is less than a third voltage value and a second voltage value is less than a fourth voltage value, output the first output voltage to the display screen based on the second voltage value at a third moment, send the first voltage value to the first power supply at a fourth moment after the third moment, receive the first voltage output by the first power supply as a first input voltage after the fourth moment, and receive the second voltage output by the first power supply as a first input voltage before the fourth moment, wherein the second voltage is output by the first power supply based on the third voltage value.

[0016] In some examples, the first, second, third, and fourth moments are the moments when the display refreshes the screen. In some examples, the second moment is the moment when the display refreshes the screen after the first input voltage reaches a stable first voltage value. In some examples, the fourth moment is the moment when the display refreshes the screen after the first output voltage reaches a stable second voltage value.

[0017] In scenarios where both the first input voltage and the first output voltage need to be increased, the first input voltage can be increased first, and the first output voltage can be increased after the first input voltage reaches a steady state. In scenarios where both the first input voltage and the first output voltage need to be decreased, the first output voltage can be decreased first, and the first input voltage can be decreased after the first output voltage reaches a steady state. This ensures that the difference between the first input voltage and the first output voltage is always greater than the minimum requirement during the voltage adjustment process, thereby ensuring the stability of the transistor voltage during the voltage adjustment process and avoiding abnormal display conditions such as abnormal brightness and flickering.

[0018] In one possible implementation, the display driver chip is further configured to determine, based on the second display mode, that the first output gate voltage corresponding to the second display mode is a fifth voltage value and the first output gate voltage corresponding to the first display mode is a sixth voltage value; the display driver chip is further configured to determine that the fifth voltage value and the sixth voltage value are different, and output the first output gate voltage to the first transistor and the first scanning circuit based on the fifth voltage value; or, the display driver chip is further configured to determine that the fifth voltage value and the sixth voltage value are the same, and output the first output gate voltage to the first transistor and the first scanning circuit based on the sixth voltage value.

[0019] For the first output gate voltage received by the first transistor and the first scanning circuit, the display driver chip can determine whether the sixth voltage value of the first output gate voltage corresponding to the first display mode is the same as the fifth voltage value of the first output gate voltage corresponding to the second display mode. If the sixth voltage value and the fifth voltage value are different, the display driver chip can adjust the first output gate voltage to the fifth voltage value. If the sixth voltage value and the fifth voltage value are the same, the display driver chip can continue to output the first output gate voltage with the sixth voltage value without adjusting the first output gate voltage. In other words, the display driver chip can dynamically adjust any one of the M output gate voltages according to the display mode of the display screen to achieve more precise voltage adjustment and further reduce the power consumption of the display driver chip.

[0020] In one possible implementation, the first display mode and the second display mode are respectively a screen-off display mode and a screen-on display mode, or both the first display mode and the second display mode are either screen-off display mode or screen-on display mode, and the display brightness corresponding to the first display mode and the second display mode is different.

[0021] Regardless of whether the first display mode and the second display mode of the display screen belong to the same type, the first input voltage and the first output voltage can be dynamically adjusted, covering a wide range of scenarios.

[0022] Secondly, this application provides an electronic device, including a processor and a display module as described in any possible implementation of the first aspect, wherein the processor is used to send first information to the display module. In some examples, the processor is a system-on-a-chip (SoC).

[0023] Thirdly, this application provides an electronic device including a processor, a display driver chip, and a display screen. The display screen is in a first display mode. The processor is configured to determine to switch the display screen to a second display mode, and to determine a first input voltage corresponding to the second display mode as a first voltage value based on the second display mode. The first input voltage is the voltage output by a first power supply to the display driver chip. The processor is also configured to determine a first output voltage corresponding to the second display mode as a second voltage value based on the second display mode, and the first output voltage is the voltage output by the display driver chip to the display screen. The processor is further configured to send the first voltage value to the first power supply, and the display driver chip is configured to receive the first voltage output by the first power supply as a first input voltage. The first voltage is the voltage output by the first power supply based on the first voltage value. The processor is further configured to send the second voltage value to the display driver chip, and the display driver chip is further configured to output a first output voltage to the display screen based on the second voltage value.

[0024] In some examples, the processor is a system-on-a-chip (SoC). In some examples, the processor sends first information to the display driver chip, which determines to switch the display screen to a second display mode based on the first information, which includes the brightness of the second display mode. In some examples, the first input voltage is an input gate voltage, the first output voltage is an output gate voltage, and the first output voltage is the voltage output by the display driver chip to the gate of the transistor in the display screen. In some examples, the first voltage value for the second display mode with a first brightness is greater than the first voltage value for the second display mode with a second brightness, and the second voltage value for the second display mode with a first brightness is greater than the second voltage value for the second display mode with a second brightness, meaning the first brightness is greater than the second brightness.

[0025] The processor can determine the corresponding first input voltage as the first voltage value and the corresponding first output voltage as the second voltage value according to the second display mode. The processor can send the first voltage value to the first power supply so that the first power supply outputs the first input voltage to the display driver chip according to the first voltage value. Furthermore, the processor can send the second voltage value to the display driver chip so that the display driver chip can output the first output voltage to the display screen according to the second voltage value, thereby setting the display screen's display mode to the second display mode. In other words, the processor can dynamically adjust the first input voltage and the first output voltage according to the display screen's display mode. For example, it can use a higher first input voltage and the first output voltage under high brightness to ensure the display effect, and use a lower first input voltage and the first output voltage under low brightness to save power consumption, thereby reducing the power consumption of the display driver chip while ensuring normal display of the display screen.

[0026] In one possible implementation, the display screen includes multiple pixel circuits and gate driving circuits. Each pixel circuit includes M transistors, and each gate driving circuit includes M scanning circuits, where M is a positive integer. The M scanning circuits are respectively connected to the M transistors in the pixel circuits. The first input voltage is an input gate voltage, the first output voltage includes M output gate voltages, and the second voltage value includes M voltage values. The processor is further configured to determine, according to the second display mode, that the M output gate voltages corresponding to the second display mode are M voltage values. The processor is further configured to send the M voltage values ​​to a display driver chip, and the display driver chip is further configured to output M output gate voltages to the M transistors and the M scanning circuits respectively according to the M voltage values. The display driver chip outputs the same first output gate voltage to the first transistor and the first scanning circuit. The first transistor is any one of the M transistors, and the first scanning circuit is the scanning circuit connected to the first transistor among the M scanning circuits.

[0027] Different transistors and scanning circuits in the pixel circuit can receive different output gate voltages. For example, the output gate voltage received by each transistor and the connected scanning circuit can be the actual voltage required by that transistor and the scanning circuit, so as to achieve a more refined voltage output, instead of M transistors and M scanning circuits receiving the same output gate voltage. This avoids the power consumption waste caused by the overflow of the output gate voltage received by some transistors and scanning circuits, and further reduces the power consumption of the display driver chip.

[0028] In one possible implementation, the first input voltage corresponding to the first display mode is a third voltage value, and the processor is further configured to determine that the first voltage value and the third voltage value are different before sending the first voltage value to the first power supply; the first output voltage corresponding to the first display mode is a fourth voltage value, and the processor is further configured to determine that the second voltage value and the fourth voltage value are different before sending the second voltage value to the display driver chip.

[0029] In one possible implementation, the processor is further configured to determine that the first voltage value and the third voltage value are the same and that the second voltage value and the fourth voltage value are different, and send the second voltage value to the display driver chip. The display driver chip is further configured to receive the second voltage output by the first power supply as a first input voltage, wherein the second voltage is output by the first power supply based on the third voltage value, and output a first output voltage to the display screen based on the second voltage value. Alternatively, the processor is further configured to determine that the first voltage value and the third voltage value are different and that the second voltage value and the fourth voltage value are the same, and send the first voltage value to the first power supply. The display driver chip is further configured to receive the first voltage output by the first power supply as a first input voltage, and output a first output voltage to the display screen based on the fourth voltage value. Alternatively, the processor is further configured to determine that the first voltage value and the third voltage value are the same and that the second voltage value and the fourth voltage value are the same. The display driver chip is further configured to receive the second voltage output by the first power supply as a first input voltage, wherein the second voltage is output by the first power supply based on the third voltage value, and output a first output voltage to the display screen based on the fourth voltage value.

[0030] The processor can determine whether the third voltage value of the first input voltage corresponding to the first display mode is the same as the first voltage value of the first input voltage corresponding to the second display mode, and whether the fourth voltage value of the first output voltage corresponding to the first display mode is the same as the second voltage value of the first output voltage corresponding to the second display mode. If the third voltage value is different from the first voltage value, the processor can send the first voltage value to the first power supply so that the first power supply adjusts the first input voltage to the first voltage value. If the third voltage value is the same as the first voltage value, the processor can choose not to send the first voltage value so that the first power supply continues to output the first input voltage of the third voltage value. If the fourth voltage value is different from the second voltage value, the processor can send the second voltage value to the display driver chip so that the display driver chip adjusts the first output voltage to the second voltage value. If the fourth voltage value is the same as the second voltage value, the processor can choose not to send the second voltage value so that the display driver chip continues to output the first output voltage of the fourth voltage value. In other words, the processor can select whether to adjust the first input voltage and whether to adjust the first output voltage according to the first display mode and the second display mode, dynamically realizing effective voltage adjustment in different scenarios and covering a wider range of scenarios.

[0031] In one possible implementation, the processor is further configured to determine that a first voltage value is greater than a third voltage value and a second voltage value is greater than a fourth voltage value, send the first voltage value to a first power supply at a first moment, and send the second voltage value to a display driver chip at a second moment after the first moment. The display driver chip is further configured to output a first output voltage to the display screen based on the second voltage value after the second moment, and output the first output voltage to the display screen based on the fourth voltage value before the second moment. Alternatively, the processor is further configured to determine that a first voltage value is less than a third voltage value and a second voltage value is less than a fourth voltage value, send the second voltage value to the display driver chip at a third moment, send the first voltage value to the first power supply at a fourth moment after the third moment, and output the first output voltage to the display screen based on the second voltage value after the third moment. After the fourth moment, the processor receives the first voltage output by the first power supply as a first input voltage, and receives the second voltage output by the first power supply as a first input voltage before the fourth moment. The second voltage is output by the first power supply based on the third voltage value.

[0032] In some examples, the first, second, third, and fourth moments are the moments when the display refreshes the screen. In some examples, the second moment is the moment when the display refreshes the screen after the first input voltage reaches a stable first voltage value. In some examples, the fourth moment is the moment when the display refreshes the screen after the first output voltage reaches a stable second voltage value.

[0033] In scenarios where both the first input voltage and the first output voltage need to be increased, the first input voltage can be increased first, and the first output voltage can be increased after the first input voltage reaches a steady state. In scenarios where both the first input voltage and the first output voltage need to be decreased, the first output voltage can be decreased first, and the first input voltage can be decreased after the first output voltage reaches a steady state. This ensures that the difference between the first input voltage and the first output voltage is always greater than the minimum requirement during the voltage adjustment process, thereby ensuring the stability of the transistor voltage during the voltage adjustment process and avoiding abnormal display conditions such as abnormal brightness and flickering.

[0034] In one possible implementation, the processor is further configured to determine, based on the second display mode, that the first output gate voltage corresponding to the second display mode is a fifth voltage value and the first output gate voltage corresponding to the first display mode is a sixth voltage value; the processor is further configured to determine that the fifth voltage value and the sixth voltage value are different, and send the fifth voltage value to the display driver chip, the display driver chip being further configured to output the first output gate voltage to the first transistor and the first scanning circuit based on the fifth voltage value; or, the processor is further configured to determine that the fifth voltage value and the sixth voltage value are the same, the display driver chip being further configured to output the first output gate voltage to the first transistor and the first scanning circuit based on the sixth voltage value.

[0035] For the first output gate voltage received by the first transistor and the first scanning circuit, the processor can determine whether the sixth voltage value of the first output gate voltage corresponding to the first display mode is the same as the fifth voltage value of the first output gate voltage corresponding to the second display mode. If the sixth voltage value and the fifth voltage value are different, the processor can send the fifth voltage value to the display driver chip so that the display driver chip adjusts the first output gate voltage to the fifth voltage value. If the sixth voltage value and the fifth voltage value are the same, the processor can not send the fifth voltage value so that the display driver chip continues to output the first output gate voltage of the sixth voltage value. In other words, the processor can dynamically adjust any one of the M output gate voltages according to the display mode of the display screen to achieve more precise voltage adjustment and further reduce the power consumption of the display driver chip.

[0036] In one possible implementation, the first display mode and the second display mode are respectively a screen-off display mode and a screen-on display mode, or both the first display mode and the second display mode are either screen-off display mode or screen-on display mode, and the display brightness corresponding to the first display mode and the second display mode is different.

[0037] Regardless of whether the first display mode and the second display mode of the display screen belong to the same type, the first input voltage and the first output voltage can be dynamically adjusted, covering a wide range of scenarios.

[0038] Fourthly, this application provides a voltage adjustment method applied to a display module, the display module including a display driver chip and a display screen. The method includes: the display screen being in a first display mode; the display driver chip receiving first information; the display driver chip determining, based on the first information, to switch the display screen to a second display mode; a first input voltage corresponding to the second display mode being a first voltage value; the first input voltage being a voltage output by a first power supply to the display driver chip; a first output voltage corresponding to the second display mode being a second voltage value; and a first output voltage being a voltage output by the display driver chip to the display screen; the display driver chip receiving the first voltage output by the first power supply as a first input voltage; the first voltage being a voltage output by the first power supply based on the received first voltage value; and the display driver chip outputting a first output voltage to the display screen based on the second voltage value.

[0039] In some examples, the display driver chip receives first information sent by the processor, the first information including the brightness of the second display mode. In some examples, the first input voltage is an input gate voltage, the first output voltage is an output gate voltage, and the first output voltage is the voltage output by the display driver chip to the gate of the transistor in the display screen. In some examples, the first voltage value of the second display mode with a first brightness is greater than the first voltage value of the second display mode with a second brightness, and the second voltage value of the second display mode with a first brightness is greater than the second voltage value of the second display mode with a second brightness, meaning the first brightness is greater than the second brightness.

[0040] The display driver chip determines to switch the display screen to the second display mode. The first power supply can output a first input voltage to the display driver chip according to the first voltage value, and the display driver chip can output a first output voltage to the display screen according to the second voltage value, thereby setting the display screen to the second display mode. In other words, the first input voltage and the first output voltage can be dynamically adjusted according to the display screen's display mode. For example, a higher first input voltage and the first output voltage can be used under high brightness to ensure the display effect, and a lower first input voltage and the first output voltage can be used under low brightness to save power consumption, thereby reducing the power consumption of the display driver chip while ensuring normal display of the display screen.

[0041] In one possible implementation, the display screen includes multiple pixel circuits and gate driving circuits. Each pixel circuit includes M transistors, and each gate driving circuit includes M scanning circuits, where M is a positive integer. The M scanning circuits are respectively connected to the M transistors in the pixel circuits. The first input voltage is an input gate voltage, the first output voltage includes M output gate voltages, the second voltage value includes M voltage values, and the M output gate voltages corresponding to the second display mode are M voltage values ​​respectively. The display driving chip outputs a first output voltage to the display screen according to the second voltage value, including: the display driving chip outputs M output gate voltages to the M transistors and the M scanning circuits respectively according to the M voltage values, wherein the display driving chip outputs the same first output gate voltage to the first transistor and the first scanning circuit, the first transistor is any one of the M transistors, and the first scanning circuit is the scanning circuit connected to the first transistor among the M scanning circuits.

[0042] Different transistors and scanning circuits in the pixel circuit can receive different output gate voltages. For example, the output gate voltage received by each transistor and the connected scanning circuit can be the actual voltage required by that transistor and the scanning circuit, so as to achieve a more refined voltage output, instead of M transistors and M scanning circuits receiving the same output gate voltage. This avoids the power consumption waste caused by the overflow of the output gate voltage received by some transistors and scanning circuits, and further reduces the power consumption of the display driver chip.

[0043] In one possible implementation, the first input voltage corresponding to the first display mode is a third voltage value, and the first output voltage corresponding to the first display mode is a fourth voltage value; before the display driver chip receives the first voltage output by the first power supply as the first input voltage, the above method further includes: determining that the first voltage value and the third voltage value are different; before the display driver chip outputs the first output voltage to the display screen according to the second voltage value, the above method further includes: determining that the second voltage value and the fourth voltage value are different.

[0044] In some examples, the display driver chip sends a first voltage value to a first power supply, and the display driver chip receives the first voltage output by the first power supply as a first input voltage. In other examples, the processor sends a first voltage value to the first power supply, the display driver chip receives the first voltage output by the first power supply as a first input voltage, the processor sends a second voltage value to the display driver chip, and the display driver chip outputs a first output voltage to the display screen according to the second voltage value.

[0045] In one possible implementation, the method further includes: when the first voltage value and the third voltage value are the same and the second voltage value and the fourth voltage value are different, the display driver chip receives the second voltage output by the first power supply as the first input voltage, the second voltage being output by the first power supply based on the third voltage value, and the display driver chip outputs the first output voltage to the display screen based on the second voltage value; or, when the first voltage value and the third voltage value are different and the second voltage value and the fourth voltage value are the same, the display driver chip sends the first voltage value to the first power supply, the display driver chip receives the first voltage output by the first power supply as the first input voltage, and the display driver chip outputs the first output voltage to the display screen based on the fourth voltage value; or, when the first voltage value and the third voltage value are the same and the second voltage value and the fourth voltage value are the same, the display driver chip receives the second voltage output by the first power supply as the first input voltage, the second voltage being output by the first power supply based on the third voltage value, and the display driver chip outputs the first output voltage to the display screen based on the fourth voltage value.

[0046] If the third voltage value differs from the first voltage value, the first power supply adjusts the first input voltage to the first voltage value. If the third voltage value is the same as the first voltage value, the first power supply continues to output the first input voltage of the third voltage value. If the fourth voltage value differs from the second voltage value, the display driver chip adjusts the first output voltage to the second voltage value. If the fourth voltage value is the same as the second voltage value, the display driver chip continues to output the first output voltage of the fourth voltage value. In other words, the adjustment of the first input voltage and the first output voltage can be selected according to the first display mode and the second display mode, dynamically achieving effective voltage adjustment in different scenarios and covering a wider range of scenarios.

[0047] In one possible implementation, the first voltage value is greater than the third voltage value and the second voltage value is greater than the fourth voltage value; the display driver chip receives the first voltage output by the first power supply as the first input voltage, including: the display driver chip sends the first voltage value to the first power supply at a first moment, and the display driver chip receives the first voltage output by the first power supply as the first input voltage after the first moment; the display driver chip outputs a first output voltage to the display screen according to the second voltage value, including: the display driver chip outputs the first output voltage to the display screen according to the second voltage value at a second moment after the first moment; the above method further includes: the display driver chip outputs the first output voltage to the display screen according to the fourth voltage value before the second moment; or, the first power supply... If the voltage value is less than the third voltage value and the second voltage value is less than the fourth voltage value, the display driver chip outputs a first output voltage to the display screen according to the second voltage value, including: the display driver chip outputs the first output voltage to the display screen according to the second voltage value at a third moment; the display driver chip receives the first voltage output by the first power supply as the first input voltage, including: the display driver chip sends the first voltage value to the first power supply at a fourth moment after the third moment, and the display driver chip receives the first voltage output by the first power supply as the first input voltage after the fourth moment; the above method further includes: the display driver chip receives the second voltage output by the first power supply as the first input voltage before the fourth moment, the second voltage being output by the first power supply according to the third voltage value.

[0048] In one possible implementation, the first voltage value is greater than the third voltage value and the second voltage value is greater than the fourth voltage value; the display driver chip receives the first voltage output by the first power supply as the first input voltage, including: the processor sends the first voltage value to the first power supply at a first moment, and the display driver chip receives the first voltage output by the first power supply as the first input voltage after the first moment; the display driver chip outputs a first output voltage to the display screen according to the second voltage value, including: the processor sends the second voltage value to the display driver chip at a second moment after the first moment, and the display driver chip outputs the first output voltage to the display screen according to the second voltage value; the above method further includes: the display driver chip outputs the first output voltage to the display screen according to the fourth voltage value before the second moment; or, the first power supply... If the voltage value is less than the third voltage value and the second voltage value is less than the fourth voltage value, the display driver chip outputs a first output voltage to the display screen based on the second voltage value, including: the processor sends the second voltage value to the display driver chip at a third moment, and the display driver chip outputs the first output voltage to the display screen based on the second voltage value; the display driver chip receives the first voltage output by the first power supply as the first input voltage, including: the processor sends the first voltage value to the first power supply at a fourth moment after the third moment, and the display driver chip receives the first voltage output by the first power supply as the first input voltage after the fourth moment; the above method further includes: the display driver chip receives the second voltage output by the first power supply as the first input voltage before the fourth moment, the second voltage being output by the first power supply based on the third voltage value.

[0049] In some examples, the first, second, third, and fourth moments are the moments when the display refreshes the screen. In some examples, the second moment is the moment when the display refreshes the screen after the first input voltage reaches a stable first voltage value. In some examples, the fourth moment is the moment when the display refreshes the screen after the first output voltage reaches a stable second voltage value.

[0050] In scenarios where both the first input voltage and the first output voltage need to be increased, the first input voltage can be increased first, and the first output voltage can be increased after the first input voltage reaches a steady state. In scenarios where both the first input voltage and the first output voltage need to be decreased, the first output voltage can be decreased first, and the first input voltage can be decreased after the first output voltage reaches a steady state. This ensures that the difference between the first input voltage and the first output voltage is always greater than the minimum requirement during the voltage adjustment process, thereby ensuring the stability of the transistor voltage during the voltage adjustment process and avoiding abnormal display conditions such as abnormal brightness and flickering.

[0051] In one possible implementation, the first output gate voltage corresponding to the second display mode is a fifth voltage value, and the first output gate voltage corresponding to the first display mode is a sixth voltage value; the display driver chip outputs a first output voltage to the display screen according to the second voltage value, including: if the fifth voltage value and the sixth voltage value are different, the display driver chip outputs a first output gate voltage to the first transistor and the first scanning circuit according to the fifth voltage value; or, if the fifth voltage value and the sixth voltage value are the same, the display driver chip outputs a first output gate voltage to the first transistor and the first scanning circuit according to the sixth voltage value.

[0052] In some examples, the above method further includes: the fifth voltage value and the sixth voltage value are different, and the processor sends the fifth voltage value to the display driver chip; in other examples, the fifth voltage value and the sixth voltage value are the same, and the processor does not send the fifth voltage value.

[0053] If the first output gate voltage received by the first transistor and the first scanning circuit is different from the fifth voltage value, the display driver chip will adjust the first output gate voltage to the fifth voltage value. If the sixth voltage value is the same as the fifth voltage value, the display driver chip will continue to output the first output gate voltage of the sixth voltage value. In other words, any one of the M output gate voltages can be dynamically adjusted according to the display mode of the display screen to achieve more precise voltage adjustment and further reduce the power consumption of the display driver chip.

[0054] In one possible implementation, the first display mode and the second display mode are respectively a screen-off display mode and a screen-on display mode, or both the first display mode and the second display mode are either screen-off display mode or screen-on display mode, and the display brightness corresponding to the first display mode and the second display mode is different.

[0055] Regardless of whether the first display mode and the second display mode of the display screen belong to the same type, the first input voltage and the first output voltage can be dynamically adjusted, covering a wide range of scenarios.

[0056] Fifthly, this application provides a computer storage medium storing a computer program that, when executed by a processor, implements the method in any of the possible implementations of the fourth aspect above.

[0057] Sixthly, this application provides a computer program product that, when run on a device, performs the method in any of the possible implementations of the fourth aspect above.

[0058] In a seventh aspect, this application provides a chip, characterized in that it includes a processing circuit and an interface circuit, the interface circuit being used to receive code instructions and transmit them to the processing circuit, and the processing circuit being used to execute the code instructions to perform the method in any possible implementation of the fourth aspect above.

[0059] It should be understood that the descriptions of technical features, technical solutions, beneficial effects, or similar language in this application do not imply that all features and advantages can be achieved in any single implementation. Rather, it is understood that the description of a feature or beneficial effect means that a specific technical feature, technical solution, or beneficial effect is included in at least one implementation. Therefore, the descriptions of technical features, technical solutions, or beneficial effects in this application do not necessarily refer to the same implementation. Furthermore, the technical features, technical solutions, and beneficial effects described in this application can be combined in any suitable manner. Those skilled in the art will understand that this application can be implemented without one or more specific technical features, technical solutions, or beneficial effects of a particular implementation. In other implementations, additional technical features and beneficial effects may be identified in specific implementations that do not embody all implementations. Attached Figure Description

[0060] The following describes the accompanying drawings used in this application.

[0061] Figure 1 is a schematic diagram of the hardware structure of an electronic device provided in this application;

[0062] Figure 2 is a schematic diagram of the hardware structure of another electronic device provided in this application;

[0063] Figure 3 is a schematic diagram of the hardware structure of another electronic device provided in this application;

[0064] Figure 4 is a schematic diagram of a transistor provided in this application;

[0065] Figure 5 illustrates a schematic diagram of a brightness and its corresponding voltage;

[0066] Figure 6 is a schematic diagram of the hardware structure of another electronic device provided in this application;

[0067] Figure 7 is a schematic diagram of the hardware structure of another electronic device provided in this application;

[0068] Figure 8 is a schematic diagram of the hardware structure of another electronic device provided in this application;

[0069] Figure 9 is a schematic diagram of a pixel circuit provided in this application;

[0070] Figure 10 is a schematic diagram of another pixel circuit provided in this application;

[0071] Figure 11 is a schematic flowchart of a voltage adjustment method provided in this application;

[0072] Figure 12 is a schematic flowchart of another voltage adjustment method provided in this application;

[0073] Figure 13 is a flowchart illustrating another voltage adjustment method provided in this application;

[0074] Figure 14 is a schematic flowchart of another voltage adjustment method provided in this application;

[0075] Figures 15-20 are timing diagrams of some voltage adjustment processes provided in the embodiments of this application. Detailed Implementation

[0076] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings. The terminology used in the implementation section of this application is only for explaining specific embodiments of this application and is not intended to limit this application.

[0077] In the description of the embodiments of this application, unless otherwise stated, " / " means "or". For example, A / B can mean A or B. The "and / or" in the text is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, and B exists alone. In addition, in the description of the embodiments of this application, "multiple" means two or more.

[0078] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as implying or suggesting relative importance or implicitly indicating the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature, and in the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more.

[0079] The electronic device 100 provided in this application embodiment includes a display screen. The electronic device 100 may be, but is not limited to, a mobile phone, tablet computer, handheld computer, desktop computer, laptop computer, ultra-mobile personal computer (UMPC), netbook, cellular phone, personal digital assistant (PDA), and wearable devices such as smart bracelets, smartwatches, and smart glasses; extended reality (XR) devices such as augmented reality (AR), virtual reality (VR), and mixed reality (MR); in-vehicle devices; or smart city devices. This application embodiment does not impose any special restrictions on the specific type of electronic device 100.

[0080] Figure 1 is a schematic diagram of the hardware structure of an electronic device 100 provided in an embodiment of this application. As shown in Figure 1, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor module 180, buttons 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, a barometric pressure sensor 180C, a magnetic sensor 180D, an accelerometer sensor 180E, a distance sensor 180F, a proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0081] The structures illustrated in the embodiments of this application do not constitute a specific limitation on the electronic device 100. In other embodiments of this application, the electronic device 100 may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0082] Processor 110 may include one or more processing units, such as application processor (AP), modem processor, graphics processing unit (GPU), image signal processor (ISP), controller, video codec, digital signal processor (DSP), baseband processor, and / or neural network processing unit (NPU). These different processing units may be independent devices or integrated into one or more processors.

[0083] The controller can generate operation control signals based on the instruction opcode and timing signals to complete the control of instruction fetching and execution.

[0084] The processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory can store instructions or data that the processor 110 has just used or that are used repeatedly. If the processor 110 needs to use the instruction or data again, it can retrieve it directly from the memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0085] In some embodiments, the processor 110 may include one or more interfaces. Interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0086] The charging management module 140 receives charging input from a charger. The charger can be a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 receives charging input from the wired charger via the USB interface 130. In some wireless charging embodiments, the charging management module 140 receives wireless charging input via the wireless charging coil of the electronic device 100. While charging the battery 142, the charging management module 140 can also supply power to the electronic device via the power management module 141.

[0087] The power management module 141 connects the battery 142, the charging management module 140, and the processor 110. The power management module 141 receives input from the battery 142 and / or the charging management module 140, providing power to the processor 110, internal memory 121, display screen 194, camera 193, and wireless communication module 160, etc. The power management module 141 can also monitor parameters such as battery capacity, battery cycle count, and battery health status (leakage current, impedance). In some other embodiments, the power management module 141 may also be located within the processor 110. In other embodiments, the power management module 141 and the charging management module 140 may be located in the same device.

[0088] The wireless communication function of electronic device 100 can be realized through antenna 1, antenna 2, mobile communication module 150, wireless communication module 160, modem processor and baseband processor, etc.

[0089] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover one or more communication frequency bands. Different antennas can also be multiplexed to improve antenna utilization. For example, antenna 1 can be multiplexed as a diversity antenna for a wireless local area network. In some other embodiments, the antennas can be used in conjunction with tuning switches.

[0090] The mobile communication module 150 can provide wireless communication solutions for applications on the electronic device 100, including second-generation (2G), third-generation (3G), fourth-generation (4G), fifth-generation (5G), and sixth-generation (6G) mobile communication technologies. The mobile communication module 150 may include at least one filter, switch, power amplifier, low-noise amplifier (LNA), etc. The mobile communication module 150 can receive electromagnetic waves via antenna 1, and perform filtering, amplification, and other processing on the received electromagnetic waves before transmitting them to a modem processor for demodulation. The mobile communication module 150 can also amplify the signal modulated by the modem processor and convert it into electromagnetic waves for radiation via antenna 1. In one embodiment, at least some functional modules of the mobile communication module 150 may be housed in the processor 110. In another embodiment, at least some functional modules of the mobile communication module 150 and at least some modules of the processor 110 may be housed in the same device.

[0091] The modem processor may include a modulator and a demodulator. The modulator modulates the low-frequency baseband signal to be transmitted into a mid-to-high frequency signal. The demodulator demodulates the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low-frequency baseband signal to the baseband processor for processing. After processing by the baseband processor, the low-frequency baseband signal is transmitted to the application processor. The application processor outputs sound signals through an audio device (not limited to speaker 170A, receiver 170B, etc.) or displays images or videos through the display screen 194. In some embodiments, the modem processor may be a separate device. In other embodiments, the modem processor may be independent of the processor 110 and may be housed in the same device as the mobile communication module 150 or other functional modules.

[0092] The wireless communication module 160 can provide wireless communication solutions for use on the electronic device 100, including wireless local area networks (WLANs) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), and wireless communication technologies compliant with the Sparklink Alliance specifications. Sparklink Alliance-compliant wireless communication technologies include, for example, Sparklink Low Energy (SLE) and Sparklink Basic (SLB). The wireless communication module 160 can be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via antenna 2, performs frequency modulation and filtering of the electromagnetic wave signals, and sends the processed signal to processor 110. The wireless communication module 160 can also receive signals to be transmitted from processor 110, perform frequency modulation and amplification, and convert them into electromagnetic waves for radiation via antenna 2.

[0093] In some embodiments, antenna 1 of electronic device 100 is coupled to mobile communication module 150, and antenna 2 is coupled to wireless communication module 160, enabling electronic device 100 to communicate with networks and other devices via wireless communication technology. The wireless communication technology may include Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Time-Division Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technologies, etc. The GNSS may include the Global Positioning System (GPS), the Global Navigation Satellite System (GLONASS), the BeiDou Navigation Satellite System (BDS), the Quasi-Zenith Satellite System (QZSS), and / or satellite-based augmentation systems (SBAS).

[0094] Electronic device 100 implements display functions through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, connected to the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations and for graphics rendering. Processor 110 may include one or more GPUs, which execute program instructions to generate or modify display information.

[0095] Display screen 194 is used to display images, videos, etc. Display screen 194 includes a display panel. The display panel may be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a miniature LED, a microLED, a quantum dot light-emitting diode (QLED), etc. In some embodiments, electronic device 100 may include one or N displays 194, where N is a positive integer greater than 1.

[0096] In some embodiments of this application, the display screen 194 refreshes the display image periodically, that is, it refreshes the display image once every time frame. The time when the display image is refreshed can be called the refresh time, and the refresh time is periodic. For example, assuming that the frequency of the display screen 194 is K, the display screen refreshes the display image once every 1 / K time frame, and the interval between two adjacent refresh times is 1 / K.

[0097] Electronic device 100 can perform shooting functions through ISP, camera 193, video codec, GPU, display 194 and application processor.

[0098] The ISP (Image Signal Processor) is used to process data fed back from the camera 193. For example, when taking a picture, the shutter is opened, and light is transmitted through the lens to the camera's photosensitive element. The light signal is converted into an electrical signal, and the camera's photosensitive element transmits the electrical signal to the ISP for processing, transforming it into an image visible to the naked eye. The ISP can also perform algorithmic optimization on image noise, brightness, color, etc. The ISP can also optimize parameters such as exposure and color temperature of the shooting scene. In some embodiments, the ISP can be set in the camera 193.

[0099] Camera 193 is used to capture still images or videos. An object is projected onto a photosensitive element by generating an optical image through the lens. The photosensitive element can be a charge-coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts the light signal into an electrical signal, which is then passed to an ISP for conversion into a digital image signal. The ISP outputs the digital image signal to a DSP for processing. The DSP converts the digital image signal into image signals in standard RGB, YUV, or other formats. In some embodiments, the electronic device 100 may include one or N cameras 193, where N is a positive integer greater than 1.

[0100] Digital signal processors (DSPs) are used to process digital signals. Besides digital image signals, they can also process other digital signals. For example, when electronic device 100 selects a frequency, the DSP can perform Fourier transforms on the frequency energy.

[0101] Video codecs are used to compress or decompress digital video. Electronic device 100 may support one or more video codecs. Thus, electronic device 100 can play or record videos in various encoding formats, such as Moving Picture Experts Group (MPEG) 1, MPEG2, MPEG3, MPEG4, etc.

[0102] An NPU (Neural Processing Unit) is a computational processor for neural networks (NNs). By borrowing the structure of biological neural networks, such as the transmission patterns between neurons in the human brain, it can rapidly process input information and continuously learn on its own. NPUs enable intelligent cognitive applications in electronic devices, such as image recognition, facial recognition, speech recognition, and text understanding.

[0103] The external storage interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external storage interface 120 to perform data storage functions. For example, music, video, and other files can be saved on the external memory card.

[0104] Internal memory 121 can be used to store computer executable program code, which includes instructions. Internal memory 121 may include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback, image playback, etc.), etc. The data storage area may store data created during the use of electronic device 100 (such as audio data, phonebook, etc.). Furthermore, internal memory 121 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc. Processor 110 executes various functional applications and data processing of electronic device 100 by running instructions stored in internal memory 121 and / or instructions stored in memory located in the processor.

[0105] Electronic device 100 can implement audio functions, such as music playback and recording, through audio module 170, speaker 170A, receiver 170B, microphone 170C, headphone jack 170D, and application processor.

[0106] The audio module 170 is used to convert digital audio information into analog audio signals for output, and also to convert analog audio input into digital audio signals. The audio module 170 can also be used for encoding and decoding audio signals. In some embodiments, the audio module 170 may be located in the processor 110, or some functional modules of the audio module 170 may be located in the processor 110.

[0107] The speaker 170A, also known as a "loudspeaker," is used to convert audio electrical signals into sound signals. The electronic device 100 can listen to music or make hands-free calls through the speaker 170A.

[0108] The receiver 170B, also known as the "earpiece," is used to convert audio electrical signals into sound signals. When the electronic device 100 answers a telephone call or voice message, the receiver 170B can be brought close to the ear to listen to the voice.

[0109] Microphone 170C, also known as a "microphone" or "voice transducer," is used to convert sound signals into electrical signals. When making a phone call or sending a voice message, the user can speak by bringing their mouth close to microphone 170C, inputting the sound signal into microphone 170C. Electronic device 100 may have at least one microphone 170C. In some embodiments, electronic device 100 may have two microphones 170C, which, in addition to collecting sound signals, can also perform noise reduction. In other embodiments, electronic device 100 may also have three, four, or more microphones 170C, which can collect sound signals, reduce noise, identify the sound source, and perform directional recording, etc.

[0110] The 170D headphone jack is used to connect wired headphones. The 170D headphone jack can be a USB 130 interface or a 3.5mm Open Mobile Terminal Platform (OMTP) standard interface, a CTIA (Cellular Telecommunications Industry Association of the USA) standard interface.

[0111] Pressure sensor 180A is used to sense pressure signals and convert them into electrical signals. In some embodiments, pressure sensor 180A may be disposed on display screen 194. There are many types of pressure sensors 180A, such as resistive pressure sensors, inductive pressure sensors, and capacitive pressure sensors. A capacitive pressure sensor may include at least two parallel plates with conductive material. When a force is applied to pressure sensor 180A, the capacitance between the electrodes changes. Electronic device 100 determines the pressure intensity based on the change in capacitance. When a touch operation is applied to display screen 194, electronic device 100 detects the intensity of the touch operation based on pressure sensor 180A. Electronic device 100 may also calculate the touch position based on the detection signal from pressure sensor 180A.

[0112] A gyroscope sensor 180B is used to determine the motion posture of the electronic device 100. A barometric pressure sensor 180C is used to measure air pressure. An accelerometer sensor 180E detects the magnitude of acceleration of the electronic device 100 in various directions (typically three axes). A distance sensor 180F is used to measure distance. A proximity sensor 180G may include, for example, a light-emitting diode (LED) and a photodetector, such as a photodiode. The LED may be an infrared LED. The electronic device 100 emits infrared light outward through the LED. The electronic device 100 uses a photodiode to detect infrared reflected light from nearby objects. When sufficient reflected light is detected, it can be determined that an object is near the electronic device 100. When insufficient reflected light is detected, the electronic device 100 can determine that no object is near the electronic device 100. An ambient light sensor 180L is used to sense ambient light intensity. A fingerprint sensor 180H is used to collect fingerprints. The electronic device 100 can utilize the collected fingerprint characteristics to achieve fingerprint unlocking, accessing application locks, fingerprint photography, fingerprint answering of calls, etc. A temperature sensor 180J is used to detect temperature.

[0113] Touch sensor 180K, also known as a "touch device," can be located on display screen 194. The touch sensor 180K and display screen 194 together form a touchscreen, also known as a "touchscreen." Touch sensor 180K detects touch operations applied to or near it. The touch sensor can transmit the detected touch operation to the application processor to determine the type of touch event. Visual output related to the touch operation can be provided through display screen 194. In other embodiments, touch sensor 180K may also be located on the surface of electronic device 100, in a different position than display screen 194.

[0114] The bone conduction sensor 180M can acquire vibration signals. Buttons 190 include a power button, volume buttons, etc. The motor 191 can generate vibration alerts. The indicator 192 can be an indicator light, used to indicate charging status, battery level changes, and also to indicate messages, missed calls, notifications, etc. The SIM card interface 195 is used to connect a SIM card.

[0115] Figure 2 is a schematic diagram of the hardware structure of another electronic device 100 provided in an embodiment of this application. As shown in Figure 2, the electronic device 100 may include a system-on-chip (SoC) 101, a power management integrated circuit (PMIC) 102, a display driver integrated circuit (DDIC) 103, and a display panel 104. In some embodiments of this application, the display module may include the DDIC 103 and the display panel 104.

[0116] In some embodiments of this application, the display screen 104 may include N pixels, each pixel being controlled by a corresponding pixel circuit. Therefore, the display screen 104 includes N pixel circuits, namely pixel circuit 1 to pixel circuit N, where N is a positive integer. Each pixel circuit may include one or more transistors (T). In the embodiments of this application, the transistor may be a metal-oxide-semiconductor field-effect transistor (MOSFET), such as an oxide thin-film transistor (TFT). A specific structural example can be found in Figure 4, which will not be described in detail here.

[0117] SoC 101 can be used to implement the processing and control procedures of electronic device 100. In some embodiments of this application, SoC 101 can be connected to and communicate with PMIC 102. In some embodiments of this application, SoC 101 can be connected to and communicate with DDIC 103.

[0118] DDIC103 can be used to drive the display screen 104 to operate, thereby controlling the display effect of the display screen 104. In some embodiments of this application, DDIC103 can receive data or control signals sent by SoC101, and control the display effect of the display screen 104 according to the data or control signals sent by SoC101.

[0119] In some examples, SoC 101 can send image data to DDIC 103, which in turn sends the image data to display 104, which can then display the image data sent by SoC 101.

[0120] In some examples, SoC 101 can send display mode indication information of display screen 104 to DDIC 103, so that DDIC 103 sets the display mode of display screen 104 to the display mode indicated by the indication information. For example, SoC 101 can send brightness to DDIC 103, so that DDIC 103 sets the brightness of display screen 104 to the brightness sent by SoC 101. In some embodiments of this application, the brightness sent by SoC 101 is the theoretical display brightness, and the brightness of display screen 104 set by DDIC 103 based on the theoretical display brightness is the actual display brightness. Since display screen 104 may experience aging or other conditions, the theoretical display brightness and the actual display brightness may differ; for example, the theoretical display brightness may be higher than the actual display brightness. For ease of explanation, the embodiments of this application will be described using the example where the theoretical display brightness and the actual display brightness are the same.

[0121] PMIC 102 can be connected to DDIC 103 and can output voltage to DDIC 103. DDIC 103 can process the voltage output by PMIC 102 and output the processed voltage to the transistors in display screen 104. In some embodiments of this application, the purpose of the voltage output by PMIC 102 to DDIC 103 and the voltage output by DDIC 103 to display screen 104 is to provide voltage to the transistors in display screen 104 and enable the transistors to operate normally. For ease of explanation, the voltage output by PMIC 102 to DDIC 103 can be referred to as the input voltage / input transistor voltage, and the voltage output by DDIC 103 to display screen 104 can be referred to as the output voltage / output transistor voltage. The output transistor voltage is obtained by DDIC 103 processing the input transistor voltage. The output transistor voltage can be output to each pixel circuit in display screen 104, and the output transistor voltage can be output to the transistors in the pixel circuit.

[0122] Figure 3 is a schematic diagram of the hardware structure of another electronic device 100 provided in an embodiment of this application. The display screen 104 in the electronic device 100 shown in Figure 3 includes N pixel circuits and an integrated gate driver on array (GOA) circuit. The GOA circuit can be used to control the scanning process of the display screen 104. For example, each row of circuits in the GOA circuit can control the display of the display screen 104 by scanning one or more rows of pixels in the display screen 104. Each of the N pixel circuits can be connected to the GOA circuit. In some embodiments of this application, the GOA circuit is a shared scanning driving circuit for the N pixel circuits. The GOA circuit may include multiple transistors.

[0123] In some embodiments of this application, each of the N pixel circuits may include M transistors, for example, pixel circuit 1 shown in FIG3 includes transistors 1 to M.

[0124] In some embodiments of this application, the GOA circuit may include M scanning circuits, namely scanning circuit 1 to scanning circuit M. For example, the GOA circuit includes M columns of circuits, which are the aforementioned M scanning circuits. For example, a scanning circuit includes multiple GOA units, and a GOA unit may include multiple transistors.

[0125] In some embodiments of this application, the M transistors in each pixel circuit are respectively connected to the M scanning circuits in the GOA circuit. For example, as shown in FIG3, the M transistors in pixel circuit 1 are respectively connected to the M scanning circuits in the GOA circuit, and each of the M scanning circuits can be used to drive one of the M transistors.

[0126] Figure 4 is a schematic diagram of a transistor structure provided in an embodiment of this application. As shown in Figure 4, a transistor may include a source, a drain, and a gate. Therefore, the voltage of a transistor may include a source voltage, a drain voltage, and a gate voltage. The gate voltage of a transistor can also be called the gate level, and the transistor's conduction or cutoff can be controlled by controlling the gate level. When the transistor is on, the source and drain are connected, generating a conduction current. Furthermore, the magnitude of the conduction current generated between the source and drain varies depending on the gate level. When the transistor is off, the source and drain are not connected, and no current is generated. The transistor may include, but is not limited to, N-type and P-type transistors. An N-type transistor conducts when the gate level is high and is cut off when the gate level is low. A P-type transistor conducts when the gate level is low and is cut off when the gate level is high. The source voltage and drain voltage are corresponding; a change in the source voltage will cause a corresponding change in the drain voltage, and vice versa.

[0127] Based on the descriptions in Figures 2 and 3, it can be seen that the operating voltage of each transistor in the display screen 104 of the electronic device 100 may include the input transistor voltage input from the PMIC 102 to the DDIC 103, and the output transistor voltage output from the DDIC 103 to the display screen 104. Referring to the description in Figure 4, it can be seen that the input transistor voltage may include the input gate voltage, and the output transistor voltage may include the output gate voltage. The output gate voltage is obtained by the DDIC 103 processing the input gate voltage, and is used to output to the gate of the transistor in the display screen 104.

[0128] In some embodiments of this application, the input gate voltage may include a low-level gate voltage (VGL) and a high-level gate voltage (VGH), and the output gate voltage may include a low-level output gate voltage (VGLO) and a high-level output gate voltage (VGHO). VGLO is obtained by processing VGL with DDIC103, and VGHO is obtained by processing VGH with DDIC103. VGLO and VGHO can be used to control the turn-on and turn-off of the transistor.

[0129] With the development of display technology, displays are gradually evolving towards higher brightness. However, this increased brightness also leads to increased power consumption, resulting in issues such as overheating. Display power consumption consists of two main parts: the power consumption of the display panel emitting light and the power consumption of the DDIC (Display Diode IC). Currently, displays can be configured with different gate voltages at different brightness levels—smaller at low brightness and larger at high brightness. The gate voltage is the difference between the positive power supply voltage (ELVDD) and the negative power supply voltage (ELVSS) of the display. Increasing the gate voltage leads to an increase in the required gate voltage. However, the input and output gate voltages of each transistor in the display are fixed. Furthermore, to ensure normal display at maximum brightness, the input and output gate voltages are the "maximum voltage" corresponding to the "maximum gate voltage," resulting in high DDIC power consumption.

[0130] For example, as shown in Figure 5, the brightness of the display screen can be divided into three brightness segments from low to high: brightness segment 1, brightness segment 2, and brightness segment 3. The cross voltage set for brightness segment 1 is cross voltage 1, the cross voltage set for brightness segment 2 is cross voltage 2, and the cross voltage set for brightness segment 3 is cross voltage 3. Cross voltage 1 is lower than cross voltage 2, cross voltage 2 is lower than cross voltage 3, brightness segment 3 is the "maximum brightness segment" of the display screen, and cross voltage 3 is the "maximum cross voltage" of the display screen. The input gate voltage value 11 and the output gate voltage value 12 are fixed under different brightness levels, and the voltage values ​​11 and 12 correspond to cross voltage 3. Therefore, the voltage values ​​11 and 12 are very high. Such input gate voltage and output gate voltage will result in power consumption waste of DDIC at the lower brightness segments 1 and 2.

[0131] This application provides a voltage adjustment method, which includes: an electronic device 100 dynamically adjusting the input gate voltage and the output gate voltage according to the display mode of the display screen. For example, a higher input gate voltage and output gate voltage are used under high brightness to ensure display effect, and a lower input gate voltage and output gate voltage are used under low brightness to save power consumption, thereby reducing power consumption while ensuring normal display of the display screen. In some embodiments of this application, the input gate voltage may include a negative voltage VGL and a positive voltage VGH, and the output gate voltage may include a negative voltage VGLO and a positive voltage VGHO. Therefore, for ease of explanation, this application uses the absolute value of the voltage as an example. That is, the voltage value described in this application is the absolute value of the voltage, and the adjustment voltage described in this application is the absolute value of the adjustment voltage.

[0132] In some embodiments of this application, the input transistor voltage may also include the source input voltage output by PMIC 102 to DDIC 103, and the output transistor voltage may include the source voltage and / or drain voltage of the transistor output by DDIC 103 to display screen 104. In some examples, DDIC 103 may process the source input voltage to obtain a high-level gamma voltage (VGMP) and a low-level gamma voltage (VGSP), and then process VGMP and VGSP to obtain the source voltage and / or drain voltage of the transistor. For example, the source voltage and / or drain voltage of the transistor may be voltages separated by a voltage divider resistor between VGMP and VGSP. In some examples, DDIC 103 may also perform multi-stage processing on the source input voltage to obtain a gamma voltage, and DDIC 103 may output the gamma voltage to the pixel circuit in display screen 104 to control the grayscale of the pixels. For ease of explanation, the following embodiments use the input gate voltage of the input transistor voltage and the output gate voltage of the output transistor voltage as examples.

[0133] Figure 6 is a schematic diagram of the hardware structure of another electronic device 100 provided in an embodiment of this application. The DDIC 103 in the electronic device 100 shown in Figure 6 may include a voltage regulator module 103A, a gamma module 103B, and a voltage control module 103C.

[0134] The voltage regulator module 103A in DDIC103 can receive the input gate voltage output from PMIC102 and process it to obtain the output gate voltage. The voltage regulator module 103A can then output the processed output gate voltage to the transistors in display screen 104. For example, the input gate voltage may be less than or equal to the output gate voltage. In some embodiments of this application, the voltage regulator module 103A is used to ensure the stability of the output gate voltage output to display screen 104. For example, there is a certain difference between the input gate voltage and the output gate voltage to ensure voltage regulation; the voltage difference may be, for example, between 0.5 volts (V) and 1V.

[0135] The gamma module 103B in DDIC103 can be used to generate gamma voltage and output gamma voltage to the pixel circuit in display 104. The gamma voltage can be used to control the grayscale of the pixels in display 104. For example, gamma module 103B can generate gamma voltage based on the source input voltage output by PMIC102 to DDIC103.

[0136] When display screen 104 is in a first display mode, voltage control module 103C in DDIC 103 can receive indication information for a second display mode sent by SoC 101 and determine to switch display screen 104 to the second display mode based on this indication information. In some examples, electronic device 100 receives a user operation to adjust the display mode of display screen 104, and voltage control module 103C can receive the indication information for the display mode sent by SoC 101. In other examples, electronic device 100 automatically identifies that the display mode of display screen 104 needs to be adjusted. For example, when electronic device 100 detects a change in the brightness of the surrounding environment, it determines that the display mode of display screen 104 needs to be adjusted, and voltage control module 103C can receive the indication information for the display mode sent by SoC 101. In some examples, the first display mode and the second display mode can be different types of display modes. For example, the first display mode and the second display mode can be an always-on display (AOD) mode and a screen-on display mode, respectively. The screen-on display mode can also be called a normal mode. In other examples, the first display mode and the second display mode can be the same type of operating mode, but with different display parameters. Display parameters include, but are not limited to, brightness, grayscale, and frequency. For example, both the first display mode and the second display mode are screen-on display modes, but with different brightness levels. The brightness of the first display mode is a first brightness, and the brightness of the second display mode is a second brightness. The voltage control module 103C can receive the second brightness sent by the SoC 101. In some examples, after receiving the display mode indication information sent by the SoC 101, the voltage control module 103C can store the indication information. For example, if the voltage control module 103C originally stored the indication information for the first display mode, after receiving the indication information for the second display mode, it can store the indication information for the second display mode and delete the indication information for the first display mode. After receiving the indication information for the second display mode, the voltage control module 103C in DDIC103 can dynamically adjust at least one of the input gate voltage, output gate voltage, and gamma voltage according to the second display mode to switch the display mode of the display screen 104 to the second display mode. An example of how the voltage control module 103C in DDIC103 switches the display mode of the display screen 104 can be seen in Figures 11, 12, 13, and 14.

[0137] In some embodiments of this application, the voltage control module 103C in DDIC103 can be used to execute the voltage adjustment method shown in FIG11, as described below:

[0138] As shown in S101 of Figure 11, the display screen 104 is in a first display mode, and the voltage control module 103C in DDIC 103 obtains a second display mode to be applied to the display screen 104. In some examples, the display screen 104 is in the first display mode, and the voltage control module 103C in DDIC 103 can receive the indication information of the second display mode sent by SoC 101, and determine to switch the display mode of the display screen 104 to the second display mode according to the indication information. The first display mode is the current working mode of the display screen 104, and the second display mode is the target working mode to be applied to the display screen 104.

[0139] As shown in S102 of Figure 11, the voltage control module 103C in DDIC103 determines that the input gate voltage corresponding to the second display mode is the first voltage value, the output gate voltage corresponding to the second display mode is the second voltage value, the input gate voltage corresponding to the first display mode is the third voltage value, and the output gate voltage corresponding to the first display mode is the fourth voltage value. In some examples, the voltage control module 103C can determine from a voltage lookup table that: the input gate voltage corresponding to the second display mode is the first voltage value, the output gate voltage corresponding to the second display mode is the second voltage value, the input gate voltage corresponding to the first display mode is the third voltage value, and the output gate voltage corresponding to the first display mode is the fourth voltage value. The voltage lookup table can include the display mode of the display screen 104 and the corresponding input gate voltage value, and the display mode of the display screen 104 and the corresponding output gate voltage value. For example, the voltage lookup table is a lookup table (LUT). In some examples, the above voltage lookup table can be stored in DDIC103. In some examples, the adjustment direction of the display mode of the display screen 104 is different, and the voltage lookup table used can be different. For example, if the second brightness of the second display mode is greater than the first brightness of the first display mode, the voltage control module 103C can use the first voltage lookup table; if the second brightness of the second display mode is less than the first brightness of the first display mode, the voltage control module 103C can use the second voltage lookup table. Examples of voltage lookup tables can be found in Tables 1-3 below, where the first voltage lookup table and the second lookup table are, for example, any two tables in Tables 1-3 below.

[0140] Table 1

[0141] Table 2

[0142] Table 3

[0143] As shown in Tables 1-3, the brightness of the display screen can be divided into three brightness segments from low to high: brightness segment A, brightness segment B, and brightness segment C. Brightness segment A, from low to high, can include brightness A1, brightness A2, and brightness A3; brightness segment B, from low to high, can include brightness B1, brightness B2, and brightness B3; and brightness segment C, from low to high, can include brightness C1, brightness C2, and brightness C3. In some embodiments of this application, the higher the brightness of the display screen, the greater the absolute values ​​of both the input gate voltage and the output gate voltage. The brightness values ​​in any of the tables in Tables 1-3 can be set according to the actual scenario; the brightness settings for different tables can be the same or different.

[0144] As shown in Table 1, the absolute value of the output gate voltage corresponding to brightness segment A is A11, the absolute value of the output gate voltage corresponding to brightness segment B1 is B11, the absolute value of the output gate voltage corresponding to brightness segment B2 is B12, the absolute value of the output gate voltage corresponding to brightness segment B3 is B13, and the absolute value of the output gate voltage corresponding to brightness segment C is C11. The absolute value of the input gate voltage corresponding to brightness segment A is A21, and the absolute value of the input gate voltage corresponding to brightness segments B and C is C21. Table 1 shows four voltage switching points for the output gate voltage, corresponding to the following boundaries: the boundary between brightness A3 and brightness B1, the boundary between brightness B1 and brightness B2, the boundary between brightness B2 and brightness B3, and the boundary between brightness B3 and brightness C1. For example, taking the boundary between brightness A3 and brightness B1 as an example, if the first display mode is brightness B1 and the second display mode is brightness B2, the output gate voltage corresponding to the first display mode is the voltage value B11 corresponding to brightness B1, and the output gate voltage corresponding to the second display mode is the voltage value B12 corresponding to brightness B2. Table 1 also shows one voltage switching point for the input gate voltage, corresponding to the boundary between brightness A3 and brightness B1. For example, if the first display mode is brightness A3 and the second display mode is brightness B1, then the input gate voltage corresponding to the first display mode is the voltage value A21 corresponding to brightness A3, and the input gate voltage corresponding to the second display mode is the voltage value C21 corresponding to brightness B1.

[0145] As shown in Table 2, the absolute value of the output gate voltage corresponding to brightness segment A is A11, the absolute value of the output gate voltage corresponding to brightness B1 is B11, the absolute value of the output gate voltage corresponding to brightness B2 is B12, the absolute value of the output gate voltage corresponding to brightness B3 is B13, and the absolute value of the output gate voltage corresponding to brightness segment C is C11. The absolute value of the input gate voltage corresponding to brightness A1 and brightness A2 is A21, and the absolute value of the input gate voltage corresponding to brightness A3, brightness segment B, and brightness segment C is C21. Table 2 shows four voltage switching points for the output gate voltage, which correspond to the boundary between brightness A3 and brightness B1, the boundary between brightness B1 and brightness B2, the boundary between brightness B2 and brightness B3, and the boundary between brightness B3 and brightness C1, respectively. Table 2 also shows one voltage switching point for the input gate voltage, which corresponds to the boundary between brightness A2 and brightness A3.

[0146] As shown in Table 3, the absolute value of the output gate voltage corresponding to brightness A1 is A11; the absolute value of the output gate voltage corresponding to brightness A2, brightness A3, and brightness B1 is B11; the absolute value of the output gate voltage corresponding to brightness B2 is B12; the absolute value of the output gate voltage corresponding to brightness B3 is B13; and the absolute value of the output gate voltage corresponding to brightness segment C is C11. The absolute value of the input gate voltage corresponding to brightness A1 is A21; the absolute value of the input gate voltage corresponding to brightness A2, brightness A3, and brightness segment B is B21; and the absolute value of the input gate voltage corresponding to brightness segment C is C21. Table 3 shows four voltage switching points for the output gate voltage, which correspond to the following points: the boundary between brightness A1 and brightness A2, the boundary between brightness B1 and brightness B2, the boundary between brightness B2 and brightness B3, and the boundary between brightness B3 and brightness C1. Table 3 shows two voltage switching points for the input gate voltage, which correspond to the boundary between brightness A1 and brightness A2, and the boundary between brightness B3 and brightness C1, respectively.

[0147] As shown in S103 of Figure 11, the first and third voltage values ​​are different, as are the second and fourth voltage values. The voltage control module 103C in DDIC103 adjusts the input gate voltage at the first refresh time and adjusts the output gate voltage and gamma voltage at the second refresh time. In some examples, the first display mode is brightness A3 as shown in Table 1, and the second display mode is brightness B1 as shown in Table 1. The output gate voltage corresponding to the first display mode is voltage value A11, and the corresponding input gate voltage is voltage value A21. The output gate voltage corresponding to the second display mode is voltage value B11, and the corresponding input gate voltage is voltage value C21. Therefore, the voltage control module 103C can adjust the input gate voltage from voltage value A21 to voltage value C21, and adjust the output gate voltage from voltage value A11 to voltage value B11. In some examples, the voltage control module 103C in DDIC103 can send a first control signal to PMIC102 at the first refresh time. PMIC102 can adjust the input gate voltage output to DDIC103 according to the received first control signal, that is, adjust the voltage value of the input gate voltage from the third voltage value corresponding to the first display mode to the first voltage value corresponding to the second display mode. In some examples, the voltage control module 103C in DDIC103 can send a second control signal to the voltage regulator module 103A at the second refresh time. The voltage regulator module 103A can adjust the output gate voltage output to the display screen 104 according to the received second control signal, that is, adjust the voltage value of the output gate voltage from the fourth voltage value corresponding to the first display mode to the second voltage value corresponding to the second display mode. Not limited thereto, in other examples, the voltage control module 103C can also send a second control signal to other control modules (not shown). The control module receiving the second control signal can control the voltage regulator module 103A to adjust the output gate voltage. This application embodiment does not limit this. In some examples, the voltage control module 103C in DDIC103 can send a third control signal to the gamma module 103B at the second refresh time. The gamma module 103B can adjust the gamma voltage output to the display screen 104 according to the third control signal. In some embodiments of this application, switching the display mode of the display screen 104 requires adjusting the grayscale of the pixels of the display screen 104. That is, regardless of whether the input gate voltage and / or output gate voltage are adjusted, adjusting the display mode of the display screen 104 will adjust the gamma voltage used to control the grayscale. In some examples, if the first voltage value is greater than the third voltage value and the second voltage value is greater than the fourth voltage value, then the voltage control module 103C in DDIC103 increases the input gate voltage and the output gate voltage, and decreases the gamma voltage. In some examples, if the first voltage value is less than the third voltage value and the second voltage value is less than the fourth voltage value, then the voltage control module 103C in DDIC103 decreases the input gate voltage and the output gate voltage, and increases the gamma voltage.In some embodiments of this application, the higher the brightness of the display screen 104, the larger the absolute values ​​of the input gate voltage and the output gate voltage, and the smaller the gamma voltage.

[0148] In some embodiments of this application, the display screen 104 may refresh the display image at periodic refresh intervals, as shown in S103 of FIG11. The voltage control module 103C may adjust the relevant voltage of the display screen 104 at the refresh intervals of the display screen 104. The first refresh interval for adjusting the input gate voltage and the second refresh interval for adjusting the output gate voltage may be the same or different. In some examples, the voltage rise or fall is relatively slow when the PMIC 102 adjusts the input gate voltage, that is, the adjustment of the input gate voltage may not be instantaneous or fast, but a slow process. In this case, the first refresh interval and the second refresh interval may be different. In some examples, the adjustment of the output gate voltage is not instantaneous or fast, but a slow process. In this case, the first refresh interval and the second refresh interval may be different. In some examples, the adjustment of the input gate voltage and the adjustment of the output gate voltage are instantaneous or fast. In this case, the first refresh interval and the second refresh interval may be the same. In some examples, the first voltage value is greater than the third voltage value and the second voltage value is greater than the fourth voltage value. The first refresh time is earlier than the second refresh time. After the voltage control module 103C sends the first control signal to the PMIC 102 at the first refresh time, it can determine whether the input gate voltage has reached a steady state, that is, determine whether the voltage value of the input gate voltage remains stable. The voltage control module 103C can send the second control signal to the voltage regulator module 103A at the next refresh time (i.e., the second refresh time) after the input gate voltage reaches a steady state. However, it is not limited to this. In other examples, it is not necessary to determine whether the input gate voltage has reached a steady state. Instead, it is assumed that the steady state will be reached after a first preset time. That is, the difference between the first refresh time and the second refresh time is the first preset time. For example, the first preset time is one time frame of the display screen refresh. In some examples, the first voltage value is less than the third voltage value and the second voltage value is less than the fourth voltage value. The second refresh time is earlier than the first refresh time. After the voltage control module 103C sends the second control signal to the voltage regulator module 103A at the second refresh time, it can determine whether the output gate voltage has reached a steady state. The voltage control module 103C can send the first control signal to the PMIC 102 at the next refresh time (i.e., the first refresh time) after the output gate voltage reaches a steady state. However, it is not limited to this. In other examples, it is not necessary to determine whether the output gate voltage has reached a steady state. Instead, it is assumed that the steady state will be reached after a second preset time. That is, the difference between the first refresh time and the second refresh time is the second preset time. For example, the second preset time is one time frame of the display screen refresh.

[0149] In some embodiments of this application, the input gate voltage is generally greater than or equal to the output gate voltage. Therefore, in the method shown in Figure 11, where both the input and output gate voltages need to be increased, the input gate voltage can be increased first, and the output gate voltage increased after the input gate voltage reaches a steady state. Conversely, where both the input and output gate voltages need to be decreased, the output gate voltage can be decreased first, and the input gate voltage decreased after the output gate voltage reaches a steady state. This ensures that the difference between the input gate voltage and the output gate voltage is always greater than the minimum requirement during voltage adjustment, thus ensuring that the transistor voltage remains stable during voltage adjustment. This avoids abnormal display conditions such as abnormal brightness or flickering, and guarantees normal display during voltage adjustment.

[0150] In some embodiments of this application, the voltage control module 103C in DDIC103 can be used to execute the voltage adjustment method shown in FIG12, as described below:

[0151] As shown in S201 of Figure 12, the display screen 104 is in the first display mode, and the voltage control module 103C in DDIC103 obtains the second display mode to be applied to the display screen 104.

[0152] As shown in S202 of Figure 12, the voltage control module 103C in DDIC103 determines that the input gate voltage corresponding to the second display mode is the first voltage value, the output gate voltage corresponding to the second display mode is the second voltage value, the input gate voltage corresponding to the first display mode is the third voltage value, and the output gate voltage corresponding to the first display mode is the fourth voltage value.

[0153] As shown in S203 of Figure 12, the first and third voltage values ​​are different, while the second and fourth voltage values ​​are the same. The voltage control module 103C in DDIC103 adjusts the input gate voltage and the gamma voltage at the third refresh time, but does not adjust the output gate voltage. In some examples, the first display mode is brightness A2 as shown in Table 2, and the second display mode is brightness A3 as shown in Table 2. The output gate voltage corresponding to the first display mode is voltage value A11, and the corresponding input gate voltage is voltage value A21. The output gate voltage corresponding to the second display mode is voltage value A11, and the corresponding input gate voltage is voltage value C21. Therefore, the voltage control module 103C can adjust the input gate voltage from voltage value A21 to voltage value C21, but does not adjust the output gate voltage. In some examples, the voltage control module 103C in DDIC103 can send a first control signal to PMIC102 at the third refresh time. PMIC102 can adjust the input gate voltage output to DDIC103 according to the received first control signal, that is, adjust the input gate voltage value from the third voltage value corresponding to the first display mode to the first voltage value corresponding to the second display mode. The voltage control module 103C will not send a second control signal. In some examples, the voltage control module 103C in DDIC103 can send a third control signal to gamma module 103B at the third refresh time. Gamma module 103B can adjust the gamma voltage output to display screen 104 according to the third control signal. In some examples, if the first voltage value is greater than the third voltage value and the second and fourth voltage values ​​are the same, then the voltage control module 103C in DDIC103 will increase the input gate voltage, decrease the gamma voltage, and not adjust the output gate voltage. In some examples, if the first voltage value is less than the third voltage value and the second and fourth voltage values ​​are the same, the voltage control module 103C in DDIC103 will decrease the input gate voltage, increase the gamma voltage, and not adjust the output gate voltage.

[0154] In some embodiments of this application, the voltage control module 103C in DDIC103 can be used to execute the voltage adjustment method shown in FIG13, as described below:

[0155] As shown in S301 of Figure 13, the display screen 104 is in the first display mode, and the voltage control module 103C in DDIC103 obtains the second display mode to be applied to the display screen 104.

[0156] As shown in S302 of Figure 13, the voltage control module 103C in DDIC103 determines that the input gate voltage corresponding to the second display mode is the first voltage value, the output gate voltage corresponding to the second display mode is the second voltage value, the input gate voltage corresponding to the first display mode is the third voltage value, and the output gate voltage corresponding to the first display mode is the fourth voltage value.

[0157] As shown in S303 of Figure 13, the first and third voltage values ​​are the same, while the second and fourth voltage values ​​are different. The voltage control module 103C in DDIC103 adjusts the output gate voltage and the gamma voltage at the fourth refresh time, but does not adjust the input gate voltage. In some examples, the first display mode is brightness B2 as shown in Table 3, and the second display mode is brightness B3 as shown in Table 3. The output gate voltage corresponding to the first display mode is voltage value B12, and the corresponding input gate voltage is voltage value B21. The output gate voltage corresponding to the second display mode is voltage value B13, and the corresponding input gate voltage is voltage value B21. Therefore, the voltage control module 103C can adjust the output gate voltage from voltage value B12 to voltage value B13, but does not adjust the input gate voltage. In some examples, the voltage control module 103C in DDIC103 can send a second control signal to the voltage regulator module 103A at the fourth refresh time. The voltage regulator module 103A can adjust the output gate voltage output to the display screen 104 according to the received second control signal, that is, adjust the output gate voltage value from the fourth voltage value corresponding to the first display mode to the second voltage value corresponding to the second display mode. The voltage control module 103C will not send the first control signal. In some examples, the voltage control module 103C in DDIC103 can send a third control signal to the gamma module 103B at the fourth refresh time. The gamma module 103B can adjust the gamma voltage output to the display screen 104 according to the third control signal. In some examples, if the first voltage value and the third voltage value are the same, and the second voltage value is greater than the fourth voltage value, then the voltage control module 103C in DDIC103 will increase the output gate voltage, decrease the gamma voltage, and not adjust the input gate voltage. In some examples, if the first voltage value and the third voltage value are the same and the second voltage value is less than the fourth voltage value, then the voltage control module 103C in DDIC103 will decrease the output gate voltage, increase the gamma voltage, and not adjust the input gate voltage.

[0158] In some embodiments of this application, the voltage control module 103C in DDIC103 can be used to execute the voltage adjustment method shown in FIG14, as described below:

[0159] As shown in S401 of Figure 14, the display screen 104 is in the first display mode, and the voltage control module 103C in DDIC103 obtains the second display mode to be applied to the display screen 104.

[0160] As shown in S402 of Figure 14, the voltage control module 103C in DDIC103 determines that the input gate voltage corresponding to the second display mode is the first voltage value, the output gate voltage corresponding to the second display mode is the second voltage value, the input gate voltage corresponding to the first display mode is the third voltage value, and the output gate voltage corresponding to the first display mode is the fourth voltage value.

[0161] As shown in S403 of Figure 14, the first and third voltage values ​​are the same, as are the second and fourth voltage values. The voltage control module 103C in DDIC103 adjusts the gamma voltage at the fifth refresh time, but does not adjust the input gate voltage or the output gate voltage. In some examples, the first display mode is brightness C1 as shown in Table 3, and the second display mode is brightness C2 as shown in Table 3. The output gate voltage corresponding to the first display mode is voltage value C11, and the corresponding input gate voltage is voltage value C21. The output gate voltage corresponding to the second display mode is also voltage value C11, and the corresponding input gate voltage is voltage value C21. Therefore, the voltage control module 103C may not adjust the output gate voltage or the input gate voltage. In some examples, the voltage control module 103C in DDIC103 may send a third control signal to the gamma module 103B at the fifth refresh time. The gamma module 103B can adjust the gamma voltage output to the display screen 104 according to the third control signal, and the voltage control module 103C will not send the first and second control signals.

[0162] Not limited to the embodiment shown in Figure 6, in some other embodiments of this application, the voltage control module for dynamically adjusting the input gate voltage and the output gate voltage can also be located in SoC101, and a specific structural example can be seen in Figure 7.

[0163] Figure 7 is a schematic diagram of the hardware structure of another electronic device 100 provided in an embodiment of this application. The DDIC 103 in the electronic device 100 shown in Figure 7 may include a voltage regulator module 103A and a gamma module 103B, and the SoC 101 may include a processing module 101A and a voltage control module 101B.

[0164] The display screen 104 is in the first display mode. The processing module 101A in the SoC 101 can send an indication of a second display mode to the DDIC 103. The DDIC 103 can determine to switch the display mode of the display screen 104 to the second display mode based on the indication. The voltage control module 101B in the SoC 101 can be used to dynamically adjust at least one of the input gate voltage, output gate voltage, and gamma voltage according to the second display mode when it is determined that the display screen 104 should be switched to the second display mode, so as to switch the display mode of the display screen 104 to the second display mode. An implementation example of the voltage control module 101B in the SoC 101 switching the display mode of the display screen 104 can be seen in Figures 11, 12, 13, and 14.

[0165] In some embodiments of this application, the voltage control module 101B in SoC 101 can be used to execute the voltage adjustment method shown in FIG11, as described below:

[0166] As shown in S101 of Figure 11, the display screen 104 is in a first display mode, and the voltage control module 101B in the SoC 101 obtains a second display mode to be applied to the display screen 104. In some examples, the display mode of the display screen 104 is the first display mode. The voltage control module 101B in the SoC 101 can receive the indication information of the second display mode sent by the processing module 101A in the SoC 101, and determine to switch the display mode of the display screen 104 to the second display mode according to the indication information. The first display mode is the current working mode of the display screen 104, and the second display mode is the target working mode to be applied to the display screen 104.

[0167] As shown in S102 of Figure 11, the voltage control module 101B in SoC 101 determines the input gate voltage corresponding to the second display mode as the first voltage value, the output gate voltage corresponding to the second display mode as the second voltage value, the input gate voltage corresponding to the first display mode as the third voltage value, and the output gate voltage corresponding to the first display mode as the fourth voltage value. In some examples, the voltage control module 101B can determine the input gate voltage and output gate voltage corresponding to the second display mode, as well as the input gate voltage and output gate voltage corresponding to the first display mode, from a voltage lookup table.

[0168] As shown in S103 of Figure 11, the first voltage value and the third voltage value are different, as are the second voltage value and the fourth voltage value. The voltage control module 101B in SoC 101 adjusts the input gate voltage at the first refresh time, and adjusts the output gate voltage and the gamma voltage at the second refresh time. In some examples, the voltage control module 101B in SoC 101 can send a first control signal to PMIC 102 at the first refresh time. PMIC 102 can adjust the input gate voltage output to DDIC 103 according to the received first control signal, that is, adjust the input gate voltage value from the third voltage value corresponding to the first display mode to the first voltage value corresponding to the second display mode. In some examples, the voltage control module 101B of SoC101 can send a second control signal to the voltage regulator module 103A in DDIC103 at the second refresh time. The voltage regulator module 103A can adjust the output gate voltage output to the display screen 104 according to the received second control signal, that is, adjust the voltage value of the output gate voltage from the fourth voltage value corresponding to the first display mode to the second voltage value corresponding to the second display mode. Not limited thereto, in other examples, the voltage control module 101B of SoC101 can also send a second control signal to other control modules (not shown) in DDIC103. The control module that receives the second control signal can control the voltage regulator module 103A to adjust the output gate voltage. This application embodiment does not limit this. In some examples, the voltage control module 101B in SoC 101 can send a third control signal to the gamma module 103B in DDIC 103 at the second refresh time. The gamma module 103B can adjust the gamma voltage output to the display screen 104 according to the third control signal. However, in other examples, the voltage control module 101B may not send a third control signal to the gamma module 103B. The DDIC 103 can send a third control signal to the gamma module 103B at the second refresh time according to the display mode indication information of the display screen 104 sent by SoC 101.

[0169] In some embodiments of this application, the voltage control module 101B in SoC 101 can be used to execute the voltage adjustment method shown in FIG. 12, as described below:

[0170] As shown in S201 of Figure 12, the display screen 104 is in the first display mode, and the voltage control module 101B in SoC 101 obtains the second display mode to be applied to the display screen 104.

[0171] As shown in S202 of Figure 12, the voltage control module 101B in SoC101 determines that the input gate voltage corresponding to the second display mode is the first voltage value, the output gate voltage corresponding to the second display mode is the second voltage value, the input gate voltage corresponding to the first display mode is the third voltage value, and the output gate voltage corresponding to the first display mode is the fourth voltage value.

[0172] As shown in S203 of Figure 12, when the first and third voltage values ​​are different, and the second and fourth voltage values ​​are the same, the voltage control module 101B in SoC 101 adjusts the input gate voltage and the gamma voltage at the third refresh time, but does not adjust the output gate voltage. In some examples, the voltage control module 101B in SoC 101 can send a first control signal to PMIC 102 at the first refresh time. PMIC 102 can adjust the input gate voltage output to DDIC 103 according to the received first control signal, that is, adjust the input gate voltage value from the third voltage value corresponding to the first display mode to the first voltage value corresponding to the second display mode. The voltage control module 101B will not send a second control signal. In some examples, the voltage control module 101B in SoC 101 can send a third control signal to gamma module 103B at the third refresh time. Gamma module 103B can adjust the gamma voltage output to display screen 104 according to the third control signal. In some examples, if the first voltage value is greater than the third voltage value and the second and fourth voltage values ​​are the same, then the voltage control module 101B in SoC101 increases the input gate voltage, decreases the gamma voltage, and does not adjust the output gate voltage. In other examples, if the first voltage value is less than the third voltage value and the second and fourth voltage values ​​are the same, then the voltage control module 101B in SoC101 decreases the input gate voltage, increases the gamma voltage, and does not adjust the output gate voltage.

[0173] In some embodiments of this application, the voltage control module 101B in SoC 101 can be used to execute the voltage adjustment method shown in FIG. 13, as described below:

[0174] As shown in S301 of Figure 13, the display screen 104 is in the first display mode, and the voltage control module 101B in SoC 101 obtains the second display mode to be applied to the display screen 104.

[0175] As shown in S302 of Figure 13, the voltage control module 101B in SoC101 determines that the input gate voltage corresponding to the second display mode is the first voltage value, the output gate voltage corresponding to the second display mode is the second voltage value, the input gate voltage corresponding to the first display mode is the third voltage value, and the output gate voltage corresponding to the first display mode is the fourth voltage value.

[0176] As shown in S303 of Figure 13, when the first and third voltage values ​​are the same, and the second and fourth voltage values ​​are different, the voltage control module 101B in SoC 101 adjusts the output gate voltage and the gamma voltage at the fourth refresh time, but does not adjust the input gate voltage. In some examples, the voltage control module 101B of SoC 101 can send a second control signal to the voltage regulator module 103A in DDIC 103 at the fourth refresh time. The voltage regulator module 103A can adjust the output gate voltage output to the display screen 104 according to the received second control signal, that is, adjust the output gate voltage value from the fourth voltage value corresponding to the first display mode to the second voltage value corresponding to the second display mode. The voltage control module 101B will not send the first control signal. In some examples, the voltage control module 101B of SoC 101 can send a third control signal to the gamma module 103B in DDIC 103 at the fourth refresh time. The gamma module 103B can adjust the gamma voltage output to the display screen 104 according to the third control signal. In some examples, if the first and third voltage values ​​are the same and the second voltage value is greater than the fourth voltage value, then the voltage control module 101B of SoC101 increases the output gate voltage, decreases the gamma voltage, and does not adjust the input gate voltage. In other examples, if the first and third voltage values ​​are the same and the second voltage value is less than the fourth voltage value, then the voltage control module 101B of SoC101 decreases the output gate voltage, increases the gamma voltage, and does not adjust the input gate voltage.

[0177] In some embodiments of this application, the voltage control module 101B of SoC 101 can be used to execute the voltage adjustment method shown in FIG. 14, as described below:

[0178] As shown in S401 of Figure 14, the display screen 104 is in the first display mode, and the voltage control module 101B of SoC 101 obtains the second display mode to be applied to the display screen 104.

[0179] As shown in S402 of Figure 14, the voltage control module 101B of SoC101 determines that the input gate voltage corresponding to the second display mode is the first voltage value, the output gate voltage corresponding to the second display mode is the second voltage value, the input gate voltage corresponding to the first display mode is the third voltage value, and the output gate voltage corresponding to the first display mode is the fourth voltage value.

[0180] As shown in S403 of Figure 14, when the first and third voltage values ​​are the same, and the second and fourth voltage values ​​are the same, the voltage control module 101B of SoC 101 adjusts the gamma voltage at the fifth refresh time, but does not adjust the input gate voltage and the output gate voltage. In some examples, the voltage control module 101B of SoC 101 can send a third control signal to the gamma module 103B in DDIC 103 at the fifth refresh time. The gamma module 103B can adjust the gamma voltage output to the display screen 104 according to the third control signal, and the voltage control module 103C will not send the first and second control signals.

[0181] In some embodiments of this application, DDIC103 can output multiple output gate voltages to multiple transistors in the pixel circuit of the display screen 104, and different transistors in the pixel circuit can receive different output gate voltages. For specific examples, please refer to FIG8.

[0182] Figure 8 is a schematic diagram of the hardware structure of another electronic device 100 provided in an embodiment of this application. For ease of explanation, the display screen 104 shown in Figure 8 is illustrated using pixel circuit 1 among multiple pixel circuits as an example.

[0183] As shown in Figure 8, in the display screen 104, the M transistors in the pixel circuit 1 are respectively connected to the M scanning circuits in the GOA circuit. Each of the M scanning circuits can drive one of the M transistors. The PMIC 102 can output an input gate voltage to the DDIC 103. The DDIC 103 can process the received input gate voltage and obtain M output gate voltages, namely output gate voltage 1 to output gate voltage M. The DDIC 103 can output these M output gate voltages to the M transistors in the pixel circuit 1 respectively, and output these M output gate voltages to the M scanning circuits in the GOA circuit respectively. In some embodiments of this application, any transistor in the pixel circuit 1 and the scanning circuit connected to that transistor can receive and use the same output gate voltage. For example, transistor 1 and the scanning circuit 1 connected to transistor 1 receive the output gate voltage 1 output by the DDIC 103, transistor 2 and the scanning circuit 2 connected to transistor 2 receive the output gate voltage 2 output by the DDIC 103, and transistor M and the scanning circuit M connected to transistor M receive the output gate voltage M output by the DDIC 103. An example of pixel circuit 1 can be seen in Figures 9 and 10.

[0184] In some embodiments of this application, FIG8 will be described in conjunction with FIG6 and FIGS. 11-14, and the output gate voltage I output by DDIC103 to transistor 1 and scanning circuit 1 will be used as an example. The display mode of display screen 104 is in the first display mode. The voltage control module 103C in DDIC103 obtains the second display mode to be applied to display screen 104. The voltage control module 103C in DDIC103 can determine from the voltage lookup table that the output gate voltage I corresponding to the second display mode is the fifth voltage value, and the output gate voltage I corresponding to the first display mode is the sixth voltage value. The voltage lookup table can include the display mode of display screen 104 and the voltage value of the corresponding input gate voltage, and the display mode of display screen 104 and the voltage values ​​of the corresponding M output gate voltages. Examples of voltage lookup tables can be found in Tables 4 and 5 below.

[0185] Table 4

[0186] Table 5

[0187] As shown in Tables 4 and 5, the brightness of the display screen can be divided into three brightness segments from low to high: brightness segment A, brightness segment B, and brightness segment C. Brightness segment A, from low to high, can include brightness A1, brightness A2, and brightness A3; brightness segment B, from low to high, can include brightness B1, brightness B2, and brightness B3; and brightness segment C, from low to high, can include brightness C1, brightness C2, and brightness C3. In some embodiments of this application, the higher the brightness of the display screen, the greater the absolute values ​​of both the input gate voltage and the output gate voltage. In some embodiments of this application, the brightness values ​​in Tables 4 and 5 can be set according to the actual scenario; the brightness settings in different tables can be the same or different.

[0188] As shown in Table 4, the absolute values ​​of the output gate voltages 1 to M are different. The absolute value of any one of the M output gate voltages corresponding to different brightness levels of the display screen is the same. The absolute values ​​of the output gate voltages 1 to M are voltage values ​​1 to M, respectively. For example, the absolute value of the output gate voltage 1 corresponding to different brightness levels of the display screen is voltage value 1, the absolute value of the output gate voltage 2 corresponding to different brightness levels of the display screen is voltage value 2, and the absolute value of the output gate voltage M corresponding to different brightness levels of the display screen is voltage value M.

[0189] As shown in Table 5, the absolute values ​​of the output gate voltages 1 to M are different. The absolute value of the output gate voltage 1 varies depending on the brightness of the display screen. The absolute value of the output gate voltage corresponding to brightness A1 is D11, for brightness A2 it is D12, for brightness A3 it is D13, for brightness B1 it is D14, for brightness B2 it is D15, for brightness B3 it is D16, for brightness C1 it is D17, for brightness C2 it is D18, and for brightness C3 it is D19. The absolute values ​​of any one of the output gate voltages 2 to M corresponding to different brightness levels of the display screen are the same. The absolute values ​​of the output gate voltages 2 to M are respectively voltage values ​​2 to M. For example, the absolute value of the output gate voltage 2 corresponding to different brightness levels of the display screen is voltage value 2, and the absolute value of the output gate voltage M corresponding to different brightness levels of the display screen is voltage value M.

[0190] In some examples, the fifth voltage value and the sixth voltage value are different. For example, the first display mode is the brightness A1 shown in Table 5, and the second display mode is the brightness A2 shown in Table 5. The output gate voltage 1 corresponding to the first display mode is voltage value D11, and the output gate voltage 1 corresponding to the second display mode is voltage value D12. The voltage control module 103C in DDIC103 can adjust the output gate voltage 1. Then, the voltage control module 103C in DDIC103 can send a second control signal to the voltage regulator module 103A. The voltage regulator module 103A can adjust the output gate voltage 1 output to the display screen 104 according to the received second control signal, that is, adjust the voltage value of the output gate voltage 1 from the sixth voltage value corresponding to the first display mode to the fifth voltage value corresponding to the second display mode. In other examples, the fifth voltage value and the sixth voltage value are the same. For example, the first display mode is the brightness B1 shown in Table 4, and the second display mode is the brightness B2 shown in Table 4. The output gate voltage 1 corresponding to the first display mode and the second display mode is the voltage value 1. The voltage control module 103C in DDIC103 may not adjust the output gate voltage 1, and the voltage control module 103C in DDIC103 may not send the second control signal.

[0191] In some embodiments of this application, FIG8 will be described in conjunction with FIG7 and FIGS11-14, and the output gate voltage I output by DDIC103 to transistor 1 and scanning circuit 1 will be used as an example. The display mode of display screen 104 is in the first display mode. The voltage control module 101B in SoC101 obtains the second display mode to be applied to display screen 104. The voltage control module 101B in SoC101 can determine from the voltage lookup table that the output gate voltage I corresponding to the second display mode is the fifth voltage value, and the output gate voltage I corresponding to the first display mode is the sixth voltage value. In some examples, the fifth voltage value and the sixth voltage value are different. The voltage control module 101B in SoC101 can adjust the output gate voltage I. Then, the voltage control module 101B in SoC101 can send a second control signal to the voltage regulator module 103A in DDIC103. The voltage regulator module 103A can adjust the output gate voltage I output to display screen 104 according to the received second control signal, that is, adjust the voltage value of output gate voltage I from the sixth voltage value corresponding to the first display mode to the fifth voltage value corresponding to the second display mode. In some other examples, the fifth voltage value and the sixth voltage value are the same, and the voltage control module 101B in SoC101 may not adjust the output gate voltage 1, and the voltage control module 101B in SoC101 may not send the second control signal.

[0192] Not limited to the embodiment shown in FIG8, in other embodiments of this application, the multiple transistors in the pixel circuit 1 may also receive and use the same output gate voltage, and the multiple scanning circuits connected to these multiple transistors may also receive and use the same output gate voltage. The multiple transistors and the multiple scanning circuits receive the same output gate voltage. In some examples, the output gate voltage is used to input to the control signal terminal of the transistor. If the control signal terminals of the multiple transistors in the pixel circuit are the same, they can receive and use the same output gate voltage.

[0193] Not limited to the embodiment shown in FIG8, in some other embodiments of this application, PMIC102 may also output multiple input gate voltages to DDIC103, one input gate voltage corresponding to one output gate voltage, or one input gate voltage corresponding to multiple output gate voltages, and any one output gate voltage is obtained by processing the input gate voltage corresponding to the output gate voltage.

[0194] Tables 1-5 are for illustrative purposes only. In other embodiments of this application, the voltage lookup table may have more or fewer voltage switching points for the input gate voltage, and more or fewer voltage switching points for the output gate voltage. In other embodiments of this application, multiple transistors in the pixel circuit may also receive and use the same output gate voltage. In this case, the absolute voltage values ​​of multiple output gate voltages among the M output gate voltages in the voltage lookup table may be the same. In other embodiments of this application, the absolute voltage values ​​of multiple output gate voltages among the M output gate voltages in the voltage lookup table may be different under different brightness levels. The specific content of the voltage lookup table is not limited in the embodiments of this application.

[0195] Figure 9 is a schematic diagram of a pixel circuit according to an embodiment of this application. As shown in Figure 9, the pixel circuit includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, a storage capacitor Cst, and a light-emitting device. The light-emitting device is, for example, but not limited to, an LCD, OLED, AMOLED, FELD, MiniLED, MicroLED, Micro-OLED, or QLED light-emitting device. The pixel circuit shown in Figure 9 may include a voltage terminal of ELVDD and a voltage terminal of ELVSS, and the light-emitting device may be electrically connected to the voltage terminal of ELVSS. One end of the storage capacitor Cst is electrically connected to the voltage terminal of ELVDD, and the other end of the storage capacitor Cst is electrically connected to node N1.

[0196] Based on the explanation in Figure 4, it can be concluded that any transistor in the pixel circuit can include a gate, a source, and a drain. For ease of explanation, the source and drain are described below as the first pole and the second pole. The first pole is the source and the second pole is the drain, or the first pole is the drain and the second pole is the source.

[0197] In some embodiments of this application, the first transistor M1 can be a driving thin-film transistor (DTFT) for providing a driving current to the light-emitting device, which can emit light under the drive current. The second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, and the seventh transistor M7 can be switching transistors.

[0198] In some embodiments of this application, the pixel circuit shown in FIG9 can be a low temperature polysilicon (LTPS) thin film transistor (LTPS) pixel circuit, and the first transistor M1 to the seventh transistor M7 can be LTPS TFT.

[0199] As shown in Figure 9, the gate of the first transistor M1 is electrically connected to node N1, its first terminal is electrically connected to node N2, and its second terminal is electrically connected to node N3. The gate of the second transistor M2 is electrically connected to the control signal terminal S2, its first terminal is electrically connected to the data voltage (Vdata) terminal, and its second terminal is electrically connected to node N2. The gate of the third transistor M3 is electrically connected to the control signal terminal S2, its first terminal is electrically connected to node N1, and its second terminal is electrically connected to node N3. The gate of the fourth transistor M4 is electrically connected to the control signal terminal S1, its first terminal is electrically connected to node N1, and its second terminal is electrically connected to the signal terminal P1. The gate of the fifth transistor M5 is electrically connected to the emission (EM) control signal terminal, its first terminal is electrically connected to the ELVDD voltage terminal, and its second terminal is electrically connected to node N2. The gate of the sixth transistor M6 is electrically connected to the control signal terminal EM, the first terminal of the sixth transistor M6 is electrically connected to node N3, and the second terminal of the sixth transistor M6 is electrically connected to the anode of the light-emitting device. The gate of the seventh transistor M7 is electrically connected to the control signal terminal S3, the first terminal of the seventh transistor M7 is electrically connected to the anode of the light-emitting device, and the second terminal of the seventh transistor M7 is electrically connected to the signal terminal P2.

[0200] As shown in Figure 9, control signal terminals S1, S2, S3, and EM can receive output gate voltage 1, output gate voltage 2, output gate voltage 3, and output gate voltage 4, respectively. The first transistor M1 provides drive current to the light-emitting device. The second transistor M2 and the third transistor M3, under the control of the output gate voltage 2 of control signal terminal S2, write the data voltage (Vdata) to node N1; the data voltage (Vdata) is the aforementioned gamma voltage. The fourth transistor M4, under the control of the output gate voltage 1 of control signal terminal S1, outputs the voltage Vref1 of signal terminal P1 to node N1, resetting the gate of M1 connected to node N1. The fifth transistor M5 and the sixth transistor M6, under the control of the output gate voltage 4 of control signal terminal EM, control the magnitude of the drive current provided by the first transistor M1 to the light-emitting device according to ELVDD. In some examples, when both M5 and M6 are in the on state, the drive current received by the light-emitting device is at its maximum value; when both M5 and M6 are in the off state, the drive current received by the light-emitting device is zero. The seventh transistor M7 is used to output the voltage Vref2 of the signal terminal P2 to the anode of the light-emitting device under the control of the output gate voltage 3 of the control signal terminal S3, so as to reset the anode of the light-emitting device.

[0201] In some embodiments of this application, control signal terminals S1, S2, S3 and EM can be respectively connected to four scanning circuits in the GOA circuit of the display screen 104. The scanning circuit connected to control signal terminal S1 can receive output gate voltage 1, the scanning circuit connected to control signal terminal S2 can receive output gate voltage 2, the scanning circuit connected to control signal terminal S3 can receive output gate voltage 3, and the scanning circuit connected to control signal terminal EM can receive output gate voltage 4.

[0202] Figure 10 is a schematic diagram of another pixel circuit provided in an embodiment of this application. In the pixel circuit shown in Figure 10, the gate of the second transistor M2 is electrically connected to the control signal terminal S4, and the gate of the third transistor M3 is electrically connected to the control signal terminal S2. The control signal terminals S2 and S4 can receive the output gate voltage 2 and the output gate voltage 5, respectively. Under the control of the output gate voltage 5 of the control signal terminal S4 and the output gate voltage 2 of the control signal terminal S2, the second transistor M2 and the third transistor M3 write the data voltage (Vdata) to node N1. In some embodiments of this application, the control signal terminals S4 and S2 can be connected to two scanning circuits in the GOA circuit of the display screen 104, respectively. The scanning circuit connected to the control signal terminal S4 can receive the output gate voltage 5, and the scanning circuit connected to the control signal terminal S2 can receive the output gate voltage 2. In some embodiments of this application, the pixel circuit shown in FIG9 can be a low-temperature polysilicon and oxide (LTPO) pixel circuit. The third transistor M3 and the fourth transistor M4 are used to drive the stability of the gate voltage of the first transistor M1. A lower drain circuit is required, so it can be an indium gallium zinc oxide (IGZO) TFT. The first transistor M1, the second transistor M2, the fifth transistor M5, the sixth transistor M6 and the seventh transistor M7 can be LTPS TFTs.

[0203] In some embodiments of this application, the structures and operating modes of the M transistors in the pixel circuit may differ. Therefore, in a certain display mode of the display screen 104, the operating voltages required by different transistors among the M transistors may be different, and the operating voltages required by different scanning circuits in the GOA circuit to drive different transistors may also be different. For example, in the same display mode, there are multiple transistors among the M transistors that require different voltages. Transistor 1 requires the lowest output gate voltage, transistor 2 requires a relatively low output gate voltage, and transistor M requires the highest output gate voltage. The scanning circuit 1 used to drive transistor 1 requires the lowest output gate voltage, the scanning circuit 2 used to drive transistor 2 requires a relatively low output gate voltage, and the scanning circuit M used to drive transistor M requires the highest output gate voltage. However, the output gate voltage output by DDIC 103 to the display screen 104 is generally set to the output gate voltage required by transistor M, resulting in the overflow of the output gate voltages of transistor 1 and transistor 2, leading to wasted power consumption. However, in the embodiments of this application, such as the embodiments shown in Figures 8-10, different transistors in the pixel circuit can use different output gate voltages, and different scanning circuits in the GOA circuit can use different output gate voltages. The output gate voltage received by each transistor and the connected scanning circuit can be the operating voltage required by the current transistor and scanning circuit. Therefore, there is no situation of output gate voltage overflow, thus avoiding the aforementioned power consumption waste.

[0204] The following are some exemplary timing diagrams of voltage regulation processes. For ease of explanation, the following example uses VGL, where the input transistor voltage is the input gate voltage, and VGLO, where the output transistor voltage is the output gate voltage. VGL and VGLO are negative voltages, and the gamma voltage is positive. For simplicity, the following example illustrates that adjusting VGL is a slow process, while adjusting VGLO is instantaneous.

[0205] Figure 15 is a timing diagram of a voltage adjustment process provided in an embodiment of this application. The voltage adjustment process shown in Figure 15 can be an example of the voltage adjustment method shown in Figure 11. Figure 15 illustrates the adjustment from brightness A3 in Table 1 to a higher brightness B1, i.e., the brightness of the second display mode is brightness B1 and the brightness of the first display mode is brightness A3. Therefore, the first voltage value of the input gate voltage in Figure 15 is greater than the third voltage value, and the second voltage value of the output gate voltage is greater than the fourth voltage value. The voltage adjustment process shown in Figure 15 includes increasing the absolute value of VGL, increasing the absolute value of VGLO, and decreasing the absolute value of the gamma voltage.

[0206] As shown in Figure 15, the refresh times of the display screen, from earliest to latest, are: refresh time 1, refresh time 2, refresh time 3, refresh time 4, and refresh time 5. Before refresh time 3, the display brightness is A3, the brightness of the first display mode. After refresh time 2 and before refresh time 3, SoC101 can send the brightness B1 of the second display mode to DDIC103. Brightness A3 is the old brightness, and brightness B1 is the new brightness. Before refresh time 3, VGL is the voltage value A21 corresponding to the old brightness A3, and VGLO is the voltage value A11 corresponding to the old brightness A3. Assume the gamma voltage corresponding to the old brightness A3 is voltage value A31. According to Table 1, the VGL corresponding to the new brightness B1 is voltage value C21, and the VGLO corresponding to the new brightness B1 is voltage value B11. Therefore, the voltage adjustment process can include increasing the absolute value of VGL, that is, decreasing the actual value of the negative voltage VGL. Specifically, this involves adjusting the absolute value of VGL from voltage value A21 to voltage value C21, and increasing the absolute value of VGLO, that is, decreasing the actual value of the negative voltage VGLO. Specifically, this involves adjusting the absolute value of VGLO from voltage value A11 to voltage value B11. In some embodiments of this application, the voltage adjustment process also includes adjusting the gamma voltage. Assuming the gamma voltage corresponding to the new brightness B1 is voltage value B31, and voltage value A31 is greater than voltage value B31, the voltage adjustment process can include decreasing the gamma voltage, specifically adjusting the gamma voltage from voltage value A31 to voltage value B31.

[0207] At the first refresh time after the new brightness B1 is issued, i.e. at refresh time 3, the voltage control module can send the first control signal of VGL to PMIC102. After the first control signal of VGL is issued, the absolute value of VGL can gradually change from voltage value A21 to voltage value C21. Assuming that VGL reaches a steady state before refresh time 4, i.e. reaches a stable voltage value C21.

[0208] At the next refresh time after VGL reaches a steady state, i.e. at refresh time 4, the voltage control module can send a second control signal of VGLO to the voltage regulator module 103A in DDIC103. The voltage regulator module 103A in DDIC103 can adjust the absolute value of VGLO from voltage value A11 to voltage value B11. At refresh time 4, the gamma module 103B in DDIC103 can adjust the gamma voltage from voltage value A31 to voltage value B31.

[0209] The new brightness B1 is issued after refresh time 2 and before refresh time 3. Therefore, after refresh time 3, the target brightness of the display is expected to be the new brightness B1. However, to ensure that the difference between VGL and VGLO is always greater than the minimum requirement during voltage adjustment, i.e., to ensure that the transistor voltage remains stable during voltage adjustment, VGL and VGLO are adjusted at different refresh times. Specifically, VGL is adjusted first at refresh time 3, and then VGLO and the gamma voltage are adjusted at the next refresh time 4 after VGL reaches a steady state. Since VGLO is adjusted to B11 corresponding to the new brightness B1 at refresh time 4, the display brightness remains the old brightness A3 between refresh time 3 and refresh time 4. After refresh time 4, the display brightness is the new brightness B1.

[0210] Figure 16 is a timing diagram of another voltage adjustment process provided in an embodiment of this application. The voltage adjustment process shown in Figure 16 can be an example of the voltage adjustment method shown in Figure 11. Figure 16 is illustrated by taking the adjustment of the brightness C1 in Table 1 to a lower brightness A2, that is, the brightness of the second display mode is brightness A2 and the brightness of the first display mode is brightness C1. Therefore, the first voltage value of the input gate voltage in Figure 16 is less than the third voltage value, and the second voltage value of the output gate voltage is less than the fourth voltage value. The voltage adjustment process shown in Figure 16 includes reducing the absolute value of VGL, reducing the absolute value of VGLO, and increasing the absolute value of the gamma voltage.

[0211] As shown in Figure 16, the refresh times of the display screen, from earliest to latest, are: refresh time 6, refresh time 7, refresh time 8, refresh time 9, and refresh time 10. Before refresh time 8, the display brightness is the brightness C1 of the first display mode. After refresh time 7 and before refresh time 8, SoC101 can send the brightness A2 of the second display mode to DDIC103. Brightness C1 is the old brightness, and brightness A2 is the new brightness. Before refresh time 8, VGL is the voltage value C21 corresponding to the old brightness C1, and VGLO is the voltage value C11 corresponding to the old brightness C1. Assume that the gamma voltage corresponding to the old brightness C1 is voltage value C31. According to Table 1, the VGL corresponding to the new brightness A2 is voltage value A21, and the VGLO corresponding to the new brightness A2 is voltage value A11. Therefore, the voltage adjustment process can include decreasing the absolute value of VGL, that is, increasing the actual value of the negative voltage VGL. Specifically, this involves adjusting the absolute value of VGL from voltage value C21 to voltage value A21, and decreasing the absolute value of VGLO, that is, increasing the actual value of the negative voltage VGLO. Specifically, this involves adjusting the absolute value of VGLO from voltage value C11 to voltage value A11. In some embodiments of this application, the voltage adjustment process also includes adjusting the gamma voltage. Assuming the gamma voltage corresponding to the new brightness A2 is voltage value A32, and voltage value C31 is less than voltage value A32, the voltage adjustment process can include increasing the gamma voltage, specifically adjusting the gamma voltage from voltage value C31 to voltage value A32.

[0212] At the first refresh moment after the new brightness A2 is issued, i.e., at refresh moment 8, the voltage control module can send a second control signal for VGLO to the voltage regulator module 103A in DDIC103. The voltage regulator module 103A in DDIC103 can adjust the absolute value of VGLO from voltage value C11 to voltage value A11. At refresh moment 8, the gamma module 103B in DDIC103 can adjust the gamma voltage from voltage value C31 to voltage value A32. Therefore, after refresh moment 8, both the expected target brightness of the display and the actual display brightness are the new brightness A2.

[0213] At the next refresh time after VGLO reaches a steady state, i.e. at refresh time 9, the voltage control module can send the first control signal of VGL to PMIC102. After sending the first control signal of VGL, the absolute value of VGL can gradually change from voltage value C21 to voltage value A21. Assume that VGL reaches a stable voltage value A21 before refresh time 10.

[0214] Figure 17 is a timing diagram of another voltage adjustment process provided in an embodiment of this application. The voltage adjustment process shown in Figure 17 can be an example of the voltage adjustment method shown in Figure 12. Figure 17 is illustrated by taking the adjustment of brightness A2 in Table 2 to a higher brightness A3, that is, the brightness of the second display mode is brightness A3 and the brightness of the first display mode is brightness A2. Therefore, the first voltage value of the input gate voltage in Figure 17 is greater than the third voltage value, and the second voltage value of the output gate voltage is equal to the fourth voltage value. The voltage adjustment process shown in Figure 17 includes increasing the absolute value of VGL, not adjusting the absolute value of VGL0, and decreasing the absolute value of the gamma voltage.

[0215] As shown in Figure 17, the refresh times of the display screen, from earliest to latest, are: refresh time 11, refresh time 12, refresh time 13, refresh time 14, and refresh time 15. Before refresh time 13, the display brightness is the brightness A2 of the first display mode. After refresh time 12 and before refresh time 13, SoC 101 can send the brightness A3 of the second display mode to DDIC 103. Brightness A2 is the old brightness, and brightness A3 is the new brightness. Before refresh time 13, VGL is the voltage value A21 corresponding to the old brightness A2, and VGLO is the voltage value A11 corresponding to the old brightness A2. Assume that the gamma voltage corresponding to the old brightness A2 is voltage value A32. According to Table 2, the VGL corresponding to the new brightness A3 is voltage value C21, and the VGLO corresponding to the new brightness A3 is voltage value A11. The VGLO corresponding to the new brightness A3 is the same as the VGLO corresponding to the old brightness A2. Therefore, the voltage adjustment process may include increasing the absolute value of VGL, that is, decreasing the actual value of the negative voltage VGL. Specifically, the absolute value of VGL is adjusted from voltage value A21 to voltage value C21, but VGLO does not need to be adjusted. In some embodiments of this application, the voltage adjustment process also includes adjusting the gamma voltage. Assuming the gamma voltage corresponding to the new brightness A3 is voltage value A31, and voltage value A32 is greater than voltage value A31, the voltage adjustment process may include decreasing the gamma voltage, specifically adjusting the gamma voltage from voltage value A32 to voltage value A31.

[0216] At the first refresh moment after the new brightness A3 is issued, i.e., at refresh moment 13, the voltage control module can send the first control signal of VGL to PMIC 102. After sending the first control signal of VGL, the absolute value of VGL can gradually change from voltage value A21 to voltage value C21. Assume that VGL reaches a stable voltage value C21 before refresh moment 14. Furthermore, at refresh moment 13, the gamma module 103B in DDIC 103 can adjust the gamma voltage from voltage value A32 to voltage value A31. Since VGLO is not adjusted during this voltage adjustment process, after refresh moment 13, both the expected target brightness of the display and the actual display brightness are the new brightness A3.

[0217] Figure 18 is a timing diagram of another voltage adjustment process provided in an embodiment of this application. The voltage adjustment process shown in Figure 18 can be an example of the voltage adjustment method shown in Figure 13. Figure 18 is illustrated by taking the adjustment of brightness B2 in Table 2 to a higher brightness B3, that is, the brightness of the second display mode is brightness B3 and the brightness of the first display mode is brightness B2. Therefore, the first voltage value of the input gate voltage in Figure 18 is equal to the third voltage value, and the second voltage value of the output gate voltage is greater than the fourth voltage value. The voltage adjustment process shown in Figure 18 includes not adjusting the absolute value of VGL, increasing the absolute value of VGL0, and decreasing the absolute value of the gamma voltage.

[0218] As shown in Figure 18, the refresh times of the display screen, from earliest to latest, are: refresh time 16, refresh time 17, refresh time 18, refresh time 19, and refresh time 20. Before refresh time 18, the display brightness is the brightness B2 of the first display mode. After refresh time 17 and before refresh time 18, SoC 101 can send the brightness B3 of the second display mode to DDIC 103. Brightness B2 is the old brightness, and brightness B3 is the new brightness. Before refresh time 18, VGL is the voltage value C21 corresponding to the old brightness B2, and VGLO is the voltage value B12 corresponding to the old brightness B2. Assume that the gamma voltage corresponding to the old brightness B2 is voltage value B32. According to Table 2, the VGL corresponding to the new brightness B3 is voltage value C21, and the VGLO corresponding to the new brightness B3 is voltage value B13. Since the VGL corresponding to the new brightness B3 is the same as the VGL corresponding to the old brightness B2, the voltage adjustment process can include increasing the absolute value of VGLO, that is, decreasing the actual value of the negative voltage VGLO. Specifically, the absolute value of VGLO is adjusted from voltage value B12 to voltage value B13, but VGL does not need to be adjusted. In some embodiments of this application, the voltage adjustment process also includes adjusting the gamma voltage. Assuming the gamma voltage corresponding to the new brightness B3 is voltage value B33, and voltage value B32 is greater than voltage value B33, the voltage adjustment process can include decreasing the gamma voltage, specifically adjusting the gamma voltage from voltage value B32 to voltage value B33.

[0219] At the first refresh moment after the new brightness B3 is issued, i.e., at refresh moment 18, the voltage control module can send a second control signal for VGLO to the voltage regulator module 103A in DDIC103. The voltage regulator module 103A in DDIC103 can adjust the absolute value of VGLO from voltage value B12 to voltage value B13. At refresh moment 18, the gamma module 103B in DDIC103 can adjust the gamma voltage from voltage value B32 to voltage value B33. Therefore, after refresh moment 18, both the expected target brightness of the display and the actual display brightness are the new brightness B3.

[0220] Figure 19 is a timing diagram of another voltage adjustment process provided in an embodiment of this application. The voltage adjustment process shown in Figure 19 can be an example of the voltage adjustment method shown in Figure 14. Figure 19 is illustrated by taking the adjustment of brightness A1 in Table 2 to a higher brightness A2, that is, the brightness of the second display mode is brightness A2 and the brightness of the first display mode is brightness A1. Therefore, the first voltage value of the input gate voltage in Figure 19 is equal to the third voltage value, and the second voltage value of the output gate voltage is equal to the fourth voltage value. The voltage adjustment process shown in Figure 19 includes not adjusting the absolute value of VGL, not adjusting the absolute value of VGLO, and reducing the absolute value of the gamma voltage.

[0221] As shown in Figure 19, the refresh times of the display screen, from earliest to latest, are: refresh time 21, refresh time 22, refresh time 23, refresh time 24, and refresh time 25. Before refresh time 23, the display brightness is the brightness A1 of the first display mode. After refresh time 22 and before refresh time 23, SoC 101 can send the brightness A2 of the second display mode to DDIC 103. Brightness A1 is the old brightness, and brightness A2 is the new brightness. Before refresh time 23, VGL is the voltage value A21 corresponding to the old brightness A1, and VGLO is the voltage value A11 corresponding to the old brightness A1. Assume that the gamma voltage corresponding to the old brightness A1 is voltage value A33. According to Table 2, the VGL corresponding to the new brightness A2 is voltage value A21, and the VGLO corresponding to the new brightness A2 is voltage value A11. The VGL corresponding to the new brightness A2 is the same as the VGL corresponding to the old brightness A1, and the VGLO corresponding to the new brightness A2 is the same as the VGLO corresponding to the old brightness A1. Therefore, the voltage adjustment process does not include adjusting VGL and VGLO. In some embodiments of this application, the voltage adjustment process includes adjusting the gamma voltage. Assuming that the gamma voltage corresponding to the new brightness A2 is voltage value A32, and voltage value A33 is greater than voltage value A32, the voltage adjustment process may include reducing the gamma voltage, specifically adjusting the gamma voltage from voltage value A33 to voltage value A32.

[0222] At the first refresh moment after the new brightness A2 is issued, i.e., at refresh moment 23, the gamma module 103B in DDIC103 can adjust the gamma voltage from voltage value A33 to voltage value A32. Therefore, after refresh moment 23, both the expected target brightness of the display and the actual display brightness are the new brightness A2.

[0223] In some embodiments of this application, the new brightness of the display screen 104 to be applied to the electronic device 100 and the old brightness already applied to the display screen 104 are not adjacent brightnesses in the voltage lookup table. That is, the brightness of the second display mode and the brightness of the first display mode are not adjacent brightnesses in the voltage lookup table. For example, in Table 1, brightness A3 and brightness B1 are adjacent brightnesses, but brightness A3 and brightness B2 are not adjacent brightnesses. In this case, the input gate voltage and output gate voltage can be directly adjusted to the input gate voltage and output gate voltage corresponding to the new brightness through a single voltage adjustment process, such as the voltage adjustment process shown in Figure 16 above.

[0224] In some other embodiments of this application, if the brightness of the second display mode and the brightness of the first display mode are not adjacent brightness values ​​in the voltage lookup table, the brightness can be adjusted in a stepwise manner according to the brightness order in the voltage lookup table. That is, multiple voltage adjustment processes are performed in chronological order. The brightness before and after each voltage adjustment process is an adjacent brightness value in the voltage lookup table. The brightness before adjustment corresponding to the first voltage adjustment process is the brightness of the first display mode (i.e., the old brightness), and the brightness after adjustment corresponding to the last voltage adjustment process is the brightness of the second display mode (i.e., the new brightness). For example, to adjust brightness A3 in Table 1 to brightness B3, three voltage adjustment processes are required. The first voltage adjustment process will adjust brightness A3 to brightness B1, the second voltage adjustment process will adjust brightness B1 to brightness B2, and the third voltage adjustment process will adjust brightness B2 to brightness B3. A specific implementation example can be seen in Figure 20. This ensures that the brightness change of the display screen is continuous during the voltage adjustment process, avoids sudden brightness changes caused by voltage mismatch, and provides users with a better visual experience.

[0225] Figure 20 is a timing diagram of another voltage adjustment process provided in an embodiment of this application. Figure 20 is illustrated using the example of adjusting the brightness from A3 in Table 1 to a higher brightness B3.

[0226] As shown in Figure 20, the refresh times of the display screen, from morning to evening, are: refresh time 26 to refresh time 32. During refresh times 26 to 28, the display brightness of the screen is brightness A3 of the first display mode. Assuming the brightness of the second display mode is brightness B3, brightness A3 is the old brightness, and brightness B3 is the new brightness, adjusting brightness A3 to brightness B3 requires three voltage adjustment processes.

[0227] As shown in Figure 20, the first voltage adjustment process adjusts the old brightness A3 to brightness B1. Therefore, the first voltage adjustment process includes increasing the absolute value of VGL, increasing the absolute value of VGLO, and decreasing the absolute value of the gamma voltage. Brightness B1 can be issued after refresh time 27 and before refresh time 28. Therefore, at the first refresh time after issuing brightness B1, i.e., refresh time 28, the first control signal of VGL can be issued. The absolute value of VGL can gradually change from voltage value A21 to voltage value C21. Assuming that VGL reaches a stable voltage value C21 before refresh time 29, and then at the next refresh time after VGL reaches a steady state, i.e., refresh time 29, the absolute value of VGLO can be adjusted from the voltage value A11 corresponding to brightness A3 to the voltage value B11 corresponding to brightness B1, and the gamma voltage can be adjusted from the voltage value A31 corresponding to brightness A3 to the voltage value B31 corresponding to brightness B1. Therefore, after refresh time 29, the expected target brightness of the display and the actual display brightness of the display are both B1.

[0228] As shown in Figure 20, the second voltage adjustment process will adjust the brightness B1 to brightness B2. Therefore, the second voltage adjustment process includes not adjusting the absolute value of VGL, increasing the absolute value of VGLO, and decreasing the absolute value of the gamma voltage. Brightness B2 can be issued after refresh time 29 and before refresh time 30. Therefore, at the first refresh time after issuing brightness B2, i.e., refresh time 30, the absolute value of VGLO can be adjusted from the voltage value B11 corresponding to brightness B1 to the voltage value B12 corresponding to brightness B2, and the gamma voltage can be adjusted from the voltage value B31 corresponding to brightness B1 to the voltage value B32 corresponding to brightness B2. Therefore, after refresh time 30, both the expected target brightness of the display and the actual display brightness are B2.

[0229] As shown in Figure 20, the third voltage adjustment process will adjust the brightness B2 to the new brightness B3. Therefore, the third voltage adjustment process includes not adjusting the absolute value of VGL, increasing the absolute value of VGLO, and decreasing the absolute value of the gamma voltage. Brightness B3 can be issued after refresh time 30 and before refresh time 31. Therefore, at the first refresh time after issuing brightness B3, i.e., refresh time 31, the absolute value of VGLO can be adjusted from the voltage value B12 corresponding to brightness B2 to the voltage value B13 corresponding to brightness B3, and the gamma voltage can be adjusted from the voltage value B32 corresponding to brightness B2 to the voltage value B33 corresponding to brightness B3. Therefore, after refresh time 31, both the expected target brightness of the display and the actual display brightness are the new brightness B3.

[0230] The methods provided in the embodiments of this application can be implemented, in whole or in part, by software, hardware, firmware, or any combination thereof. When implemented in software, they can be implemented, in whole or in part, in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user equipment, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., digital video disc (DWD), or a semiconductor medium (e.g., solid-state drive). (disk, SSD, etc.). The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit it; although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display module, characterized by The display driving chip and the display screen are included, the display screen is in a first display mode, the display driving chip is used for receiving first information, determining to switch the display screen to a second display mode according to the first information, determining a first input voltage corresponding to the second display mode as a first voltage value according to the second display mode, the first input voltage being a voltage output by a first power supply to the display driving chip, determining a first output voltage corresponding to the second display mode as a second voltage value according to the second display mode, the first output voltage being a voltage output by the display driving chip to the display screen; The display driving chip is further used for sending the first voltage value to the first power supply; The display driving chip is further used for receiving the first voltage output by the first power supply as the first input voltage, the first voltage being output by the first power supply according to the first voltage value; The display driving chip is further used for outputting the first output voltage to the display screen according to the second voltage value.

2. The display module of claim 1, wherein, The display screen includes a plurality of pixel circuits, one of the pixel circuits including M transistors, M being a positive integer, the first input voltage being an input gate voltage, the first output voltage including M output gate voltages, and the second voltage value including M voltage values, the display driving chip being further used for determining that the M output gate voltages corresponding to the second display mode are the M voltage values respectively according to the second display mode, and outputting the M output gate voltages to the M transistors respectively according to the M voltage values.

3. The display module of claim 2, wherein the display module is configured to be mounted to a display module mounting surface of a display module mounting structure. The display screen includes a gate driving circuit, the gate driving circuit including M scan circuits, the M scan circuits being connected to the M transistors in the pixel circuits respectively; The display driving chip is further used for outputting the M output gate voltages to the M transistors and the M scan circuits respectively, wherein the display driving chip outputs a same first output gate voltage to a first transistor and a first scan circuit, the first transistor being any one of the M transistors, and the first scan circuit being a scan circuit connected to the first transistor among the M scan circuits.

4. The display module of any one of claims 1-3, wherein, The first input voltage corresponding to the first display mode is a third voltage value, and the display driving chip is further used for determining that the first voltage value is different from the third voltage value before sending the first voltage value to the first power supply; The first output voltage corresponding to the first display mode is a fourth voltage value, and the display driving chip is further used for determining that the second voltage value is different from the fourth voltage value before outputting the first output voltage to the display screen according to the second voltage value.

5. The display module of claim 4, wherein the display module is configured to be mounted to a display module mounting surface of a display module mounting structure. The display driving chip is further configured to determine that the first voltage value is greater than the third voltage value and the second voltage value is greater than the fourth voltage value, send the first voltage value to the first power supply at a first time, output the first output voltage to the display screen according to the second voltage value at a second time after the first time, and output the first output voltage to the display screen according to the fourth voltage value before the second time; or The display driving chip is further configured to determine that the first voltage value is less than the third voltage value and the second voltage value is less than the fourth voltage value, output the first output voltage to the display screen according to the second voltage value at a third time, send the first voltage value to the first power supply at a fourth time after the third time, receive the first voltage output by the first power supply as the first input voltage after the fourth time, and receive a second voltage output by the first power supply as the first input voltage before the fourth time, the second voltage being output by the first power supply according to the third voltage value.

6. The display module of claim 4 or 5, wherein, The display driving chip is further configured to determine that the first voltage value and the third voltage value are the same and the second voltage value and the fourth voltage value are different, receive a second voltage output by the first power supply as the first input voltage, the second voltage being output by the first power supply according to the third voltage value, and output the first output voltage to the display screen according to the second voltage value; or The display driving chip is further configured to determine that the first voltage value and the third voltage value are different and the second voltage value and the fourth voltage value are the same, send the first voltage value to the first power supply, receive the first voltage output by the first power supply as the first input voltage, and output the first output voltage to the display screen according to the fourth voltage value; or The display driving chip is further configured to determine that the first voltage value and the third voltage value are the same and the second voltage value and the fourth voltage value are the same, receive a second voltage output by the first power supply as the first input voltage, the second voltage being output by the first power supply according to the third voltage value, and output the first output voltage to the display screen according to the fourth voltage value.

7. The display module of claim 3, wherein the display module is configured to be mounted on a display stand. The display driving chip is further configured to determine, according to the second display mode, that the first output gate voltage corresponding to the second display mode is a fifth voltage value and the first output gate voltage corresponding to the first display mode is a sixth voltage value. The display driving chip is further configured to determine that the fifth voltage value and the sixth voltage value are different, and output the first output gate voltage to the first transistor and the first scanning circuit according to the fifth voltage value; or the display driving chip is further configured to determine that the fifth voltage value and the sixth voltage value are the same, and output the first output gate voltage to the first transistor and the first scanning circuit according to the sixth voltage value.

8. The display module of any one of claims 1-7, wherein, The first display mode and the second display mode are respectively a screen-off display mode and a screen-on display mode, or the first display mode and the second display mode are both screen-off display modes or screen-on display modes, and the first display mode and the second display mode correspond to different display brightness.

9. An electronic device, comprising: The display module comprises a processor and a display module as claimed in any one of claims 1-8, and the processor is configured to send the first information to the display module.

10. An electronic device, comprising: The display module comprises a processor, a display driving chip and a display screen, the display screen is in a first display mode, the processor is configured to determine to switch the display screen to a second display mode, determine that a first input voltage corresponding to the second display mode is a first voltage value according to the second display mode, the first input voltage is a voltage output by a first power supply to the display driving chip, determine that a first output voltage corresponding to the second display mode is a second voltage value according to the second display mode, the first output voltage is a voltage output by the display driving chip to the display screen; The processor is further configured to send the first voltage value to the first power supply; The display driving chip is configured to receive the first voltage output by the first power supply as the first input voltage, the first voltage being output by the first power supply according to the first voltage value; The processor is further configured to send the second voltage value to the display driving chip; The display driving chip is further configured to output the first output voltage to the display screen according to the second voltage value.

11. The electronic device of claim 10, wherein, The display screen comprises a plurality of pixel circuits and a gate driving circuit, one of the pixel circuits comprises M transistors, the gate driving circuit comprises M scanning circuits, M is a positive integer, the M scanning circuits are respectively connected to the M transistors in the pixel circuit, the first input voltage is an input gate voltage, the first output voltage comprises M output gate voltages, the second voltage value comprises M voltage values, and the processor is further configured to determine that the M output gate voltages corresponding to the second display mode are respectively the M voltage values according to the second display mode. The processor is further configured to send the M voltage values to the display driving chip, and the display driving chip is further configured to output the M output gate voltages to the M transistors and the M scanning circuits respectively according to the M voltage values, wherein the display driving chip outputs a same first output gate voltage to a first transistor and a first scanning circuit, the first transistor is any one of the M transistors, and the first scanning circuit is a scanning circuit connected to the first transistor among the M scanning circuits.

12. The electronic device of claim 10 or 11, wherein, The first input voltage corresponding to the first display mode is a third voltage value, and the processor is further configured to determine that the first voltage value is different from the third voltage value before sending the first voltage value to the first power supply. The first display mode corresponds to the first output voltage being a fourth voltage value, and the processor is further configured to determine that the second voltage value is different from the fourth voltage value before sending the second voltage value to the display driving chip.

13. The electronic device of claim 12, wherein, The processor is further configured to determine that the first voltage value is greater than the third voltage value and the second voltage value is greater than the fourth voltage value, send the first voltage value to the first power supply at a first time, and send the second voltage value to the display driving chip at a second time after the first time, and the display driving chip is further configured to output the first output voltage to the display screen according to the second voltage value after the second time and output the first output voltage to the display screen according to the fourth voltage value before the second time; or, The processor is further configured to determine that the first voltage value is less than the third voltage value and the second voltage value is less than the fourth voltage value, send the second voltage value to the display driving chip at a third time, and send the first voltage value to the first power supply at a fourth time after the third time, and the display driving chip is further configured to output the first output voltage to the display screen according to the second voltage value after the third time, receive the first voltage output by the first power supply as the first input voltage after the fourth time, and receive a second voltage output by the first power supply as the first input voltage before the fourth time, the second voltage being output by the first power supply according to the third voltage value.

14. The electronic device of claim 12 or 13, wherein, The processor is further configured to determine that the first voltage value is the same as the third voltage value and the second voltage value is different from the fourth voltage value, send the second voltage value to the display driving chip, and the display driving chip is further configured to receive a second voltage output by the first power supply as the first input voltage, the second voltage being output by the first power supply according to the third voltage value, and output the first output voltage to the display screen according to the second voltage value; or, The processor is further configured to determine that the first voltage value is different from the third voltage value and the second voltage value is the same as the fourth voltage value, send the first voltage value to the first power supply, and the display driving chip is further configured to receive a first voltage output by the first power supply as the first input voltage and output the first output voltage to the display screen according to the fourth voltage value; or, The processor is further configured to determine that the first voltage value is the same as the third voltage value and the second voltage value is the same as the fourth voltage value, and the display driving chip is further configured to receive a second voltage output by the first power supply as the first input voltage, the second voltage being output by the first power supply according to the third voltage value, and output the first output voltage to the display screen according to the fourth voltage value.

15. The electronic device of claim 11, wherein, The processor is further configured to determine, according to the second display mode, that the first output gate voltage corresponding to the second display mode is a fifth voltage value, and the first output gate voltage corresponding to the first display mode is a sixth voltage value. The processor is further configured to determine that the fifth voltage value and the sixth voltage value are different, and send the fifth voltage value to the display driving chip, and the display driving chip is further configured to output the first output gate voltage to the first transistor and the first scanning circuit according to the fifth voltage value; or the processor is further configured to determine that the fifth voltage value and the sixth voltage value are the same, and the display driving chip is further configured to output the first output gate voltage to the first transistor and the first scanning circuit according to the sixth voltage value.

16. The electronic device of any of claims 10-15, wherein, The first display mode and the second display mode are respectively an off-screen display mode and an on-screen display mode, or the first display mode and the second display mode are both an off-screen display mode or an on-screen display mode, and the display brightness corresponding to the first display mode and the second display mode is different.

17. A method of voltage adjustment, the method comprising: The method is applied to a display module, and the display module comprises a display driving chip and a display screen. The display screen is in a first display mode, the display driving chip receives first information, the display driving chip determines to switch the display screen to a second display mode according to the first information, the first input voltage corresponding to the second display mode is a first voltage value, the first input voltage is a voltage output by a first power supply to the display driving chip, the first output voltage corresponding to the second display mode is a second voltage value, and the first output voltage is a voltage output by the display driving chip to the display screen. The display driving chip receives the first voltage output by the first power supply as the first input voltage, and the first voltage is a voltage output by the first power supply according to the received first voltage value. The display driving chip outputs the first output voltage to the display screen according to the second voltage value.

18. The method of claim 17, wherein, The display screen comprises a plurality of pixel circuits and a gate driving circuit, one pixel circuit comprises M transistors, the gate driving circuit comprises M scanning circuits, M is a positive integer, the M scanning circuits are connected with the M transistors in the pixel circuit respectively, the first input voltage is an input gate voltage, the first output voltage comprises M output gate voltages, the second voltage value comprises M voltage values, and the M output gate voltages corresponding to the second display mode are the M voltage values respectively. The display driving chip outputs the first output voltage to the display screen according to the second voltage value, including that the display driving chip outputs the M output gate voltages to the M transistors and the M scan circuits respectively according to the M voltage values, wherein the display driving chip outputs a same first output gate voltage to a first transistor and a first scan circuit, the first transistor is any one of the M transistors, and the first scan circuit is a scan circuit connected with the first transistor among the M scan circuits.

19. The method of claim 17 or 18, wherein, The first input voltage corresponding to the first display mode is a third voltage value, and the first output voltage corresponding to the first display mode is a fourth voltage value. Before the display driving chip receives the first voltage output by the first power supply as the first input voltage, the method further includes determining that the first voltage value and the third voltage value are different. Before the display driving chip outputs the first output voltage to the display screen according to the second voltage value, the method further includes determining that the second voltage value and the fourth voltage value are different.

20. The method of claim 19, wherein, The first voltage value is greater than the third voltage value, and the second voltage value is greater than the fourth voltage value. The display driving chip receives the first voltage output by the first power supply as the first input voltage, including that the display driving chip sends the first voltage value to the first power supply at a first time, and the display driving chip receives the first voltage output by the first power supply as the first input voltage after the first time; the display driving chip outputs the first output voltage to the display screen according to the second voltage value, including that the display driving chip outputs the first output voltage to the display screen according to the second voltage value at a second time after the first time; the method further includes that the display driving chip outputs the first output voltage to the display screen according to the fourth voltage value before the second time; or, The first voltage value is less than the third voltage value, and the second voltage value is less than the fourth voltage value, the display driving chip outputs the first output voltage to the display screen according to the second voltage value, including that the display driving chip outputs the first output voltage to the display screen according to the second voltage value at a third time; the display driving chip receives the first voltage output by the first power supply as the first input voltage, including that the display driving chip sends the first voltage value to the first power supply at a fourth time after the third time, and the display driving chip receives the first voltage output by the first power supply as the first input voltage after the fourth time; the method further includes that the display driving chip receives a second voltage output by the first power supply as the first input voltage before the fourth time, the second voltage being output by the first power supply according to the third voltage value.

21. The method of claim 19 or 20, wherein, The method further includes: The first voltage value and the third voltage value are the same, and the second voltage value and the fourth voltage value are different, the display driving chip receives a second voltage output by the first power supply as the first input voltage, the second voltage is output by the first power supply according to the third voltage value, and the display driving chip outputs the first output voltage to the display screen according to the second voltage value; or, The first voltage value and the third voltage value are different, and the second voltage value and the fourth voltage value are the same, the display driving chip sends the first voltage value to the first power supply, the display driving chip receives the first voltage output by the first power supply as the first input voltage, and the display driving chip outputs the first output voltage to the display screen according to the fourth voltage value; or, The first voltage value and the third voltage value are the same, and the second voltage value and the fourth voltage value are the same, the display driving chip receives a second voltage output by the first power supply as the first input voltage, the second voltage is output by the first power supply according to the third voltage value, and the display driving chip outputs the first output voltage to the display screen according to the fourth voltage value.

22. The method of claim 18, wherein, The first output gate voltage corresponding to the second display mode is a fifth voltage value, and the first output gate voltage corresponding to the first display mode is a sixth voltage value; The display driving chip outputs the first output voltage to the display screen according to the second voltage value, comprising: The fifth voltage value and the sixth voltage value are different, the display driving chip outputs the first output gate voltage to the first transistor and the first scanning circuit according to the fifth voltage value; or The fifth voltage value and the sixth voltage value are the same, the display driving chip outputs the first output gate voltage to the first transistor and the first scanning circuit according to the sixth voltage value. The first display mode and the second display mode are respectively an off-screen display mode and an on-screen display mode, or the first display mode and the second display mode are both off-screen display modes or on-screen display modes, and the display brightness corresponding to the first display mode and the second display mode is different.

23. The method of any one of claims 17-22, wherein, The computer storage medium stores a computer program, and the computer program is executed by a processor to implement the method of any one of claims 17-23.

24. A computer storage medium, comprising, When the computer program product is running on the device, it is used to execute the method of any one of claims 17-23.

25. A computer program product, characterised in that, ​

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