Ceramic electronic component and method for producing ceramic electronic component

Abstract

A ceramic electronic component according to the present invention comprises: a porous ceramic layer in which pores having an average diameter of 1-10 μm are provided; a dense ceramic layer; and a plurality of internal conductor layers, wherein there is at least one part between the internal conductor layers where at least one porous ceramic layer and at least one dense ceramic layer are laminated, and the thickness of a non-porous ceramic layer between the internal conductor layers is continuously not less than 4 μm.

Description

Ceramic electronic component and method for manufacturing the same

[0001] The present invention relates to a ceramic electronic component and a method for manufacturing a ceramic electronic component.

[0002] In the frequency range of the GHz order, substrate materials compatible with higher frequencies are required to have a lower dielectric constant in order to reduce dielectric loss. The dielectric constant of ceramic materials such as LTCC is usually 3.8 or higher, and in order to obtain a lower dielectric constant, Patent Document 1 discloses that a filler having internal voids, such as hollow silica, is used as a constituent component of the ceramic material.

[0003] International Publication No. 2018 / 1083830

[0004] When a substrate is manufactured using the ceramic material of Patent Document 1, voids are uniformly distributed within the substrate using a conventional firing method, which reduces the apparent dielectric constant of the substrate material. On the other hand, to obtain a wiring substrate with high dimensional accuracy, it is necessary to use a non-shrinkage firing method that suppresses shrinkage in the planar direction. When the non-shrinkage firing method is used, the ceramic material does not shrink in the planar direction, but only in the thickness direction. However, the voids may connect in the thickness direction, causing defects between the upper and lower conductive layers, which may cause problems with insulation, etc.

[0005] The present invention has been made to solve the above-mentioned problems, and has an object to provide a ceramic electronic component in which the ceramic layers between internal conductor layers have a low dielectric constant and high insulation properties, and a method for manufacturing the ceramic electronic component.

[0006] The ceramic electronic component of the present invention comprises a porous ceramic layer having pores with an average diameter of 1 μm or more and 10 μm or less, a dense ceramic layer, and a plurality of internal conductor layers, wherein at least one of the porous ceramic layers and at least one of the dense ceramic layers are stacked between the internal conductor layers at at least one location, and the thickness of the dense ceramic layer between the internal conductor layers is continuously 4 μm or more.

[0007] The method for producing a ceramic electronic component of the present invention includes the steps of: preparing a first green sheet to be a porous ceramic layer; preparing a second green sheet to be a dense ceramic layer; forming an internal conductor layer having a conductor pattern on the first green sheet and / or the second green sheet; stacking and pressing a plurality of first green sheets and a plurality of second green sheets, including the first green sheet on which the internal conductor layer has been formed and / or the second green sheet on which the internal conductor layer has been formed, to obtain a green laminate having a plurality of internal conductor layers; and firing the green laminate, wherein in the step of preparing the first green sheet, the first green sheet is formed from a ceramic slurry containing a ceramic powder, a pore-forming agent, a binder, a plasticizer, and a solvent; in the step of preparing the second green sheet, the second green sheet is formed from a ceramic slurry containing a ceramic powder, a binder, a plasticizer, and a solvent; and the step of firing the green laminate is performed by arranging constraining layer sheets on both main surfaces of the green laminate.

[0008] According to the present invention, it is possible to provide a ceramic electronic component in which the ceramic layers between the internal conductor layers have a low dielectric constant and high insulating properties.

[0009] FIG. 1 is a cross-sectional view schematically showing an example of a multilayer ceramic substrate according to an embodiment of the ceramic electronic component of the present invention. FIG. 2 is an enlarged cross-sectional view schematically showing the multilayer ceramic substrate shown in FIG. 1. FIG. 3 is an enlarged cross-sectional view schematically showing the structure between internal conductor layers of a conventional ceramic electronic component. FIG. 4 is an enlarged cross-sectional view schematically showing another example of a multilayer ceramic substrate according to an embodiment of the ceramic electronic component of the present invention. FIG. 5 is a perspective view schematically showing an exploded state of an example of an LC filter according to another embodiment of the ceramic electronic component of the present invention. FIG. 6 is a cross-sectional view schematically showing an example of a manufacturing method for a ceramic electronic component of the present invention. FIG. 7 is a cross-sectional view schematically showing a multilayer ceramic substrate manufactured by the manufacturing method for a ceramic electronic component shown in FIG. 6. FIG. 8 is a cross-sectional view schematically showing a multilayer ceramic substrate of Sample No. 3 of an example. FIG. 9 is a cross-sectional view schematically showing multilayer ceramic substrates of Sample Nos. 4 and 9 of an example. FIG. 10 is a cross-sectional view schematically showing a multilayer ceramic substrate of Sample No. 5 of an example.

[0010] A ceramic electronic component and a method for manufacturing a ceramic electronic component according to the present invention will be described below. Note that the present invention is not limited to the following configurations and may be modified as appropriate without departing from the spirit of the present invention. Furthermore, a combination of multiple individual preferred configurations described below also constitutes the present invention.

[0011] [Ceramic Electronic Component] A multilayer ceramic substrate will be described as an example of one embodiment of the ceramic electronic component of the present invention. The ceramic electronic component of the present invention is not limited to multilayer ceramic substrates, and can be applied to chip components mounted on multilayer ceramic substrates, such as multilayer ceramic capacitors, multilayer inductors, and ceramic electronic components formed by co-firing these components, such as LC filters. For example, when the ceramic electronic component of the present invention is applied to an LC filter, the dielectric layers constituting the LC filter correspond to the porous ceramic layers and dense ceramic layers, and the capacitor pattern and coil pattern (inner layer electrodes) correspond to the internal conductor layers.

[0012] Fig. 1 is a cross-sectional view schematically illustrating an example of a multilayer ceramic substrate according to an embodiment of the ceramic electronic component of the present invention. The multilayer ceramic substrate 1 shown in Fig. 1 is formed by laminating a structure including a plurality of porous ceramic layers 10, a plurality of dense ceramic layers 20, and internal conductor layers 30a, 30b, 30c, and 30d. The internal conductor layers 30a, 30b, 30c, and 30d are formed substantially parallel to the porous ceramic layers 10 and the dense ceramic layers 20.

[0013] The internal conductor layers 30a, 30b, 30c, and 30d serve as wiring conductors and are provided between the porous ceramic layer 10 and the dense ceramic layer 20 or between the dense ceramic layers 20. The multilayer ceramic substrate 1 includes, as wiring conductors other than the internal conductor layers 30a, 30b, 30c, and 30d, an external conductor layer 41 provided on one main surface of the multilayer ceramic substrate 1, an external conductor layer 42 provided on the other main surface of the multilayer ceramic substrate 1, and via-hole conductors 50 provided to penetrate the porous ceramic layer 10 and / or the dense ceramic layer 20 in the thickness direction. The via-hole conductors 50 are electrically connected to any of the internal conductor layers 30a, 30b, 30c, and 30d, the external conductor layer 41, and the external conductor layer 42. These wiring conductors preferably contain Ag, Cu, Au, an Ag—Pd alloy, or an Ag—Pt alloy as a main component, and more preferably contain Ag or Cu as a main component.

[0014] Chip components are mounted on one main surface of the multilayer ceramic substrate 1 in a state electrically connected to the external conductor layer 41. The external conductor layer 42 provided on the other main surface of the multilayer ceramic substrate 1 is used as an electrical connection means when the multilayer ceramic substrate 1 on which the chip components are mounted is mounted on a motherboard.

[0015] A dense ceramic layer 20 is laminated between the external conductor layer 41 and the internal conductor layer 30a, and between the external conductor layer 42 and the internal conductor layer 30d. One porous ceramic layer 10 and one dense ceramic layer 20 are laminated between the internal conductor layer 30a and the internal conductor layer 30b (inter-internal conductor layer 60a), between the internal conductor layer 30b and the internal conductor layer 30c (inter-internal conductor layer 60b), and between the internal conductor layer 30c and the internal conductor layer 30d (inter-internal conductor layer 60c), respectively. In FIG. 1 , the porous ceramic layer 10 and the dense ceramic layer 20 are laminated in all of the spaces between the internal conductor layers 60 a, 60 b, and 60 c. However, it is sufficient that the porous ceramic layer 10 and the dense ceramic layer 20 are laminated in at least one of the spaces between the internal conductor layers 60 a, 60 b, and 60 c.

[0016] Fig. 2 is an enlarged cross-sectional view schematically showing the multilayer ceramic substrate shown in Fig. 1. Fig. 2 shows the internal conductor layer 30a to the internal conductor layer 30b of the multilayer ceramic substrate 1 of Fig. 1. In Fig. 2, a dense ceramic layer 20 having a thickness t (µm) is laminated below the internal conductor layer 30a, and a porous ceramic layer 10 is laminated below the dense ceramic layer 20.

[0017] As shown in Fig. 2, the porous ceramic layer 10 has a large number of pores 11. The average diameter of the pores is 1 µm or more and 10 µm or less, preferably 1 µm or more and 8 µm or less, more preferably 1 µm or more and 7 µm or less, and even more preferably 1 µm or more and 5 µm or less. In this specification, the average diameter of the pores is the average value of the maximum dimensions of 10 pores determined by observing the cross section of the porous ceramic layer with a scanning electron microscope (SEM).

[0018] In the ceramic electronic component of the present invention, the porosity of the porous ceramic layer is not particularly limited, but is preferably 10% by volume or more, and more preferably 30% by volume or more. Furthermore, the porosity is preferably 45% by volume or less, and more preferably 40% by volume or less. The "porosity of the porous ceramic layer" refers to the porosity of the porous ceramic layer within a thickness of 2 μm between the internal conductor layers. The porosity can be determined from the area ratio of pores to the area observed by SEM in a cross section of the porous ceramic layer.

[0019] In the ceramic electronic component of the present invention, the shape and structure of the pores are not particularly limited, but it is preferable that the pores are surrounded by a shell layer made of an inorganic material and the pores are provided inside the shell layer. For example, when the porous ceramic layer contains a glass component, if the pores are provided inside the shell layer made of an inorganic material, the softened glass component is less likely to penetrate into the pores, thereby maintaining the pores within the porous ceramic layer. Furthermore, since large voids formed by connecting multiple pores are less likely to form, each pore can exist independently.

[0020] When pores are formed using core-shell particles, in which the periphery of a core made of a resin bead is covered with a shell layer made of an inorganic substance, as a pore-forming agent, the shell layer around the pores is considered to be made of a reaction product between the glass component contained in the ceramic layer and the inorganic substance contained in the core-shell particles. ２ , Al ２ O ３ , ZrO ２ , TiO ２ and MgO, and SiO ２ and Al ２ O ３ Among them, from the viewpoint of reducing the dielectric constant, the inorganic material constituting the shell layer around the pores is preferably at least SiO ２ It is preferred that the compound contains:

[0021] The dense ceramic layer 20 does not have any pores 11. The dense ceramic layer 20 contains a ceramic material, and therefore may have very small pores of less than 1 μm.

[0022] In the ceramic electronic component of the present invention, the porous ceramic layer and the dense ceramic layer preferably contain a low-temperature co-fired ceramic material, which is a ceramic material that can be sintered at a firing temperature of 1000°C or less and can be co-fired with Ag or Cu.

[0023] Examples of low-temperature sintered ceramic materials contained in the porous ceramic layer and the dense ceramic layer include glass composite low-temperature sintered ceramic materials obtained by mixing borosilicate glass with ceramic materials such as quartz, alumina, and forsterite; ZnO—MgO—Al ２ O ３ -SiO ２ Glass-ceramic low-temperature sintering ceramic material using BaO-Al ２ O ３ -SiO ２ ceramic materials and Al ２ O ３ -CaO-SiO ２ -MgO-B ２ O ３ Examples of suitable ceramic materials include non-glass-based low-temperature sintered ceramic materials using glass-based ceramic materials.

[0024] In the ceramic electronic component of the present invention, the porous ceramic layer and the dense ceramic layer preferably contain a glass component. In this case, from the viewpoint of increasing the softening point of the glass component contained in the porous ceramic layer and the dense ceramic layer, it is preferable that the glass component contained in the porous ceramic layer and the dense ceramic layer does not substantially contain boron. For example, the glass component contained in the porous ceramic layer and the dense ceramic layer may contain SiO ２ , BaO and Al ２ O ３ In this case, the glass component contained in the porous ceramic layer and the dense ceramic layer preferably contains, as a main component, 47% by weight or more and 67% by weight or less of SiO２ 21% by weight or more and 41% by weight or less of BaO, and 10% by weight or more and 18% by weight or less of Al ２ O ３ It is more preferable that the sintering aid component contains 2.5% by weight or more and 5.5% by weight or less of MnO.

[0025] In the ceramic electronic component of the present invention, when the porous ceramic layer and the dense ceramic layer contain a glass component, the softening points of the glass components contained in the porous ceramic layer and the dense ceramic layer are not particularly limited, but are preferably 800° C. or higher, and more preferably 830° C. or higher. The softening points of the glass components contained in the porous ceramic layer and the dense ceramic layer are preferably 950° C. or lower, and more preferably 930° C. or lower. The softening points of the glass components contained in the porous ceramic layer and the dense ceramic layer can be determined by thermomechanical analysis (TMA).

[0026] The porous ceramic layer and the dense ceramic layer may have the same composition except for the pores, or may have different compositions.

[0027] The ceramic electronic component of the present invention is characterized in that there is at least one location between the internal conductor layers where at least one porous ceramic layer and at least one dense ceramic layer are laminated, and the thickness of the dense ceramic layer between the internal conductor layers is continuously 4 μm or more.

[0028] In the conventional multilayer ceramic substrate shown in Fig. 3, in order to reduce the dielectric constant of the wiring board, the spaces between the internal conductor layers 30 are all formed with porous ceramic layers 10. Fig. 3 is an enlarged cross-sectional view schematically showing the structure between the internal conductor layers of a conventional ceramic electronic component. However, when the spaces between the internal conductor layers 30 are all formed with porous ceramic layers 10, void connections 12 are formed when the voids 11 are connected in the thickness direction, causing defects between the internal conductor layers 30, and insulation may not be maintained.

[0029] In the ceramic electronic component of the present invention, a porous ceramic layer and a dense ceramic layer are laminated between internal conductor layers, and the dense ceramic layer has a continuous thickness of 4 μm or more, which prevents pores in the porous ceramic layer from connecting with each other and suppresses deterioration of the insulating properties of the ceramic electronic component. The upper limit of the thickness of the dense ceramic layer is not particularly limited, but can be, for example, 25 μm or less.

[0030] The thickness of the dense ceramic layer is determined as follows. As shown in Figure 2, first, a cross section (WT cross section) of the multilayer ceramic substrate, which crosses the center of the length (L) direction and is taken along the width (W) and stacking (T) directions, is exposed by polishing. If necessary, the polished surface is subjected to an etching treatment. The exposed cross section is then observed using a scanning electron microscope.

[0031] A line Lc is drawn that extends in the thickness direction T of the dense ceramic layer and passes through the center of the multilayer ceramic substrate. Next, multiple lines parallel to line Lc are drawn at equal intervals. The interval between adjacent lines may be determined to be approximately 5 to 10 times the thickness of the dense ceramic layer to be measured. Also, the same number of lines are drawn on both sides of line Lc. In other words, an odd number of lines are drawn, including line Lc. For example, three lines are drawn, including line Lc.

[0032] Next, the thickness (t) of the dense ceramic layer is measured on each straight line, such as the straight line Lc. However, if the dense ceramic layer is missing on each straight line and the internal electrode layer or porous ceramic layer in contact with this dense ceramic layer is connected, or if the magnified image of the measurement position is unclear, the thickness of the dense ceramic layer is measured on a straight line further away from the straight line Lc. The average of these measurements is taken as the thickness of the dense ceramic layer.

[0033] The thickness of the porous ceramic layer is not particularly limited, but is preferably 1 μm or more and 30 μm or less, and more preferably 2 μm or more and 20 μm or less.

[0034] In the ceramic electronic component of the present invention, at least one porous ceramic layer and at least one dense ceramic layer are laminated between internal conductor layers, and the number and positions of the porous ceramic layers and dense ceramic layers are not particularly limited as long as the thickness of the dense ceramic layers is continuously 4 μm or more.

[0035] The positions of the porous ceramic layer 10 and the dense ceramic layer 20 between the internal conductor layers 30 are not particularly limited, but it is preferable that the dense ceramic layer 20 be stacked directly on at least one main surface of the internal conductor layer 30, as this will result in higher insulation.

[0036] Fig. 4 is an enlarged cross-sectional view schematically showing another example of a multilayer ceramic substrate according to an embodiment of the ceramic electronic component of the present invention. In the multilayer ceramic substrate shown in Fig. 4, porous ceramic layers 10 are stacked adjacent to the main surfaces of the internal conductor layers 30a and 30b, respectively, and a dense ceramic layer 20 is stacked between the two porous ceramic layers 10. In the multilayer ceramic substrate shown in Fig. 4, there are two porous ceramic layers 10 and one dense ceramic layer 20.

[0037] In the ceramic electronic component of the present invention, when three or more internal conductor layers are present, there are two or more portions sandwiched between the internal conductor layers, and at least one porous ceramic layer and at least one dense ceramic layer are laminated between at least one of the internal conductor layers, and it is sufficient that the dense ceramic layer has a continuous thickness of 4 μm or more, and there may be portions between the internal conductor layers where only porous ceramic layers or only dense ceramic layers are laminated. It is preferable that porous ceramic layers and dense ceramic layers are laminated between all of the internal conductor layers, and that the dense ceramic layers have a continuous thickness of 4 μm or more.

[0038] Next, an LC filter, which is another embodiment of the ceramic electronic component of the present invention, will be described with reference to FIG.

[0039] Fig. 5 is a perspective view schematically illustrating an example of an LC filter according to another embodiment of the ceramic electronic component of the present invention, in an exploded state. As shown in Fig. 5, the LC filter 100 includes four porous ceramic layers 10 and thirteen dense ceramic layers 20. The number of stacked porous ceramic layers 10 and the number of dense ceramic layers 20 is not limited to that shown in the figure.

[0040] The LC filter 100 includes two inductors L1 and L2 connected in series, and a capacitor C between the inductors L1 and L2.

[0041] Since the LC filter 100 has two inductors and a capacitor inside, wiring conductors are provided on one main surface of some of the dense ceramic layers 20 in the following manner.

[0042] A coil pattern 31 constituting a part of the inductor L1 is formed on the third dense ceramic layer 20 from the top (also referred to as the third layer). A lead pattern 32 is formed on one end of the coil pattern 31 in the direction L, and a via-hole conductor 50 is provided on the other end of the coil pattern 31. The lead pattern 32 is connected to a terminal electrode (not shown). The LC filter 100 has first to third dense ceramic layers 20. When the first to third dense ceramic layers 20 are all formed with the same composition, the first to third dense ceramic layers 20 are integrated into the LC filter 100 after firing. The same applies when the seventh to twelfth dense ceramic layers 20 and the sixteenth and seventeenth dense ceramic layers 20 described below are stacked consecutively, or when multiple porous ceramic layers 10 are stacked (not shown).

[0043] The fourth porous ceramic layer 10 is provided with via-hole conductors 50 which are connected to the coil patterns 31 of the third and fifth dense ceramic layers 20 .

[0044] A coil pattern 31 constituting a part of the inductor L1 is formed on the fifth dense ceramic layer 20. One end of the coil pattern 31 is provided with a via-hole conductor 50 connected to the fourth layer. The other end of the coil pattern 31 is provided with a via-hole conductor 50 connected to the sixth layer.

[0045] The sixth porous ceramic layer 10 is provided with a via-hole conductor 50 and is connected to the seventh layer.

[0046] The seventh dense ceramic layer 20 is provided with a via-hole conductor 50 and is connected to the eighth layer.

[0047] A capacitor pattern 33 constituting a part of the capacitor C is formed on the eighth dense ceramic layer 20. Lead patterns 34 are formed on both ends of the capacitor pattern 33 in the direction W and are connected to terminal electrodes (not shown). In addition, a via-hole conductor 50 is provided in the eighth dense ceramic layer 20 and is connected to the ninth layer.

[0048] A capacitor pattern 33 that forms part of the capacitor C is formed on the ninth dense ceramic layer 20. A via-hole conductor 50 that is connected to the tenth layer is provided on the ninth dense ceramic layer 20.

[0049] A capacitor pattern 33 constituting a part of the capacitor C is formed on the tenth dense ceramic layer 20. Lead patterns 34 are formed on both ends of the capacitor pattern 33 in the direction W and are connected to terminal electrodes (not shown). In addition, the tenth dense ceramic layer 20 is provided with a via-hole conductor 50 connected to the eleventh layer.

[0050] A via-hole conductor 50 is provided in the eleventh dense ceramic layer 20 and is connected to the coil pattern 31 of the twelfth dense ceramic layer 20 .

[0051] Similar to the third to fifth layers, the twelfth to fourteenth layers are provided with a coil pattern 31 constituting a part of the inductor L2, a lead pattern 32, and a via-hole conductor 50. In Fig. 5, the two inductors L1 and L2 are connected in series, and therefore the terminal electrode (not shown) to which the lead pattern 32 is connected on the fourteenth layer is a different terminal electrode from the terminal electrode to which the inductor L1 is connected.

[0052] 5, a porous ceramic layer 10 is laminated directly below a dense ceramic layer 20 on which a coil pattern 31 is formed. Since porous ceramic layers have an excellent effect of lowering the dielectric constant, it is preferable that at least the dense ceramic layer on which the coil pattern is formed is laminated on the porous ceramic layer.

[0053] [Method of Manufacturing Ceramic Electronic Component] As one embodiment of the method of manufacturing a ceramic electronic component of the present invention, a method of manufacturing a multilayer ceramic substrate will be described as an example. The method of manufacturing a ceramic electronic component of the present invention includes the steps of preparing first green sheets to form porous ceramic layers, preparing second green sheets to form dense ceramic layers, forming internal conductor layers having conductor patterns on the first green sheets and / or the second green sheets, stacking and pressing a plurality of first green sheets and a plurality of second green sheets, including the first green sheets on which the internal conductor layers have been formed and / or the second green sheets on which the internal conductor layers have been formed, to obtain a green laminate having a plurality of internal conductor layers, and firing the green laminate.

[0054] First, the process of preparing a first green sheet to be the porous ceramic layer and the process of preparing a second green sheet to be the dense ceramic layer will be described below.

[0055] The first green sheet is produced, for example, by preparing a ceramic slurry containing a ceramic powder such as a low-temperature co-fired ceramic material as the main component, as well as predetermined amounts of a pore-forming agent, a binder, a plasticizer, a solvent, etc., and then forming the obtained ceramic slurry into a sheet by a doctor blade method or the like.

[0056] In the method for producing a ceramic electronic component of the present invention, the ceramic powder contained in the ceramic slurry may be, for example, the low-temperature co-fired ceramic material described in [Ceramic Electronic Component].

[0057] In the method for producing a ceramic electronic component of the present invention, the ceramic powder preferably contains a glass component. In this case, the glass component contained in the ceramic powder preferably does not substantially contain boron. For example, the glass component contained in the ceramic powder may be SiO ２ , BaO and Al ２ O ３ In this case, the glass component contained in the ceramic powder preferably contains 47% by weight or more and 67% by weight or less of SiO as a main component. ２ 21% by weight or more and 41% by weight or less of BaO, and 10% by weight or more and 18% by weight or less of Al ２ O ３ It is more preferable that the sintering aid component contains 2.5% by weight or more and 5.5% by weight or less of MnO.

[0058] In the method for producing a ceramic electronic component of the present invention, when the ceramic powder contains a glass component, the softening point of the glass component contained in the ceramic powder is not particularly limited, but is preferably 800° C. or higher, and more preferably 830° C. or higher. The softening point of the glass component contained in the ceramic powder is preferably 950° C. or lower, and more preferably 930° C. or lower. The softening point of the glass component contained in the ceramic powder can be determined by thermomechanical analysis (TMA).

[0059] The pore-forming agent may be one that is burned off during the firing process of the green laminate. Examples of the pore-forming agent include resin beads and core-shell particles that are composed of a core made of resin beads and a shell layer made of an inorganic material that covers the periphery of the core. The shape of the pore-forming agent may be, for example, approximately spherical.

[0060] The material of the resin beads constituting the core portion is not particularly limited as long as it is a resin that is insoluble in the solvent contained in the ceramic slurry, and examples thereof include acrylic resin, divinylbenzene resin, polyimide resin, etc. These resins may be one type or two or more types. Since resins that have a high heat resistance temperature and are mostly burned away at temperatures up to 500°C during firing are preferred, the resin beads constituting the core portion preferably contain at least one type selected from the group consisting of acrylic resin and divinylbenzene resin, and more preferably contain divinylbenzene resin.

[0061] The particle diameter D50 of the resin beads constituting the core portion is not particularly limited, but is preferably 7 μm or less, more preferably 5 μm or less, while it is preferably 0.5 μm or more, and more preferably 0.8 μm or more. The particle diameter D99 of the resin beads constituting the core portion is not particularly limited, but is preferably 10 μm or less, more preferably 8 μm or less, even more preferably 7 μm or less, particularly preferably 5 μm or less, while it is preferably 1 μm or more. The particle diameter D50 represents the particle diameter at which 50% of the total number of particles are equal to or less than this particle diameter, and the particle diameter D99 represents the particle diameter at which 99% of the total number of particles are equal to or less than this particle diameter. D50 and D99 can be determined, for example, by measuring the particle size distribution in the range of 0.02 μm to 1400 μm using a laser diffraction / scattering method using a particle size distribution analyzer MT3300-EX manufactured by Bell Microtrac.

[0062] In the method for producing a ceramic electronic component of the present invention, the inorganic material constituting the shell layer is not particularly limited, and examples thereof include SiO ２ , Al ２ O ３ , ZrO ２, TiO ２ and metal oxides such as MgO. These inorganic substances may be used alone or in combination of two or more.

[0063] The pore-forming agent can be prepared by coating resin beads with an inorganic substance. The coating method may be dry physical adsorption or wet chemical adsorption using a sol-gel method or the like, but chemical adsorption is preferred because it facilitates the formation of a dense shell layer.

[0064] In the method for producing a ceramic electronic component of the present invention, the amount of the pore-forming agent added is preferably 10% by volume or more, more preferably 30% by volume or more, relative to the total volume, and is preferably 45% by volume or less, more preferably 40% by volume or less.

[0065] The binder contained in the ceramic slurry may be, for example, an organic binder such as butyral resin (polyvinyl butyral), acrylic resin, or methacrylic resin. The plasticizer may be, for example, di-n-butyl phthalate. The solvent may be, for example, toluene, alcohol such as isopropyl alcohol, or the like.

[0066] The second green sheet, which will become the dense ceramic layer, can be prepared in the same manner as the first green sheet, except that a pore-forming agent is used. That is, the second green sheet is prepared by forming a ceramic slurry containing ceramic powder, a binder, a plasticizer, and a solvent into a sheet.

[0067] Next, a step of forming an internal conductor layer having a conductor pattern on the first green sheet and / or the second green sheet is performed. If necessary, via-hole conductors and an external conductor layer are formed on a specific green sheet.

[0068] The wiring conductors, such as the internal conductor layers, can be formed by applying a conductor paste. At this stage, the wiring conductors, such as the internal conductor layers, are preferably composed of unsintered conductor paste. The order in which the wiring conductors are formed is not particularly limited. The wiring conductors may be formed on predetermined green sheets and then stacked, or the green sheets may be stacked while the wiring conductors are being formed on the predetermined green sheets. The internal and external conductor layers can be formed, for example, by printing a conductor paste on the predetermined green sheets using screen printing. On the other hand, the via-hole conductors can be formed, for example, by forming through holes in the green sheets and filling the through holes with a conductor paste. A suitable conductor paste for forming the wiring conductors is a paste containing a conductive material, such as Ag or Cu, an organic binder, a solvent, etc., as described in the [Ceramic Electronic Component] section.

[0069] Next, a raw laminate is obtained by stacking and pressing a plurality of first green sheets and a plurality of second green sheets, including a first green sheet on which an internal conductor layer has been formed and / or a second green sheet on which an internal conductor layer has been formed.

[0070] Thereafter, the green laminate is fired, whereby the first green sheet and the second green sheet are sintered into a porous ceramic layer and a dense ceramic layer, respectively.

[0071] During firing, the pore-forming agent is burned away, leaving pores in the areas where the pore-forming agent was present. When core-shell particles are used as the pore-forming agent, the resin beads become pores.

[0072] As a result, a multilayer ceramic substrate (ceramic electronic component) is obtained, which comprises a plurality of laminated porous ceramic layers, dense ceramic layers, and internal conductor layers, with a large number of pores provided in the porous ceramic layers.

[0073] When the first and second green sheets contain a low-temperature co-fired ceramic material, a firing temperature of, for example, 1000°C or less is applied. When, for example, a material containing a resin as a pore-forming agent is used, the firing temperature is preferably 500°C or higher. The firing atmosphere is not particularly limited, but firing is preferably performed in a low-oxygen atmosphere. A low-oxygen atmosphere refers to an atmosphere with a lower oxygen partial pressure than the atmosphere, and examples include an inert gas atmosphere such as a nitrogen atmosphere or an argon atmosphere, an atmosphere in which an inert gas such as nitrogen is mixed into the atmosphere, and a vacuum atmosphere. A mixed gas atmosphere of nitrogen and hydrogen may also be used.

[0074] In the method for manufacturing a ceramic electronic component of the present invention, the step of firing the green laminate is performed with constraining layer sheets disposed on both main surfaces of the green laminate. Fig. 6 is a cross-sectional view schematically showing an example of the method for manufacturing a ceramic electronic component of the present invention. Fig. 7 is a cross-sectional view schematically showing a multilayer ceramic substrate manufactured by the method for manufacturing a ceramic electronic component shown in Fig. 6.

[0075] In this step, as shown in FIG. 6, an inorganic material (Al) that is not substantially sintered at the temperature at which the first green sheet 70 and the second green sheet 80 are sintered is used. ２ O ３ The green laminate is fired with the constraining green sheets 90 placed on both main surfaces of the green laminate. In this case, the constraining green sheets 90 are not substantially sintered during firing, so they do not shrink and act to suppress shrinkage of the green laminate in the main surface direction, thereby improving the dimensional accuracy of the multilayer ceramic substrate. On the other hand, the green laminate shrinks in the thickness direction T, so that the pore-forming agent 71 of the first green sheet 70 is easily connected in the thickness direction.

[0076] In the ceramic electronic component of the present invention shown in FIG. 7 , the dense ceramic layers 20 are stacked between the internal conductor layers 30, which prevents the voids 11 from connecting with each other in the thickness direction T between the internal conductor layers 30, thereby ensuring insulation.

[0077] The present specification discloses the following:

[0078] <1> A ceramic electronic component comprising: a porous ceramic layer having pores with an average diameter of 1 μm or more and 10 μm or less; a dense ceramic layer; and a plurality of internal conductor layers, wherein at least one of the porous ceramic layers and at least one of the dense ceramic layers are stacked between the internal conductor layers at at least one location, and the thickness of the dense ceramic layer between the internal conductor layers is continuously 4 μm or more.

[0079] <2> The ceramic electronic component according to <1>, wherein the porosity of the porous ceramic layer is 10% by volume or more and 45% by volume or less.

[0080] <3> The ceramic electronic component according to <1> or <2>, wherein the dense ceramic layer is laminated directly on at least one main surface of the internal conductor layer.

[0081] <4> A method for producing a ceramic electronic component, comprising: a step of preparing a first green sheet to be a porous ceramic layer; a step of preparing a second green sheet to be a dense ceramic layer; a step of forming an internal conductor layer having a conductor pattern on the first green sheet and / or the second green sheet; a step of laminating and pressing a plurality of first green sheets and a plurality of second green sheets, including the first green sheet on which the internal conductor layer has been formed and / or the second green sheet on which the internal conductor layer has been formed, to obtain a green laminate having a plurality of internal conductor layers; and a step of firing the green laminate, wherein in the step of preparing the first green sheet, the first green sheet is formed from a ceramic slurry containing ceramic powder, a pore-forming agent, a binder, a plasticizer, and a solvent; and in the step of preparing the second green sheet, the second green sheet is formed from a ceramic slurry containing ceramic powder, a binder, a plasticizer, and a solvent. The method for producing a ceramic electronic component, wherein the step of firing the green laminate is performed with constraining layer sheets disposed on both main surfaces of the green laminate.

[0082] EXAMPLES Hereinafter, examples will be given that more specifically disclose the ceramic electronic component of the present invention, but the present invention is not limited to these examples.

[0083] (Preparation of pore-forming agent) A core portion made of resin beads and SiO ２ Core-shell particles were prepared, each consisting of a core and a shell layer. Divinylbenzene resin was used as the resin for the resin beads. The particle diameter D50 of the resin beads constituting the core was 0.8 μm, and D99 was 1 μm. The thickness of the shell layer was 0.15 μm.

[0084] (Preparation of green sheets for porous ceramic layers) ZnO-Al ２ O ３ -B ２ O ３ -SiO ２ The glass (center particle size 1 μm) has a composition consisting of SiO as a filler. ２ A mixture of 10% by weight of glass (median particle size 1 μm) and 30% by weight of the above pore-forming agent was placed in a toluene-ethanol mixed solvent and mixed using a ball mill. Here, "median particle size" refers to the median particle size D50 measured by laser diffraction / scattering. The amount of filler and pore-forming agent was determined relative to the total amount of glass, filler, and pore-forming agent. A binder solution of polyvinyl butyral dissolved in toluene-ethanol was then mixed with a dioctyl phthalate (DOP) solution as a plasticizer to form a slurry. The slurry was cast onto a PET film using a doctor blade and dried at 40°C to obtain a green sheet for a porous ceramic layer with a thickness of 2 to 5 μm.

[0085] (Preparation of green sheets for dense ceramic layer) A green sheet for a dense ceramic layer having a thickness of 2 to 8 μm was obtained in the same manner as the green sheet for a porous ceramic layer, except that the amount of filler was changed to 40 wt % relative to the total amount of glass and filler, and no pore-forming agent was added.

[0086] (Preparation of Green Sheets for Constraining Layers) Green sheets for constraining layers having a thickness of 50 μm were prepared in the same manner as the green sheets for porous ceramic layers, except that alumina was used as the main component instead of glass, filler, and pore-forming agent.

[0087] (Preparation and Evaluation of Evaluation Samples) Cu paste was printed as electrodes on some of the porous ceramic layer green sheets and some of the dense ceramic layer green sheets, and then the layers were stacked and fired in the layer configuration shown in Table 1 and FIGS. 2, 8, 9, and 10. Firing was performed using a non-shrinkage firing method with constraining layer green sheets disposed on the top and bottom surfaces. FIG. 8 is a cross-sectional view schematically showing a multilayer ceramic substrate of Example Sample No. 3. In FIG. 8, two porous ceramic layers 10 and two dense ceramic layers 20 are alternately stacked between two internal conductor layers 30. FIG. 9 is a cross-sectional view schematically showing multilayer ceramic substrates of Example Samples No. 4 and No. 9. In FIG. 9, only a dense ceramic layer 20 is stacked between two internal conductor layers 30. FIG. 10 is a cross-sectional view schematically showing a multilayer ceramic substrate of Example Sample No. 5. 10, porous ceramic layers 10 and dense ceramic layers 20 are alternately stacked between two internal conductor layers 30. In FIG. 10, there are three porous ceramic layers 10 and two dense ceramic layers 20.

[0088] After firing, the insulation resistance between the electrodes was measured and evaluated. The insulation resistance was measured by applying DC 50 V in a pressure cooker test and checking the insulation resistance after 200 hours. The test conditions were 121°C and 85% RH.

[0089]

[0090] In Table 1, samples marked with * are comparative examples. The numbers and thicknesses in Table 1 indicate the number of first green sheets and the number of second green sheets and the thickness per green sheet, respectively.

[0091] When a dense ceramic layer of 4 μm or more was continuously disposed between the electrodes, the insulation resistance [Log(IR / Ω)] exceeded 10, ensuring the insulation of the ceramic layer between the electrodes. Samples No. 1 and 6, in which the dense ceramic layer was 2 μm thick, had an insulation resistance of less than 10. Samples No. 4 and 9, in which only a dense ceramic layer was disposed between the electrodes, had an insulation resistance of more than 10, but had a high dielectric constant due to the absence of a porous ceramic layer.

[0092] REFERENCE SIGNS LIST 1 ceramic electronic component 10 porous ceramic layer 11 void 12 void connection portion 20 dense ceramic layer 30, 30a, 30b, 30c, 30d internal conductor layer 31 coil pattern 32, 34 lead pattern 33 capacitor pattern 41, 42 external conductor layer 50 via hole conductor 60a, 60b, 60c between internal conductor layers 70 first green sheet 71 void-forming agent 80 second green sheet 90 restraining green sheet 100 LC filter L1, L2 inductor C capacitor

Claims

1. A ceramic electronic component comprising: a porous ceramic layer having pores with an average diameter of 1 μm or more and 10 μm or less; a dense ceramic layer; and a plurality of internal conductor layers, wherein there is at least one location between the internal conductor layers where at least one of the porous ceramic layer and at least one of the dense ceramic layer are stacked; and the thickness of the dense ceramic layer between the internal conductor layers is continuously 4 μm or more.

2. A ceramic electronic component according to claim 1, wherein the porosity of the porous ceramic layer is 10% by volume or more and 45% by volume or less.

3. A ceramic electronic component according to claim 1 or 2, wherein the dense ceramic layer is laminated directly on at least one main surface of the internal conductor layer.

4. A method for producing a ceramic electronic component, comprising: a step of preparing a first green sheet to be a porous ceramic layer; a step of preparing a second green sheet to be a dense ceramic layer; a step of forming an internal conductor layer having a conductor pattern on the first green sheet and / or the second green sheet; a step of laminating and pressing a plurality of first green sheets and a plurality of second green sheets, including the first green sheet on which the internal conductor layer has been formed and / or the second green sheet on which the internal conductor layer has been formed, to obtain a green laminate having a plurality of internal conductor layers; and a step of firing the green laminate, wherein in the step of preparing the first green sheet, the first green sheet is formed from a ceramic slurry containing ceramic powder, a pore-forming agent, a binder, a plasticizer, and a solvent; and in the step of preparing the second green sheet, the second green sheet is formed from a ceramic slurry containing ceramic powder, a binder, a plasticizer, and a solvent. The method for producing a ceramic electronic component, wherein the step of firing the green laminate is performed with constraining layer sheets disposed on both main surfaces of the green laminate.

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