Inverter

Abstract

An inverter, comprising: a direct-current connection end, a first phase connection end, a second phase connection end, a first three-level bridge arm circuit, a second three-level bridge arm circuit, and a controller. The direct-current connection end is configured to receive a direct-current voltage. The first phase connection end is configured to provide a first phase alternating-current voltage. The second phase connection end is configured to provide a second phase alternating-current voltage. The first three-level bridge arm circuit is connected between the direct-current connection end and the first phase connection end. The second three-level bridge arm circuit is connected between the direct-current connection end and the second phase connection end. When the inverter operates off-grid, the controller is configured to provide a first driving signal to drive a switching device of the first three-level bridge arm circuit in a time-sharing manner so as to control the first three-level bridge arm circuit to convert the direct-current voltage into the first phase alternating-current voltage, and the controller is further configured to provide a second driving signal to drive a switching device of the second three-level bridge arm circuit in a time-sharing manner so as to control the second three-level bridge arm circuit to convert the direct current voltage into the second phase alternating current voltage.

Description

Inverter

[0001] Cross Reference to Related Applications

[0002] The present disclosure is based on and claims priority to Chinese Patent Application No. 2024108257012, filed on June 24, 2024, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] Embodiments of the present disclosure relate to an inverter, a control method and a photovoltaic energy storage system. BACKGROUND

[0004] Highly Efficient Reliable Inverter Concept (HERIC) topology is one of the commonly used topologies of single-phase photovoltaic energy storage inverters, which has the advantages of high working efficiency and low leakage current. However, when HERIC topology is compatible with split-phase power grid, the inverter has a large harmonic of sine wave when modulating pulse, which leads to low quality of inverter output power. SUMMARY

[0005] The present disclosure aims to at least solve one of the technical problems existing in the background art. To this end, the present disclosure proposes an inverter, a control method and a photovoltaic energy storage system, which can improve the quality of inverter output power.

[0006] The present disclosure provides an inverter, the inverter comprising a bus capacitor and a third phase connection end according to one embodiment of the present disclosure, the direct current connection end is configured to connect a first end and a second end of the bus capacitor, and the third phase connection end is connected with a midpoint of the bus capacitor. In the case that the inverter operates off-grid, the first phase connection end and the third phase connection end are configured to connect an alternating current load, or the second phase connection end and the third phase connection end are configured to connect the alternating current load.

[0007] According to one embodiment of the present disclosure, the first three-level bridge arm circuit comprises a first bridge arm, a second bridge arm and a third bridge arm, the first end of the bus capacitor is connected with the first phase connection end through the first bridge arm, and the second end of the bus capacitor is connected with the first phase connection end through the second bridge arm. The midpoint of the bus capacitor is connected with the first phase connection end through the third bridge arm, or the first three-level bridge arm circuit comprises a first discharge capacitor, and the first discharge capacitor is connected with the first phase connection end through the third bridge arm.

[0008] According to one embodiment of the present disclosure, the first phase alternating current voltage is at a first level when the first driving signal drives the switching device of the first bridge arm to be on and the second bridge arm and the third bridge arm are off. The first phase alternating current voltage is at a second level when the first driving signal drives the switching device of the second bridge arm to be on and the first bridge arm and the third bridge arm are off. The first phase alternating current voltage is at a third level when the first driving signal drives the switching device of the third bridge arm to be on and the first bridge arm and the second bridge arm are off, wherein the first level is greater than the third level which is greater than the second level.

[0009] According to one embodiment of the present disclosure, the first bridge arm comprises a first switching tube, the second bridge arm comprises a second switching tube, the third bridge arm comprises a third switching tube and a fourth switching tube, the first end of the bus capacitor is connected with the second end of the bus capacitor through the first switching tube and the second switching tube, and the midpoint of the bus capacitor is connected with the first phase connection end through the third switching tube and the fourth switching tube; or the first bridge arm comprises a first switching tube and a second switching tube, the second bridge arm comprises a third switching tube and a fourth switching tube, the third bridge arm comprises the second switching tube, the third switching tube, a first diode and a second diode, the first end of the bus capacitor is connected with the second end of the bus capacitor through the first switching tube, the second switching tube, the third switching tube and the fourth switching tube, the midpoint of the bus capacitor is connected with the first phase connection end through the first diode and the second switching tube, and the first phase connection end is connected with the midpoint of the bus capacitor through the third switching tube and the second diode; or the first bridge arm comprises a first switching tube and a second switching tube, the second bridge arm comprises a third switching tube and a fourth switching tube, the third bridge arm comprises the second switching tube and the third switching tube, and the first end of the bus capacitor is connected with the second end of the bus capacitor through the first switching tube, the second switching tube, the third switching tube and the fourth switching tube.

[0010] According to one embodiment of the present disclosure, the second three-level bridge arm circuit comprises a fourth bridge arm, a fifth bridge arm and a sixth bridge arm, the first end of the bus capacitor is connected with the second phase connection end through the fourth bridge arm, and the second end of the bus capacitor is connected with the second phase connection end through the fifth bridge arm. The midpoint of the bus capacitor is connected with the second phase connection end through the sixth bridge arm, or the second three-level bridge arm circuit comprises a second discharge capacitor, and the second discharge capacitor is connected with the second phase connection end through the sixth bridge arm.

[0011] According to one embodiment of the present disclosure, the second phase alternating current voltage is at a first level when the second driving signal drives the switch device of the fourth bridge arm to be on and the fifth bridge arm and the sixth bridge arm are off. The second phase alternating current voltage is at a second level when the second driving signal drives the switch device of the fifth bridge arm to be on and the fourth bridge arm and the sixth bridge arm are off. The second phase alternating current voltage is at a third level when the second driving signal drives the switch device of the sixth bridge arm to be on and the fourth bridge arm and the fifth bridge arm are off, wherein the first level is greater than the third level which is greater than the second level.

[0012] According to one embodiment of the present disclosure, the fourth bridge arm comprises a fifth switch tube, the fifth bridge arm comprises a sixth switch tube, the sixth bridge arm comprises a seventh switch tube and an eighth switch tube, the first end of the bus capacitor is connected with the second end of the bus capacitor through the fifth switch tube and the sixth switch tube, and the midpoint of the bus capacitor is connected with the second phase connection end through the seventh switch tube and the eighth switch tube; or the fourth bridge arm comprises a fifth switch tube and a sixth switch tube, the fifth bridge arm comprises a seventh switch tube and an eighth switch tube, the sixth bridge arm comprises the sixth switch tube, the seventh switch tube, a third diode and a fourth diode, the first end of the bus capacitor is connected with the second end of the bus capacitor through the fifth switch tube, the sixth switch tube, the seventh switch tube and the eighth switch tube, the midpoint of the bus capacitor is connected with the second phase connection end through the third diode and the sixth switch tube, and the second phase connection end is connected with the midpoint of the bus capacitor through the seventh switch tube and the fourth diode; or the fourth bridge arm comprises a fifth switch tube and a sixth switch tube, the fifth bridge arm comprises a seventh switch tube and an eighth switch tube, the sixth bridge arm comprises the sixth switch tube and the seventh switch tube, the first end of the bus capacitor is connected with the second end of the bus capacitor through the fifth switch tube, the sixth switch tube, the seventh switch tube and the eighth switch tube, and the first end of the second discharge capacitor is connected with the second end of the second discharge capacitor through the sixth switch tube and the seventh switch tube.

[0013] According to one embodiment of the present disclosure, when the inverter is in grid-connected operation, the controller is configured to provide a third driving signal to drive the switch devices of the first three-level bridge arm circuit and the second three-level bridge arm circuit in time to control the difference between the first phase alternating current voltage and the second phase alternating current voltage to be a three-level voltage.

[0014] The disclosure provides a control method, comprising: in the case that the inverter is off-grid, providing a first drive signal to drive the switching devices of the first three-level bridge arm circuit in time to control the first three-level bridge arm circuit to convert the direct current voltage into the first phase alternating current voltage, and providing the second drive signal to drive the switching devices of the second three-level bridge arm circuit in time to control the second three-level bridge arm circuit to convert the direct current voltage into the second phase alternating current voltage.

[0015] According to one embodiment of the disclosure, the method comprises: in the case that the inverter is off-grid, obtaining a first modulation wave, a second modulation wave, a first carrier wave and a second carrier wave, the first modulation wave and the first carrier wave being determined based on the first phase alternating current voltage, and the second modulation wave and the second carrier wave being determined based on the second phase alternating current voltage; determining the first drive signal according to the first modulation wave and the first carrier wave, and determining the second drive signal according to the second modulation wave and the second carrier wave.

[0016] According to one embodiment of the disclosure, the method comprises: in the case that the inverter is on-grid, obtaining a third modulation wave and a third carrier wave, the third modulation wave and the third carrier wave being determined based on the difference between the first phase alternating current voltage and the second phase alternating current voltage; determining a third drive signal according to the third modulation wave and the third carrier wave; driving the switching devices of the first three-level bridge arm circuit and the switching devices of the second three-level bridge arm circuit in time according to the third drive signal to control the difference between the first phase alternating current voltage and the second phase alternating current voltage to be a three-level voltage.

[0017] The disclosure provides a photovoltaic energy storage system, comprising the inverter of the above-mentioned embodiments.

[0018] The above-mentioned one or more technical solutions in the disclosure have at least the following technical effects: the first phase alternating current voltage and the second phase alternating current voltage output by the first three-level bridge arm circuit and the second three-level bridge arm circuit can both be set to a three-level voltage, so that the trapezoidal output voltage waveform of the first phase alternating current voltage and the second phase alternating current voltage is close to a sine wave, reducing the harmonics obtained when the inverter is pulse width modulated, and improving the quality of the output electrical energy of the inverter. Additional aspects and advantages of the disclosure will be partially given in the following description, partially will become apparent from the following description, or will be understood by those skilled in the art through the practice of the disclosure.

[0019] BRIEF DESCRIPTION OF DRAWINGS

[0020] The above-mentioned and / or additional aspects and advantages of the disclosure will become apparent and easy to understand from the description of the embodiments in conjunction with the following drawings, in which:

[0021] Fig. 1 is a schematic diagram of an inverter according to an embodiment of the present disclosure;

[0022] Fig. 2 is a schematic diagram of a photovoltaic energy storage system according to an embodiment of the present disclosure;

[0023] Fig. 3 is a flow diagram of a control method according to an embodiment of the present disclosure;

[0024] Fig. 4 is a schematic diagram of an inverter according to an embodiment of the present disclosure;

[0025] Fig. 5 is a schematic diagram of an inverter according to an embodiment of the present disclosure;

[0026] Fig. 6 is a schematic diagram of an inverter according to an embodiment of the present disclosure;

[0027] Fig. 7 is a pulse width modulation waveform diagram of an off-grid operation of an inverter according to an embodiment of the present disclosure;

[0028] Fig. 8 is a control flow diagram of an off-grid operation of an inverter according to an embodiment of the present disclosure;

[0029] Fig. 9 is a pulse width modulation waveform diagram of a grid-connected operation of an inverter according to an embodiment of the present disclosure;

[0030] Fig. 10 is a control flow diagram of a grid-connected operation of an inverter according to an embodiment of the present disclosure.

[0031] Reference signs: inverter 100, DC connection end 110, first three-level bridge arm circuit 130, second three-level bridge arm circuit 140, controller 150, bus capacitor 160, first phase connection end 121, second phase connection end 122, third phase connection end 123, first bridge arm 131, second bridge arm 132, third bridge arm 133, first discharge capacitor 134, fourth bridge arm 141, fifth bridge arm 142, sixth bridge arm 143, second discharge capacitor 144, photovoltaic energy storage system 1000. DETAILED DESCRIPTION

[0032] The technical solutions in the embodiments of the present disclosure will be described clearly below with reference to the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments of the present disclosure. Based on the embodiments in the present disclosure, all other embodiments obtained by a person of ordinary skill in the art belong to the scope of protection of the present disclosure.

[0033] The terms "first", "second", etc. in the specification and claims of the present disclosure are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present disclosure can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of a kind and do not limit the number of objects, for example, the first object can be one or more. In addition, "and / or" in the specification and claims indicates at least one of the connected objects, and the character " / " generally indicates that the objects before and after are in an "or" relationship.

[0034] The inverter and the photovoltaic power generation system provided by the embodiments of the present disclosure will be described in detail below with reference to the specific embodiments and their application scenarios.

[0035] Referring to FIG. 1 and FIG. 2, the inverter 100 of the embodiments of the present disclosure includes a direct current connection end 110, a first phase connection end 121, a second phase connection end 122, a first three-level bridge arm circuit 130, a second three-level bridge arm circuit 140 and a controller 150. The direct current connection end 110 is configured to access a direct current voltage, the first phase connection end 121 is configured to provide a first phase alternating current voltage, and the second phase connection end 122 is configured to provide a second phase alternating current voltage. The alternating current connection end 120 is configured to be connected to a power grid or an alternating current load. The first three-level bridge arm circuit 130 is connected between the direct current connection end 110 and the first phase connection end 121. The second three-level bridge arm circuit 140 is connected between the direct current connection end 110 and the second phase connection end 122.

[0036] In the case of off-grid operation of the inverter 100, the controller 150 is configured to provide a first driving signal to time-share drive the switching devices of the first three-level bridge arm circuit 130 to control the first three-level bridge arm circuit 130 to convert the direct current voltage into the first phase alternating current voltage. The controller 150 is also configured to provide a second driving signal to time-share drive the switching devices of the second three-level bridge arm circuit 140 to control the second three-level bridge arm circuit 140 to convert the direct current voltage into the first phase alternating current voltage. That is, in the case of off-grid operation of the inverter 100, the controller 150 can provide the first driving signal, and the controller 150 can also provide the second driving signal. The first driving signal is configured to time-share drive the switching devices of the first three-level bridge arm circuit 130. The controller 150 controls the first three-level bridge arm circuit 130 to convert the direct current voltage into the first phase alternating current voltage by providing the first driving signal. The second driving signal is configured to time-share drive the switching devices of the second three-level bridge arm circuit 140. The controller 150 controls the second three-level bridge arm circuit 140 to convert the direct current voltage into the second phase alternating current voltage by providing the second driving signal.

[0037] In this embodiment, the direct current connection end can be set as the direct current side connection end of the inverter 100. The first phase connection end 121 and the second phase connection end 122 can be set as the alternating current side connection end of the inverter 100. The first phase connection end 121 and the second phase connection end 122 can be connected to the power grid or connected to the alternating current load. The first three-level bridge arm circuit 130 and the second three-level bridge arm circuit 140 are both three-level inverter circuits, which can convert the input direct current voltage into a three-level voltage.

[0038] The first three-level bridge arm circuit 130 can convert the direct current voltage into a first phase alternating current voltage for the first phase connection end 121. The second three-level bridge arm circuit 140 can convert the direct current voltage into a first phase alternating current voltage for the second phase connection end 122. The first phase alternating current voltage and the second phase alternating current voltage can both be three-level voltages. Since the three-level voltage has a higher trapezoidal output voltage, it is closer to a sine wave. The trapezoidal output voltage waveform of the first phase alternating current voltage and the second phase alternating current voltage is close to a sine wave, which reduces the harmonics obtained when the inverter 100 is pulse width modulated, and improves the quality of the output power of the inverter 100.

[0039] The first three-level bridge arm circuit 130 and the second three-level bridge arm circuit 140 can be independent circuits, and the first phase alternating current voltage and the second phase alternating current voltage can be independent alternating current voltages. The first phase alternating current voltage can be set according to the power of the alternating current load connected to the first phase connection end 121, and the second phase alternating current voltage can be set according to the power of the alternating current load connected to the second phase connection end 122, to improve the problem of unbalanced power of the alternating current load connected to the inverter 100, avoid voltage fluctuations on the alternating current side due to unbalanced load of the inverter 100, and further improve the quality of the output power of the inverter 100.

[0040] For example, the first phase alternating current voltage provided by the first phase connection end 121 can be configured to drive the alternating current load A. The second phase alternating current voltage provided by the second phase connection end 122 can be configured to drive the alternating current load B.

[0041] In the case where the power of the alternating current load A is large and the power of the alternating current load B is small, the duty cycle of the first drive signal driving the switching devices of the first three-level bridge arm circuit 130 can be set to be relatively small, and the phase of the first phase alternating current voltage can be adjusted to reduce the power of the alternating current load A and improve the problem of unbalanced power of the alternating current load A and the alternating current load B.

[0042] In the case where the power of the alternating current load A is large and the power of the alternating current load B is small, the duty cycle of the second drive signal driving the switching devices of the second three-level bridge arm circuit 140 can also be set to be relatively large, and the phase of the second phase alternating current voltage can be adjusted to increase the power of the alternating current load B and improve the problem of unbalanced power of the alternating current load A and the alternating current load B.

[0043] The photovoltaic energy storage system 1000 of the embodiment of the present disclosure can comprise the inverter 100 of the embodiment of the present disclosure.

[0044] Referring to FIG. 3, the embodiment of the present disclosure further provides a control method, comprising: in the case that the inverter 100 operates off-grid, providing a first driving signal to drive the switching devices of the first three-level bridge arm circuit 130 in time division manner to control the first three-level bridge arm circuit 130 to convert the direct current voltage into a first-phase alternating current voltage, and providing a second driving signal to drive the switching devices of the second three-level bridge arm circuit 140 in time division manner to control the second three-level bridge arm circuit 140 to convert the direct current voltage into a second-phase alternating current voltage.

[0045] In this embodiment, the control method can be implemented by the controller 150, that is, the controller 150 is configured to implement the control method. Of course, the control method can also be implemented by other devices or apparatuses, and is not limited to being implemented by the controller 150. The controller 150 can also not be configured to implement the control method of the embodiment of the present disclosure, but can implement other functions or methods.

[0046] Referring to FIG. 2, in one embodiment of the present disclosure, the inverter 100 comprises a bus capacitor 160 and a third-phase connection terminal 123. The direct current connection terminal 110 is configured to connect the first end and the second end of the bus capacitor 160, and the third-phase connection terminal 123 is connected to the midpoint of the bus capacitor 160. In the case that the inverter 100 operates off-grid, the first-phase connection terminal 121 and the third-phase connection terminal 123 are configured to connect an alternating current load, or the second-phase connection terminal 122 and the third-phase connection terminal 123 are configured to connect an alternating current load.

[0047] In this embodiment, the voltage provided by the first end of the bus capacitor 160 can be set as Vbus, the midpoint voltage of the bus capacitor 160 can be set as Vbus / 2, and the voltage provided by the second end of the bus capacitor can be set as 0. The third-phase connection terminal 123 is connected to the midpoint of the bus capacitor 160, and the voltage provided by the third-phase connection terminal 123 is the direct current voltage Vbus / 2.

[0048] The direct current voltage Vbus and zero potential are connected to the direct current connection terminal, the first-phase alternating current voltage is a three-level voltage provided according to the direct current voltage, and the three-level amplitude of the first-phase alternating current voltage can be set as Vbus, Vbus / 2 and zero potential. Similarly, the three-level amplitude of the second-phase alternating current voltage can be set as Vbus, Vbus / 2 and zero potential.

[0049] In the case that the first phase connection end and the third phase connection end are connected with the AC load, the voltage accessed by the AC load is a three-level voltage of the difference between the first phase voltage and the DC voltage Vbus, and the amplitude of the three-level voltage is Vbus / 2, zero potential and -Vbus / 2. In the case that the second phase connection end and the third phase connection end are connected with the AC load, the voltage accessed by the AC load is a three-level voltage of the difference between the second phase voltage and the DC voltage Vbus, and the amplitude of the three-level voltage is Vbus / 2, zero potential and -Vbus / 2.

[0050] In the case that the inverter 100 is off-grid, the inverter 100 can provide split-phase voltage to power different loads. The first phase connection end 121 and the third phase connection end 123 can be connected with an AC load A, and the second phase connection end 122 and the third phase connection end 123 can be connected with another AC load B.

[0051] Since the voltage provided by the third phase connection end 123 is determined, the AC voltage accessed by the AC load A is determined according to the voltage provided by the first phase connection end 121, and the AC voltage accessed by the AC load B is determined according to the voltage provided by the second phase connection end 122. The first drive signal and the second drive signal can be determined according to the AC load A and the AC load B, respectively, to control the three-level voltage provided by the first phase connection end 121 and the three-level voltage provided by the second phase connection end 122, so that the inverter 100 can realize independent load carrying by split-phase voltage.

[0052] Thus, in the case that the inverter 100 is off-grid, the inverter 100 can provide split-phase voltage to power different loads.

[0053] In an embodiment of the present disclosure, the first three-level bridge arm circuit 130 includes a first bridge arm 131, a second bridge arm 132 and a third bridge arm 133, the first end of the bus capacitor 160 is connected with the first phase connection end 121 through the first bridge arm 131, and the second end of the bus capacitor 160 is connected with the first phase connection end 121 through the second bridge arm 132. The midpoint of the bus capacitor 160 is connected with the first phase connection end 121 through the third bridge arm 133, or the first three-level bridge arm circuit 130 includes a first discharge capacitor 134, and the first discharge capacitor 134 is connected with the first phase connection end 121 through the third bridge arm 133.

[0054] In this embodiment, the topology of the first three-level bridge arm circuit 130 can be any one of a T-type bridge arm, an I-type bridge arm or a flying capacitor type bridge arm. The T-type bridge arm can refer to FIG. 4, the I-type bridge arm can refer to FIG. 5, and the flying capacitor type bridge arm can refer to FIG. 6.

[0055] The midpoint of the bus capacitor 160 can be set as a node N1, and the connection node of the first three-level bridge arm circuit 130 and the first phase connection end 121 can be set as a node N2. The first end of the bus capacitor 160 can be connected to the node N2 through the first bridge arm 131, and the second end of the bus capacitor 160 can be connected to the node N2 through the second bridge arm 132. In the case that the first bridge arm 131 is turned on, the direct current voltage Vbus provided by the first end of the bus capacitor 160 can be written to the node N2. In the case that the second bridge arm 132 is turned on, the zero potential provided by the second end of the bus capacitor 160 can be written to the node N2.

[0056] Referring to FIG. 4 and FIG. 5, the node N1 can be connected to the node N2 through the third bridge arm. In the case that the third bridge arm 133 is turned on, the direct current voltage Vbus / 2 can be written to the node N2.

[0057] Referring to FIG. 6, the first discharge capacitor 134 can be connected to the node N2 through the third bridge arm 133, and in the case that the third bridge arm 133 is turned on, the first discharge capacitor 134 can discharge the first phase connection end 121 through the third bridge arm 133 and write the corresponding direct current voltage to the node N2.

[0058] In this way, the first three-level bridge arm circuit 130 can write a three-level voltage to the first phase connection end 121 according to the conduction states of the first bridge arm 131, the second bridge arm 132 and the third bridge arm 133.

[0059] In an embodiment of the present disclosure, in the case that the first driving signal drives the switch device of the first bridge arm 131 to be turned on, and the second bridge arm 132 and the third bridge arm 133 are turned off, the level of the first phase alternating current voltage is a first level. In the case that the first driving signal drives the switch device of the second bridge arm 132 to be turned on, and the first bridge arm 131 and the third bridge arm 133 are turned off, the level of the first phase alternating current voltage is a second level. In the case that the first driving signal drives the switch device of the third bridge arm 133 to be turned on, and the first bridge arm 131 and the second bridge arm 132 are turned off, the level of the first phase alternating current voltage is a third level, wherein the first level is greater than the third level, and the third level is greater than the second level.

[0060] In the embodiment, when the first driving signal drives the switch device of the first bridge arm 131 to be conductive, and the second bridge arm 132 and the third bridge arm 133 are disconnected, the DC voltage Vbus provided by the first end of the bus capacitor 160 can be written to the node N2, and the amplitude of the first-phase alternating current voltage is Vbus, at this time, the level of the first-phase alternating current voltage can be set to the first level. That is to say, the first driving signal can drive the switch device of the first bridge arm 131 to be conductive, and the second bridge arm 132 and the third bridge arm 133 are disconnected, and the DC voltage Vbus provided by the first end of the bus capacitor 160 is written to the node N2. When the amplitude of the first-phase alternating current voltage is Vbus, the level of the first-phase alternating current voltage is the first level.

[0061] When the first driving signal drives the switch device of the second bridge arm 132 to be conductive, and the first bridge arm 131 and the third bridge arm 133 are disconnected, the zero potential provided by the first end of the bus capacitor 160 can be written to the node N2, and the amplitude of the first-phase alternating current voltage is 0, at this time, the level of the first-phase alternating current voltage can be set to the second level. That is to say, the first driving signal can drive the switch device of the first bridge arm 132 to be conductive, and the first bridge arm 131 and the third bridge arm 133 are disconnected, so that the zero potential provided by the first end of the bus capacitor 160 is written to the node N2. When the amplitude of the first-phase alternating current voltage is 0, the level of the first-phase alternating current voltage is the second level.

[0062] Referring to FIG. 4 and FIG. 5, when the first driving signal drives the switch device of the third bridge arm 133 to be conductive, and the first bridge arm 131 and the second bridge arm 132 are disconnected, the DC voltage Vbus / 2 provided by the midpoint of the bus capacitor 160 can be written to the node N2, and the amplitude of the first-phase alternating current voltage is Vbus / 2, at this time, the level of the first-phase alternating current voltage can be set to the third level.

[0063] Referring to FIG. 6, when the first driving signal drives the switch device of the third bridge arm 133 to be conductive, and the first bridge arm 131 and the second bridge arm 132 are disconnected, the first discharging capacitor 134 can discharge the first-phase connection end 121 through the third bridge arm 133, and write the corresponding DC voltage to the node N2. The discharging voltage provided by the first discharging capacitor 134 can be set to Vbus, the node N2 can be arranged at the midpoint of the third bridge arm 133, and the voltage drop between the first end of the first discharging capacitor 134 and the node N1 is the same as the voltage drop between the second end of the first discharging capacitor 134 and the node N1, so that the voltage written to the node N2 is Vbus / 2.

[0064] In this way, the first driving signal provided by the controller 150 can write the three-level voltage to the first-phase connection end 121 by controlling the conduction state of the first bridge arm 131, the second bridge arm 132 and the third bridge arm 133.

[0065] Referring to FIG. 4, in one embodiment of the present disclosure, the first bridge arm 131 includes a first switch tube, the second bridge arm 132 includes a second switch tube, the third bridge arm 133 includes a third switch tube and a fourth switch tube, the first end of the bus capacitor 160 is connected with the second end of the bus capacitor 160 through the first switch tube and the second switch tube, and the midpoint of the bus capacitor 160 is connected with the first phase connection end 121 through the third switch tube and the fourth switch tube.

[0066] In this embodiment, the first switch tube can be switch Q1, the second switch tube can be switch Q7, the third switch tube can be switch Q3, and the fourth switch tube can be switch Q4.

[0067] When the first driving signal is configured to drive the switch Q1 to be closed and the switch Q7 to be opened at high frequency, the switch Q3 is closed and the switch Q4 is opened, and the voltage provided by the first phase connection end 121 is Vbus. When the first driving signal is configured to drive the switch Q1 to be opened and the switch Q7 to be closed, the switch Q3 is closed and the switch Q4 is opened, and the voltage provided by the first phase connection end 121 is 0. When the first driving signal is configured to drive the switch Q1 and the switch Q7 to be opened, the switch Q3 and the switch Q4 are both closed, and the voltage provided by the first phase connection end 121 is Vbus / 2.

[0068] Referring to FIG. 5, in one embodiment of the present disclosure, the first bridge arm 131 includes a first switch tube and a second switch tube, the second bridge arm 132 includes a third switch tube and a fourth switch tube, the third bridge arm 133 includes the second switch tube, the third switch tube, a first diode and a second diode, the first end of the bus capacitor 160 is connected with the second end of the bus capacitor 160 through the first switch tube, the second switch tube, the third switch tube and the fourth switch tube, the midpoint of the bus capacitor 160 is connected with the first phase connection end 121 through the first diode and the second switch tube, and the first phase connection end 121 is connected with the midpoint of the bus capacitor 160 through the third switch tube and the second diode.

[0069] In this embodiment, the first switch tube can be switch Q1, the second switch tube can be switch Q2, the third switch tube can be switch Q3, the fourth switch tube can be switch Q4, the first diode can be diode D1, and the second diode can be diode D2.

[0070] When the first driving signal drives the switches Q1 and Q2 to be closed, the switches Q3 and Q4 are opened, and the voltage provided by the first phase connection terminal 121 is Vbus. When the first driving signal drives the switches Q3 and Q4 to be closed, the switches Q1 and Q2 are opened, and the voltage provided by the first phase connection terminal 121 is 0. When the first driving signal drives the switches Q2 and Q3 to be closed, the switches Q1 and Q4 are opened, the midpoint of the bus capacitor 160 forms a loop through the diode D1, the switch Q2, the switch Q3, and the diode D2, and the voltage provided by the first phase connection terminal 121 is Vbus / 2.

[0071] Referring to FIG. 6, in one embodiment of the present disclosure, the first bridge arm 131 includes a first switch tube and a second switch tube, the second bridge arm 132 includes a third switch tube and a fourth switch tube, and the third bridge arm 133 includes the second switch tube and the third switch tube. The first end of the bus capacitor 160 is connected to the second end of the bus capacitor 160 through the first switch tube, the second switch tube, the third switch tube, and the fourth switch tube, and the first end of the first discharge capacitor 134 is connected to the second end of the first discharge capacitor 134 through the second switch tube and the third switch tube.

[0072] In this embodiment, the first switch tube can be the switch Q1, the second switch tube can be the switch Q2, the third switch tube can be the switch Q3, the fourth switch tube can be the switch Q4, and the first discharge capacitor 134 can be the capacitor C1.

[0073] When the first driving signal drives the switches Q1 and Q2 to be closed, the switches Q3 and Q4 are opened, and the voltage provided by the first phase connection terminal 121 is Vbus. When the first driving signal drives the switches Q3 and Q4 to be closed, the switches Q1 and Q2 are opened, and the voltage provided by the first phase connection terminal 121 is 0. When the first driving signal drives the switches Q2 and Q3 to be closed, the switches Q1 and Q4 are opened, the capacitor C1 forms a charge-discharge loop through the switches Q2 and Q3, and the voltage provided by the first phase connection terminal 121 is Vbus / 2.

[0074] In summary, when the first phase alternating current is at the first level, the voltage amplitude is Vbus, when the first phase alternating current is at the second level, the voltage amplitude is 0, and when the first phase alternating current is at the third level, the voltage amplitude is Vbus / 2. Vbus is greater than Vbus / 2, which is greater than 0, so it can be determined that the first level is greater than the third level, which is greater than the second level.

[0075] In this way, the first three-level bridge arm circuit 130 can write a three-level voltage into the first phase connection terminal 121 according to the conduction states of the first switch tube, the second switch tube, the third switch tube, and the fourth switch tube.

[0076] In one embodiment of the present disclosure, the second three-level bridge arm circuit 140 includes a fourth bridge arm 141, a fifth bridge arm 142, and a sixth bridge arm 143. The first end of the bus capacitor 160 is connected to the second phase connection end 122 through the fourth bridge arm 141, and the second end of the bus capacitor 160 is connected to the second phase connection end 122 through the fifth bridge arm 142. The midpoint of the bus capacitor 160 is connected to the second phase connection end 122 through the sixth bridge arm 143, or the second three-level bridge arm circuit 140 includes a second discharge capacitor 144 connected to the second phase connection end 122 through the sixth bridge arm 143.

[0077] In this embodiment, the midpoint of the bus capacitor 160 can be set as node N1, and the connection node of the second three-level bridge arm circuit 140 and the second phase connection end 122 can be set as node N3.

[0078] The first end of the bus capacitor 160 can be connected to the node N3 through the fourth bridge arm 141, and the second end of the bus capacitor 160 can be connected to the node N3 through the fifth bridge arm 142. In the case that the fourth bridge arm 141 is turned on, the direct current voltage Vbus provided by the first end of the bus capacitor 160 can be written to the node N3. In the case that the fifth bridge arm 142 is turned on, the zero potential provided by the second end of the bus capacitor 160 can be written to the node N3.

[0079] The topology of the second three-level bridge arm circuit 140 can be any one of T-type bridge arm, I-type bridge arm, or flying capacitor type bridge arm. The T-type bridge arm can refer to FIG. 4, the I-type bridge arm can refer to FIG. 5, and the flying capacitor type bridge arm can refer to FIG. 6.

[0080] Referring to FIG. 4 and FIG. 5, the node N1 can be connected to the node N3 through the sixth bridge arm 143. In the case that the sixth bridge arm 143 is turned on, the direct current voltage Vbus / 2 can be written to the node N3. Referring to FIG. 6, the second discharge capacitor 144 can be connected to the node N3 through the sixth bridge arm 143. In the case that the sixth bridge arm 143 is turned on, the second discharge capacitor 144 can discharge the second phase connection end 122 through the sixth bridge arm 143 and write the corresponding direct current voltage to the node N3.

[0081] In this way, the second three-level bridge arm circuit 140 can write a three-level voltage to the second phase connection end 122 according to the conduction states of the fourth bridge arm 141, the fifth bridge arm 142, and the sixth bridge arm 143.

[0082] It should be noted that the first three-level bridge arm circuit 130 and the second three-level bridge arm circuit 140 are independent circuits, and the topologies adopted by the first three-level bridge arm circuit 130 and the second three-level bridge arm circuit 140 can be inconsistent. For example, while the first three-level bridge arm circuit 130 can adopt a T-type bridge arm, the second three-level bridge arm circuit 140 can adopt any one of a T-type bridge arm, an I-type bridge arm, or a flying capacitor type bridge arm.

[0083] In one embodiment of the present disclosure, when the second driving signal drives the switching device of the fourth bridge arm 141 to be turned on, and the fifth bridge arm 142 and the sixth bridge arm 143 are disconnected, the level of the first-phase alternating voltage is a first level. When the second driving signal drives the switching device of the fifth bridge arm 142 to be turned on, and the fourth bridge arm 141 and the sixth bridge arm 143 are disconnected, the level of the first-phase alternating voltage is a second level. When the second driving signal drives the switching device of the sixth bridge arm 143 to be turned on, and the fourth bridge arm 141 and the fifth bridge arm 142 are disconnected, the level of the first-phase alternating voltage is a third level, where the first level is greater than the third level, and the third level is greater than the second level.

[0084] In this embodiment, when the second driving signal drives the switching device of the fourth bridge arm 141 to be turned on, and the fifth bridge arm 142 and the sixth bridge arm 143 are disconnected, the direct current voltage Vbus provided by the first end of the bus capacitor 160 can be written to the node N3, and the amplitude of the first-phase alternating voltage is Vbus, at this time, the level of the first-phase alternating voltage can be set to the first level.

[0085] When the second driving signal drives the switching device of the fifth bridge arm 142 to be turned on, and the fourth bridge arm 141 and the sixth bridge arm 143 are disconnected, the zero potential provided by the first end of the bus capacitor 160 can be written to the node N3, and the amplitude of the first-phase alternating voltage is 0, at this time, the level of the first-phase alternating voltage can be set to the second level.

[0086] Referring to FIG. 4 and FIG. 5, in the case that the second driving signal drives the switch device of the sixth bridge arm 143 to be conductive, and the fourth bridge arm 141 and the fifth bridge arm 142 are disconnected, the DC voltage Vbus / 2 provided by the midpoint of the bus capacitor 160 can be written to the node N3, and the amplitude of the first-phase AC voltage is Vbus / 2, at this time, the level of the first-phase AC voltage can be set to the third level. Referring to FIG. 6, in the case that the second driving signal drives the switch device of the sixth bridge arm 143 to be conductive, and the fourth bridge arm 141 and the fifth bridge arm 142 are disconnected, the second discharge capacitor 144 can discharge to the second-phase connection end 122 through the sixth bridge arm 143, and write the corresponding DC voltage to the node N3. The discharge voltage provided by the second discharge capacitor 144 can be set to Vbus, and the node N3 can be arranged at the midpoint of the sixth bridge arm 143. The voltage drop between the first end of the second discharge capacitor 144 and the node N1 is the same as the voltage drop between the second end of the second discharge capacitor 144 and the node N1, so that the voltage written to the node N3 is Vbus / 2.

[0087] Referring to FIG. 4, in one embodiment of the present disclosure, the fourth bridge arm 141 includes a fifth switch tube, the fifth bridge arm 142 includes a sixth switch tube, the sixth bridge arm 143 includes a seventh switch tube and an eighth switch tube, the first end of the bus capacitor 160 is connected to the second end of the bus capacitor 160 through the fifth switch tube and the sixth switch tube, and the midpoint of the bus capacitor 160 is connected to the second-phase connection end 122 through the seventh switch tube and the eighth switch tube.

[0088] In this embodiment, the fifth switch tube can be switch Q2, the sixth switch tube can be switch Q8, the seventh switch tube can be switch Q5, and the eighth switch tube can be switch Q6.

[0089] In the case that the first driving signal is configured to drive the switch Q2 to be closed at high frequency, the switch Q8 is disconnected, the switch Q5 is closed, and the switch Q6 is disconnected, the voltage provided by the second-phase connection end 122 is Vbus. In the case that the first driving signal is configured to drive the switch Q2 to be disconnected at high frequency, the switch Q8 is closed, the switch Q5 is closed, and the switch Q6 is disconnected, the voltage provided by the second-phase connection end 122 is 0. In the case that the first driving signal is configured to drive the switch Q2 and the switch Q8 to be disconnected, the switch Q5 and the switch Q6 can both be closed, and the voltage provided by the second-phase connection end 122 is Vbus / 2.

[0090] The switch Q4 and the switch Q5 can be connected to the midpoint of the bus capacitor 160, so that the common-mode voltage of the first-phase connection end 121 and the second-phase connection end 122 is clamped at the bus midpoint potential, thereby suppressing the leakage current output by the inverter 100.

[0091] Referring to FIG. 5, in one embodiment of the present disclosure, the fourth bridge arm 141 includes a fifth switch tube and a sixth switch tube, the fifth bridge arm 142 includes a seventh switch tube and an eighth switch tube, the sixth bridge arm 143 includes the sixth switch tube, the seventh switch tube, a third diode and a fourth diode, the first end of the bus capacitor 160 is connected with the second end of the bus capacitor 160 through the fifth switch tube, the sixth switch tube, the seventh switch tube and the eighth switch tube, the midpoint of the bus capacitor 160 is connected with the second phase connection end 122 through the third diode and the sixth switch tube, and the second phase connection end 122 is connected with the midpoint of the bus capacitor 160 through the seventh switch tube and the fourth diode.

[0092] In this embodiment, the fifth switch tube can be switch Q5, the sixth switch tube can be switch Q6, the seventh switch tube can be switch Q7, the eighth switch tube can be switch Q8, the third diode can be diode D3, and the fourth diode can be diode D4.

[0093] When the first driving signal drives the switch Q5 and the switch Q6 to be closed, the switch Q7 and the switch Q8 are opened, and the voltage provided by the second phase connection end 122 is Vbus. When the first driving signal drives the switch Q7 and the switch Q8 to be closed, the switch Q5 and the switch Q6 are opened, and the voltage provided by the second phase connection end 122 is 0. When the first driving signal drives the switch Q6 and the switch Q7 to be closed, the switch Q5 and the switch Q8 are opened, the midpoint of the bus capacitor 160 forms a loop through the diode D3, the switch Q6, the switch Q7 and the diode D4, and the voltage provided by the second phase connection end 122 is Vbus / 2.

[0094] The diode D1, the diode D2, the diode D3 and the diode D4 are all connected to the midpoint of the bus capacitor 160, so that the common mode voltage of the first phase connection end 121 and the second phase connection end 122 is clamped at the bus midpoint potential, thereby the leakage current output by the inverter 100 can be suppressed.

[0095] Referring to FIG. 6, in one embodiment of the present disclosure, the fourth bridge arm 141 includes a fifth switch tube and a sixth switch tube, the fifth bridge arm 142 includes a seventh switch tube and an eighth switch tube, the sixth bridge arm 143 includes the sixth switch tube and the seventh switch tube. The first end of the bus capacitor 160 is connected with the second end of the bus capacitor 160 through the fifth switch tube, the sixth switch tube, the seventh switch tube and the eighth switch tube, and the first end of the second discharge capacitor 144 is connected with the second end of the second discharge capacitor 144 through the sixth switch tube and the seventh switch tube.

[0096] In this embodiment, the fifth switch tube can be switch Q5, the sixth switch tube can be switch Q6, the seventh switch tube can be switch Q7, the eighth switch tube can be switch Q8, and the second discharge capacitor 144 can be capacitor C2.

[0097] When the first driving signal drives the switch Q5 and the switch Q6 to be closed, the switch Q7 and the switch Q8 are disconnected, and the voltage provided by the second phase connection terminal 122 is Vbus. When the first driving signal drives the switch Q7 and the switch Q8 to be closed, the switch Q5 and the switch Q6 are disconnected, and the voltage provided by the second phase connection terminal 122 is 0. When the first driving signal drives the switch Q6 and the switch Q7 to be closed, the switch Q5 and the switch Q8 are disconnected, the capacitor C2 forms a charging and discharging circuit through the switch Q6 and the switch Q7, and the voltage provided by the second phase connection terminal 122 is Vbus / 2.

[0098] In summary, when the first phase alternating current voltage is at the first level, the voltage amplitude is Vbus, when the first phase alternating current voltage is at the second level, the voltage amplitude is 0, and when the first phase alternating current voltage is at the third level, the voltage amplitude is Vbus / 2. Vbus is greater than Vbus / 2, which is greater than 0, and it can be determined that the first level is greater than the third level, which is greater than the second level.

[0099] In this way, the second three-level bridge arm circuit 140 can write a three-level voltage into the second phase connection terminal 122 according to the conduction states of the fifth switch tube, the sixth switch tube, the seventh switch tube, and the eighth switch tube.

[0100] In an embodiment of the present disclosure, when the inverter 100 is off-grid, the first three-level bridge arm circuit 130 and the second three-level bridge arm circuit 140 respectively adopt a method of sinusoidal pulse width (SPWM) unipolar modulation. The first three-level bridge arm circuit 130 and the second three-level bridge arm circuit 140 can respectively adopt different modulation waves and carriers to determine corresponding driving signals, and can also adopt different driving signals to drive the first three-level bridge arm circuit 130 and the second three-level bridge arm circuit 140, respectively.

[0101] In an embodiment of the present disclosure, the control method can include: obtaining a first modulation wave, a second modulation wave, a first carrier, and a second carrier, the first modulation wave and the first carrier being determined based on the first phase alternating current voltage, and the second modulation wave and the second carrier being determined based on the second phase alternating current voltage; determining the first driving signal according to the first modulation wave and the first carrier, and determining the second driving signal according to the second modulation wave and the second carrier.

[0102] Referring to FIG. 7, the carrier and the modulation wave can determine the driving signal of the corresponding three-level circuit to determine the three-level voltage output by the corresponding three-level circuit. The amplitude of the three-level voltage output by the three-level circuit can include Vbus, Vbus / 2, and 0.

[0103] The carrier wave can be a triangular wave or a sawtooth wave, and the modulation wave can be a sine wave. In the case where the modulation wave is positive and the amplitude of the modulation wave is greater than the amplitude of the carrier wave, the amplitude of the three-level voltage output by the three-level circuit is Vbus. In the case where the amplitude of the modulation wave is positive and the amplitude of the modulation wave is less than the amplitude of the carrier wave, the amplitude of the three-level voltage output by the three-level circuit is Vbus / 2. In the case where the modulation wave is negative and the amplitude of the modulation wave is greater than the amplitude of the carrier wave, the amplitude of the three-level voltage output by the three-level circuit is Vbus / 2. This is the third-level voltage. In the case where the amplitude of the modulation wave is negative and the amplitude of the modulation wave is less than the amplitude of the carrier wave, the amplitude of the three-level voltage output by the three-level circuit is 0.

[0104] The first modulation wave and the first carrier wave can be determined according to the first alternating voltage. In the case where the amplitude of the first modulation wave is positive and the amplitude of the first modulation wave is less than the amplitude of the first carrier wave, the three-level voltage output by the first three-level bridge arm circuit 130 is the second-level voltage. In the case where the first modulation wave is negative and the amplitude of the first modulation wave is greater than the amplitude of the first carrier wave, the three-level voltage output by the first three-level bridge arm circuit 130 is the third-level voltage. In the case where the amplitude of the first modulation wave is negative and the amplitude of the first modulation wave is less than the amplitude of the first carrier wave, the three-level voltage output by the first three-level bridge arm circuit 130 is the second-level voltage.

[0105] The second modulation wave and the second carrier wave can be determined according to the second alternating voltage. In the case where the amplitude of the second modulation wave is positive and the amplitude of the second modulation wave is less than the amplitude of the second carrier wave, the three-level voltage output by the second three-level bridge arm circuit 140 is the first-level voltage. In the case where the second modulation wave is negative and the amplitude of the second modulation wave is greater than the amplitude of the second carrier wave, the three-level voltage output by the second three-level bridge arm circuit 140 is the third-level voltage. In the case where the amplitude of the second modulation wave is negative and the amplitude of the second modulation wave is less than the amplitude of the second carrier wave, the three-level voltage output by the second three-level bridge arm circuit 140 is the second-level voltage.

[0106] Thus, in the case where the inverter 100 is operating off-grid, the phases of the amplitudes of the first-phase alternating voltage and the second-phase alternating voltage can not be the same. By adjusting the first modulation wave, the second modulation wave, the first carrier wave, and the second carrier wave, the first-phase alternating voltage and the second-phase alternating voltage can be adjusted to improve the problem of load power imbalance when the inverter is connected.

[0107] Referring to FIG. 8, Uoref can be an effective value error correction value of the alternating inverter voltage. Uref is a reference for the instantaneous value of the inverter voltage, and Uref can be set according to the grid standard of the corresponding country, for example, Uref can be an alternating voltage of 120V / 60Hz, and the voltage reference output by the first three-level bridge arm circuit 130 and the second three-level bridge arm circuit 140 is out of phase by 180 degrees.

[0108] Gv(s) can be the s-domain transfer function of the voltage loop of the corresponding bridge arm circuit, GI(s) can be the s-domain transfer function of the current loop of the corresponding bridge arm circuit, Kpwm can be the carrier modulation ratio, and z(s) can be the phase compensation element, which is expressed in the discrete domain as wherein kz is a coefficient in the range [0, 1]. After passing through these links, the driving signal is generated, and the inductance current iL is generated by the inverter output passing through the power inductance and the load. By two-phase separate control, the output current can be decoupled, and the voltage output by the inverter 100 can drive the unbalanced load.

[0109] Gv(s), GI(s), and z(s) are determined according to the circuit structure and voltage reference of the corresponding bridge arm circuit, the inductance current iL is determined according to the inductance connected to the corresponding bridge arm circuit, and Kpwm is determined according to the modulation wave and carrier wave of the corresponding bridge arm circuit.

[0110] Different first modulation waves, first carriers, second modulation waves, and second carriers can be provided according to the accessed alternating current load, and Kpwm can be adjusted to control the inverter voltage output by the first three-level bridge arm circuit 130 and the inverter voltage output by the second three-level bridge arm circuit 140 to drive the unbalanced load.

[0111] In one embodiment of the present disclosure, when the inverter 100 is grid-connected, the controller 150 is configured to provide a third driving signal to drive the switching devices of the first three-level bridge arm circuit 130 and the second three-level bridge arm circuit 140 in time-sharing manner to control the difference between the first-phase alternating current voltage and the second-phase alternating current voltage to be a three-level voltage.

[0112] When the inverter 100 is grid-connected, the controller 150 can be coupled to control the three-level voltage output by the first three-level bridge arm circuit 130 and the second three-level bridge arm circuit 140. The first-phase connection terminal 121 and the second-phase connection terminal 122 are connected to the power grid.

[0113] Referring to FIG. 4, the third driving signal can be configured to high-frequency drive the switches Q1 and Q8 to be closed and the switches Q2 and Q7 to be open, at this time, the voltage provided by the first-phase connection terminal 121 jumps between Vbus and Vbus / 2, and the voltage provided by the second-phase connection terminal 122 jumps between 0 and Vbus / 2. The third driving signal can also be configured to high-frequency drive the switches Q1 and Q8 to be open and the switches Q2 and Q7 to be closed, at this time, the voltage provided by the first-phase connection terminal 121 is 0, at this time, the voltage provided by the first-phase connection terminal 121 jumps between 0 and Vbus / 2, and the voltage provided by the second-phase connection terminal 122 jumps between Vbus and Vbus / 2. The voltage difference between the first-phase connection terminal 121 and the second-phase connection terminal 122 jumps between -Vbus / 2, 0, and Vbus / 2.

[0114] Referring to FIGS. 5 and 6, the third driving signal can be configured to drive switches Q1, Q2, Q7 and Q8 to be closed and switches Q3, Q4, Q5 and Q6 to be opened, at which time the voltage provided by the first phase connection terminal 121 jumps between Vbus and Vbus / 2 and the voltage provided by the second phase connection terminal 122 jumps between 0 and Vbus / 2.

[0115] The third driving signal can also be configured to drive switches Q1, Q2, Q7 and Q8 to be opened and switches Q3, Q4, Q5 and Q6 to be closed, at which time the voltage provided by the first phase connection terminal 121 jumps between 0 and Vbus / 2 and the voltage provided by the second phase connection terminal 122 jumps between Vbus and Vbus / 2. The voltage difference between the first phase connection terminal 121 and the second phase connection terminal 122 jumps between -Vbus / 2, 0 and Vbus / 2.

[0116] In this way, the third driving signal provided by the controller 150 can drive one pair of switches in the first three-level bridge circuit 130 and the second three-level bridge circuit 140 to be simultaneously turned on and turned off at the same time, so as to reduce the ripple current of the capacitor midpoint caused by asymmetric sampling of the two bridge arms.

[0117] In one embodiment of the present disclosure, the control method comprises: in the case where the inverter 100 is operating in grid-connected mode, obtaining a third modulation wave and a third carrier wave, the third modulation wave and the third carrier wave being determined based on the difference between the first phase alternating voltage and the second phase alternating voltage; determining a third driving signal according to the third modulation wave and the third carrier wave; and driving the switching devices of the first three-level bridge circuit 130 and the switching devices of the second three-level bridge circuit 140 in time according to the third driving signal, so as to control the difference between the first phase alternating voltage and the second phase alternating voltage to be a three-level voltage.

[0118] In this embodiment, in the case where the inverter 100 is operating in grid-connected mode, the first three-level bridge circuit 130 and the second three-level bridge circuit 140 adopt the same sinusoidal pulse width (SPWM) unipolar modulation method. The first three-level bridge circuit 130 and the second three-level bridge circuit 140 determine corresponding driving signals using the same modulation wave and carrier wave, and drive the first three-level bridge circuit 130 and the second three-level bridge circuit 140 using the same driving signals.

[0119] Referring to FIG. 9, the voltage difference between the first three-level bridge circuit 130 and the second three-level bridge circuit 140 is a three-level voltage, and the amplitude of the three-level voltage can include Vbus / 2, -Vbus / 2 and 0.

[0120] The third carrier can be a triangular wave or a sawtooth wave, and the third modulation wave can be a sine wave. In the case where the third modulation wave is positive and the amplitude of the third modulation wave is greater than the amplitude of the third carrier, the amplitude of the three-level voltage of the voltage difference between the first three-level bridge arm circuit 130 and the second three-level bridge arm circuit 140 is Vbus / 2.

[0121] In the case where the amplitude of the third modulation wave is positive and the amplitude of the third modulation wave is less than the amplitude of the third carrier, the amplitude of the output three-level voltage is 0. In the case where the third modulation wave is negative and the amplitude of the third modulation wave is greater than the amplitude of the third carrier, the amplitude of the output three-level voltage is -Vbus / 2. In the case where the amplitude of the third modulation wave is negative and the amplitude of the third modulation wave is less than the amplitude of the third carrier, the amplitude of the output three-level voltage is 0.

[0122] Thus, in the case where the inverter 100 is grid-connected, the first three-level bridge arm circuit 130 and the second three-level bridge arm circuit 140 adopt the method of sinusoidal pulse width (SPWM) unipolar modulation to reduce the ripple current of the capacitor midpoint caused by the asymmetric output sampling of the two bridge arms.

[0123] Further, referring to FIG. 10, Vdref is the reference of the bus voltage, Vbus is the sampling value of the bus voltage, cosθ is the reference of the instantaneous value of the inverter inductance current, E is the average value of the bus voltage, and Vg is the grid voltage. The PI controller is configured to adjust the deviation value of the reference of the bus voltage and the sampling value of the bus voltage, and the SPWM can be the actual duty cycle value of the pulse width modulation.

[0124] The inverter inductance current feedback is subtracted from the reference and then divided by the average value of the bus voltage to convert into the actual duty cycle value to generate the PWM wave for inverter modulation. The third adjustment wave and the third carrier can be determined according to the bus voltage and the grid voltage to determine the third driving signal, to determine the actual duty cycle value of the pulse width modulation, and to determine the difference between the first-phase alternating current and the second-phase alternating current.

[0125] In this document, the terms "comprise", "comprising", or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element. Additionally, the scope of the methods and apparatus of the present embodiments are intended to encompass both the following: the process, method, article, or apparatus that comprises a list of elements recited in any claim, as well as the process, method, article, or apparatus that comprises at least one of each element recited in any claim. Furthermore, the described features, techniques, compositions, articles, materials, equipment, and methods, which are of significance to a person skilled in the art, can be combined in any technically possible way, in various embodiments and combinations thereof.

[0126] From the above description of the embodiments, it is clear that the above-described embodiments can be realized by means of software under the necessary general hardware platform, and of course, can also be realized by hardware, but in many cases, the former is a better implementation. Based on such understanding, the technical solutions of the present disclosure can be essentially embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, magnetic disc, optical disc), and includes a plurality of instructions for causing a terminal (which can be a mobile phone, computer, server, or network equipment, etc.) to execute the methods described in various embodiments of the present disclosure.

[0127] The embodiments of the present disclosure are described above in combination with the accompanying drawings, but the present disclosure is not limited to the above-described specific embodiments, and the above-described embodiments are merely illustrative, not restrictive. Those skilled in the art can make many forms under the inspiration of the present disclosure without departing from the scope of the present disclosure and the scope protected by the claims.

[0128] In the description of the specification, the description of the terms "one embodiment", "some embodiments", "exemplary embodiment", "example", "specific example", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present disclosure. In the specification, the exemplary description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0129] Although embodiments of the disclosure have been shown and described, it will be apparent to those having ordinary skill in the art that a number of changes, modifications, alternatives, and variations can be made to the embodiments without departing from the principles and spirit of the disclosure, the scope of which is defined by the claims and their equivalents.

Claims

1. An inverter, wherein, The inverter comprises: a direct current connection end configured to access a direct current voltage; a first phase connection end configured to provide a first phase alternating current voltage and a second phase connection end configured to provide a second phase alternating current voltage; a first three-level bridge arm circuit connected between the direct current connection end and the first phase connection end; a second three-level bridge arm circuit connected between the direct current connection end and the second phase connection end; a controller configured to provide a first driving signal to drive switching devices of the first three-level bridge arm circuit in time division manner to control the first three-level bridge arm circuit to convert the direct current voltage into the first phase alternating current voltage when the inverter operates off-grid, and configured to provide a second driving signal to drive switching devices of the second three-level bridge arm circuit in time division manner to control the second three-level bridge arm circuit to convert the direct current voltage into the second phase alternating current voltage.

2. The inverter of claim 1, wherein, The inverter further comprises a bus capacitor and a third phase connection end, the direct current connection end is configured to connect a first end and a second end of the bus capacitor, and the third phase connection end is connected with a midpoint of the bus capacitor; When the inverter operates off-grid, the first phase connection end and the third phase connection end are configured to connect an alternating current load, or the second phase connection end and the third phase connection end are configured to connect an alternating current load.

3. The inverter of claim 2, wherein, The first three-level bridge arm circuit comprises a first bridge arm, a second bridge arm and a third bridge arm, the first end of the bus capacitor is connected with the first phase connection end through the first bridge arm, and the second end of the bus capacitor is connected with the first phase connection end through the second bridge arm; The midpoint of the bus capacitor is connected with the first phase connection end through the third bridge arm, or the first three-level bridge arm circuit comprises a first discharge capacitor connected with the first phase connection end through the third bridge arm.

4. The inverter of claim 3, wherein, When the switching device of the first bridge arm is turned on by the first driving signal, and the second bridge arm and the third bridge arm are turned off, the level of the first phase alternating current voltage is a first level; When the switching device of the second bridge arm is turned on by the first driving signal, and the first bridge arm and the third bridge arm are turned off, the level of the first phase alternating current voltage is a second level; When the switching device of the third bridge arm is turned on by the first driving signal, and the first bridge arm and the second bridge arm are turned off, the level of the first phase alternating current voltage is a third level, the first level is greater than the third level, and the third level is greater than the second level.

5. The inverter of claim 3 or 4, wherein, The first bridge arm comprises a first switching tube, the second bridge arm comprises a second switching tube, the third bridge arm comprises a third switching tube and a fourth switching tube, the first end of the bus capacitor is connected with the second end of the bus capacitor through the first switching tube and the second switching tube, and the midpoint of the bus capacitor is connected with the first phase connection end through the third switching tube and the fourth switching tube; or The first bridge arm comprises a first switch tube and a second switch tube, the second bridge arm comprises a third switch tube and a fourth switch tube, the third bridge arm comprises the second switch tube, the third switch tube, a first diode and a second diode, a first end of the bus capacitor is connected with a second end of the bus capacitor through the first switch tube, the second switch tube, the third switch tube and the fourth switch tube, a midpoint of the bus capacitor is connected with the first phase connection end through the first diode and the second switch tube, and the first phase connection end is connected with the midpoint of the bus capacitor through the third switch tube and the second diode; or The first bridge arm comprises a first switch tube and a second switch tube, the second bridge arm comprises a third switch tube and a fourth switch tube, the third bridge arm comprises the second switch tube and the third switch tube, a first end of the bus capacitor is connected with a second end of the bus capacitor through the first switch tube, the second switch tube, the third switch tube and the fourth switch tube, and a first end of the first discharge capacitor is connected with a second end of the first discharge capacitor through the second switch tube and the third switch tube.

6. The inverter of any one of claims 2-5, wherein, The second three-level bridge arm circuit comprises a fourth bridge arm, a fifth bridge arm and a sixth bridge arm, a first end of the bus capacitor is connected with the second phase connection end through the fourth bridge arm, and a second end of the bus capacitor is connected with the second phase connection end through the fifth bridge arm. A midpoint of the bus capacitor is connected with the second phase connection end through the sixth bridge arm, or the second three-level bridge arm circuit comprises a second discharge capacitor, and the second discharge capacitor is connected with the second phase connection end through the sixth bridge arm.

7. The inverter of claim 6, wherein, In a case where the second driving signal drives a switch device of the fourth bridge arm to be conductive, and the fifth bridge arm and the sixth bridge arm are disconnected, a level of the second-phase alternating voltage is a first level; In a case where the second driving signal drives a switch device of the fifth bridge arm to be conductive, and the fourth bridge arm and the sixth bridge arm are disconnected, a level of the second-phase alternating voltage is a second level; In a case where the second driving signal drives a switch device of the sixth bridge arm to be conductive, and the fourth bridge arm and the fifth bridge arm are disconnected, a level of the second-phase alternating voltage is a third level, the first level is greater than the third level, and the third level is greater than the second level.

8. The inverter of claim 6 or 7, wherein, The fourth bridge arm comprises a fifth switch tube, the fifth bridge arm comprises a sixth switch tube, the sixth bridge arm comprises a seventh switch tube and an eighth switch tube, a first end of the bus capacitor is connected with a second end of the bus capacitor through the fifth switch tube and the sixth switch tube, and a midpoint of the bus capacitor is connected with the second phase connection end through the seventh switch tube and the eighth switch tube; or The fourth bridge arm comprises a fifth switch tube and a sixth switch tube, the fifth bridge arm comprises a seventh switch tube and an eighth switch tube, the sixth bridge arm comprises the sixth switch tube, the seventh switch tube, a third diode and a fourth diode, the first end of the bus capacitor is connected with the second end of the bus capacitor through the fifth switch tube, the sixth switch tube, the seventh switch tube and the eighth switch tube, the midpoint of the bus capacitor is connected with the second phase connection end through the third diode and the sixth switch tube, and the second phase connection end is connected with the midpoint of the bus capacitor through the seventh switch tube and the fourth diode; or The fourth bridge arm comprises a fifth switch tube and a sixth switch tube, the fifth bridge arm comprises a seventh switch tube and an eighth switch tube, the sixth bridge arm comprises the sixth switch tube and the seventh switch tube, the first end of the bus capacitor is connected with the second end of the bus capacitor through the fifth switch tube, the sixth switch tube, the seventh switch tube and the eighth switch tube, and the first end of the second discharge capacitor is connected with the second end of the second discharge capacitor through the sixth switch tube and the seventh switch tube.

9. The inverter of any of claims 1-8, wherein, In the case that the inverter is grid-connected, the controller is configured to provide a third driving signal to drive the switching devices of the first three-level bridge arm circuit and the switching devices of the second three-level bridge arm circuit in time to control the difference between the first phase alternating voltage and the second phase alternating voltage to be a three-level voltage.

10. A control method of an inverter, wherein, The inverter comprises a direct current connection end, a first phase connection end, a second phase connection end, a first three-level bridge arm circuit and a second three-level bridge arm circuit, the direct current connection end is configured to access a direct current voltage, the first phase connection end is configured to provide a first phase alternating voltage, the second phase connection end is configured to provide a second phase alternating voltage, the first three-level bridge arm circuit is connected between the direct current connection end and the first phase connection end, and the second three-level bridge arm circuit is connected between the direct current connection end and the second phase connection end. In the case that the inverter is off-grid, a first driving signal is provided to drive the switching devices of the first three-level bridge arm circuit in time to control the first three-level bridge arm circuit to convert the direct current voltage into the first phase alternating voltage, and a second driving signal is provided to drive the switching devices of the second three-level bridge arm circuit in time to control the second three-level bridge arm circuit to convert the direct current voltage into the second phase alternating voltage.

11. The control method according to claim 10, wherein The control method further comprises: In the case that the inverter is off-grid, a first modulation wave, a second modulation wave, a first carrier wave and a second carrier wave are obtained, the first modulation wave and the first carrier wave are determined based on the first phase alternating voltage, and the second modulation wave and the second carrier wave are determined based on the second phase alternating voltage; The first driving signal is determined according to the first modulation wave and the first carrier wave, and The second driving signal is determined according to the second modulation wave and the second carrier wave.

12. The control method according to claim 10 or 11, wherein The control method further comprises: In the case that the inverter is in grid-connected operation, a third modulation wave and a third carrier wave are obtained, the third modulation wave and the third carrier wave being determined based on the difference between the first-phase alternating voltage and the second-phase alternating voltage; a third driving signal is determined according to the third modulation wave and the third carrier wave; the switching devices of the first three-level bridge arm circuit and the switching devices of the second three-level bridge arm circuit are driven by time sharing according to the third driving signal, so that the difference between the first-phase alternating voltage and the second-phase alternating voltage is controlled to be a three-level voltage.

13. A photovoltaic energy storage system, wherein, The photovoltaic energy storage system comprises the inverter according to any one of claims 1-9.

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