Method for producing MEMS components, in particular MEMS micromirror elements, from a substrate wafer

Abstract

The invention relates to a method for producing MEMS components, in particular MEMS micromirror elements (14, 78), from a substrate wafer (36). The substrate wafer comprises silicon material and MEMS structures (78, 80) separated by silicon oxide (24). According to method step a), a first coating part (32) of a MEMS component, in particular of a MEMS micromirror element (14, 78), is provided on an upper side of the substrate wafer (36). Subsequently, according to method step b), a handling wafer (30) provided with a second coating part (34) of the MEMS component, in particular a MEMS micromirror element (14, 78), is applied surface-to-surface to the previously provided first coating part (32). A connection, in particular a bonding connection (50), is then produced between the coating parts (32, 34) as a full-surface connection to form a composite / assemblage (86). Subsequently, micromirror elements (78) and / or electrode arrangements (80) released from the silicon material of the substrate wafer (36) are formed in the substrate wafer (36). The invention also relates to the use of the method for producing MEMS components, in particular MEMS micromirror elements (14, 78), from substrate wafers (36) containing silicon material.

Description

[0001] Description

[0002] title

[0003] Technical field

[0004] The invention relates to a method for manufacturing MEMS devices, in particular MEMS micromirror elements, from a substrate wafer comprising silicon material and MEMS structures separated by silicon oxide layers.

[0005] Furthermore, the invention relates to the use of the method for the production of MEMS devices, in particular MEMS micromirror elements from substrate wafers containing silicon material.

[0006] State of the art

[0007] US Patent 7,042,619 B1 describes a process using hydrogen deposition for light-modulating mirror structures, employing monocrystalline silicon as the substrate. Current processes require two critical alignment steps, which can lead to higher trigger voltages and lower production yields. A hydrogen deposition process simplifies the fabrication process to a single step: the transfer of a thin layer of monocrystalline silicon onto the CMOS substrate. This results in minimal alignment errors and provides a large bonding area.

[0008] US Patent 2004 / 160687 A1 discloses a method and apparatus for manufacturing a MEMS device comprising a component layer with an optical surface supported by a base located on a planar substrate. The optical surface is movably suspended relative to the planar substrate by hinge elements arranged in a different plane relative to the substrate. The optical surface has a maximum area relative to the base to achieve an optimal optical surface fill factor and a high transmission range. The base height is dimensioned such that the optical surface is positioned sufficiently above the substrate to allow unimpeded, predetermined angular rotation about any axis. MEMS devices enable an array of micromirrors with a high optical fill factor and high transmission.Using micromachining techniques both in the bulk and on the surface, a MEMS device can be manufactured with a large and flat mirror and flexible joints that cover a considerable rotation range with relatively low electrostatic drive voltages.

[0009] US 2006 / 0274397 A1 relates to a spatial light modulator. This modulator comprises a first support containing several electrically activated electrodes and a bias grid, and a spacer structure connected to the first support. The spacer structure has a central section extending above the first substrate to a first distance, and an extension section extending above the first substrate to a second distance, such that the second distance is smaller than the first. The spatial light modulator also includes a reflective plate with a central contact arrangement integrally formed with the central part of the spacer arrangement, and a torsion arm. This torsion arm is coplanar with the central contact arrangement and does not contact the spacer arrangement.

[0010] Individual mirror elements of micromirror arrays essentially comprise two components in cross-section: A lower component is an actuator wafer, which accommodates micromechanical drive elements, while an upper component is a mirror wafer, for example, containing a mirror plate. The mirror surface is generally made of single-crystal silicon because it can be manufactured to be very smooth both macroscopically and microscopically, exhibits relatively low RMS roughness, and is also advantageously mechanically very stable and possesses favorable thermal and electrical properties. The aim is to produce the mirror plate from single-crystal silicon and bond it to a polycrystalline actuator wafer. In current processes, the mirror wafer is bonded to the actuator wafer, for example, using Au / Au bond connections.This involves two gold layers to be bonded on a top plate, which represents the uppermost level of the actuator wafer, and below the pedestal (lowest level of the mirror wafer).

[0011] The following boundary conditions apply to the area of ​​the gold bond: The mirror surface is to be curved in the final product, necessitating that the mirror surfaces be bonded or fixed only centrally. The curvature can be concave or convex. This means that the pedestal with its bonding surface must have only a small lateral extent compared to the mirror surface. If, as is common in MEMS applications, the outer edge of the mirror is approximately 1 mm long, the pedestal with the bonding surface must be a maximum of 0.1 mm long. Other examples include mirror edges of 0.1 mm and a resulting bonding edge between 0.005 mm and 0.1 mm, or mirror edges of 10 mm and bonding edges of 0.5 mm to 1 mm in length. This means that only a relatively small area is available for the Au / Au bond mentioned here as an example.

[0012] This relatively small area available for forming the bond connection presents the problem of producing this bond connection, also known as the bond interface, with sufficient mechanical stability.

[0013] Furthermore, when transmitting an electrical signal from the mirror plate to the actuator wafer, this signal must necessarily pass through the Au / Au bond. The smaller the bond area, the higher the electrical resistance. If multiple electrical signals are transmitted through this Au / Au bond, the problem is compounded. An Au layer to be bonded typically includes additional barrier / adhesion layers to the silicon. This is generally a more complex stack of gold with barriers, such as Au / TaN / Ta or Au / TiN / Ti, or other gold barrier combinations. It may be necessary for the barriers to be completely buried beneath the gold. In this case, the gold and the respective barriers must be deposited and structured separately, resulting in multiple layers.Consequently, a lateral buffer is needed between the gold structure and the barrier structure, which, however, again entails a certain space requirement.

[0014] Furthermore, every wafer bonding process is subject to lateral alignment inaccuracies, such as a forming Au / Au thermocompression bond. Since it must be ensured that one bonding surface is always pressed and bonded to the other, one of the two bonding surfaces must be enlarged by the alignment inaccuracy to compensate for the tolerances that occur during bond alignment.

[0015] The challenges mentioned above mean that Au / Au bond surfaces cannot be arbitrarily small and a certain minimum bond area is required. This directly contradicts the system requirement to make the bond connections as central and small as possible in order to allow for curvature of the mirror surface in the final product.

[0016] Disclosure of the invention

[0017] According to the invention, a method for manufacturing MEMS devices, in particular MEMS micromirror devices, from a substrate wafer comprising silicon material and MEMS structures separated by silicon oxide layers is proposed, wherein the following process steps are carried out: a) providing at least one first layer part of a MEMS device, in particular a MEMS micromirror device, on a front face of the substrate wafer, b) applying a handling wafer provided with a second layer part of the MEMS device, in particular a MEMS micromirror device, over a surface area to the first layer part provided according to process step a), c) creating a connection, in particular a bond connection,between the layer parts as a full-surface connection to a composite or compound and d) formation of micromirror elements and / or electrode arrangements in the substrate wafer freed from the silicon material of the substrate wafer by at least one etching or post-processing process.

[0018] The method proposed according to the invention advantageously makes it possible to significantly simplify the production of MEMS components, in particular of delicate micromirror elements, and in particular to make the connection of the micromirror plates to the substrate wafer in the form of a pedestal mechanically much more stable and electrically particularly well conductive.

[0019] In an advantageous further development of the method proposed according to the invention, it is provided that structured pedestals of the MEMS components, in particular the MEMS micromirror plates, are formed on the front side of the substrate wafer provided according to process step a).

[0020] In an advantageous embodiment of the method proposed according to the invention, the pre-structured pedestals in the substrate wafer are produced as at least one EPyC layer, which may include at least one optional temperature sensor. This enables a very high level of functional integration into the substrate wafer, which is subsequently processed by etching and other post-processing methods.

[0021] In an advantageous further development of the method proposed according to the invention, the first layer part is deposited as an Epi Poly layer on the front side of the substrate wafer with a thickness between 1 pm and 1000 pm, in particular 10 pm and 60 pm.

[0022] Furthermore, in the method proposed according to the invention, it is provided that, according to process step b), the handling wafer is applied in an upside-down position without adjustment to the front side of the substrate wafer, which contains the first layer part. This procedure allows for the simple joining of the two layer parts of the MEMS device to be produced as a composite or as a composite, preferably a mirror plate of a MEMS micromirror element, which are deposited on different wafers. In the method proposed according to the invention, it is further provided that, according to process step c), the produced bond is implemented, for example, as a Si / Si bond, as a eutectic Al / Ge bond, as an Al / Al thermocompression bond, as an Au / Au thermocompression bond, or as a eutectic Cu / Sn bond.

[0023] In the method proposed according to the invention, after process step c) has been carried out, the handling wafer is removed in such a way that either a BOX layer is removed along with it and the resulting second layer is surface-polished, or the BOX layer remains on the same surface as a protective layer. Optionally, it is possible to deposit an additional protective layer onto the resulting surface.

[0024] In an advantageous further development, in the method proposed according to the invention, the surface of the MEMS device, in particular the MEMS micromirror elements, is structured according to process step c) such that LPCVD filling or PECVD filling of trenches or depressions on the MEMS device is carried out.

[0025] Furthermore, the method proposed according to the invention is characterized in that backside electrical connection pads are applied to a backside of the substrate wafer, which are provided with a passivation layer, in particular silicon oxide layers.

[0026] The method proposed according to the invention provides that, after carrying out process step c) and after removing the handling wafer, a top surface of the first layer part is cleaned and either the remaining BOX layer or the additionally applied protective layer is removed.

[0027] In the method proposed according to the invention, it is further provided that silicon material of the substrate wafer is removed down to the silicon oxide layers bounding the silicon material by means of an etching process, in particular SF6 / XeF2 etching, and isolated micromirror elements and / or isolated electrode structures are obtained.

[0028] After carrying out process step d), i.e. after carrying out the release of the MEMS devices in the silicon material of the substrate wafer, in the method proposed according to the invention an RF gas phase processing of the now silicon material-free areas of the substrate wafer is carried out, so that the silicon oxide remaining in these is removed from the prestructured structures.

[0029] Furthermore, in the method proposed according to the invention, it is advantageously provided that, according to process step c), the resulting composite / joint is configured such that it comprises an upper layer of single-crystal silicon material and at least one lower layer containing an EpiPoly material, wherein the lower layer comprises, for example, at least one SiO layer and / or at least one SiN layer and / or at least one SiRiN layer for adjusting the mechanical properties of the composite / joint. The method proposed according to the invention therefore advantageously allows the final micromirror plate of the MEMS device to be manufactured from a first, lower polycrystalline part and a second, upper single-crystal part, in contrast to previous micromirror elements.In which the entire mirror plate of the micromirror element is ultimately monocrystalline. By designing the mirror plate of the MEMS device in the form of a micromirror, the final properties of the resulting composite or compound can be advantageously adapted to the requirements of the overall system due to the controlled thickness ratios between polycrystalline and monocrystalline silicon. This is not possible when manufacturing a mirror plate from a single monocrystalline material, i.e., without a composite / bond.

[0030] Furthermore, the invention relates to the use of the method for the production of MEMS devices, in particular MEMS micromirror elements from substrate wafers containing silicon material.

[0031] Advantages of the invention

[0032] The method proposed according to the invention enables the fabrication of MEMS devices, in particular MEMS micromirror elements, in which the bonding of deformable micromirror element surfaces is integrated into the substrate wafer. This bonding provides both sufficient mechanical stability and very good electrical conductivity. Instead of forming a bond connection on a laterally confined pedestal surface, the method proposed according to the invention creates a bond connection at a less critical location. This greatly simplifies mechanical stability and also significantly simplifies fabrication.

[0033] The method proposed according to the invention allows a connection, for example a metallurgical bond, to be removed from the laterally restricted pedestal area and instead relocated to another, less critical location on the substrate wafer. This avoids bonding in a very difficult-to-access area of ​​the pedestal while simultaneously fulfilling all the aforementioned criteria regarding mechanical stability and excellent electrical conductivity. The bonding process between the first layer and the second layer is thus relocated to a different, significantly more accessible process location. Furthermore, there is no need for alignment between the first and second layer of the MEMS device, in particular a micromirror element.The critical and technically extremely demanding platform level is not made even more complex or more difficult to manufacture by the method proposed according to the invention through a bonding process.

[0034] Advantageously, the method proposed according to the invention can utilize common technologies of the EPyC process, in particular the deposition, including polishing and doping, of epipoly silicon, as well as the structuring of the epipoly silicon and the deposition and structuring of silicon oxide. The structuring of the epipoly silicon and the silicon oxide in the method proposed according to the invention is carried out using common, established lithography and etching techniques. This means that very good spatial resolution and alignment accuracy can be achieved, extending in some cases to the submicrometer range. This, in turn, allows the resulting pedestal, including its electrical vias, to be manufactured with high precision. The pedestal can be manufactured with very precise alignment relative to the structures of the underlying actuator structures in the substrate wafer.Furthermore, its dimensions can be precisely tailored to meet the mechanical, thermal, and electrical requirements of the overall system. Using this method, MEMS micromirror elements can be manufactured with thicknesses ranging from a few micrometers to several tens or even hundreds of micrometers.

[0035] In the method proposed according to the invention, the resulting final mirror plate of the MEMS mirror element is provided with a first, lower polycrystalline part and a second, upper single-crystal part, in contrast to previous MEMS micromirror elements in which the entire mirror plate is single-crystal. Due to the at least two-layer structure of the MEMS micromirror plate, comprising the upper and lower layers, and due to the adjustable thickness ratios of polycrystalline to single-crystal between these layers and / or by means of additionally incorporated layers, such as SiO₂, SiN, or SiRiN, the mechanical properties of the method proposed according to the invention can be adjusted such that the final properties of the resulting composite or compound meet the requirements of the overall system.In contrast, previous versions of MEMS micromirror elements, which consist of a single single-crystal mirror plate and therefore contain no composite material, require that all requirements be met using only this single-crystal material. The method proposed according to the invention offers a simpler way, due to the multiple degrees of freedom available, to selectively influence the mechanical stresses acting on the components.

[0036] The method proposed according to the invention advantageously allows the realization of very small contact areas, which are subject only to the resolution limitations of lithography. This allows a significantly larger number of different electrical signals to be transmitted from the lower actuator part to the upper mirror part while maintaining the same total area.

[0037] Brief description of the drawings

[0038] Embodiments of the invention are explained in more detail with reference to the drawings and the following description.

[0039] Figure 1 shows a schematic representation of a previous method using a pre-structured handling wafer and pedestals formed on it with an Au coating.

[0040] Figure 2 shows a summary schematic representation of the manufacturing process proposed according to the invention.

[0041] Figure 3 shows a representation of the substrate wafer with the pedestals and other structures provided therein.

[0042] Figure 4 shows the handling wafer applied to the front of the substrate wafer and the bonding of the first and second layer parts of the MEMS device to be manufactured, in particular a MEMS micromirror element,

[0043] Figure 5 shows the removal of part of the handling wafer and the first layer part of the MEMS device remaining on the front side with the second layer part.

[0044] Figure 6 shows the structuring of the micromirror plate and the filling of the resulting trenches with oxide.

[0045] Figure 7 shows a schematic representation of electrical connection elements on the back or underside of the substrate wafer.

[0046] Figure 8 shows the structuring of the uppermost oxide for access points for etching gas to release MEMS elements.

[0047] Figure 9 shows the resulting isolated MEMS micromirror elements and electrode arrangements arranged in the actuator plane, also isolated, and Figure 10 shows the representation of the substrate wafer obtained after etching according to Figure 9 with isolated micromirror elements with removed silicon oxide layers by means of a processing step such as HF etching and an associated rinsing.

[0048] As shown in Figure 1, a pre-processed handling wafer 10 is applied to the front face 26 of a wafer 22 in an upside-down position 12. The pre-processed handling wafer 10 already includes pre-structured micromirror structures 14, each with its associated pedestals 16, and first Au layers 18 already deposited on the pedestals 16. Starting from its upside-down position 12, the pre-processed handling wafer 10 is applied essentially vertically to second Au layers 20 positioned opposite it on the front face 26 of the wafer 22. The wafer 22 itself includes, for example, MEMS structures separated by silicon oxide layers 24.

[0049] Embodiments of the invention

[0050] In the following description of embodiments of the invention, identical or similar elements are designated by the same reference numerals, and repeated descriptions of these elements are omitted in individual cases. The figures represent the subject matter of the invention only schematically.

[0051] Figure 2 shows a summary of the method proposed according to the invention. Figure 2 illustrates that a handling wafer 30, also mounted in an overhead position 12, comprises a BOX layer 54 and, in this case, a second coating part 34. In this context, a BOX layer 54 is understood to be a layer of buried oxides.

[0052] Opposite the handling wafer 30, which has a significantly simpler structure than the preprocessed handling wafer 10 as shown in Figure 1, is a substrate wafer 36, on the front side of which a first coating part 32 of a MEMS component to be manufactured, in particular a MEMS micromirror element, is applied. As shown in Figure 2, the handling wafer 30, with its second coating part 34 forming a full-surface, misalignment-free connection 48 in the vertical direction, is applied to the first coating part 32 on the front side 26 of the substrate wafer 36.The substrate wafer 36 in turn comprises buried structures, such as a structured pedestal 38, which can be multilayered and in particular includes at least one optional temperature sensor 40. Furthermore, a top plate is integrated into the structure of the substrate wafer 36 according to the schematic representation in Figure 2. A back side of the substrate wafer 36 is identified by reference numeral 64. This can also be provided with a passivation layer, for example a silicon oxide layer 24.

[0053] Figure 3 shows a substrate wafer 36, on the front face 26 of which the first coating part 32 is applied. Below the first coating part 32, the pre-structured substrate wafer 36 contains said structured pedestals 38, with at least one optional temperature sensor 40. The first coating part 32 is deposited on the front face 26, for example, in the form of an EpiPoly layer 44. This EpiPoly layer 44 has a thickness of 1 pm to 1000 pm, in particular 10 pm to 60 pm. Furthermore, it can be seen from the illustration in Figure 3 that the pre-structured substrate wafer 36 contains said structured pedestals 38, which can be formed, for example, as one or more EPyC layers 42 with said optional temperature sensors 40.

[0054] Figure 4 shows that, as already indicated in Figure 1, the handling wafer 30 is applied to the front face 26 of the substrate wafer 36. Accordingly, the first coating part 32 applied to the front face 26 of the substrate wafer 36 and the second coating part 34 formed on the front face of the applied handling wafer 30 are contacted and, for example, after bonding 46 as shown in Figure 1, form a full-surface, adjustment-free bond 48. During this full-surface, largely adjustment-free bond 48, a Si / Si bond 50 is formed, for example, between the two coating parts 32 and 34.

[0055] Instead of a Si / Si bond 50, as indicated in Figure 4, the full-surface, adjustment-free bond 48 according to Figure 4 can alternatively be formed, for example, a eutectic Al / Ge bond, an Al / Al thermocompression bond, an Au / Au thermocompression bond, or a eutectic Cu / Se bond. Even an electrically and thermally insulating bonding process could be used if, in a subsequent process, an insulating bonding interface is provided with contacts, thereby restoring the electrical and thermal connection. Thus, in the context of the method proposed according to the invention, there is a wealth of degrees of freedom in the choice of bonding process, which represents an advantage of the solution proposed according to the invention.

[0056] In the representation according to Figure 5, position 54 designates a BOX layer which is formed within the handling wafer 30.

[0057] As shown in Figure 5, after the removal 52 of the handling wafer 30, the BOX layer 54 can remain on the second coating part 34 and form a protective layer. Alternatively, as shown in Figure 6, the handling wafer 30 along with the BOX layer 54 can be removed and the exposed surface treated to achieve a high surface finish. As indicated in Figure 6, an additional protective layer 56 can also be applied to the front face 26 of the substrate wafer 36 on the second coating part 34.

[0058] The illustrations in Figures 4 and 5 already show that the first coating part 32 applied to the front 26 and the second coating part 34 form a bond 50 and therefore already in this state form a composite or a composite 86 of at least two layers.

[0059] On the back side 64 of the substrate wafer 36 there is a passivation layer 68 in the form of a silicon oxide layer 24. Electrode structures and micromirror plates are separated from each other in the silicon material of the substrate wafer 36 by silicon oxide layers 24 as shown in Figure 5, analogous to the representation in Figure 4.

[0060] Figure 6 shows that in this case the top side of the second coating part

[0061] 34 is provided with said additional protective layer 56. This is deposited on the top side of the second coating part 34 and can be applied by means of an LPCVD filler 60 or a PECVD filler.

[0062] Figure 6 further illustrates that the micromirror plates are now structured, with the grooves being filled, for example, with an LPCVD infill 60 or a PECVD infill. It is important to note that the alignment of the grooves with the actuator structures in the silicon material of the substrate wafer 36 is achieved. The advantage is that, when structuring the mirror outlines after bonding, the misalignment of the mirror relative to the actuators is subject only to typical lithography tolerances. When structuring the mirror outlines before bonding, the misalignment resulting from the bonding process must also be taken into account.

[0063] The illustrations in Figures 5 and 6 further show that the structured pedestals 38 are still present as multiple EPyC layers 42 with at least one optional temperature sensor 40 in the silicon material of the substrate wafer 36. The structuring of the micromirror elements 14 is indicated by reference numeral 58. The individual micromirror elements 14, which are not yet isolated in the illustration in Figure 6, are centrally located on the aforementioned structured pedestals 38, which are formed in the silicon material of the substrate wafer 36 as shown in Figures 5 and 6.

[0064] Figure 7 shows that in the depicted state of the substrate wafer 36, its front surface 26 receives a composite 86 consisting of the first coating part 32 and the second coating part 34. This composite can either be covered by an additional protective layer 56 or provided with a remaining portion of the BOX layer 54, which remained on the top surface of the second coating part 34 after the removal 52 of the handling wafer 30. The composites 86 formed on the front surface 26 of the substrate wafer 36 are supported centrally by the pre-structured platform 38.

[0065] On the back side 64 of the substrate wafer 36, backside electrical pads 66 or a metallization or the like can be provided, which serve for the electrical contacting of the substrate wafer 36 on its back side 64. The individual backside-mounted electrical pads 66 or metallizations can be provided with a passivation layer 68 in the form of a silicon oxide layer 24.

[0066] Starting from the state of the partially processed substrate wafer 36 according to Figure 7, Figure 8 shows that the remaining additional protective layer 56 on a micromirror surface 72 is now being removed. Furthermore, a structuring step can be carried out, whereby the silicon material can be structured.

[0067] Starting from the representation in Figure 8, Figure 9 shows the removal of the silicon material from the substrate wafer 36 by an etching process, for which SFβ and / or XeF2 etching medium is supplied through openings in a single etching step. The at least one etching process 74 results in both exposed micromirror elements 78 and underlying, opposing electrode arrangements 80, which are also exposed. The rear electrical pads 66 present on the back side 64 of the substrate wafer 36, or any metallization provided there, remain unaffected. As can be seen from the representation in Figure 9, spaces have now been created in the silicon material of the substrate wafer 36 by the removal of silicon material 76.Furthermore, silicon-free channels 84 are formed, so that the MEMS components now present as composite or compound 86 in the form of micromirror elements 14 can be moved around the pedestals 38, corresponding to a control of the opposing free electrode arrangements 80.

[0068] Finally, as shown in Figure 10, a further processing step involves an RF gas phase treatment 82. This removes the remaining passivation layer 68, in the form of silicon oxide layers 24, from the silicon material of the substrate wafer 36, as shown in Figure 9. The substrate wafer 36 structure shown in Figure 10 is obtained, with isolated micromirror elements 78 and also isolated electrode arrangements 80 located below the isolated micromirror elements 78. Figure 10 also shows that the isolated micromirror elements 78 have mirror plates formed as a composite 86, comprising a single-crystal upper layer 88 and a polycrystalline lower layer 90. Reference numeral 92 indicates the layer thickness ratio between the aforementioned upper layer 88 and the aforementioned lower layer 90 of the isolated micromirror elements 78.Accordingly, the composite or compound 86 produced according to the proposed method comprises an upper layer 88 made of single-crystal silicon and a lower layer 90 made of EpiPoly material. Furthermore, the EpiPoly layer 44 can be designed to integrate additional structures that compensate for mechanical stresses, such as SiO layers, SiN layers, SiRiN layers, and trench structures, so that the individual mechanical stress properties of the resulting MEMS micromirror element 14 or isolated micromirror 78 can be adjusted via the respective lower layer 90, which is connected to the structured pedestal 38 in the silicon material of the substrate wafer 36.

[0069] The strength ratios between polycrystal and single crystal, i.e., the strength ratios of the upper layer 88 to the lower layer 90 in the composite or compound 86, can be chosen so that the final properties of the composite or compound 86 meet the requirements of the overall system.

[0070] The proposed method advantageously utilizes common technologies of the EPyC process, such as the deposition, including polishing and doping, of EpiPoly silicon as EpiPoly layer 44, the structuring of the EpiPoly layer 44, and the deposition and structuring of silicon oxide 24. The structuring is performed using standard etching techniques. This means that very high spatial resolution and alignment accuracy, extending into the submicrometer range, can be achieved. This, in turn, means that the resulting pedestals 38, including electrical vias, can be fabricated with high precision. The pedestal 38 can also be fabricated with high precision relative to the structures of the underlying electrode arrangements 80 in the silicon material of the substrate wafer 36.Furthermore, its dimensions can be precisely implemented to meet the mechanical, thermal, and electrical requirements of the overall system. Using the method proposed according to the invention, for example, a missing thickness of a MEMS micromirror plate to be produced can be added as follows: For instance, the first polycrystalline part deposited on the front face 26 of the substrate wafer 36, i.e., the coating part 32, can have a thickness of 20 pm. Subsequently, the handling wafer 30 is applied, which has a second coating part 34 with a thickness of, for example, 50 pm. Thus, during bonding, forming the bond 50, a final micromirror plate thickness of 70 pm is achieved. The bonding process for producing the bond 50 can, for example, be Si / Si direct bonding.In this process, preconditioned silicon surfaces are pressed together and heated, resulting in covalent Si / Si atom bonds at the bond interface. This enables the fabrication of mechanically stable and electrically and thermally conductive bonds. Fine-tuning is not required when fabricating this bond 50, since essentially two unstructured silicon surfaces, namely the first coating part 32 and the second coating part 34, are joined together. This bond 50 is therefore considerably less complex than, for example, the Au / Au bond shown in Figure 1.

[0071] Furthermore, the invention relates to the use of the inventive method for the production of MEMS devices, in particular MEMS micromirror elements 14, 78 from substrate wafers 36 containing silicon material.

[0072] The invention is not limited to the embodiments described here and the aspects highlighted therein. Rather, within the scope specified by the claims, a multitude of modifications are possible that fall within the bounds of what is considered skilled in the art.

Claims

Claims 1. Method for the fabrication of MEMS devices, in particular MEMS micromirror elements (14, 78) from a substrate wafer (36) comprising silicon material and silicon oxide layers (24) separated MEMS structures (78, 80) comprised, comprising the following process steps: a) providing at least one first coating part (32) of a MEMS device, in particular a MEMS micromirror element (14, 78) on a top side of the substrate wafer (36), b) applying a handling wafer (30) provided with a second coating part (34) of the MEMS device, in particular a MEMS micromirror element (14, 78), over a surface area to the first coating part (32) provided according to process step a), c) creating a connection, in particular a bond connection (50) between the coating parts (32, 34) as a full-surface connection to a composite / joint (86), and d) forming micromirror elements (78) and / or electrode arrangements (80) in the substrate wafer (36) freed from the silicon material of the substrate wafer (36) by at least one etching process (74, 82).

2. Method according to claim 1, characterized in that structured pedestals (38) of the MEMS components, in particular of MEMS micromirror elements (14, 78), are formed on the front side (26) of the substrate wafer (36) provided according to method step a).

3. Method according to claim 2, characterized in that the pre-structured pedestals (38) in the substrate wafer (36) are formed as at least one EPyC layer (42) is manufactured, which includes at least one optional temperature sensor (40).

4. Method according to claims 1 to 3, characterized in that according to method step a) the first coating part (32) is applied as an E-piPoly substrate (44) to the front side (26) of the substrate wafer (36) with a thickness between 1 pm and 1000 pm, in particular 10 pm to 60 pm, will be separated.

5. Method according to claims 1 to 4, characterized in that according to method step b) the handling wafer (30) is applied in an overhead position (12) without adjustment to the front side (26) of the substrate wafer (36) having the first coating part (32).

6. Method according to claims 1 to 5, characterized in that the bond (50) produced according to process step c) is designed as a Si / Si bond or as a eutectic Al / Ge bond or as an Al / Al thermocompression bond or as an Au / Au thermocompression bond or as a eutectic Cu / Sn bond.

7. Method according to claims 1 to 6, characterized in that after process step c) the handling wafer (30) is removed in such a way that either a BOX layer (54) is removed and the resulting second coating part (34) is surface polished, or the BOX layer (54) remains as a protective layer.

8. Method according to claims 1 to 6, characterized in that after process step c) the handling wafer (30) is removed in such a way that an additional protective layer (56) is deposited.

9. Method according to claims 1 to 8, characterized in that after process step c) a structuring (58) of the surfaces of the MEMS components, in particular the MEMS micromirror elements (14, 78), is carried out such that an LPCVD filling (60) or a PECVD filling of trenches / depressions is carried out.

10. Method according to claims 1 to 9, characterized in that rear electrical connection pads (66) are applied to a rear side (64) of the substrate wafer (36), which are provided with a passivation layer (68), in particular silicon oxide.

11. Method according to claims 1 to 10, characterized in that a top surface of the first coating part (34) is cleaned after carrying out process step c) and after removing the handling wafer (30) and either the remaining BOX layer (54) or the additional protective layer (56) is structured on the top surface of the first coating part (34).

12. Method according to claims 1 to 11, characterized in that by means of an etching process (74), in particular SF6 / XeF2 etching, the silicon material of the substrate wafer (36) is removed down to limited silicon oxide layers (24) and isolated micromirror elements (78) and / or isolated electrode arrangements (80) are obtained.

13. Method according to claims 1 to 12, characterized in that after carrying out process step d) silicon material-free areas (84) of the substrate wafer (36) are subjected to an HF gas phase treatment (82) and remaining silicon oxide layers (24) are removed.

14. Method according to claims 1 to 13, characterized in that according to process step c) the composite / joint (86) is obtained such that it comprises an upper layer (88) of single-crystal silicon material and a lower layer (90) containing an EpiPoly layer (44), wherein a lower layer (90) may comprise at least one SiO layer and / or at least one SiN layer and / or at least one SiRiN layer for adjusting mechanical properties of the composite / joint (86).

15. Use of the method according to any one of claims 1 to 14, for the production of MEMS devices, in particular MEMS micromirror elements (14, 78) from substrate wafers (36) containing silicon material.

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