Active matrix substrate, and display device and x-ray sensor device comprising same
The active matrix substrate with conductive films surrounding TFTs on a polyimide substrate addresses afterimage and stability issues by shielding TFTs from electric fields and light, enhancing device performance.
Patent Information
- Application Number
- PCT/JP2024/023751
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-01
- Publication Date
- 2026-01-08
AI Technical Summary
Flexible organic EL display devices and X-ray sensor devices with polyimide (PI) substrates suffer from afterimage phenomena and TFT instability due to dipole-induced polarization and electrical hysteresis, leading to visibility issues and device malfunction.
An active matrix substrate with a resin substrate, particularly a polyimide (PI) substrate, incorporates a thin film transistor layer where each thin film transistor is surrounded or overlapped by conductive films to shield the channel region from electric fields and light, stabilizing TFT behavior.
The conductive films effectively suppress disturbances in TFT behavior, reducing polarization and electrical influences, thereby stabilizing the operation of the devices and preventing afterimages and functional failures.
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Figure JP2024023751_08012026_PF_FP_ABST
Abstract
Description
Active matrix substrate, display device and X-ray sensor device including the same
[0001] The present invention relates to an active matrix substrate, and a display device and an X-ray sensor device that include the same.
[0002] Active matrix substrates are known that include a flexible resin substrate as a base substrate and a TFT layer in which a plurality of thin film transistors (hereinafter also referred to as "TFTs") are formed as switching elements, driving elements, etc. Active matrix substrates are widely used in, for example, various display devices such as liquid crystal display devices and self-emitting organic electroluminescence (hereinafter also referred to as "EL") display devices using organic electroluminescence (hereinafter also referred to as "EL") elements; and image sensor devices such as X-ray sensor devices.
[0003] For example, Patent Document 1 proposes a display having a conductive shield structure formed immediately below a thin-film transistor in at least one buffer layer interposed between the thin-film transistor and the substrate. In this display, the polyimide (PI) molecules constituting the polyimide (PI) substrate are polymers having a basic structure in which donor-acceptor groups, each consisting of an electron-donating diamine moiety and an electron-accepting acid dianhydride moiety, which are dipole factors, generate positive or negative charges and are alternately bonded. This prevents the generation of an electric field by the circuit on the PI substrate from adversely affecting the operation of the transistor.
[0004] Special table 2017-505457 publication
[0005] However, flexible organic EL display devices equipped with an active matrix substrate including a PI substrate can suffer from an afterimage phenomenon known as "burn-in" (a phenomenon in which a previous image remains on a newly displayed image), which poses a major challenge to visibility.The cause of this is thought to be that dipoles generated by the polarity of the molecules in the PI substrate cause polarization, disrupting the behavior of the capacitive TFT and causing electrical hysteresis, which in turn causes hysteresis in the light emission intensity of the organic EL element, whose light emission intensity is determined by the current, and this hysteresis is displayed as an afterimage.
[0006] Furthermore, in a flexible X-ray sensor device equipped with an active matrix substrate including a PI substrate, polarization occurs due to dipoles generated by the polarity of the molecules of the PI substrate, and the threshold value (Vth) of the TFT shifts and changes to a depression characteristic (a depression shift occurs in which the threshold voltage of the TFT shifts to the negative side), which can cause the charge stored in the capacitor to leak out and cause these devices to stop functioning.
[0007] The present invention has been made in view of the above points, and its object is to suppress disturbances in the behavior of TFTs and achieve stabilization in an active matrix substrate in which TFTs are provided on a resin substrate, particularly a polyimide (PI) substrate.
[0008] In order to achieve the above object, the active matrix substrate of the present invention comprises a resin substrate and a thin film transistor layer provided on the resin substrate, wherein the thin film transistor layer is provided with a plurality of thin film transistors, each having a semiconductor layer in which a channel region and a conductor region are defined, and wherein a plurality of conductive films are provided corresponding to each of the plurality of thin film transistors so as to surround at least the channel region in a planar view or to overlap at least the channel region.
[0009] According to the present invention, in an active matrix substrate in which TFTs are provided on a resin substrate, particularly a polyimide (PI) substrate, it is possible to suppress disturbances in the behavior of the TFTs and achieve stabilization.
[0010] FIG. 1 is a plan view showing a schematic configuration of an organic EL display device according to a first embodiment of the present invention. FIG. 2 is a plan view of a display region of the organic EL display device according to the first embodiment of the present invention. FIG. 3A is a cross-sectional view of the display region of the organic EL display device according to the first embodiment of the present invention. FIG. 3B is a cross-sectional view taken along line III-III in FIG. 5. FIG. 4 is an equivalent circuit diagram showing a pixel circuit of the organic EL display device according to the first embodiment of the present invention. FIG. 5 is a plan view showing a second TFT constituting the organic EL display device according to the first embodiment of the present invention. FIG. 6 is a schematic plan view showing an arrangement of a plurality of conductive films constituting the organic EL display device according to the first embodiment of the present invention. FIG. 7 is a schematic plan view showing a modified example of the arrangement of a plurality of conductive films constituting the organic EL display device according to the first embodiment of the present invention. FIG. 8A is a cross-sectional view of a display region of the organic EL display device according to the first embodiment of the present invention, corresponding to FIG. 3A. FIG. 8B is a cross-sectional view taken along line VIII-VIII in FIG. 9, corresponding to FIG. 3B. FIG. 9 is a plan view showing a modified example 1 of the second TFT constituting the organic EL display device according to the first embodiment of the present invention, corresponding to FIG. 5. FIG. 10A is a cross-sectional view of a display region of an organic EL display device according to the first embodiment of the present invention, corresponding to FIG. 3A. FIG. 10B is a cross-sectional view taken along line X-X in FIG. 11, corresponding to FIG. 3B. FIG. 11 is a plan view showing Modification 2 of a second TFT constituting an organic EL display device according to the first embodiment of the present invention, corresponding to FIG. 5. FIG. 12A is a cross-sectional view of a display region of an organic EL display device according to the first embodiment of the present invention, corresponding to FIG. 3A. FIG. 12B is a cross-sectional view taken along line XII-XII in FIG. 13, corresponding to FIG. 3B. FIG. 13 is a plan view showing Modification 3 of a second TFT constituting an organic EL display device according to the first embodiment of the present invention, corresponding to FIG. 5. FIG. 14A is a cross-sectional view of a display region of an organic EL display device according to the first embodiment of the present invention, corresponding to FIG. 3A. FIG. 14B is a cross-sectional view taken along line XIV-XIV in FIG. 15, corresponding to FIG. 3B. FIG. 15 is a plan view showing a fourth modification of the second TFT constituting the organic EL display device according to the first embodiment of the present invention, and corresponds to FIG.FIG. 16 is a cross-sectional view showing an organic EL layer constituting the organic EL display device according to the first embodiment of the present invention. FIG. 17A is a cross-sectional view of an X-ray sensor device according to a second embodiment of the present invention. FIG. 17B is a cross-sectional view taken along line XVII-XVII in FIG. 18. FIG. 18 is a plan view showing a TFT constituting an X-ray sensor device according to the second embodiment of the present invention. FIG. 19A is a cross-sectional view of an X-ray sensor device according to the second embodiment of the present invention, corresponding to FIG. 17A. FIG. 19B is a cross-sectional view taken along line XIX-XIX in FIG. 20, corresponding to FIG. 17B. FIG. 20 is a plan view showing a first modified example of a TFT constituting an X-ray sensor device according to the second embodiment of the present invention, corresponding to FIG. 18. FIG. 21A is a cross-sectional view of an X-ray sensor device according to the second embodiment of the present invention, corresponding to FIG. 17A. FIG. 21B is a cross-sectional view taken along line XXI-XXI in FIG. 22, corresponding to FIG. 17B. FIG. 22 is a plan view showing a second modified example of a TFT constituting an X-ray sensor device according to the second embodiment of the present invention, corresponding to FIG. 18. FIG. 23A is a cross-sectional view of an X-ray sensor device according to the second embodiment of the present invention, corresponding to FIG. 17A. FIG. 23B is a cross-sectional view taken along line XXIII-XXIII in FIG. 24, corresponding to FIG. 17B. FIG. 24 is a plan view showing Modification 3 of a TFT constituting an X-ray sensor device according to the second embodiment of the present invention, corresponding to FIG. 18. FIG. 25A is a cross-sectional view of an X-ray sensor device according to the second embodiment of the present invention, corresponding to FIG. 17A. FIG. 25B is a cross-sectional view taken along line XXV-XXV in FIG. 26, corresponding to FIG. 17B. FIG. 26 is a plan view showing Modification 4 of a TFT constituting an X-ray sensor device according to the second embodiment of the present invention, corresponding to FIG. 18.
[0011] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments.
[0012] First Embodiment FIGS. 1 to 16 illustrate a display device according to a first embodiment of the present invention. In the first embodiment, an organic EL display device including organic EL elements (light-emitting elements) is exemplified as a display device including an active matrix substrate 30. FIG. 1 is a plan view showing a schematic configuration of an organic EL display device 50 according to this embodiment. FIG. 2 is a plan view of a display region D of the organic EL display device 50. FIG. 3A is a cross-sectional view of the display region D of the organic EL display device 50. FIG. 4 is an equivalent circuit diagram showing a pixel circuit C of the organic EL display device 50. FIG. 3B is a cross-sectional view taken along line III-III in FIG. 5. FIG. 5 is a plan view showing a second TFT 9b constituting the organic EL display device 50. FIG. 6 is a schematic plan view showing the arrangement of a plurality of conductive films S14(S) constituting the organic EL display device 50. FIG. 7 is a schematic plan view showing a modified arrangement of a plurality of conductive films S14(S) constituting the organic EL display device 50. FIG. 8A is a cross-sectional view of the display region D of the organic EL display device 50, corresponding to FIG. 3A. FIG. 8B is a cross-sectional view taken along line VIII-VIII in FIG. 9 and corresponds to FIG. 3B. FIG. 9 is a plan view showing Modification 1 of the second TFT 9b constituting the organic EL display device 50 and corresponds to FIG. 5. FIG. 10A is a cross-sectional view of the display region D of the organic EL display device 50 and corresponds to FIG. 3A. FIG. 10B is a cross-sectional view taken along line X-X in FIG. 11 and corresponds to FIG. 3B. FIG. 11 is a plan view showing Modification 2 of the second TFT 9b constituting the organic EL display device 50 and corresponds to FIG. 5. FIG. 12A is a cross-sectional view of the display region D of the organic EL display device 50 and corresponds to FIG. 3A. FIG. 12B is a cross-sectional view taken along line XII-XII in FIG. 13 and corresponds to FIG. 3B. FIG. 13 is a plan view showing Modification 3 of the second TFT 9b constituting the organic EL display device 50 and corresponds to FIG. 5. FIG. 14A is a cross-sectional view of the display region D of the organic EL display device 50 and corresponds to FIG. 3A. Fig. 14B is a cross-sectional view taken along line XIV-XIV in Fig. 15, and corresponds to Fig. 3B. Fig. 15 is a plan view showing Modification 4 of the second TFT 9b constituting the organic EL display device 50, and corresponds to Fig. 5. Fig. 16 is a cross-sectional view showing the organic EL layer 23 constituting the organic EL display device 50.5, 7, 9, 11, 13 and 15, upper layers of a source electrode 18a, a drain electrode 18b, etc. (third wiring layer) described later are omitted.
[0013] 1 , the organic EL display device 50 includes, for example, a rectangular display area D for displaying an image, and a frame area F provided in a frame shape around the display area D. Note that, although the present embodiment illustrates a rectangular display area D, this rectangular shape also includes, for example, a substantially rectangular shape with arc-shaped sides, arc-shaped corners, or a shape with a notch in one of the sides.
[0014] In the display region D, a plurality of sub-pixels P are arranged in a matrix, as shown in Fig. 2. In the display region D, for example, a sub-pixel P having a red light-emitting region Lr for displaying red, a sub-pixel P having a green light-emitting region Lg for displaying green, and a sub-pixel P having a blue light-emitting region Lb for displaying blue are arranged adjacent to one another, as shown in Fig. 2. In the display region D, one pixel is formed by, for example, three adjacent sub-pixels P each having a red light-emitting region Lr, a green light-emitting region Lg, and a blue light-emitting region Lb. The arrangement of the sub-pixels P is not particularly limited, and examples thereof include a pentatile arrangement and a stripe arrangement.
[0015] A terminal portion T is provided to extend in one direction (the vertical direction in FIG. 1 ) at one end (the right end in FIG. 1 ) of the frame region F. Also, as shown in FIG. 1 , a folding portion B that can be folded, for example, 180° (in a U-shape) with the vertical direction in FIG. 1 as the folding axis is provided in the frame region F between the terminal portion T and the display region D and that extends in one direction (the vertical direction in FIG. 1 ).
[0016] As shown in Figures 3A and 3B (see also Figures 8A, 8B, 10A, 10B, 12A, 12B, 14A and 14B), the active matrix substrate 30 constituting the organic EL display device 50 includes a flexible resin substrate 10 provided as a base substrate, and a TFT layer 20 provided on the resin substrate 10.
[0017] The resin substrate 10 is made of an organic resin material such as polyimide (PI) resin. Hereinafter, the resin substrate 10 will be described as a PI substrate 10 made of PI. PI is an aromatic polyimide in which repeating units within the molecular chain contain imide bonds and aromatic compounds are linked by imide bonds. This aromatic polyimide has a rigid and strong molecular structure due to the conjugated structure between aromatic moieties via imide bonds. Furthermore, the imide bonds have strong intermolecular forces, resulting in a super engineering plastic with excellent thermal, mechanical, and chemical properties within the polymer. Here, in a flexible device in which a TFT layer 20 is formed on a PI substrate 10 formed by applying PI to glass, as in the manufacturing method of the active matrix substrate 30 described below, the PI must have the following characteristics: heat resistance to withstand the temperatures required to manufacture high-performance TFTs; a linear expansion coefficient equivalent to that of the glass and the inorganic films that constitute the TFT layer 20, which prevents curling when the glass substrate is peeled off from the underside of the PI substrate 10 and cracks in the inorganic films that constitute the TFT layer 20. PIs that satisfy these characteristics exist and are used in the active matrix substrate 30. Here, PIs that satisfy the above specifications are polymers with a basic structure in which donor-acceptor groups, consisting of electron-donating diamine moieties and electron-accepting dianhydride moieties, which are dipole-generating factors, are alternately bonded. Therefore, dipoles generated by the polarity of the molecules tend to orient along the electric field lines in the PI. Due to the rigidity of the PI, the PI molecules orient (move) slowly, resulting in long-term effects. Furthermore, PIs are characterized by intermolecular electron transfer (CT transition) upon irradiation with light, which increases the polarity of the molecules and strengthens the dipole moment, resulting in rapid polarization. In the case of light-emitting display devices (such as the organic EL display device 50) and light-receiving devices (such as the X-ray sensor device 500 described below), the effects on TFTs become immediately noticeable.
[0018] In the TFT layer 20, as shown in Fig. 4, a first TFT 9a, a second TFT 9b, and a capacitor 9c are provided as a pixel circuit C in each subpixel P. As shown in Fig. 4, the pixel circuits C are arranged in a matrix corresponding to each subpixel P. Note that the black circles (●) shown in Fig. 4 indicate nodes.
[0019] As shown in FIGS. 3A and 3B , the TFT layer 20 includes a base coat film 11 provided on a PI substrate 10, a plurality of first TFTs 9 a (see FIG. 4 ), a plurality of second TFTs 9 b, and a plurality of capacitors 9 c (see FIG. 4 ) provided on the base coat film 11 for each subpixel P, and a planarization film 19 provided on each of the first TFTs 9 a, each of the second TFTs 9 b, and each of the capacitors 9 c. As shown in FIGS. 2 and 4 , the TFT layer 20 includes a plurality of gate lines 14 as signal wirings extending parallel to each other in the horizontal direction in the drawings. Also, as shown in FIGS. 2 and 4 , the TFT layer 20 includes a plurality of source lines 18 f as signal wirings extending parallel to each other in a direction intersecting (orthogonal to) the plurality of gate lines 14, i.e., in the vertical direction in the drawings. Also, as shown in FIGS. 2 and 4 , the TFT layer 20 includes a plurality of power supply lines 18 g extending parallel to each other in the vertical direction in the drawings. As shown in FIG. 2, each power supply line 18g is provided adjacent to each source line 18f.
[0020] 3A and 3B , the TFT layer 20 includes a base coat film 11, a semiconductor film that will become the semiconductor layer 12, a gate insulating film 13, a first metal film that will become a first wiring layer such as the gate line 14 (see FIGS. 2 and 4), the gate electrode 14a, and a lower conductive layer (not shown), a first interlayer insulating film, a second metal film that will become a second wiring layer such as the upper conductive layer (not shown), a second interlayer insulating film, a third metal film that will become a third wiring layer such as the source line 18f (see FIGS. 2 and 4), the source electrode 18a, the drain electrode 18b, and the power line 18g (see FIGS. 2 and 4), and a planarizing film 19, which are stacked in this order on the PI substrate 10. Hereinafter, the first interlayer insulating film and the second interlayer insulating film will be collectively referred to as the "interlayer insulating film 15."
[0021] The base coat film 11, the gate insulating film 13, and the interlayer insulating film 15 are made of, for example, silicon nitride (SiNx (x is a positive number)), silicon oxide (SiO 2 ), silicon oxynitride (SiON), or other inorganic insulating films, may be used as a single layer or multilayer film.
[0022] The semiconductor film is composed of, for example, a low-temperature polysilicon film such as LTPS (low temperature polysilicon) or an oxide semiconductor film such as In—Ga—Zn—O. An In—Ga—Zn—O based semiconductor is a ternary oxide of In (indium), Ga (gallium), and Zn (zinc). The oxide semiconductor film may contain one or more other oxide semiconductors. Examples of other oxide semiconductors include In—Sn—Zn—O based semiconductors (e.g., In 2 O 3 -SnO 2 In—ZnO; InSnZnO), etc. The In—Sn—Zn—O based semiconductor is a ternary oxide of In (indium), Sn (tin), and Zn (zinc). Other oxide semiconductors include In—Al—Zn—O based semiconductors, In—Al—Sn—Zn—O based semiconductors, Zn—O based semiconductors, In—Zn—O based semiconductors, Zn—Ti—O based semiconductors, Cd—Ge—O based semiconductors, Cd—Pb—O based semiconductors, CdO (cadmium oxide), Mg—Zn—O based semiconductors, In—Ga—Sn—O based semiconductors, In—Ga—O based semiconductors, Zr—In—Zn—O based semiconductors, Hf—In—Zn—O based semiconductors, Al—Ga—Zn—O based semiconductors, Ga—Zn—O based semiconductors, In—Ga—Zn—Sn—O based semiconductors, InGaO 3 (ZnO) 5 , magnesium zinc oxide (Mg x Zn 1-x O), cadmium zinc oxide (Cd x Zn 1-x In the following description, the first TFT 9 a and the second TFT 9 b are described as p-type TFTs in which an impurity such as boron is doped into a semiconductor layer (polysilicon semiconductor layer) formed of a polysilicon film as a semiconductor film.
[0023] The first metal film, the second metal film, and the third metal film are composed of, for example, a metal single layer film such as molybdenum (Mo), titanium (Ti), aluminum (Al), copper (Cu), tungsten (W), an alloy such as MoW, or an alloy containing additives, or a metal laminate film such as Mo (upper layer) / Al (middle layer) / Mo (lower layer), Ti / Al / Ti, Al (upper layer) / Ti (lower layer), Cu / Mo, or Cu / Ti.
[0024] The planarization film 19 has a flat surface in the display region D, and is made of, for example, an organic resin material such as polyimide resin or acrylic resin, or a polysiloxane-based SOG (spin on glass) material.
[0025] As shown in FIG. 4 , the second TFT 9b is electrically connected to the corresponding first TFT 9a and power supply line 18g in each subpixel P. As shown in FIGS. 3A and 3B , the second TFT 9b includes a polysilicon semiconductor layer 12, a gate insulating film 13, a gate electrode 14a, an interlayer insulating film 15, a source electrode 18a, and a drain electrode 18b, which are sequentially provided on a base coat film 11. As shown in FIGS. 3A and 3B , the polysilicon semiconductor layer 12 is provided on the base coat film 11 in an island shape in a plan view. The polysilicon semiconductor layer 12 is doped with impurity ions, making a portion of the polysilicon semiconductor layer 12 conductive. As a result, the polysilicon semiconductor layer 12 includes a source region 12b and a drain region 12c, which are defined as conductive regions spaced apart from each other, and a channel region 12a defined between the source region 12b and the drain region 12c. A plurality of first TFTs 9a are electrically connected to the source regions 12b and drain regions 12c via corresponding gate lines 14 and source lines 18f (signal lines). A gate insulating film 13 is provided to cover the polysilicon semiconductor layer 12. A gate electrode 14a (first wiring layer) is provided on the gate insulating film 13 to cover the channel region 12a of the polysilicon semiconductor layer 12. The gate electrode 14a is configured to control conduction between the source region 12b and the drain region 12c of the polysilicon semiconductor layer 12. The gate electrode 14a is formed of a first metal film. An interlayer insulating film 15 is provided to cover the gate electrode 14a. A source electrode 18a and a drain electrode 18b (third wiring layer) are provided on the interlayer insulating film 15 to be spaced apart from each other. 3A and 3B, the source electrode 18a and the drain electrode 18b are electrically connected to the source region 12b and the drain region 12c of the polysilicon semiconductor layer 12, respectively, through contact holes Ha and Hb formed in the stacked film of the gate insulating film 13 and the interlayer insulating film 15. The source electrode 18a and the drain electrode 18b are formed of a third metal film.
[0026] 3A, 3B, and 5, in the organic EL display device 50 and the active matrix substrate 30 constituting the same, a conductive film S14 is provided around each second TFT 9b constituting the TFT layer 20. In the following description, the conductive film S14 and the modified examples described below will also be collectively referred to as the "conductive film S."
[0027] A plurality of conductive films S are provided corresponding to the plurality of second TFTs 9b. As shown in FIG. 6 , adjacent conductive films S may be electrically connected. In this case, the electrically connected conductive films S may be electrically floating or electrically connected to 0 V or GND. On the other hand, as shown in FIG. 7 , adjacent conductive films S may be formed independently (electrically disconnected from each other). In this case, each independent conductive film S may be electrically floating. Note that, from the viewpoint of the effect of suppressing disturbance of TFT behavior due to the conductive films S and achieving stabilization, it is preferable that adjacent conductive films S be electrically connected ( FIG. 6 ). Note that when the conductive films S are electrically connected to 0 V or GND, the connection may be within the display region D or outside the display region D (frame region F).
[0028] As shown in FIGS. 3A and 3B , the conductive film S14 is formed in the same layer as the gate electrode 14a and the gate line 14 (first wiring layer) using the same material. That is, the conductive film S14 is formed of a first metal film constituting the first wiring layer. As shown in FIG. 5 , the conductive film S14 is provided to surround the gate electrode 14a, except for a notch Sn that cuts out the first wiring layer (in FIG. 5 , the connection wiring that electrically connects the gate electrode 14a and the gate line 14) in the same layer provided near the gate electrode 14a. Specifically, the conductive film S14 is provided to surround at least the channel region 12a of the polysilicon semiconductor layer 12 that overlaps with the gate electrode 14a in a planar view. In other words, the conductive film S14 is provided in a frame shape along the periphery of the channel region 12a in a planar view.
[0029] (Modifications of Conductive Film S) The structure (material, shape, etc.) of the conductive film S is not limited to that of the conductive film S14, and may be modified as shown below.
[0030] As shown in FIGS. 8A and 8B , the conductive film S may be a conductive film S12 (Variation 1) formed in the same layer and made of the same material as the source region 12b and drain region 12c of the polysilicon semiconductor layer 12, in which portions of the polysilicon semiconductor layer 12 are made conductive. In this case, the conductive film S12 is formed of a polysilicon film (semiconductor film) constituting the polysilicon semiconductor layer 12 and is made conductive like the source region 12b and drain region 12c. As shown in FIG. 9 , the conductive film S12 is provided to surround at least the channel region 12a of the polysilicon semiconductor layer 12, except for notches Sn that cut out the source region 12b and drain region 12c in the same layer as the polysilicon semiconductor layer 12, which are located below the source electrode 18a and drain electrode 18b. In other words, the conductive film S12 is provided in a frame shape along the periphery of the channel region 12a in a plan view. Note that, when the semiconductor layer 12 is an oxide semiconductor layer made of an oxide semiconductor, the conductive film S12 may be formed of an oxide semiconductor film (its conductive region) constituting the oxide semiconductor layer.
[0031] As shown in FIGS. 10A and 10B , the conductive film S may be a conductive film S11a (Variation 2) formed on the PI substrate 10. Specifically, the conductive film S11a is interposed in and covered by the base coat film 11 below the semiconductor layer 12. That is, the conductive film S11a is provided between the PI substrate 10 and the semiconductor layer 12. Therefore, the conductive film S11a is formed by a lower metal film or lower semiconductor film provided separately from the above-mentioned metal film and semiconductor film. The lower metal film may be made of the same material as the above-mentioned first metal film, second metal film, third metal film, etc., and may have the same layer structure. The lower semiconductor film may be made of the same material as the above-mentioned conductive region of the low-temperature polysilicon film, oxide semiconductor film, etc., at least a portion of which is made conductive. 11 , the conductive film S11a is formed below the semiconductor layer 12 and is a different layer from (is not in the same layer as) the semiconductor layers and wiring layers that constitute the second TFT 9b, so there is no need to form a notch Sn. Therefore, the conductive film S11a is provided so as to surround at least the entire periphery of the channel region 12a of the polysilicon semiconductor layer 12 or the entire periphery of the second TFT 9b. In other words, the conductive film S11a is provided in a frame shape along the periphery of the channel region 12a or the second TFT 9b in a plan view.
[0032] As shown in FIGS. 12A, 12B, and 13, the conductive film S may be a conductive film S11b (Variation 3) formed on the PI substrate 10, similar to the conductive film S11a. Like the conductive film S11a, the conductive film S11b is formed below the semiconductor layer 12 and is a different layer from the semiconductor layers and wiring layers constituting the second TFT 9b. Therefore, the conductive film S11b may be provided so as to cover at least the entire channel region 12a (entire surface) of the polysilicon semiconductor layer 12 or the entire second TFT 9b. In this case, the conductive film S11b is provided so as to overlap at least the entire channel region 12a of the polysilicon semiconductor layer 12 or the entire second TFT 9b in a planar view. In other words, the conductive film S11b is provided in an island shape having a size (area) equal to or larger than that of the channel region 12a or the second TFT 9b in a planar view.
[0033] 14A , 14B , and 15 , the conductive film S may be a conductive film S11c (Variation 4) formed on the PI substrate 10, similar to the conductive film S11a. Similar to the conductive films S11a and S11b, the conductive film S11c is formed below the semiconductor layer 12 and is a layer different from the semiconductor layers and wiring layers that constitute the second TFT 9b. Therefore, the conductive film S11c may be provided so as to cover the entire TFT layer 20 (entire surface), the entire display region D, or the entire display panel including the display region D and the frame region F. In this case, the conductive film S11c is provided so as to overlap the entire display region D or the entire display panel in a planar view.
[0034] In conventional active matrix substrates, as described above, when the PI substrate is polarized by the influence of an electric field or light, the threshold value of the TFT shifts and behavior becomes unstable. To address this problem, in the active matrix substrate 30, one of the conductive films S14, S12, S11a, S11b, and S11c shields the electric field between the gate and source. This weakens the polarization of the PI substrate 10 and protects against electrical influences from oriented dipoles. Furthermore, the conductive films S11b and S11c also block or attenuate light. Therefore, among the conductive films S, the conductive films S11b and S11c are preferred from the viewpoint of reducing the influence of the electric field and light.
[0035] The second TFT 9b configured as described above is exemplified by a p-channel TFT such as a driving TFT. The driving TFT is configured to control the current of the organic EL element 25 described below. Since the driving TFT affects the brightness of the organic EL element 25, it is preferable that the second TFT 9b be configured with a conductive film S in order to suppress disturbances in the behavior of the driving TFT and achieve stabilization. Note that the second TFTs 9b other than the driving TFT are switching TFTs, and therefore may or may not be configured with a conductive film S.
[0036] As shown in FIG. 4 , the first TFT 9a is electrically connected to the corresponding gate line 14 and source line 18f (signal wiring) in each subpixel P. The first TFT 9a includes a semiconductor layer, a gate insulating film, a gate electrode, an interlayer insulating film, a source electrode, and a drain electrode, and has a structure similar to that of the second TFT 9b described above. The semiconductor layer is formed, for example, of a low-temperature polysilicon film or an oxide semiconductor film such as In—Ga—Zn—O. The first TFT 9a configured as described above is exemplified by a p-channel TFT such as a writing TFT. Note that the first TFT 9a such as a writing TFT is a switching TFT, and therefore may or may not include a conductive film S.
[0037] In this embodiment, the first TFT 9a and the second TFT 9b are illustrated as top-gate type TFTs, but the first TFT 9a and the second TFT 9b may be bottom-gate type TFTs. The second TFT 9b is preferably a top-gate type TFT.
[0038] 4, in each subpixel P, the capacitor 9c is electrically connected to the corresponding first TFT 9a and power supply line 18g. Here, the capacitor 9c includes, for example, a lower conductive layer (first wiring layer) formed of a first metal film, a first interlayer insulating film provided so as to cover the lower conductive layer, and an upper conductive layer (second wiring layer) formed of a second metal film and provided on the first interlayer insulating film so as to overlap the lower conductive layer. The upper conductive layer 16 is electrically connected to the power supply line 18g, for example, via a contact hole formed in the second interlayer insulating film.
[0039] As shown in FIG. 3A (also see FIGS. 8A, 10A, 12A, and 14A), the organic EL display device 50 includes an organic EL element layer 31 provided as a light-emitting element layer constituting the display region D as an upper layer of the TFT layer 20 constituting the active matrix substrate 30, and a sealing film 35 provided on the organic EL element layer 31.
[0040] As shown in FIG. 3A, the organic EL element layer 31 includes a plurality of organic EL elements 25 as a plurality of light-emitting elements arranged in a matrix corresponding to a plurality of sub-pixels P.
[0041] 3A , the organic EL element 25 includes a plurality of first electrodes 21 provided in order on the planarization film 19, a plurality of organic EL layers 23 provided on the first electrodes 21 in respective sub-pixels P, and a second electrode 24 provided on the organic EL layer 23 in common to the plurality of sub-pixels P. In addition, as shown in FIG. 3A , the organic EL element 25 is covered with a sealing film 35.
[0042] 3A , the first electrodes 21 are provided in a matrix on the planarization film 19 so as to correspond to the plurality of sub-pixels P. Each first electrode 21 is electrically connected to the drain electrode (or source electrode) of each second TFT 9 b via a contact hole formed in the planarization film 19. The first electrodes 21 have the function of injecting holes into the organic EL layer 23. In order to improve the efficiency of hole injection into the organic EL layer 23, it is more preferable that the first electrodes 21 be made of a material with a large work function. Here, examples of materials constituting the first electrode 21 include metal materials such as silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), gold (Au), titanium (Ti), ruthenium (Ru), manganese (Mn), indium (In), ytterbium (Yb), lithium fluoride (LiF), platinum (Pt), palladium (Pd), molybdenum (Mo), iridium (Ir), and tin (Sn). Examples of materials constituting the first electrode 21 include astatine (At) / astatine oxide (AtO 2 ) or an alloy thereof. Furthermore, the material constituting the first electrode 21 may be, for example, a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), or indium zinc oxide (IZO). The first electrode 21 may also be formed by stacking multiple layers made of the above materials. Examples of compound materials with a large work function include indium tin oxide (ITO) and indium zinc oxide (IZO).
[0043] The peripheral edge of the first electrode 21 is covered with an edge cover 22 provided in a lattice pattern and shared by multiple sub-pixels P. Examples of materials that form the edge cover 22 include positive photosensitive resin materials such as polyimide resin, acrylic resin, polysiloxane resin, and novolac resin, as well as polysiloxane-based SOG materials. As shown in FIG. 3A , a portion of the surface of the edge cover 22 protrudes upward in the drawing and serves as an island-shaped pixel photospacer.
[0044] 3A, the organic EL layer 23 is disposed on each first electrode 21, and is provided in a matrix so as to correspond to a plurality of sub-pixels P. Here, each organic EL layer 23 includes a hole injection layer 1, a hole transport layer 2, a light-emitting layer 3, an electron transport layer 4, and an electron injection layer 5, which are provided in this order on the first electrode 21, as shown in FIG.
[0045] The hole injection layer 1 is also called an anode buffer layer, and has the function of bringing the energy levels of the first electrode 21 and the organic EL layer 23 closer to each other, thereby improving the efficiency of hole injection from the first electrode 21 to the organic EL layer 23. Examples of materials constituting the hole injection layer 1 include triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, phenylenediamine derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, and stilbene derivatives.
[0046] The hole transport layer 2 has a function of improving the efficiency of transporting holes from the first electrode 21 to the organic EL layer 23. Examples of materials constituting the hole transport layer 2 include porphyrin derivatives, aromatic tertiary amine compounds, styrylamine derivatives, polyvinylcarbazole, poly-p-phenylenevinylene, polysilane, triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, pyrazolone derivatives, phenylenediamine derivatives, arylamine derivatives, amine-substituted chalcone derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, stilbene derivatives, hydrogenated amorphous silicon, hydrogenated amorphous silicon carbide, zinc sulfide, and zinc selenide.
[0047] The light-emitting layer 3 is a region into which holes and electrons are injected from the first electrode 21 and the second electrode 24, respectively, and where the holes and electrons recombine when a voltage is applied between the first electrode 21 and the second electrode 24. The light-emitting layer 3 is made of a material with high luminous efficiency. Examples of materials that can be used for the light-emitting layer 3 include metal oxinoid compounds (8-hydroxyquinoline metal complexes), naphthalene derivatives, anthracene derivatives, diphenylethylene derivatives, vinylacetone derivatives, triphenylamine derivatives, butadiene derivatives, coumarin derivatives, benzoxazole derivatives, oxadiazole derivatives, oxazole derivatives, benzimidazole derivatives, thiadiazole derivatives, benzthiazole derivatives, styryl derivatives, styrylamine derivatives, bisstyrylbenzene derivatives, trisstyrylbenzene derivatives, perylene derivatives, perinone derivatives, aminopyrene derivatives, pyridine derivatives, rhodamine derivatives, aquidin derivatives, phenoxazone, quinacridone derivatives, rubrene, poly-p-phenylenevinylene, and polysilane.
[0048] The electron transport layer 4 has a function of efficiently transferring electrons to the light-emitting layer 3. Examples of materials constituting the electron transport layer 4 include organic compounds such as oxadiazole derivatives, triazole derivatives, benzoquinone derivatives, naphthoquinone derivatives, anthraquinone derivatives, tetracyanoanthraquinodimethane derivatives, diphenoquinone derivatives, fluorenone derivatives, silole derivatives, and metal oxinoid compounds.
[0049] The electron injection layer 5 has a function of bringing the energy levels of the second electrode 24 and the organic EL layer 23 closer to each other and improving the efficiency of electron injection from the second electrode 24 to the organic EL layer 23, and this function can reduce the driving voltage of the organic EL element 25. The electron injection layer 5 is also called a cathode buffer layer. Here, examples of materials constituting the electron injection layer 5 include lithium fluoride (LiF), magnesium fluoride (MgF 2 ), calcium fluoride (CaF 2 ), strontium fluoride (SrF 2 ), barium fluoride (BaF 2 inorganic alkali compounds such as aluminum oxide (Al 2 O 3 ), strontium oxide (SrO), etc.
[0050] 3A , the second electrode 24 is provided to cover each organic EL layer 23 and the edge cover 22. The second electrode 24 has a function of injecting electrons into the organic EL layer 23. The second electrode 24 is preferably made of a material with a small work function to improve the efficiency of electron injection into the organic EL layer 23. Examples of materials that can be used for the second electrode 24 include silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), gold (Au), calcium (Ca), titanium (Ti), yttrium (Y), sodium (Na), ruthenium (Ru), manganese (Mn), indium (In), magnesium (Mg), lithium (Li), ytterbium (Yb), and lithium fluoride (LiF). The second electrode 24 may be made of, for example, magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), or astatine (At) / astatine oxide (AtO 2 The second electrode 24 may be formed of an alloy such as lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), or lithium fluoride (LiF) / calcium (Ca) / aluminum (Al). The second electrode 24 may be formed of a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), or indium zinc oxide (IZO). The second electrode 24 may be formed by stacking multiple layers made of the above materials. Examples of materials with a low work function include magnesium (Mg), lithium (Li), lithium fluoride (LiF), magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), and lithium fluoride (LiF) / calcium (Ca) / aluminum (Al).
[0051] 3A, the sealing film 35 includes a first sealing inorganic insulating film 32 provided to cover the second electrode 24, a sealing organic film 33 provided on the first sealing inorganic insulating film 32, and a second sealing inorganic insulating film 34 provided to cover the sealing organic film 33, and has a function of protecting the organic EL layer 23 from moisture, oxygen, etc. Here, the first sealing inorganic insulating film 32 and the second sealing inorganic insulating film 34 are made of, for example, silicon oxide (SiO 2 ) and aluminum oxide (Al 2 O 3 ), trisilicon tetranitride (Si 3 N 4 The sealing organic film 33 is made of an inorganic material such as silicon nitride (SiNx (x is a positive number)) or silicon carbonitride (SiCN). The sealing organic film 33 is made of an organic material such as acrylic resin, polyurea resin, parylene resin, polyimide resin, or polyamide resin.
[0052] The organic EL display device 50 described above is configured such that, in each subpixel P, a gate signal is input to the first TFT 9a via the gate line 14 to turn the first TFT 9a on, a data signal is written to the gate electrode of the second TFT 9b and the capacitor 9c via the source line 18f, and a current from the power supply line 18g corresponding to the gate voltage of the second TFT 9b is supplied to the organic EL layer 23, causing the light-emitting layer 3 of the organic EL layer 23 to emit light, thereby displaying an image. Note that in the organic EL display device 50, even if the first TFT 9a is turned off, the gate voltage of the second TFT 9b is held by the capacitor 9c, so that light emission by the light-emitting layer 3 is maintained until a gate signal for the next frame is input.
[0053] Next, a method for manufacturing the active matrix substrate 30 of this embodiment will be described. The method for manufacturing the active matrix substrate 30 includes a resin substrate forming step and a TFT layer forming step.
[0054] <Resin substrate forming process> For example, a non-photosensitive polyimide resin is applied onto a support substrate (not shown) such as a glass substrate, and then the applied film is pre-baked and post-baked to form a PI substrate 10 as the resin substrate 10.
[0055] <TFT Layer Forming Process> The TFT layer forming process is a process of forming a TFT layer 20 on the PI substrate 10. For example, a base coat film 11, a first TFT 9a, a second TFT 9b, a capacitor 9c, a planarization film 19, etc. are formed on the surface of the PI substrate 10 formed on a glass substrate using a well-known method. Here, the TFT layer forming process of this embodiment includes a base coat film forming process, a polysilicon semiconductor layer forming process, a gate insulating film forming process, a gate electrode forming process, a doping process, an interlayer insulating film forming process, a contact hole forming process, a signal wiring forming process, and a planarization film forming process.
[0056] (Base Coat Film Formation Process) A silicon oxide film (thickness: about 250 nm) and a silicon nitride film (thickness: about 50 nm) are sequentially formed on the PI substrate 10 by, for example, plasma CVD (Chemical Vapor Deposition) to form a SiNx (upper layer) / SiO 2 A base coat film is formed by laminating films such as a base coat film (lower layer) and a base coat film (lower layer).
[0057] (Polysilicon semiconductor layer formation process) An amorphous silicon film (about 50 nm thick) is formed on the substrate surface on which the base coat film 11 has been formed, for example, by plasma CVD, and the amorphous silicon film is crystallized by laser annealing or the like to form a polysilicon film made of polysilicon.The polysilicon film is then patterned to form the polysilicon semiconductor layer 12.
[0058] When the conductive film S12 is employed as the conductive film S, the conductive film S12 may be formed when forming the polysilicon semiconductor layer 12. In this case, the polysilicon film is patterned so as to surround at least the channel region 12a, except for notches Sn that cut out the source region 12b and the drain region 12c, which will be formed in a doping step described later.
[0059] (Gate insulating film forming process) A silicon oxide film (with a thickness of about 100 nm) is formed on the substrate surface on which the polysilicon semiconductor layer 12 (and the conductive film S12, if necessary) is formed, for example, by plasma CVD, and then the silicon oxide film is patterned to cover the polysilicon semiconductor layer 12 (and the conductive film S12, if necessary) to form the gate insulating film 13.
[0060] (Gate electrode formation process) A first metal film such as a molybdenum film (thickness: about 200 nm) is formed on the surface of the substrate on which the gate insulating film 13 is formed, for example, by sputtering, and then the first metal film is patterned to form a first wiring layer such as the gate electrode 14 a and the gate line 14.
[0061] When the conductive film S14 is used as the conductive film S, the conductive film S14 may be formed when the first wiring layer is formed. In this case, the first metal film is patterned so as to surround at least the channel region 12a, except for a notch Sn that cuts out the first wiring layer (the connection wiring between the gate electrode 14a and the gate line 14) near the gate electrode 14a.
[0062] (Doping Process) Using the gate electrode 14a as a mask, the polysilicon semiconductor layer 12 is doped with impurity ions to make a part of the polysilicon semiconductor layer 12 conductive, thereby forming a source region 12b, a drain region 12c, and a channel region 12a in the polysilicon semiconductor layer 12.
[0063] At this time, if the conductive film S12 is formed in the polysilicon semiconductor layer forming step, a part of it (preferably the whole) is made conductive.
[0064] (Interlayer insulating film forming process) At least one interlayer insulating film is formed on the substrate surface (the substrate surface on which a portion of the polysilicon semiconductor layer 12 has been made conductive) on which the gate electrode 14a (and the conductive film S14, if necessary) has been formed. A first interlayer insulating film is formed on the substrate surface by sequentially depositing a silicon nitride film (about 150 nm thick) and a silicon oxide film (about 100 nm thick) by, for example, plasma CVD. Subsequently, a second interlayer insulating film is formed on the substrate surface on which the first interlayer insulating film has been formed by depositing a silicon oxide film (about 100 nm thick) by, for example, plasma CVD. This forms the interlayer insulating film 15, which is a stacked film of the first interlayer insulating film and the second interlayer insulating film.
[0065] (Contact hole formation process) In the display region D on the substrate surface on which the interlayer insulating film 15 is formed, the gate insulating film 13 and the interlayer insulating film 15 are appropriately patterned, for example by dry etching, to form contact holes Ha and Hb that expose at least a portion of the surface of the source region 12b and the drain region 12c in the polysilicon semiconductor layer 12.
[0066] (Signal wiring formation process) On the substrate surface on which the contact holes Ha and Hb have been formed, a titanium film (thickness: about 50 nm), an aluminum film (thickness: about 400 nm), and a titanium film (thickness: about 200 nm) are sequentially formed by, for example, a sputtering method to form a third metal film, and then the third metal film is patterned to form a third wiring layer including the source line 18f, the source electrode 18a, the drain electrode 18b, and the power line 18g.
[0067] (Planarization film formation process) An acrylic photosensitive resin film (about 2 μm thick) is applied to the substrate surface on which the source lines 18 f and the like are formed, for example, by spin coating or slit coating, and then the applied film is pre-baked, exposed to light, developed, and post-baked to form the planarization film 19.
[0068] <Other Steps in the TFT Layer Forming Step> When any of the conductive films S11a, S11b, and S11c is used as the conductive film S, the TFT layer forming step may include a conductive film forming step before the base coat film forming step.
[0069] (Conductive Film Forming Process) After forming a lower metal film on the PI substrate 10 by, for example, sputtering, the lower metal film may be patterned to surround at least the entire periphery of the channel region 12a of the polysilicon semiconductor layer 12 or the entire periphery of the second TFT 9b to form the conductive film S11a. The pattern shape of the lower metal film may be changed and patterned to overlap at least the entire channel region 12a of the polysilicon semiconductor layer 12 or the entire second TFT 9b in a planar view to form the conductive film S11b. The pattern shape of the lower metal film may be changed and patterned to overlap the entire display region D or the entire display panel in a planar view to form the conductive film S11c.
[0070] In place of the lower metal film, a lower semiconductor film such as InGaZnO 4 After forming an oxide semiconductor film made of an oxide semiconductor such as a film (thickness: about 30 nm), the oxide semiconductor film may be patterned in the same manner as above to form the conductive films S11a, S11b, and S11c. In this case, in the subsequent base coat film formation step, a heat treatment is performed after the base coat film 11 is formed to make part (preferably all) of the conductive films S11a, S11b, and S11c conductive.
[0071] In this manner, the active matrix substrate 30 can be manufactured. The method for manufacturing the organic EL display device 50 including the active matrix substrate 30 includes an organic EL element layer forming step and a sealing film forming step.
[0072] <Organic EL element layer forming process> On the planarization film 19 of the TFT layer 20 formed in the TFT layer forming process, a first electrode 21, an edge cover 22, an organic EL layer 23 (hole injection layer 1, hole transport layer 2, light-emitting layer 3, electron transport layer 4, electron injection layer 5), and a second electrode 24 are formed using a well-known method to form an organic EL element 25, thereby forming an organic EL element layer 31.
[0073] <Sealing Film Forming Process> First, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is deposited by plasma CVD using a CMM as a deposition mask on the substrate surface on which the organic EL element layer 31 formed in the organic EL element layer forming process is formed, covering each organic EL element 25, to form a first sealing inorganic insulating film 32. Subsequently, an organic resin material such as an acrylic resin is deposited on the first sealing inorganic insulating film 32 by, for example, an inkjet method, to form a sealing organic film 33. Thereafter, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is deposited by plasma CVD using a CMM as a deposition mask, covering the sealing organic film 33, to form a second sealing inorganic insulating film 34, thereby forming a sealing film 35. Through the above processes, a sealing film 35 can be formed in the display region D, in which the first sealing inorganic insulating film 32, the sealing organic film 33, and the second sealing inorganic insulating film 34 are stacked in this order.
[0074] Finally, a protective sheet (not shown) is attached to the surface of the substrate, and then laser light is irradiated from the glass substrate side of the PI substrate 10 to peel the glass substrate from the underside of the PI substrate 10, and a protective sheet (not shown) is attached to the underside of the PI substrate 10 from which the glass substrate has been peeled. In this manner, the organic EL display device 50 can be manufactured.
[0075] <Effects> As described above, the active matrix substrate 30 of this embodiment and the organic EL display device 50 including the same can provide the following effects: The active matrix substrate 30 includes, on the PI substrate 10, a TFT layer 20 provided with a plurality of second TFTs 9 b each having a polysilicon semiconductor layer 12, and includes a plurality of conductive films S corresponding to the second TFTs 9 b, each of which includes any one of conductive films S14, S12, and S11 a surrounding at least the channel region 12 a of the polysilicon semiconductor layer 12; a conductive film S11 b covering at least the entire channel region 12 a (or each second TFT 9 b); and a conductive film S11 c covering the entire TFT layer 20. The conductive film S forms electric field shielding wiring (connected to 0 V or GND, or electrically floating) made of a metal or semiconductor with electrical shielding properties between the PI substrate 10 and the pixel circuit C (the second TFT 9b constituting the pixel circuit C). This prevents charging due to the orientation of dipoles resulting from the polarity of the PI substrate 10 caused by the electric field within the pixel circuit C. As a result, the second TFT 9b is prevented from being disturbed (i.e., its threshold voltage (Vth) is shifted) due to polarization of the PI substrate 10, thereby stabilizing its threshold characteristics. Furthermore, in an organic EL display device 50 including an active matrix substrate 30, the conductive film S improves the reliability of the second TFT 9b, stabilizing the driving TFT that sends current to the organic EL element 25 and thereby maintaining a constant light emission intensity of the organic EL element 25. This reduces the occurrence of image retention due to the polarity of the PI substrate 10, improving visibility (display performance).
[0076] Second Embodiment Next, a second embodiment of the present invention will be described with reference to FIGS. 17A to 26. In the second embodiment, an X-ray sensor device 500 is exemplified as an image sensor device including an active matrix substrate 300. FIG. 17A is a cross-sectional view of the X-ray sensor device 500 of this embodiment. FIG. 17B is a cross-sectional view taken along line XVII-XVII in FIG. 18. FIG. 18 is a plan view showing a TFT 90 constituting the X-ray sensor device 500. FIG. 19A is a cross-sectional view of the X-ray sensor device 500, corresponding to FIG. 17A. FIG. 19B is a cross-sectional view taken along line XIX-XIX in FIG. 20, corresponding to FIG. 17B. FIG. 20 is a plan view showing a first modification of the TFT 90 constituting the X-ray sensor device 500, corresponding to FIG. 18. FIG. 21A is a cross-sectional view of the X-ray sensor device 500, corresponding to FIG. 17A. FIG. 21B is a cross-sectional view taken along line XXI-XXI in FIG. 22 and corresponds to FIG. 17B. FIG. 22 is a plan view showing Modification 2 of the TFT 90 constituting the X-ray sensor device 500 and corresponds to FIG. 18. FIG. 23A is a cross-sectional view of the X-ray sensor device 500 and corresponds to FIG. 17A. FIG. 23B is a cross-sectional view taken along line XXIII-XXIII in FIG. 24 and corresponds to FIG. 17B. FIG. 24 is a plan view showing Modification 3 of the TFT 90 constituting the X-ray sensor device 500 and corresponds to FIG. 18. FIG. 25A is a cross-sectional view of the X-ray sensor device 500 and corresponds to FIG. 17A. FIG. 25B is a cross-sectional view taken along line XXV-XXV in FIG. 26 and corresponds to FIG. 17B. FIG. 26 is a plan view showing Modification 4 of the TFT 90 constituting the X-ray sensor device 500 and corresponds to FIG. 18. 18, 20, 22, 24 and 26, the upper layer of a photodiode 180, which will be described later, is omitted.
[0077] As shown in Figures 17A and 17B (see also Figures 19A, 19B, 21A, 21B, 23A, 23B, 25A and 25B), the active matrix substrate 300 constituting the X-ray sensor device 500 includes a flexible resin substrate 100 provided as a base substrate, and a TFT layer 200 provided on the resin substrate 100.
[0078] The resin substrate 100 is made of an organic resin material such as polyimide (PI) resin, similar to the resin substrate 10. In the following, the resin substrate 100 will be described as a PI substrate 100 made of PI.
[0079] 17A and 17B , the TFT layer 200 includes a base coat film 110 provided on a PI substrate 100, a plurality of TFTs 90 and a plurality of capacitors (not shown) provided on the base coat film 110, and a planarization film 170 provided on each TFT 90 and each capacitor. Here, in the TFT layer 20, as shown in FIGS. 17A and 17B , the base coat film 110, a first metal film serving as a first wiring layer for gate lines (not shown), gate electrodes 120, etc., a gate insulating film 130, a semiconductor film serving as a semiconductor layer 140, a second metal film serving as a second wiring layer for source lines (not shown), source electrodes 150 a, drain electrodes 150 b, power lines (not shown), etc., a first interlayer insulating film 160, and the planarization film 170 are sequentially stacked on the PI substrate 100.
[0080] The base coat film 110, the gate insulating film 130, and the first interlayer insulating film 160 may be made of, for example, silicon nitride (SiNx (x is a positive number)), silicon oxide (SiO 2 ), silicon oxynitride (SiON), or other inorganic insulating films, may be used as a single layer or multilayer film.
[0081] The semiconductor film is made of, for example, a low-temperature polysilicon film such as LTPS (low temperature polysilicon), an oxide semiconductor film such as In—Ga—Zn—O, etc. In the following, the TFT 90 will be described as a p-type TFT having a semiconductor layer (oxide semiconductor layer) formed of an oxide semiconductor film as the semiconductor film.
[0082] The first metal film, the second metal film, and the third metal film described below are composed of, for example, a metal single layer film such as molybdenum (Mo), titanium (Ti), aluminum (Al), copper (Cu), tungsten (W), an alloy such as MoW, or an alloy containing additives, or a metal laminate film such as Mo (upper layer) / Al (middle layer) / Mo (lower layer), Ti / Al / Ti, Al (upper layer) / Ti (lower layer), Cu / Mo, or Cu / Ti.
[0083] The planarization film 170 has a flat surface and is made of, for example, an organic resin material such as polyimide resin or acrylic resin, or a polysiloxane-based SOG (spin on glass) material.
[0084] The TFT 90 includes a gate electrode 120, a gate insulating film 130, an oxide semiconductor layer 140, a source electrode 150a, and a drain electrode 150b, which are provided in this order on a base coat film 110. In other words, the TFT 90 can be said to be a bottom-gate (inverse staggered) TFT.
[0085] 17A and 17B , the gate electrode 120 (first wiring layer) is provided on the base coat film 110 so as to overlap with a channel region 140a of an oxide semiconductor layer 140 described later. The gate electrode 120 is configured to control conduction between a source region 140b and a drain region 140c of the oxide semiconductor layer 140 described later. The gate electrode 120 is formed of a first metal film.
[0086] As shown in FIGS. 17A and 17B, the gate insulating film 130 is provided so as to cover the gate electrode 120 .
[0087] 17A and 17B , the oxide semiconductor layer 140 is provided on the gate insulating film 130 in an island shape in a plan view. A portion of the oxide semiconductor layer 140 is made conductive by heat treatment. As a result, the oxide semiconductor layer 140 has a source region 140b and a drain region 140c that are defined as conductive regions and spaced apart from each other, and a channel region 140a that is defined between the source region 140b and the drain region 140c. A plurality of TFTs 90 are electrically connected to the source region 140b and the drain region 140c via corresponding gate lines and source lines (signal wiring).
[0088] 17A and 17B , the source electrode 150a and the drain electrode 150b (second wiring layer) are provided on the oxide semiconductor layer 140 or the gate insulating film 130 so as to be spaced apart from each other, and are electrically connected to the source region 140b and the drain region 140c, respectively, of the oxide semiconductor layer 140. The source electrode 150a and the drain electrode 150b are formed of a second metal film.
[0089] 17A, 17B, and 18, in the X-ray sensor device 500 and the active matrix substrate 300 constituting the same, a conductive film S140 is provided around each TFT 90 constituting the TFT layer 200. Note that all of the matters described in the "conductive film S" in the first embodiment above also apply to this embodiment.
[0090] 17A and 17B , the conductive film S140 is formed in the same layer and made of the same material as the source region 140b and the drain region 140c, which are portions of the oxide semiconductor layer 140 that have been made conductive. That is, the conductive film S140 is formed from the oxide semiconductor film that constitutes the oxide semiconductor layer 140 and is made conductive like the source region 140b and the drain region 140c. As shown in FIG. 18 , the conductive film S140 is provided to surround at least the channel region 140a of the oxide semiconductor layer 140, except for notches Sn that cut out the source region 140b and the drain region 140c, which are in the same layer as the oxide semiconductor layer 140 and are located below the source electrode 150a and the drain electrode 150b. In other words, the conductive film S140 is provided in a frame shape along the periphery of the channel region 140a in a plan view. When the semiconductor layer 12 is a polysilicon semiconductor layer made of polysilicon, the conductive film S140 may be formed of a polysilicon film (its conductor region) that constitutes the polysilicon semiconductor layer.
[0091] (Modifications of Conductive Film S) The structure (material, shape, etc.) of the conductive film S is not limited to that of the conductive film S140, and may be modified as shown below.
[0092] 19A and 19B, the conductive film S may be a conductive film S120 (Variation 1) formed in the same layer as the gate electrode 120 (first wiring layer) using the same material. In this case, the conductive film S120 is formed of a first metal film constituting the first wiring layer. As shown in FIG. 20, the conductive film S120 is provided so as to surround at least the channel region 140a of the oxide semiconductor layer 140, except for a notch Sn that cuts out the first wiring layer in the same layer provided near the gate electrode 120. In other words, the conductive film S120 is provided in a frame shape along the periphery of the channel region 140a in a plan view.
[0093] As shown in FIGS. 21A and 21B , the conductive film S may be a conductive film S110a (Variation 2) formed on the PI substrate 100. Specifically, the conductive film S110a is interposed in and covered by the base coat film 110 below the gate electrode 120. That is, the conductive film S110a is provided between the PI substrate 100 and the gate electrode 120. Therefore, the conductive film S110a is formed by a lower metal film or lower semiconductor film provided separately from the above-mentioned metal film and semiconductor film. The lower metal film may be made of the same material as the above-mentioned first metal film, second metal film, etc., and may have the same layer structure. The lower semiconductor film may be made of the same material as the above-mentioned conductive region of the low-temperature polysilicon film, oxide semiconductor film, etc., at least a portion of which is made conductive. 22 , the conductive film S110a is formed below the gate electrode 120 and is a different layer from (is not in the same layer as) the semiconductor layers and wiring layers that constitute the TFT 90, so there is no need to form a notch Sn. Therefore, the conductive film S110a is provided so as to surround at least the entire periphery of the channel region 140a of the oxide semiconductor layer 140 or the entire periphery of the TFT 90. In other words, the conductive film S110a is provided in a frame shape along the periphery of the channel region 140a or the TFT 90 in a plan view.
[0094] 23A, 23B, and 24, the conductive film S may be a conductive film S110b (Variation 3) formed on the PI substrate 100, similar to the conductive film S110a. Like the conductive film S110a, the conductive film S110b is formed below the gate electrode 120 and is a layer different from the semiconductor layers and wiring layers constituting the TFT 90. Therefore, the conductive film S110b may be provided so as to cover at least the entire channel region 140a of the oxide semiconductor layer 140 or the entire TFT 90. In this case, the conductive film S110b is provided so as to overlap at least the entire channel region 140a of the oxide semiconductor layer 140 or the entire TFT 90 in a planar view. In other words, the conductive film S110b is provided in an island shape having a size (area) equal to or larger than the channel region 140a or the TFT 90 in a planar view.
[0095] 25A, 25B, and 26, the conductive film S may be a conductive film S110c (variation 4) formed on the PI substrate 100, similar to the conductive film S110a. Similar to the conductive films S110a and S110b, the conductive film S110c is formed below the gate electrode 120 and is a layer different from the semiconductor layers and wiring layers that constitute the TFT 90. Therefore, the conductive film S110c may be provided so as to cover the entire TFT layer 200, the entire display region D, or the entire display panel including the display region D and the frame region F. In this case, the conductive film S110c is provided so as to overlap the entire display region D or the entire display panel in a planar view.
[0096] In a conventional active matrix substrate, as described above, the polarity of the PI substrate causes the TFT threshold (Vth) to shift and change to depletion characteristics. To address this problem, the active matrix substrate 300 includes one of the conductive films S140, S120, S110a, S110b, and S110c, which stabilizes the threshold characteristics of the TFT 90.
[0097] The method for manufacturing the active matrix substrate 300 of this embodiment is the same as the method for manufacturing the active matrix substrate 30 described above.
[0098] As shown in FIG. 17A (see also FIGS. 19A, 21A, 23A, and 25A), the X-ray sensor device 500 includes, as upper layers of the TFT layer 200 constituting the active matrix substrate 300, a photodiode 180, a second interlayer insulating film 190, a third metal film that becomes the bias line (third wiring layer) 210, and a scintillator Sc.
[0099] The photodiode 180 is a PIN-type photodiode made of amorphous silicon (a-Si). As shown in Fig. 17A, the photodiode 180 is composed of a laminated film in which a lower electrode 181, an n-type a-Si film 182, an i-type a-Si film 183, a p-type a-Si film 184, and an upper electrode 185 are laminated in this order. The lower electrode 181 is electrically connected to each TFT 90 (the drain electrodes 150b constituting the TFTs 90) and each capacitor formed on the PI substrate 100 via contact holes Hc formed in the first interlayer insulating film 160 and the planarizing film 170.
[0100] The scintillator Sc converts incident radiation X, such as irradiated X-rays, into fluorescence (scintillation light) ScL and emits the light. As shown in Fig. 17A, the scintillator Sc is disposed adjacent to and above the photodiode 180. The scintillator Sc is electrically connected to the upper electrode 185 that constitutes the photodiode 180 via contact holes Hd formed in the second interlayer insulating film 190.
[0101] In the X-ray sensor device 500 configured as described above, radiation X such as X-rays that has passed through a specimen such as a human body or a non-destructive part strikes the scintillator Sc, and the emitted fluorescence ScL is converted into an electric signal by the photodiode 180 and stored in the capacitor. This is controlled by turning the TFT 90 on and off, and the signal obtained as digital data is converted into an image.
[0102] <Effects> As described above, the active matrix substrate 300 of this embodiment and the X-ray sensor device 500 including the same can provide the same effects as the active matrix substrate 30 and the organic EL display device 50 including the same described above.
[0103] Other Embodiments In the first embodiment, the organic EL layer has been exemplified as having a five-layer laminate structure of a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. However, the organic EL layer may have a three-layer laminate structure of, for example, a hole injection layer / hole transport layer, a light-emitting layer, and an electron transport layer / electron injection layer.
[0104] In the first embodiment, an organic EL display device in which the first electrode is an anode and the second electrode is a cathode is exemplified. However, the present invention can also be applied to an organic EL display device in which the layered structure of the organic EL layer is reversed, and the first electrode is a cathode and the second electrode is an anode.
[0105] In the first embodiment, an organic EL display device is exemplified in which the electrode of the TFT connected to the first electrode is used as the drain electrode, but the present invention can also be applied to an organic EL display device in which the electrode of the TFT connected to the first electrode is called the source electrode.
[0106] In the first embodiment, an organic EL display device is used as the display device, but the present invention can also be applied to display devices such as an active matrix driving liquid crystal display device.
[0107] In the first embodiment, an organic EL display device has been described as an example of the display device, but the present invention is not limited to organic EL display devices and can be applied to any flexible display device. For example, the present invention can be applied to a flexible display device including a quantum-dot light emitting diode (QLED), which is a light emitting element using a quantum dot-containing layer.
[0108] In the second embodiment, an X-ray sensor device has been described as an example of an image sensor device, but the present invention is not limited to X-ray sensor devices. For example, the present invention can be applied to an image sensor such as a scanner that does not have a scintillator and has a structure sealed with a material that transmits visible light, such as glass or acrylic resin.
[0109] As described above, the present invention is useful for flexible display devices and image sensors.
[0110] S Conductive film S11a, S11b, S11c, S12, S14 Conductive film 9a First TFT (thin film transistor) 9b Second TFT (thin film transistor) 10 PI substrate (resin substrate) 11 Base coat film 12 Polysilicon semiconductor layer (semiconductor layer) 12a Channel region 12b Source region (conductor region) 12c Drain region (conductor region) 13 Gate insulating film 14a Gate electrode 20 TFT layer (thin film transistor layer) 25 Organic EL element (organic electroluminescence element, light-emitting element) 30 Active matrix substrate 31 Organic EL element layer (light-emitting element layer) 35 Sealing film 50 Organic EL display device S110a, S110b, S110c, S120, S140 Conductive film 90 TFT (thin film transistor) 100 PI substrate (resin substrate) 110 REFERENCE SIGNS LIST 120 Base coat film 120 Gate electrode 130 Gate insulating film 140 Oxide semiconductor layer (semiconductor layer) 140a Channel region 140b Source region (conductor region) 140c Drain region (conductor region) 180 Photodiode 200 TFT layer (thin film transistor layer) 300 Active matrix substrate 500 X-ray sensor device
Claims
1. An active matrix substrate comprising a resin substrate and a thin film transistor layer provided on the resin substrate, wherein the thin film transistor layer is provided with a plurality of thin film transistors, each having a semiconductor layer in which a channel region and a conductor region are defined, and wherein a plurality of conductive films are provided corresponding to each of the plurality of thin film transistors so as to surround or overlap at least the channel region in a planar view.
2. An active matrix substrate according to claim 1, wherein the plurality of conductive films are in an electrically floating state or are electrically connected to 0 V or GND.
3. The active matrix substrate according to claim 1 or 2, wherein the plurality of conductive films adjacent to each other are electrically connected.
4. The active matrix substrate according to claim 1 or 2, wherein the plurality of conductive films are each independently in an electrically floating state.
5. The active matrix substrate according to any one of claims 1 to 4, wherein a gate electrode is provided so as to overlap the channel region in a plan view, and the plurality of conductive films are formed in the same layer and made of the same material as the gate electrode.
6. An active matrix substrate according to any one of claims 1 to 4, wherein the plurality of conductive films are formed in the same layer and made of the same material as the conductor region of the semiconductor layer.
7. An active matrix substrate according to any one of claims 1 to 4, wherein a gate electrode is provided so as to overlap with the channel region in a planar view, and the plurality of conductive films are formed of metal films or conductive semiconductor films on the resin substrate as layers below the gate electrode and the semiconductor layer, and each of the conductive films surrounds the entire periphery of the channel region.
8. An active matrix substrate according to any one of claims 1 to 4, wherein a gate electrode is provided so as to overlap with the channel region in a planar view, and the plurality of conductive films are formed of metal films or conductive semiconductor films on the resin substrate as layers below the gate electrode and the semiconductor layer, and each of the conductive films covers the entire channel region.
9. An active matrix substrate according to any one of claims 1 to 4, wherein a gate electrode is provided so as to overlap with the channel region in a plan view, and the plurality of conductive films are formed of metal films or conductive semiconductor films on the resin substrate as layers below the gate electrode and the semiconductor layer, and each of the conductive films covers the entire thin film transistor layer.
10. The active matrix substrate according to any one of claims 7 to 9, wherein a base coat film is provided on the resin substrate, and the plurality of conductive films are covered with the base coat film.
11. A display device comprising an active matrix substrate according to any one of claims 1 to 10.
12. A display device according to claim 11, wherein the thin film transistor layer comprises a gate insulating film provided so as to cover the semiconductor layer, and a gate electrode provided on the gate insulating film so as to overlap the channel region of the semiconductor layer.
13. A display device according to claim 11 or 12, characterized in that it comprises: a light emitting element layer provided on the thin film transistor layer, in which a plurality of light emitting elements are arranged corresponding to a plurality of sub-pixels constituting the display area; and a sealing film provided so as to cover the light emitting element layer.
14. A display device according to claim 13, wherein said plurality of thin film transistors are driving thin film transistors configured to control the current of each of said light emitting elements.
15. A display device according to claim 13 or 14, wherein each of the light-emitting elements is an organic electroluminescence element.
16. An X-ray sensor device comprising an active matrix substrate according to any one of claims 1 to 10.
17. An X-ray sensor device according to claim 16, wherein the thin film transistor layer comprises a gate electrode provided below the semiconductor layer, with a gate insulating film interposed between the gate electrode and the semiconductor layer, so as to overlap the channel region of the semiconductor layer.
18. An X-ray sensor device according to claim 16 or 17, characterized in that it comprises a photodiode provided on the thin film transistor layer, and a scintillator provided above the photodiode for converting irradiated X-rays into fluorescence.
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