Electronic control device

Abstract

Provided is an electronic control device capable of securing reliability of bonding by solder, inhibiting chip lifting, and miniaturization. In an electronic control device 1, an electrode 12 of an electronic component 11 is joined, via a solder fillet, to at least a partial region of each of a first region R1, a second region R2, and a third region R3 of a pair of lands 31. On a first side surface 11a and in the second region R2 of the electronic component 11, the solder fillet is formed up to the upper end of the first side surface 11a and over the entire length of the electronic component 11 in a second direction D2. Within the region in which the solder fillet is formed, with respect to the area of the second region R2 in one of the lands 31, the ratio of an area sum of the first region R1 and the third region R3 in the other land 31 is 0.56 or higher. Within the region in which the solder fillet is formed, with respect to the area of the second region R2 in the other land 31, the ratio of an area sum of the first region R1 and the third region R3 in the one of the lands 31 is 0.56 or higher.

Description

Electronic control unit

[0001] The present invention relates to an electronic control device.

[0002] When mounting electronic components via solder on a circuit board with lands, a moment caused by an imbalance in surface tension can cause the electronic component to stand up, resulting in a defect known as chip standing (Manhattan phenomenon).Chip standing is a defect in which one electrode of the electronic component is not electrically connected to the land, resulting in an open circuit.

[0003] A technology for suppressing chip standing is, for example, disclosed in Patent Document 1. Figures 1 to 3 and claim 1 of Patent Document 1 describe "a printed circuit board characterized in that the shape of the pad portion is formed to be tapered toward the pattern portion."

[0004] Japanese Patent Application Laid-Open No. 2005-167287

[0005] In Patent Document 1, as described in paragraph 0012 of Patent Document 1 as "a mounting component made up of, for example, a chip ceramic capacitor," a chip capacitor is assumed as the mounting component.

[0006] Chip capacitors generally have electrodes formed on the side surfaces facing the longitudinal direction of the electronic component (side surfaces roughly perpendicular to the longitudinal direction of the electronic component) as well as on the side surfaces facing the lateral direction of the electronic component (side surfaces roughly perpendicular to the lateral direction of the electronic component).

[0007] In recent years, in-vehicle electronic control units have been required to be miniaturized to accommodate high-density packaging, and small electronic components measuring 0603 (0.6 mm x 0.3 mm) are being used. Chip resistors are used in these electronic control units. Chip resistors generally do not have electrodes formed on the side surfaces facing the short sides of the electronic component, so solder fillets are not formed on the side surfaces facing the short sides of the electronic component, and solder fillets are only formed between the side surfaces and the electrodes on the bottom surface of the electronic component in the short sides of the electronic component. As a result, in small electronic components with a small number of electrode surfaces, such as chip resistors, the force acting to suppress chip standing is weak, making chip standing more likely to occur.

[0008] The technology described in Patent Document 1 does not take into consideration small electronic components such as chip resistors, which have a small number of surfaces on which electrodes are formed, and therefore has the problem of insufficient prevention of chip standing.

[0009] Furthermore, while 1005 (1.0 mm × 0.5 mm) size electronic components are prone to solder cracks at the bottom of the electronic components, small 0603 size electronic components are prone to solder cracks at the top ends of the longitudinal side surfaces of the electronic components and the lateral ends of the electronic components, i.e., the upper corners of the electronic components. Therefore, to ensure reliability, it is necessary to form solder fillets up to the upper corners of the longitudinal side surfaces of the electronic components. However, the larger the solder fillets formed on the longitudinal side surfaces of the electronic components, the stronger the force that promotes chip standing, making chip standing more likely to occur.

[0010] The problem to be solved by the present invention is to provide an electronic control device that ensures the reliability of solder joints, suppresses chip standing, and allows for miniaturization.

[0011] In order to achieve the above object, an electronic control device of the present invention includes a circuit board including a pair of lands arranged side by side in a first direction, and an electronic component joined to the pair of lands via solder, wherein the electronic component has a first side surface facing the first direction, a second side surface facing a second direction perpendicular to the first direction along a main surface of the circuit board, and a bottom surface facing the circuit board, and has electrodes on the first side surface and the bottom surface, the pair of lands have inner edges close to each other, outer edges opposite the inner edge, and lateral edges between the inner edge and the outer edge, and a first region is defined as a region on the surface of the pair of lands between the second side surface and the lateral edge facing the second side surface, and a second region is defined as a region where the land overlaps with an extension region obtained by virtually extending the first side surface toward the lateral edge. and when a region between the electrode and the inner edge on the bottom surface is defined as a third region, the electrode is joined to at least a portion of each of the first region, the second region, and the third region via a solder fillet of the solder, the solder fillets are formed on the first side surface and the second region up to an upper end of the first side surface and over the entire length of the electronic component in the second direction, and in the region where the solder fillets are formed, a ratio of the sum of the area of ​​the first region and the third region of one of the lands to the area of ​​the second region of the other lands is 0.56 or more, and in the region where the solder fillets are formed, a ratio of the sum of the area of ​​the first region and the third region of one of the lands to the area of ​​the second region of the other lands is 0.56 or more.

[0012] According to the present invention, it is possible to realize an electronic control device that ensures the reliability of solder joints, prevents chips from standing up, and allows for miniaturization.

[0013] 1. A top view of an electronic control device of Example 1. An A-A cross-sectional view of FIG. 1. A B-B cross-sectional view of FIG. 1. A graph showing the number of chip standing occurrences versus the ratio of the area of ​​the second region of one land to the sum of the area of ​​the first region and the third region of the other land, among the regions where solder fillets are formed. A top view of an electronic control device of Example 2. A top view of an electronic control device of Example 3. A top view of an electronic control device of Example 4. A top view of an electronic control device of Example 5.

[0014] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each drawing and each embodiment, the same or similar components are designated by the same reference numerals, and redundant explanations will be omitted.

[0015] The following description and drawings are examples for explaining the present invention, and some omissions and simplifications have been made as appropriate for clarity of explanation. The present invention can be implemented in various other forms. Unless otherwise specified, each component may be singular or plural.

[0016] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0017] Fig. 1 is a top view of an electronic control device according to the first embodiment. Fig. 2 is a cross-sectional view taken along line AA in Fig. 1. Fig. 3 is a cross-sectional view taken along line BB in Fig. 1.

[0018] The electronic control device 1 includes a circuit board 10 including a pair of lands 31 arranged side by side in a first direction D1, and an electronic component 11 joined to the pair of lands 31 via solder 21.

[0019] The circuit board 10 has a multilayer circuit in which, for example, insulating layers and wiring layers are alternately stacked. The circuit board 10 may have a core layer formed thereon.

[0020] A first land 31a and a second land 31b are provided on the surface layer of the circuit board 10. The first land 31a and the second land 31b are arranged side by side in the first direction D1 and form a pair of lands 31.

[0021] The electronic component 11 may be, for example, a small electronic component of 0603 (0.6 mm x 0.3 mm) size or smaller, but the size is not limited to this. Also, in this embodiment, an example is shown in which a chip resistor is used as the electronic component 11, but the electronic component is not limited to this.

[0022] The electronic component 11 has a first side surface 11a facing the first direction D1, a second side surface 11b facing a second direction D2 that is perpendicular to the first direction D1 along the main surface of the circuit board 10, a bottom surface 11c facing the circuit board 10, and a top surface 11d opposite the bottom surface 11c. Here, the "first side surface 11a facing the first direction D1" means that the main surface of the first side surface 11a is approximately perpendicular to the first direction D1, and does not necessarily have to be strictly perpendicular, as long as the normal to the first side surface 11a faces in a direction roughly along the first direction D1.

[0023] The electronic component 11 has electrodes 12 on the first side surface 11a, bottom surface 11c, and top surface 11d. While it is not essential to have an electrode 12 on the top surface 11d in this embodiment, it is desirable to have one. Furthermore, in this embodiment, the electronic component 11 does not have an electrode 12 on the second side surface 11b. The electronic component 11 has a longitudinal direction in the first direction D1 and a lateral direction in the second direction D2. The electrodes 12 are provided on one end side and the other end side of the electronic component 11 in the first direction D1, respectively, and are electrically connected to the first land 31a and the second land 31b via solder 21, respectively.

[0024] The solder 21 may be, for example, a solder containing Sn as the main component and no lead, such as Sn--Ag--Cu.

[0025] The pair of lands 31, the first land 31a and the second land 31b, have an inner edge L3 adjacent to each other, an outer edge L2 opposite the inner edge L3, and a lateral edge L1 between the inner edge L3 and the outer edge L2.

[0026] Here, on the surface of the pair of lands 31, a first region R1 is defined as a region between the second side surface 11b of electronic component 11 and a lateral edge L1 facing second side surface 11b, a second region R2 is defined as a region where land 31 overlaps with an extension region obtained by virtually extending first side surface 11a of electronic component 11 toward outer edge L2, and a third region R3 is defined as a region between electrode 12 on the bottom surface 11c of electronic component 11 and inner edge L3 (in other words, between bottom electrode inner edge 12a and inner edge L3). Electrode 12 is joined to at least a portion of each of first region R1, second region R2, and third region R3 of land 31 via a solder fillet (a flared shape of solder 21). Although bottom electrode inner edge 12a is actually hidden and not visible in the top view shown in FIG. 1 , the position of bottom electrode inner edge 12a is also shown in FIG. 1 for reference to clarify the extent of third region R3.

[0027] In this case, for example, in a 1005 (1.0 mm × 0.5 mm) size electronic component 11, cracks are likely to occur in the solder 21 at the bottom of the electronic component 11, whereas in a small electronic component 11 of 0603 size or smaller, cracks are likely to occur in the solder 21 at the upper end of the first side surface 11a of the electronic component 11 and at the end in the second direction D2, i.e., at the upper corner of the electronic component 11. These cracks in the solder 21 occur because the thermal expansion coefficients of the circuit board 10 and the electronic component 11 are different, which increases strain in the solder 21 when the temperature changes.

[0028] Therefore, in this embodiment, a solder fillet is formed on the first side surface 11a of the electronic component 11 and the second region R2 of the land 31 up to the upper end of the first side surface 11a and over the entire length in the second direction D2 of the electronic component 11. This ensures that the solder 21 is secured at the upper end corners of the electronic component 11, which are the starting points for cracks, thereby suppressing the occurrence of cracks in the solder 21 and ensuring reliability.

[0029] However, as in this embodiment, the larger the solder fillet formed on the first side surface 11a of the electronic component 11, the stronger the force acting in the direction promoting chip standing, which poses another problem: chip standing becomes more likely to occur. Furthermore, in this embodiment, the electronic component 11 does not have electrodes 12 on the second side surface 11b, so as shown in FIG. 3 , no solder fillet is formed on the second side surface 11b of the electronic component 11, and a solder fillet is only formed between the second side surface 11b and the electrodes 12 on the bottom surface 11c of the electronic component 11 in the second direction D2. As a result, the force acting in the direction suppressing chip standing becomes weaker, which also poses the problem of chip standing becoming more likely to occur.

[0030] Therefore, in this embodiment, chip standing is suppressed by ensuring that the areas of the regions where solder fillets are formed in the first region R1, second region R2, and third region R3 of a pair of lands 31 satisfy a predetermined relationship.

[0031] FIG. 4 is a graph showing the number of chips that stand up versus the ratio of the area of ​​the second region of one land to the sum of the areas of the first and third regions of the other land, among the regions where solder fillets are formed.

[0032] 4, the horizontal axis represents the ratio of the area of ​​the second region R2 of one land 31 to the area of ​​the sum of the first region R1 and the third region R3 of the other land 31, among the regions where the solder fillet is formed, and the vertical axis represents the number of chip standing occurrences. As shown in FIG. 4, it was confirmed that chip standing occurred when the ratio shown on the horizontal axis was less than 0.56, whereas chip standing occurrence was suppressed when the ratio was 0.56 or greater. The reason that chip standing can be suppressed when the ratio is greater than a predetermined value is that the solder fillet formed in the second region R2 of one land 31 generates a moment in a direction that promotes chip standing due to surface tension, while the solder fillets formed in the first region R1 and the third region R3 of the other land 31 generate a moment in a direction that suppresses chip standing due to surface tension. Since chip standing can occur in both directions in the first direction D1 in the electronic component 11 and the pair of lands 31, the ratio of the sum of the areas of the first region R1 and the third region R3 of one land 31 to the area of ​​the second region R2 of the other land 31 in the region where the solder fillet is formed is also set to 0.56 or more. This makes it possible to suppress chip standing.

[0033] From the viewpoint of suppressing chip standing, there is no upper limit to the ratio, but from the viewpoint of miniaturization, it is desirable that the upper limit of the ratio be 1 or less.

[0034] Furthermore, in this embodiment, the electronic component 11 does not have an electrode 12 on the second side surface 11b, but the above ratio may be set to 0.56 or more for an electronic component 11 that also has an electrode 12 on the second side surface 11b. In this case, a solder fillet is also formed on the second side surface 11b of the electronic component 11, which strengthens the force acting in the direction of suppressing chip standing, thereby more reliably suppressing the occurrence of chip standing.

[0035] In this embodiment, the sizes of the electronic component 11 and the pair of lands 31 are, for example, 0.6 mm in the longitudinal direction (first direction D1) of the electronic component 11, 0.3 mm in the lateral direction (second direction D2) of the electronic component 11, and 0.23 mm in height; the lengths of the first land 31a and the second land 31b in the first direction D1 and second direction D2, respectively, are 0.35 mm; and the land gap is 0.2 mm, but are not limited to these sizes.

[0036] As shown in FIG. 2 , the circuit board 10 preferably includes a resist 41 formed between the first land 31a and the second land 31b and spaced apart from the land 31. The resist 41 is made of a highly heat-resistant resin and has the property of repelling solder 21, and therefore protects the wiring of the circuit board 10 and the land 31 from excess solder 21. However, if the resist 41 is formed overlapping the land 31, the height of the upper surface of the resist 41 increases, which can lead to variations in the thickness of the resist 41, tilting the electronic component 11 and making it more likely to form a chip. Furthermore, the area of ​​the third region R3 is reduced, making it more likely to form a chip. Therefore, to prevent the resist 41 from overlapping the land 31, the resist 41 formed between the first land 31a and the second land 31b should be spaced apart from the land 31, as shown in FIG. 2 .

[0037] As described above, according to this embodiment, even when small electronic components 11 are used, the reliability of the joint using solder 21 can be ensured and chip standing can be suppressed, and since small electronic components 11 can be used, an electronic control device 1 that can be made smaller can be realized.

[0038] FIG. 5 is a top view of the electronic control device according to the second embodiment.

[0039] Example 2 is a modified example of Example 1. In addition to the configuration of Example 1, the electronic control device 1 of this example has an inner edge L3 of the land 31 that is longer than the length W1 of the electronic component 11 in the second direction D2, and the length of at least a portion of the land 31 in the second direction D2 is formed to be approximately equal to the length W1 of the electronic component 11 in the second direction D2. Note that "approximately equal" does not necessarily mean that the lengths are strictly equal, but rather that they may differ slightly as long as the intended effect of this example can be obtained.

[0040] As a result, during the mounting process of the electronic component 11, when the solder 21 is placed on the lands 31 and the electronic component 11 is then reflowed, the surface tension of the solder 21 prevents the electronic component 11 from moving to areas where there are no lands 31, thereby suppressing component misalignment in the second direction D2 during the mounting process of the electronic component 11. If component misalignment were to occur, the shape of the solder 21 would differ between one of the pair of lands 31, disrupting the balance of moments due to the surface tension of the solder 21, which could lead to a problem of chip standing due to the moment difference. In contrast, according to this embodiment, component misalignment can be suppressed, making it less likely that a moment difference due to the surface tension of the solder 21 would occur, thereby suppressing chip standing. Furthermore, since the wiring area including the lands 31 is reduced, the electronic control device 1 can be made smaller.

[0041] The configuration and effects other than those described above are the same as those of the first embodiment, so a duplicated description will be omitted.

[0042] FIG. 6 is a top view of an electronic control device according to a third embodiment.

[0043] Example 3 is a modification of Example 2. In addition to the configuration of Example 2, the electronic control device 1 of this example has a region where the side edge L1 of the land 31 is parallel to the second side surface 11b of the electronic component 11. In this example, the same effect as in Example 2 can be obtained, and the area of ​​the first region R1 can be made larger than in Example 2, making it easier to increase the ratio described in Example 1 compared to Example 2, and thus making it possible to suppress chip standing.

[0044] FIG. 7 is a top view of the electronic control device according to the fourth embodiment.

[0045] Example 4 is a modification of Example 2. In addition to the configuration of Example 2, the electronic control device 1 of this example is formed such that the second region R2 has a region that is shorter than the length W1 of the electronic component 11 in the second direction D2. This example also achieves the same effects as Example 2, and the area of ​​the second region R2 can be made smaller than in Example 2, thereby reducing the wiring area including the lands 31 and making it possible to make the electronic control device 1 more compact than in Example 2. Furthermore, because the area of ​​the second region R2 can be made smaller, it is easier to increase the ratio described in Example 1 compared to Example 2, which makes it possible to suppress chip standing.

[0046] FIG. 8 is a top view of the electronic control device according to the fifth embodiment.

[0047] Example 5 is a modification of Example 4, and corresponds to an example in which Example 3 is applied to Example 4. Therefore, in this example, the same effects as in Example 4 can be obtained, and also the same effects as in Example 3 can be obtained.

[0048] Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations described in the embodiments, and various modifications are possible within the scope of the technical concept of the present invention. In addition, some or all of the configurations described in each embodiment may be combined and applied.

[0049] 1: Electronic control device 10: Circuit board 11: Electronic component 11a: First side 11b: Second side 11c: Bottom surface 11d: Top surface 12: Electrode 12a: Bottom electrode inner edge 21: Solder 31: Land 31a: First land 31b: Second land 41: Resist D1: First direction D2: Second direction L1: Side edge L2: Outer edge L3: Inner edge R1: First region R2: Second region R3: Third region

Claims

1. A circuit board including a pair of lands arranged side by side in a first direction; and an electronic component joined to the pair of lands via solder, wherein the electronic component has a first side surface facing the first direction, a second side surface facing a second direction perpendicular to the first direction along a main surface of the circuit board, and a bottom surface facing the circuit board, and has electrodes on the first side surface and the bottom surface, the pair of lands have inner edges close to each other, outer edges opposite the inner edges, and lateral edges between the inner edges and the outer edges, when, on the surfaces of the pair of lands, a region between the second side surface and the lateral edges facing the second side surface is defined as a first region, a region where the land overlaps with an extension region obtained by virtually extending the first side surface toward the lateral edges is defined as a second region, and a region on the bottom surface between the electrode and the inner edge is defined as a third region, the electrode is joined to at least a portion of each of the first region, the second region, and the third region via a solder fillet of the solder, An electronic control device characterized in that the solder fillet is formed on the first side surface and the second region up to the upper end of the first side surface and over the entire length of the electronic component in the second direction, and in the region where the solder fillet is formed, the ratio of the sum of the area of ​​the first region and the third region of one of the lands to the area of ​​the second region of the other land is 0.56 or more, and in the region where the solder fillet is formed, the ratio of the sum of the area of ​​the first region and the third region of one of the lands to the area of ​​the second region of the other land is 0.56 or more.

2. An electronic control device according to claim 1, wherein, in the region where the solder fillet is formed, the ratio of the sum of the area of ​​the first region and the third region of the one land to the area of ​​the second region of the one land is 1 or less, and, in the region where the solder fillet is formed, the ratio of the sum of the area of ​​the first region and the third region of the one land to the area of ​​the second region of the other land is 1 or less.

3. An electronic control device according to claim 1, wherein the electronic component does not have the electrode on the second side surface.

4. An electronic control device according to claim 1, wherein the length of the inner edge of the land is longer than the length of the electronic component in the second direction, and the length of at least a portion of the land in the second direction is approximately equal to the length of the electronic component in the second direction.

5. An electronic control device according to claim 4, wherein the second region has a region whose length in the second direction is shorter than the length in the second direction of the electronic component.

6. An electronic control device according to claim 1, wherein the circuit board has a resist formed between the one land and the other land, spaced apart from the lands.

7. An electronic control device according to claim 1, wherein the electronic components are 0603 size or smaller.

8. The electronic control device according to claim 1, wherein the electronic component is a chip resistor.

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