Circuit board with heat sink, electrical connection box, and method for manufacturing circuit board with heat sink
The circuit board design with a heat sink and additional circuit layer improves design freedom and connectivity by using a mold to protect exposed areas, addressing the limitations of conventional designs.
Patent Information
- Application Number
- PCT/JP2024/025466
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-16
- Publication Date
- 2026-01-22
AI Technical Summary
Conventional circuit boards with heat sinks face challenges in forming a large number of thin wire circuits, limiting the design freedom of the circuit.
The circuit board design incorporates a first circuit layer with conductors, a heat sink in thermal contact, an insulating layer, a second circuit layer, and a resin part that holds these components together, allowing for the second circuit layer to have a conductive layer with exposed pads and through holes, and uses a mold to prevent resin coverage of these exposed areas.
This configuration enhances the design freedom of the circuit board by allowing flexible layout and connection of electronic components, while preventing resin coverage of critical exposed portions, thus improving heat dissipation and electrical connectivity.
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Figure JP2024025466_22012026_PF_FP_ABST
Abstract
Description
Circuit board with heat sink, electrical junction box, and method for manufacturing circuit board with heat sink
[0001] The present disclosure relates to a circuit board with a heat sink, an electrical junction box, and a method for manufacturing a circuit board with a heat sink.
[0002] A conventional circuit board with a heat sink is described in Japanese Patent Laid-Open No. 2016-82108 (Patent Document 1). This circuit board with a heat sink is formed by integrating a conductor layer constituting a circuit and one surface of a large-capacity heat sink via an insulating layer.
[0003] JP 2016-82108 A
[0004] In the above-mentioned circuit board with a heat sink, it is difficult to form a large number of thin wire circuits.
[0005] The present disclosure was completed in light of the above circumstances, and aims to improve the degree of freedom in designing a circuit for a heat sink-equipped circuit board.
[0006] The circuit board with a heat sink of the present disclosure comprises a first circuit layer having a plurality of conductors, a heat sink in thermal contact with the first circuit layer, an insulating layer interposed between the first circuit layer and the heat sink, a second circuit layer arranged to sandwich the first circuit layer together with the heat sink, and a resin part that holds the first circuit layer, the heat sink, the insulating layer, and the second circuit layer together, wherein the first circuit layer has an exposed portion where a portion of the conductor is exposed to the outside, and the second circuit layer comprises an insulating base material and a conductive layer formed on the base material, and the conductive layer has a pad exposed to the outside.
[0007] According to the present disclosure, it is possible to improve the degree of freedom in designing the circuit of a heat sink-equipped circuit board.
[0008] Fig. 1 is a plan view of a heat sink-equipped circuit board according to an embodiment. Fig. 2 is a cross-sectional view taken along line A-A in Fig. 1. Fig. 3 is a plan view of an electrical junction box according to an embodiment. Fig. 4 is a cross-sectional view taken along line B-B in Fig. 3. Fig. 5 is a plan view of a second circuit layer. Fig. 6 is a cross-sectional view taken along line C-C in Fig. 5. Fig. 7 is a cross-sectional view taken along line D-D in Fig. 5. Fig. 8 is an explanatory diagram illustrating the placement process.
[0009] [Description of Embodiments of the Present Disclosure] First, embodiments of the present disclosure will be listed and described. [1] A circuit board with a heat sink of the present disclosure includes a first circuit layer having a plurality of conductors, a heat sink in thermal contact with the first circuit layer, an insulating layer interposed between the first circuit layer and the heat sink, a second circuit layer arranged to sandwich the first circuit layer together with the insulating layer, and a resin part that integrally holds the first circuit layer, the heat sink, the insulating layer, and the second circuit layer, wherein the first circuit layer includes an exposed portion where a portion of the conductor is exposed to the outside, and the second circuit layer includes an insulating base material and a conductive layer formed on the base material, and the conductive layer has a pad exposed to the outside.
[0010] With this configuration, the circuit board with a heat sink includes a second circuit layer in addition to the first circuit layer, and the conductive layer of the second circuit layer is easily changeable in shape and layout, thereby improving the degree of freedom in designing the circuit in the circuit board with a heat sink.
[0011] [2] In the above [1], it is preferable that a through hole is provided in the second circuit layer, and the exposed portion is exposed to the outside through the through hole.
[0012] According to this configuration, when manufacturing a circuit board with a heat sink, the outer periphery of the through hole is pressed with the convex portion of the mold and the mold is filled with an encapsulating resin composition, thereby preventing the exposed portion from being covered with the resin portion.
[0013] [3] In the above [2], it is preferable that the second circuit layer has an enclosing portion arranged on the outer periphery of the through hole so as to surround the through hole, and that the enclosing portion has a shape that is raised higher than other parts of the second circuit layer.
[0014] With this configuration, the surrounding portion makes it less likely that a gap will form between the outer periphery of the through hole and the convex portion of the mold, thereby further preventing the exposed portion from being covered by the resin portion.
[0015] [4] In any one of the above [1] to [3], it is preferable that the pad is disposed in the vicinity of the exposed portion.
[0016] This configuration makes it easier to connect electronic components to both the pads and the exposed portions.
[0017] [5] In any one of the above [1] to [4], it is preferable that the first circuit layer and the second circuit layer are bonded by an adhesive layer.
[0018] With this configuration, the first circuit layer and the second circuit layer can be easily positioned.
[0019] [6] In any one of the above [1] to [5], it is preferable that the second circuit layer has an extension portion extending outward from an outer edge portion of the resin portion, and the extension portion has the pad.
[0020] This configuration may facilitate electrical connection between the second circuit layer and external devices.
[0021] [7] The electrical connection box of the present disclosure comprises a circuit board with a heat sink according to any one of [1] to [6] above, and at least one electronic component electrically connected to at least one of the first circuit layer and the second circuit layer.
[0022] [8] In the above [7], it is preferable that the at least one electronic component includes a FET, the source and drain of the FET are electrically connected to the first circuit layer, and the gate of the FET is electrically connected to the second circuit layer.
[0023] With this configuration, the first circuit layer can be used as a current path through which a large current flows, and the second circuit layer can be used as a switching circuit for the FET.
[0024] [9] The manufacturing method of the circuit board with a heat sink of the present disclosure includes the steps of preparing a heat sink, preparing an insulating layer, preparing a plurality of conductors, forming a second circuit layer, preparing a mold having a plurality of protrusions in a cavity, arranging the heat sink, the insulating layer, the plurality of conductors, and the second circuit layer stacked in this order in the cavity of the mold, and forming a resin portion by filling the cavity with an encapsulating resin composition, wherein in the arranging step, the plurality of protrusions are in contact with the second circuit layer, and some of the plurality of conductors are arranged opposite some of the plurality of protrusions.
[0025] According to such a method for manufacturing a circuit board with a heat sink, it is possible to improve the degree of freedom in designing the circuit in the circuit board with a heat sink.
[0026]
[10] In the above [9], it is preferable that in the step of forming the second circuit layer, a plurality of through holes are provided in the second circuit layer, and in the placement step, the plurality of protrusions are in contact with the outer peripheries of the plurality of through holes, and some of the plurality of conductors are placed opposite some of the plurality of protrusions through the plurality of through holes.
[0027] According to this method for manufacturing a circuit board with a heat sink, it is possible to prevent the exposed portion from being covered with the resin portion.
[0028] [Details of the Embodiments of the Present Disclosure] The following describes embodiments of the present disclosure. The present disclosure is not limited to these examples, but is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims. In the drawings, for the convenience of explanation, some components may be exaggerated or simplified. Furthermore, the dimensional ratios of each part may differ between drawings. In this specification, "orthogonal" does not only refer to a strict orthogonal relationship, but also includes a roughly orthogonal relationship within the scope of the operation and effect of this embodiment.
[0029] In this specification, the expression "a to b" in the description of a numerical range means from a to b, unless otherwise specified. For example, "1 to 5% by mass" means "1% by mass or more and 5% by mass or less."
[0030] 1 to 8, an embodiment of the present disclosure will be described. In the following description, the direction indicated by the arrow Z is defined as upward, the direction indicated by the arrow X is defined as forward, and the direction indicated by the arrow Y is defined as leftward. Note that, in some cases, when multiple identical components are used, only some of the components will be designated by reference numerals, and the reference numerals for the other components will be omitted.
[0031] 1 and 2, the circuit board 1 with a heat sink includes a heat sink 10, an insulating layer 20, a first circuit layer 30, a second circuit layer 40, and a resin part 50. The heat sink 10, the insulating layer 20, the first circuit layer 30, and the second circuit layer 40 are stacked in the vertical direction (stacking direction).
[0032] (Heat sink 10) The heat sink 10 is in thermal contact with the first circuit layer 30. The heat sink 10 has a function of dissipating heat generated in the first circuit layer 30 to the outside. In other words, the heat sink 10 has thermal conductivity. The heat sink 10 includes a flat base plate 11.
[0033] The heat sink 10 is made of, for example, a metal. The metal constituting the heat sink 10 is preferably at least one selected from copper and aluminum, and more preferably copper from the viewpoint of improving thermal conductivity, workability, etc.
[0034] The thickness of the base plate 11 can be set appropriately depending on the application, but is preferably 0.2 to 1.5 mm, for example. Furthermore, by making the thickness of the base plate 11 0.5 to 1.5 times the thickness of the first circuit layer 30, warping of the entire heatsink-equipped circuit board 1 can be suppressed, and adhesion can be easily improved.
[0035] The heat sink 10 may also include multiple fins (not shown) that protrude from the surface of the base plate 11 opposite the insulating layer 20. By providing multiple fins on the heat sink 10, the surface area of the heat sink 10 can be increased, thereby improving heat dissipation efficiency.
[0036] (Insulating Layer 20) As shown in Fig. 2, the insulating layer 20 is disposed between the first circuit layer 30 and the heat sink 10. The insulating layer 20 is made of an insulating resin material. The insulating layer 20 provides insulation between the first circuit layer 30 and the heat sink 10. The outer peripheral edge of the insulating layer 20 is covered with a resin portion 50. This makes it possible to prevent the insulating layer 20 from peeling off from the heat sink 10.
[0037] The insulating layer 20 is made of a material with high thermal conductivity, which allows the first circuit layer 30 and the heat sink 10 to be in thermal contact with each other.
[0038] (First Circuit Layer 30) As shown in FIG. 2 , the first circuit layer 30 is disposed on the heat sink 10 via the insulating layer 20. The insulating layer 20 is interposed between the first circuit layer 30 and the heat sink 10. A second circuit layer 40 is laminated on the first circuit layer 30. The first circuit layer 30 is composed of a plurality of conductors 31 (two in this embodiment). The conductors 31 are plate-shaped. Metals that can be used to compose the circuit layer 30 (conductors 31) include copper, aluminum, nickel, gold, silver, stainless steel, and the like. A plating layer of nickel, tin, or the like may be formed on the surface of the conductors 31.
[0039] 1, the conductor 31 is elongated in the front-rear direction and has a generally rectangular shape in plan view. The plurality of conductors 31 are arranged side by side in the left-right direction. Note that the shape and arrangement of the plurality of conductors 31 in plan view may differ from those in this embodiment.
[0040] As shown in Fig. 2, spaces between the plurality of conductors 31 are filled with a resin part 50. Top surfaces 32 of the conductors 31 are disposed below top surfaces 51 of the resin part 50. Top surfaces 32 of the conductors 31 have exposed portions 32A, 32B, 32C, and 32D that are exposed to the outside. Top surfaces 32 of the conductors 31 also have portions that are covered by the resin part 50 or the second circuit layer 40. As shown in Fig. 1, exposed portions 32A, 32B, 32C, and 32D are disposed inside the resin part 50 when viewed from the top-bottom direction.
[0041] The conductor 31 may include a terminal portion 33 extending outside the resin portion 50 when viewed from the top-bottom direction. The terminal portion 33 is a portion of the conductor 31 that is not covered by the resin portion 50. The terminal portion 33 is provided with a terminal hole 33A that penetrates the conductor 31 in the top-bottom direction. The terminal portion 33 is connected to a bus bar or the like of an external device by fastening with a bolt.
[0042] The first circuit layer 30 is preferably used as a current path through which a large current flows. The conductor 31 of the first circuit layer 30 has a larger cross-sectional area than the conductive layer 42 of the second circuit layer 40, and is in thermal contact with the heat sink 10. Therefore, even if a large current flows through the first circuit layer 30, the first circuit layer 30 is configured to easily dissipate heat.
[0043] 6 and 7, the second circuit layer 40 includes an insulating base material 41, a conductive layer 42 formed on the base material 41, and an insulating cover layer 43 that covers the conductive layer 42 from above. As shown in Figures 5 and 7, the cover layer 43 has openings 43A, 43B, and 43C that expose portions of the conductive layer 42.
[0044] 5, the second circuit layer 40 of this embodiment is composed of two flexible printed circuit boards 40A and 40B. The base material 41 and the cover layer 43 are made of a synthetic resin such as polyimide (PI) or polyethylene terephthalate (PET). The conductive layer 42 is made of a metal such as copper or a copper alloy and is conductive.
[0045] The conductive layer 42 can be formed by printed wiring technology. Therefore, the conductive layer 42 has a higher degree of freedom in terms of shape and layout compared to the conductors 31 of the first circuit layer 30. Therefore, by providing the second circuit layer 40, the degree of freedom in designing the circuit of the heatsink-equipped circuit board 1 can be increased.
[0046] The conductive layer 42 is formed thinner than the conductor 31 of the first circuit layer 30. For example, the thickness (vertical dimension) of the conductive layer 42 may be 10% or less of the thickness of the conductor 31. For this reason, the second circuit layer 40 is preferably used as a current path through which a lower current flows than in the first circuit layer 30. With this configuration, it is possible to provide a large number of circuits on the circuit board 1 with a heat sink while reducing the thickness of the circuit board 1 with a heat sink.
[0047] 2, the second circuit layer 40 is disposed above the first circuit layer 30. Specifically, the lower surface of the substrate 41 is disposed opposite the upper surface 32 of the conductor 31. The first circuit layer 30 and the second circuit layer 40 may be bonded together by an adhesive layer. The second circuit layer 40 has a portion that is covered from above by a resin part 50.
[0048] 1, the second circuit layer 40 includes an extension 44 that extends outward from the resin portion 50 when viewed in the stacking direction. Because the flexible printed circuit board 40A is flexible, the extension 44 is bendable. The extension 44 is used to electrically connect the second circuit layer 40 to an external device.
[0049] As shown in Fig. 5, the second circuit layer 40 has through holes 45A, 45B, 45C, and 45D that open in the stacking direction. As shown in Fig. 1, when the second circuit layer 40 is stacked on top of the first circuit layer 30, the exposed portions 32A, 32B, 32C, and 32D are exposed upward through the through holes 45A, 45B, 45C, and 45D, respectively.
[0050] As shown in FIG. 5 , the conductive layer 42 includes a first wiring portion 42A, a second wiring portion 42B, a third wiring portion 42C, and a fourth wiring portion 42D. The first wiring portion 42A is formed long in the front-to-rear direction (the up-and-down direction in the figure). A first pad 46A (an example of a pad) is provided at one end of the first wiring portion 42A, and a second pad 46B (an example of a pad) is provided at the other end of the first wiring portion 42A. The first pad 46A is disposed in the front portion (the upper portion in the figure) of the first wiring portion 42A. The first pad 46A is disposed on the extension portion 44. The second pad 46B is disposed in the rear portion (the lower portion in the figure) of the first wiring portion 42A. The first pad 46A and the second pad 46B are generally rectangular when viewed from above and are formed wider than the remaining portions of the first wiring portion 42A.
[0051] The second wiring portion 42B branches off midway from the first wiring portion 42A. Specifically, the second wiring portion 42B extends leftward from the first wiring portion 42A. A third pad 46C (an example of a pad) is provided at the end of the second wiring portion 42B opposite the branch point with the first wiring portion 42A. The third pad 46C has a generally rectangular shape when viewed from above and is wider than the rest of the second wiring portion 42B.
[0052] The third wiring portion 42C extends in the front-to-rear direction. A fourth pad 46D (an example of a pad) is provided at one end of the third wiring portion 42C, and a fifth pad 46E (an example of a pad) is provided at the other end of the third wiring portion 42C. The fourth pad 46D is located at the rear portion of the third wiring portion 42C. The fifth pad 46E is located at the front portion of the third wiring portion 42C. The fourth pad 46D is located adjacent to the second pad 46B in the left-to-right direction. The fifth pad 46E is located near the through hole 45A. The fifth pad 46E is located rearward (below in the figure) of the through hole 45A. The fourth pad 46D and the fifth pad 46E are generally rectangular when viewed from above and are wider than the rest of the third wiring portion 42C. The fifth pad 46E is also wider than the fourth pad 46D.
[0053] The fourth wiring portion 42D extends in the front-to-rear direction. A sixth pad 46F (an example of a pad) is provided at one end of the fourth wiring portion 42D, and a seventh pad 46G (an example of a pad) is provided at the other end of the fourth wiring portion 42D. The sixth pad 46F is located at the rear portion of the fourth wiring portion 42D. The seventh pad 46G is located at the front portion of the fourth wiring portion 42D. The sixth pad 46F is located adjacent to the third pad 46C in the left-right direction. The seventh pad 46G is located near the through hole 45B. The seventh pad 46G is located rearward of the through hole 45B. The sixth pad 46F and the seventh pad 46G are generally rectangular when viewed from above and are wider than the rest of the fourth wiring portion 42D. The seventh pad 46G is also wider than the sixth pad 46F.
[0054] The cover layer 43 is not provided in the portions corresponding to the pads 46A to 46G. Therefore, the pads 46A to 46G are exposed to the outside. Specifically, the first pad 46A is exposed from an opening 43A in the cover layer 43. The second pad 46B, the fourth pad 46D, and the fifth pad 46E are exposed from an opening 43B in the cover layer 43. The third pad 46C, the sixth pad 46F, and the seventh pad 46G are exposed from an opening 43C in the cover layer 43.
[0055] The conductive layer 42 includes annular portions 47A, 47B, 47C, and 47D arranged on the outer peripheries of the through holes 45A, 45B, 45C, and 45D so as to surround the through holes 45A, 45B, 45C, and 45D, respectively. The annular portions 47A, 47B, 47C, and 47D form a generally rectangular frame when viewed from above. Portions of the annular portions 47A and 47B also serve as portions of the first wiring portion 42A. In addition to the through hole 45A, a second pad 46B, a fourth pad 46D, and a fifth pad 46E are arranged inside the annular portion 47A. In addition to the through hole 45B, a third pad 46C, a sixth pad 46F, and a seventh pad 46G are arranged inside the annular portion 47B. The annular portions 47A, 47B, 47C, and 47D are entirely covered by the cover layer 43.
[0056] The second circuit layer 40 includes surrounding portions 48A, 48B, 48C, and 48D that are disposed on the outer peripheries of the through holes 45A, 45B, 45C, and 45D so as to surround the through holes 45A, 45B, 45C, and 45D. In other words, when viewed from above, the through holes 45A, 45B, 45C, and 45D are disposed inside the surrounding portions 48A, 48B, 48C, and 48D. As shown in FIGS. 6 and 7 , the surrounding portions 48A, 48B, 48C, and 48D are raised higher than the other portions of the second circuit layer 40. Specifically, the surrounding portions 48A, 48B, 48C, and 48D are configured by the annular portions 47A, 47B, 47C, and 47D, the substrate 41 disposed below the annular portions 47A, 47B, 47C, and 47D, and the cover layer 43 disposed above the annular portions 47A, 47B, 47C, and 47D. Thus, the surrounding portions 48A, 48B, 48C, and 48D are higher than the portions disposed adjacent to the surrounding portions 48A, 48B, 48C, and 48D (specifically, the portion consisting of the substrate 41 and the cover layer 43, the portion consisting of the substrate 41 and the conductive layer 42, or the portion consisting of only the substrate 41).
[0057] 1 and 2 , the resin part 50 integrally holds the heat sink 10, the insulating layer 20, the first circuit layer 30, and the second circuit layer 40. The resin part 50 is provided between the plurality of conductors 31. The resin part 50 has a plurality of openings 52 that expose the exposed portions 32A, 32B, 32C, and 32D of the conductors 31 and a portion of the second circuit layer 40 upward.
[0058] The resin portion 50 is made of an insulating synthetic resin, and is obtained using an encapsulating resin composition that includes, for example, a thermosetting resin, an inorganic filler, a curing agent, a curing accelerator, a coupling agent, and the like.
[0059] (Method for manufacturing the circuit board 1 fitted with a heat sink) Next, an example of a method for manufacturing the circuit board 1 fitted with a heat sink according to this embodiment will be described with reference to Fig. 8. Fig. 8 is an explanatory diagram showing the components of the circuit board 1 fitted with a heat sink (second circuit layer 40, multiple conductors 31, insulating layer 20, and heat sink 10) and mold 60 (first mold 61 and second mold 62) in the cross section A-A of Fig. 1.
[0060] The manufacturing method of the circuit board 1 with a heat sink includes the steps of preparing the heat sink 10, preparing the insulating layer 20, preparing a plurality of conductors 31, forming the second circuit layer 40, preparing the mold 60, an arrangement step, and forming the resin part 50.
[0061] First, the above-described components can be used for the heat sink 10, the plurality of conductors 31, the second circuit layer 40, and the insulating layer 20. In this embodiment, the second circuit layer 40 has through holes 45A, 45B, 45C, and 45D for exposing the exposed portions 32A, 32B, 32C, and 32D. Surrounding portions 48A, 48B, 48C, and 48D are formed around the outer peripheries of the through holes 45A, 45B, 45C, and 45D in the second circuit layer 40.
[0062] The mold 60 is used to form the resin part 50. As shown in Fig. 8, the mold 60 has a cavity 63 to be filled with an encapsulating resin composition. The mold 60 includes a first mold 61 and a second mold 62. The cavity 63 is formed by assembling the first mold 61 and the second mold 62 together.
[0063] The first mold 61 has, for example, a tray shape and includes, for example, a base wall 61A, a peripheral wall 61B extending downward from the outer periphery of the base wall 61A, and a plurality of protrusions 61C protruding downward from the base wall 61A inside the peripheral wall 61B.
[0064] The second mold 62 is, for example, tray-shaped. The second mold 62 includes, for example, a base wall 62A and a peripheral wall 62B extending upward from the outer periphery of the base wall 62A. The first mold 61 and the second mold 62 are assembled so that the end surface of the peripheral wall 61B of the first mold 61 and the end surface of the peripheral wall 62B of the second mold 62 are in close contact with each other, thereby forming a cavity 63. A plurality of protrusions 61C are arranged within the cavity 63. The mold 60 is also provided with an injection port (not shown) that communicates with the cavity 63. The cavity 63 can be filled with an encapsulating resin composition through the injection port.
[0065] In the placement process, the heat sink 10, the insulating layer 20, the plurality of conductors 31, and the second circuit layer 40 are placed in a cavity 63 of a mold 60. Within the cavity 63, the heat sink 10, the insulating layer 20, the plurality of conductors 31, and the second circuit layer 40 are stacked in this order. That is, the insulating layer 20 is stacked on the heat sink 10, the plurality of conductors 31 are further stacked on the insulating layer 20, and the second circuit layer 40 is further stacked on the plurality of conductors 31. Note that the portion of the conductor 31 that will become the terminal portion 33 and the portion of the second circuit layer 40 that will become the extension portion 44 are not covered with the resin portion 50 and are therefore located outside the cavity 63.
[0066] The multiple protrusions 61C are in contact with the second circuit layer 40. Some of the multiple conductors 31 are arranged facing some of the multiple protrusions 61C. Some of the multiple conductors 31 may also be in contact with some of the multiple protrusions 61C. In this embodiment, the protrusions 61C are in contact with the outer peripheries of the through holes 45A, 45B, 45C, and 45D of the second circuit layer 40. Some of the conductors 31 (exposed portions 32A, 32B, 32C, and 32D) are arranged facing some of the protrusions 61C through the through holes 45A, 45B, 45C, and 45D. With this arrangement, the portions of the conductors 31 facing the protrusions 61C (exposed portions 32A, 32B, 32C, and 32D) are surrounded by the contact portions between the second circuit layer 40 and the protrusions 61C. That is, the internal space 64 defined by the exposed portions 32A, 32B, 32C, and 32D of the conductor 31, the protruding portion 61C, and the second circuit layer 40 is closed off from the region of the cavity 63 into which the encapsulating resin composition will infiltrate (the region where the resin portion 50 is provided). This prevents the encapsulating resin composition from infiltrating into the internal space 64. This prevents the exposed portions 32A, 32B, 32C, and 32D from being covered with the film (burrs) of the resin portion 50.
[0067] Furthermore, in this embodiment, surrounding portions 48A, 48B, 48C, and 48D are formed on the outer peripheries of through holes 45A, 45B, 45C, and 45D. Surrounding portions 48A, 48B, 48C, and 48D are formed higher than other portions of second circuit layer 40. Therefore, by abutting surrounding portions 48A, 48B, 48C, and 48D against protrusion 61C, gaps are less likely to form between the outer peripheries of through holes 45A, 45B, 45C, and 45D and protrusion 61C, which further suppresses the intrusion of the sealing resin composition into internal space 64. Therefore, it is possible to further suppress the exposure portions 32A, 32B, 32C, and 32D from being covered with burrs.
[0068] Unlike the present embodiment, if the portion of the conductor facing the protrusion (exposed portion) is not surrounded by the second circuit layer, i.e., if the internal space defined by the exposed portion of the conductor, the protrusion, and the second circuit layer communicates with the region of the cavity into which the encapsulating resin composition will penetrate, the encapsulating resin composition will penetrate into the internal space, causing burrs to form on the exposed portion. In this case, it is necessary to remove the burrs after forming the resin portion so as not to damage the second circuit layer or the exposed portion.
[0069] In this embodiment, the second pad 46B, the fourth pad 46D, and the fifth pad 46E are disposed inside the enclosure portion 48A. The third pad 46C, the sixth pad 46F, and the seventh pad 46G are disposed inside the enclosure portion 48B. With this configuration, like the exposed portions 32A, 32B, 32C, and 32D, it is possible to prevent burrs from forming on the pads 46B, 46C, 46D, 46E, 46F, and 46G.
[0070] After the placement step, the cavity 63 is filled with the encapsulating resin composition through the injection port to form the resin part 50. At this time, by appropriately adjusting the pressure at which the encapsulating resin composition is filled, the insulating layer 20 can be completely cured.
[0071] In the process of forming the resin part 50, the encapsulating resin composition does not flow into the areas where the plurality of protrusions 61C are arranged, the areas where the protrusions 61C abut the second circuit layer 40, or the areas of the cavity 63 that are separated from the areas filled with the encapsulating resin composition (the internal space 64 described above). As a result, openings 52 are formed in the resin part 50 in the areas corresponding to the plurality of protrusions 61C (see FIGS. 2 and 8). Parts of the second circuit layer 40 and the exposed portions 32A, 32B, 32C, and 32D of the conductors 31 are exposed from the resin part 50.
[0072] After the resin portion 50 is formed, the mold 60 is removed, thereby completing the manufacturing of the circuit board 1 with a heat sink.
[0073] (Electrical junction box 2) The heat sink-equipped circuit board 1 can be used, for example, in an electrical junction box 2. As shown in Figures 3 and 4, the electrical junction box 2 of this embodiment includes the heat sink-equipped circuit board 1 (see Figures 1 and 2), resistors 3 and 4 (examples of electronic components), and FETs 5 and 6 (examples of electronic components).
[0074] 3, the resistor 3 is electrically connected to the second pad 46B and the fourth pad 46D of the second circuit layer 40. The resistor 3 is connected to the second pad 46B and the fourth pad 46D by soldering. The resistor 4 is electrically connected to the third pad 46C and the sixth pad 46F of the second circuit layer 40. The resistor 4 is electrically connected to the third pad 46C and the sixth pad 46F by soldering.
[0075] FET 5 has a source 5A, a drain 5B, and a gate 5C. Source 5A is three elongated terminals extending from the package body of FET 5. Drain 5B is a plate-shaped terminal provided on the underside of the package body of FET 5. Gate 5C is one elongated terminal extending from the package body of FET 5. Gate 5C is disposed below source 5A in the figure. FET 6 is configured similarly to FET 5, and has a source 6A, a drain 6B, and a gate 6C.
[0076] The source 6A is electrically connected to the exposed portion 32B of the first circuit layer 30. The source 6A is connected to the exposed portion 32B by soldering. As shown in FIG. 4 , the drain 6B is electrically connected to the exposed portion 32D of the first circuit layer 30. The drain 6B is connected to the exposed portion 32D by soldering. The drain 6B is connected to the exposed portion 32D by solder S1. The gate 6C is electrically connected to the seventh pad 46G of the second circuit layer 40. The gate 6C is connected to the seventh pad 46G by soldering. The gate 6C is connected to the seventh pad 46G by solder S2.
[0077] As shown in Figure 3, the source 5A is electrically connected to the exposed portion 32A of the first circuit layer 30. The source 5A is connected to the exposed portion 32A by soldering. The drain 5B is electrically connected to the exposed portion 32C of the first circuit layer 30 (see Figures 1, 3, and 4). The drain 5B is connected to the exposed portion 32C by soldering. The gate 5C is electrically connected to the fifth pad 46E of the second circuit layer 40. The gate 5C is connected to the fifth pad 46E by soldering.
[0078] 3 , the fifth pad 46E is disposed near the exposed portion 32A, which makes it easy to connect the FET 5 to both the first circuit layer 30 and the second circuit layer 40. In addition, the seventh pad 46G is disposed near the exposed portion 32B, which makes it easy to connect the FET 6 to both the first circuit layer 30 and the second circuit layer 40.
[0079] The terminals 33 of the conductors 31 of the first circuit layer 30 are connected to a large current path including, for example, a high-voltage battery. By controlling the on / off of the FETs 5 and 6, the multiple conductors 31 of the first circuit layer 30 can be connected or disconnected.
[0080] The second circuit layer 40 (flexible printed circuit board 40A) forms a switching circuit for FETs 5 and 6. The first pad 46A is connected to an external control device. The control device controls the on / off of FETs 5 and 6. The control device is capable of applying a gate voltage to gates 5C and 6C of FETs 5 and 6 through the second circuit layer 40. A lower current flows through the switching circuits of FETs 5 and 6 compared to the first circuit layer 30. Therefore, even if the second circuit layer 40 is formed thinner than the first circuit layer 30, heat generation is less likely to be a problem.
[0081] In this embodiment, the first pad 46A is provided on the extension portion 44. Because the extension portion 44 is bendable, the electrical junction box 2 can be positioned in various relative positions with respect to the control device. For example, the electrical junction box 2 may be positioned so as to be stacked on top of the control device in the vertical direction.
[0082] (Operation and Effects of the Embodiments) (1) The circuit board 1 with a heat sink of the embodiment includes a first circuit layer 30 having a plurality of conductors 31, a heat sink 10 in thermal contact with the first circuit layer 30, an insulating layer 20 interposed between the first circuit layer 30 and the heat sink 10, a second circuit layer 40 disposed so as to sandwich the first circuit layer 30 together with the insulating layer 20, and a resin portion 5 that integrally holds the first circuit layer 30, the heat sink 10, the insulating layer 20, and the second circuit layer 40. 0, the first circuit layer 30 has exposed portions 32A, 32B, 32C, and 32D where parts of the conductor 31 are exposed to the outside, the second circuit layer 40 has an insulating base material 41 and a conductive layer 42 formed on the base material 41, and the conductive layer 42 has pads (a first pad 46A, a second pad 46B, a third pad 46C, a fourth pad 46D, a fifth pad 46E, a sixth pad 46F, and a seventh pad 46G) exposed to the outside.
[0083] With this configuration, the circuit board 1 with a heat sink includes the second circuit layer 40 in addition to the first circuit layer 30, and the conductive layer 42 of the second circuit layer 40 is easily changeable in shape and layout, thereby improving the degree of freedom in designing the circuit in the circuit board 1 with a heat sink.
[0084] (2) In the embodiment, the second circuit layer 40 has the through holes 45A, 45B, 45C, and 45D, and the exposed portions 32A, 32B, 32C, and 32D are exposed to the outside through the through holes 45A, 45B, 45C, and 45D.
[0085] With this configuration, when manufacturing a circuit board 1 with a heat sink, the outer periphery of the through holes 45A, 45B, 45C, and 45D is pressed with the convex portion 61C of the mold 60, and the mold 60 is filled with a sealing resin composition, thereby preventing the exposed portions 32A, 32B, 32C, and 32D from being covered with the resin portion 50.
[0086] (3) In the embodiment, the second circuit layer 40 has surrounding portions 48A, 48B, 48C, and 48D arranged on the outer periphery of the through holes 45A, 45B, 45C, and 45D so as to surround the through holes 45A, 45B, 45C, and 45D, and the surrounding portions 48A, 48B, 48C, and 48D have a shape that is raised higher than other portions of the second circuit layer 40.
[0087] With this configuration, the provision of the surrounding portions 48A, 48B, 48C, and 48D makes it less likely that gaps will form between the outer peripheries of the through holes 45A, 45B, 45C, and 45D and the protrusions 61C of the mold 60, thereby further preventing the exposed portions 32A, 32B, 32C, and 32D from being covered by the resin portion 50.
[0088] (4) In the embodiment, the pads (fifth pad 46E, seventh pad 46G) are disposed near the exposed portions 32A and 32B.
[0089] This configuration makes it easier to connect electronic components (FETs 5 and 6) to both the pads and the exposed portions 32A and 32B.
[0090] (5) In the embodiment, the first circuit layer 30 and the second circuit layer 40 are preferably bonded together by an adhesive layer.
[0091] With this configuration, the first circuit layer 30 and the second circuit layer 40 can be easily positioned.
[0092] (6) In the embodiment, the second circuit layer 40 includes the extension 44 that extends outward from the outer edge of the resin part 50, and the extension 44 includes a pad (first pad 46A).
[0093] Such a configuration may facilitate electrical connection between the second circuit layer 40 and an external device (control device).
[0094] (7) The electrical connection box 2 of this embodiment includes a circuit board 1 with a heat sink and at least one electronic component (resistors 3, 4, FETs 5, 6) electrically connected to at least one of the first circuit layer 30 and the second circuit layer 40.
[0095] (8) In an embodiment, the at least one electronic component includes FETs 5 and 6, the sources 5A and 6A and the drains 5B and 6B of the FETs 5 and 6 being electrically connected to the first circuit layer 30, and the gates 5C and 6C of the FETs 5 and 6 being electrically connected to the second circuit layer 40.
[0096] With this configuration, the first circuit layer 30 can be used as a current path through which a large current flows, and the second circuit layer 40 can be used as a switching circuit for the FETs 5 and 6 .
[0097] (9) The manufacturing method of the heat sink-equipped circuit board 1 of the embodiment includes the steps of preparing the heat sink 10, preparing the insulating layer 20, preparing the plurality of conductors 31, forming the second circuit layer 40, preparing a mold 60 having a plurality of protrusions 61C in a cavity 63, an arrangement step of stacking the heat sink 10, the insulating layer 20, the plurality of conductors 31, and the second circuit layer 40 in this order and arranging them in the cavity 63 of the mold 60, and a step of filling the cavity 63 with an encapsulating resin composition to form a resin portion 50. In the arrangement step, the plurality of protrusions 61C are in contact with the second circuit layer 40, and some of the plurality of conductors 31 are arranged opposite some of the plurality of protrusions 61C.
[0098] According to such a method for manufacturing the circuit board 1 fitted with a heat sink, the degree of freedom in designing the circuit in the circuit board 1 fitted with a heat sink can be improved.
[0099] (10) In an embodiment, in the process of forming the second circuit layer 40, a plurality of through holes 45A, 45B, 45C, and 45D are provided in the second circuit layer 40, and in the placement process, the plurality of protrusions 61C are placed in contact with the outer peripheries of the plurality of through holes 45A, 45B, 45C, and 45D, and some of the plurality of conductors 31 are placed opposite some of the plurality of protrusions 61C through the plurality of through holes 45A, 45B, 45C, and 45D.
[0100] According to this manufacturing method of the circuit board 1 fitted with a heat sink, it is possible to prevent the exposed portions 32A, 32B, 32C, and 32D from being covered with the resin portion 50.
[0101] (Other Embodiments) The above embodiment can be modified as follows: The above embodiment and the following modifications can be combined with each other within the scope of technical compatibility.
[0102] In the above embodiment, the second circuit layer 40 is the flexible printed circuit board 40A, 40B, but the second circuit layer may be another circuit body. For example, the second circuit layer may be a hard substrate or a flexible flat cable (FFC).
[0103] In the above embodiment, the flexible printed circuit boards 40A, 40B constituting the second circuit layer 40 have only one conductive layer 42, but the second circuit layer 40 may be composed of a multi-layer circuit body having multiple conductive layers.
[0104] In the above embodiment, the FETs 5 and 6 and the resistors 3 and 4 are exemplified as the electronic components of the electrical junction box 2. However, the electronic components of the present disclosure include any electronic components other than the FETs and resistors.
[0105] In the above embodiment, the first circuit layer 30 includes the terminal portion 33. However, the first circuit layer does not necessarily have to include the terminal portion.
[0106] 1: Circuit board with heat sink 2: Electrical junction box 3, 4: Resistor 5: FET 5A: Source 5B: Drain 5C: Gate 6: FET 6A: Source 6B: Drain 6C: Gate 10: Heat sink 11: Base plate 20: Insulating layer 30: Circuit layer 31: Conductor 32: Top surface 32A, 32B, 32C, 32D: Exposed portion 33: Terminal portion 33A: Terminal hole 40: Second circuit layer 40A, 40B: Flexible printed circuit board 41: Base material 42: Conductive layer 42A: First wiring portion 42B: Second wiring portion 42C: Third wiring portion 42D: Fourth wiring portion 43: Cover layer 43A, 43B, 43C: Opening 44: Extension portion 45A, 45B, 45C, 45D: Through hole 46A: First pad 46B: Second pad 46C: Third pad 46D: Fourth pad 46E: Fifth pad 46F: Sixth pad 46G: Seventh pad 47A, 47B, 47C, 47D: Annular portion 48A, 48B, 48C, 48D: Surrounding portion 50: Resin portion 51: Upper surface 52: Opening 60: Mold 61: First mold 61A: Base wall 61B: Peripheral wall 61C: Convex portion 61D: Protrusion 62: Second mold 62A: Base wall 62B: Peripheral wall 63: Cavity 64: Internal space S1, S2: Solder
Claims
1. A circuit board with a heat sink comprising: a first circuit layer having a plurality of conductors; a heat sink in thermal contact with said first circuit layer; an insulating layer interposed between said first circuit layer and said heat sink; a second circuit layer arranged so as to sandwich said first circuit layer together with said insulating layer; and a resin part that integrally holds said first circuit layer, said heat sink, said insulating layer, and said second circuit layer; wherein said first circuit layer has an exposed portion where a portion of said conductors is exposed to the outside; and said second circuit layer comprises an insulating base material and a conductive layer formed on said base material, and said conductive layer has a pad exposed to the outside.
2. The circuit board with a heat sink according to claim 1, wherein a through hole is provided in the second circuit layer, and the exposed portion is exposed to the outside through the through hole.
3. A circuit board with a heat sink as described in claim 2, wherein the second circuit layer has an enclosing portion disposed on the outer periphery of the through hole so as to surround the through hole, and the enclosing portion has a shape that is higher than other portions of the second circuit layer.
4. The circuit board with a heat sink according to claim 1, wherein said pad is disposed in the vicinity of said exposed portion.
5. The circuit board with a heat sink according to claim 1, wherein the first circuit layer and the second circuit layer are bonded together by an adhesive layer.
6. The circuit board with a heat sink according to claim 1, wherein the second circuit layer has an extension extending outward from the outer edge of the resin portion, and the extension has the pad.
7. An electrical connection box comprising: a circuit board with a heat sink according to any one of claims 1 to 6; and at least one electronic component electrically connected to at least one of the first circuit layer and the second circuit layer.
8. The electrical junction box according to claim 7, wherein the at least one electronic component includes a FET, the source and drain of the FET are electrically connected to the first circuit layer, and the gate of the FET is electrically connected to the second circuit layer.
9. A method for manufacturing a circuit board with a heat sink, comprising: a step of preparing a heat sink; a step of preparing an insulating layer; a step of preparing a plurality of conductors; a step of forming a second circuit layer; a step of preparing a mold having a plurality of protrusions within a cavity; an arrangement step of arranging the heat sink, the insulating layer, the plurality of conductors, and the second circuit layer in this order within the cavity of the mold; and a step of forming a resin portion by filling the cavity with an encapsulating resin composition, wherein in the arrangement step, the plurality of protrusions are in contact with the second circuit layer and some of the plurality of conductors are arranged opposite some of the plurality of protrusions.
10. A method for manufacturing a circuit board with a heat sink as described in claim 9, wherein in the step of forming the second circuit layer, a plurality of through holes are provided in the second circuit layer, and in the placement step, the plurality of protrusions are placed in contact with the outer peripheries of the plurality of through holes, and some of the plurality of conductors are placed opposite some of the plurality of protrusions through the plurality of through holes.
Citation Information
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