Power conversion device

Abstract

A power conversion device according to the present invention comprises: a semiconductor package having a semiconductor element, a first conductor electrically connected to the semiconductor element, and a sealing resin sealing the semiconductor element and the first conductor and exposing the surface of the first conductor; and a wiring board bonded to the surface of the first conductor via a conductive bonding material. The semiconductor package has protrusions that maintain an interval between the first conductor and the wiring board around the surface of the first conductor. The wiring board has a resist layer on the surface. The resist layer has openings in the region facing the surface of the first conductor and the regions facing the protrusions.

Description

Power Conversion Device

[0001] The present invention relates to a power conversion device.

[0002] Japanese Patent Application Laid-Open No. 2003-144992 discloses a semiconductor device having a protrusion for adjusting the solder thickness to a constant value when soldering to a heat dissipation member.

[0003] Patent No. 5344888

[0004] In view of the technology described in Patent Document 1 below, an object of the present invention is to provide a power conversion device that achieves reduced voids, suppressed variations in thermal resistance, heat dissipation properties, and compactness.

[0005] The power conversion device comprises a semiconductor package having a semiconductor element, a first conductor electrically connected to the semiconductor element, and a sealing resin that seals the semiconductor element and the first conductor and exposes the surface of the first conductor, and a wiring board that is joined to the surface of the first conductor via a conductive bonding material, wherein the semiconductor package has a protrusion around the surface of the first conductor that maintains a gap between the first conductor and the wiring board, and the wiring board has a resist layer on its surface, and the resist layer has openings in an area facing the surface of the first conductor and an area facing the protrusion.

[0006] It is possible to provide a power conversion device that achieves reduced voids, suppressed variations in thermal resistance, improved heat dissipation, and miniaturization.

[0007] Cross-sectional view of a plurality of semiconductor packages according to one embodiment of the present invention. Overall perspective view of a semiconductor package on a wiring substrate according to one embodiment of the present invention. Cross-sectional view explaining the structure of a semiconductor package according to one embodiment of the present invention. Perspective view explaining the structure of a semiconductor package according to one embodiment of the present invention. First Modification Second Modification Third Modification Fourth Modification

[0008] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The following description and drawings are examples for explaining the present invention, and some omissions and simplifications have been made as appropriate for clarity of explanation. The present invention can be implemented in various other forms. Unless otherwise specified, each component may be singular or plural.

[0009] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0010] (First embodiment and overall configuration) (FIGS. 1 to 3) A power conversion device 100 has a semiconductor package 1, a heat dissipation member 2, a fixing member 3, and a wiring board 4. A plurality of semiconductor packages 1 are arranged adjacent to one another on the wiring board 4. The heat dissipation member 2 is a refrigerant flow path through which a refrigerant flows. The fixing member 3 is a member for fixing the semiconductor package 1, the heat dissipation member 2, and the wiring board 4 to one another. Fixing screws 5 pass through the heat dissipation member 2 and the wiring board 4 and are fastened to the fixing member 3. As a result, the heat dissipation member 2 and each semiconductor package 1 are pressed against the wiring board 4 and fixed in place.

[0011] The fixing member 3 may be made of, for example, a metal, a metal oxide, a resin, or a composite material made of a mixture of two or more materials. When fastening and fixing with the fixing screws 5, a method of directly fixing to the wiring board 4 without using the fixing member 3 may also be used.

[0012] 3 , the semiconductor package 1 includes a semiconductor element 10, a first conductor 11, a second conductor 12, an external terminal 12a, and a sealing resin 15. The first conductor 11, the second conductor 12, and the external terminal 12a are sealed by the sealing resin 15, with portions exposed and protruding from the sealing resin 15. The first conductor 11 and the second conductor 12 are electrically connected to the semiconductor element 10.

[0013] The semiconductor element 10 built into the semiconductor package 1 is a field effect transistor made of SiC, which is a wide band gap semiconductor, but other semiconductor elements such as an IGBT made of Si may also be used.

[0014] The semiconductor package 1 has a first surface 21 on the wiring substrate 4 side and a second surface 22 on the heat dissipation member 2 side. The first surface 21 and the second surface 22 are surfaces that face each other on the semiconductor package 1. On the first surface 21, a portion of the first conductor 11 is exposed from the sealing resin 15. On the second surface 22, a portion of the second conductor 12 is exposed from the sealing resin 15.

[0015] A conductive bonding material 6 such as solder is provided between the first surface 21 and the wiring board 4, and the first surface 21 and the wiring board 4 are electrically bonded to each other by the conductive bonding material 6. A thermally conductive insulating member 7 is provided between the second surface 22 and the heat dissipation member 2, and the insulating member 7 thermally connects the surface of the second conductor 12 exposed on the second surface 22 to the heat dissipation member 2.

[0016] The wiring board 4 has a copper pattern 14. The copper pattern 14 is formed in multiple layers on the wiring board 4, and the copper pattern 14 on the surface of the wiring board 4 facing the semiconductor package 1 is electrically connected to the external terminal 12 a and the first conductor 11 via the conductive bonding material 6.

[0017] The copper pattern 14 includes multiple wiring layers, such as positive wiring, negative wiring, and AC wiring for configuring an inverter circuit, gate wiring for controlling the driving of the semiconductor package, etc. Furthermore, thick copper wiring exceeding 100 μm can be used for these wiring layers in order to pass a large current.

[0018] The wiring board 4 has a resist layer 8 on the surface on which the semiconductor package 1 is mounted. The resist layer 8 has openings 8a in an area facing the surface of the first conductor 11 and an area facing the protrusion 1b described below. This allows the conductive bonding material 6 and the protrusion 1b to be electrically connected to the copper pattern 14 of the wiring board 4 without coming into contact with the resist layer 8.

[0019] As a method for not providing the resist layer 8 on the surface of the wiring board 4 only in the target area, it is possible to not apply the resist layer 8 to the target area in advance, or to remove the resist layer 8 in the target area in a process before the semiconductor package 1 is mounted on the wiring board 4.

[0020] A portion of the first conductor 11 is exposed from the sealing resin 15 at the first surface 21, and the surface of the first conductor 11 exposed at the first surface 21 and the wiring board 4 are electrically connected to each other via the conductive bonding material 6. As a result, electrodes electrically connected to the semiconductor element 10 are provided on the heat dissipation surface, that is, the first surface 21, so that the number of joints between the wiring board 4 and the semiconductor package 1 can be reduced, and the number of terminals that need to be formed from the semiconductor package 1 to the wiring board 4 can be reduced. In addition, the process of processing the terminal shape required for bonding to the wiring board 4 can be eliminated. Furthermore, the conductive bonding material 6 applied to the wiring board 4 can be unified, which simplifies the process and reduces the number of management items.

[0021] The conductive bonding material 6 is not limited to solder, and may be a metal, a metal oxide, a resin, or a composite material made by mixing two or more of these. The insulating member 7 may be a metal oxide, a resin, a metal that has been subjected to an insulating treatment, or a composite material made by mixing two or more of these.

[0022] The semiconductor package 1 has a protrusion 1b that protrudes around the exposed surface of the first conductor 11 in a direction away from the heat dissipation member 2. The protrusion 1b is part of the sealing resin 15 and is formed during the resin sealing stage in the manufacturing process of the semiconductor package 1. The height of the protrusion 1b can be determined, for example, depending on the thickness required to ensure the bonding reliability of the conductive bonding material 6. In addition, the number of protrusions 1b per semiconductor package is two or more, and their shape is not limited to a columnar protrusion, but may also be tapered, hemispherical, or other shapes. The hemispherical shape of the protrusion 1b results in point contact, making the mounting state of the semiconductor package 1 on the wiring substrate 4 less susceptible to variations in the installation state of the tip surface of the protrusion 1b.

[0023] Protrusion 1b is formed in a position in the thickness direction of wiring board 4 that does not overlap the surface wiring pattern of copper pattern 14 of wiring board 4. This prevents copper pattern 14 from being exposed through opening 8a, thereby insulating and protecting wiring board 4. Although not shown, protrusion 1b may also be formed in a position in the thickness direction of wiring board 4 that overlaps the surface wiring pattern of copper pattern 14 of wiring board 4. This allows protrusion 1b to abut against copper pattern 14, which has a higher degree of flatness than the surface of resist layer 8, thereby suppressing height variations with high precision.

[0024] Because the semiconductor package 1 has the protrusion 1b, the distance between the first conductor 11 and the wiring board 4 can be maintained constant, thereby suppressing variations in solder thickness that occur when multiple semiconductor packages 1 are joined on the same plane of the wiring board 4 with the conductive bonding material 6, and preventing variations in thermal resistance between each semiconductor package 1, thereby achieving high output.

[0025] Furthermore, by forming the protrusion 1b using a mold used in the sealing stage with the sealing resin 15 when manufacturing the semiconductor package 1, the height dimension to the second surface 22 can be controlled with high precision based on the surface of the wiring board 4, which is the installation surface of the protrusion 1b, and there is no need to absorb the thickness variations of the conductive bonding material 6 between multiple semiconductor packages 1 or the tilt of the semiconductor package 1 using the insulating member 7 on the second surface 22 side.

[0026] Furthermore, the thickness of the insulating member 7 provided on the second surface 22 of the semiconductor package 1, which is the surface opposite to the first surface 21 on which the protrusion 1b is provided, can be made uniform and thin. Furthermore, the thickness of the insulating member 7 can be made smaller than the height of the protrusion 1b, which contributes to miniaturization. Furthermore, the thinner the insulating member 7, the lower the thermal resistance to the heat dissipation member 2, thereby lowering the internal temperature of the semiconductor package 1 during operation. Furthermore, since there is a margin of error up to the maximum operating temperature of the components of the semiconductor package 1 compared to conventional configurations, it is possible to achieve higher output (higher voltage and larger current) while improving the heat dissipation performance of the semiconductor package 1.

[0027] (FIG. 4) The semiconductor package 1 has a protrusion 1b and a void discharge groove 1a on the first surface 21 side. The void discharge groove 1a has a tapered shape and is formed on the outer periphery of the surface of the first conductor 11, and has a structure in which the tapered shape becomes deeper as it moves from the first conductor 11 toward the outer periphery on the first surface 21. With this configuration, when the semiconductor package 1 is bonded to the wiring board 4, voids generated in the conductive bonding material 6 can easily escape to the outside, thereby suppressing variations in thermal resistance.

[0028] (First Modification) (FIG. 5) In order to improve the insulating performance between the second surface 22 of the semiconductor package 1 and the heat dissipation member 2 in response to the increase in output of the power conversion device 100, an insulating plate 13 may be disposed. The insulating plate 13 has higher insulating performance than the thermally conductive insulating member 7 and also has thermal resistance that is easier to uniformly control. While the insulating plate 13 is illustrated as being sandwiched between the insulating members 7, the configuration is not limited to this and the insulating plate 13 may be disposed between the second surface 22 and the heat dissipation member 2. The insulating plate 13 may be, for example, an insulating ceramic plate, and may be made of a metal, a metal oxide, a resin, or a composite material made of a mixture of two or more materials.

[0029] This configuration improves the insulation performance more than when only the insulating member 7 is disposed between the heat dissipation member 2 and the semiconductor package 1, and enables the power conversion device 100 to operate at a higher voltage. Furthermore, since there is no need to thicken the insulating member 7 in response to an increase in voltage, voids and compositional imbalances do not occur inside the insulating member 7, and the thermal resistance does not vary within the insulating member 7.

[0030] (Second Modification) (FIG. 6) The wiring board 4 may have through holes 14a that penetrate the wiring board 4 in the thickness direction and have electrical and thermal conductivity. By joining the through holes 14a for heat transfer to the first conductors 11 with the conductive bonding material 6 in this way, the through holes 14a for heat transfer can also serve as electrical wiring, achieving both electrical conduction and heat dissipation and contributing to a reduction in the number of wires on the wiring board 4. The through holes 14a do not need to be hollow and may be configured as copper inlays or thermal vias. Furthermore, the heat dissipation member 2 may be disposed in contact with the wiring board 4 as long as insulation from the wiring board 4 can be ensured.

[0031] (Third Modification) (FIG. 7) The protrusions provided for the purpose of maintaining the gap between the surface of the first conductor 11 and the printed wiring board 4 are not limited to being integral with the sealing resin 15 that seals the semiconductor package 1 as described above, but may be integral with the wiring board 4. The wiring board 4 has protrusions 4a, which have a shape that protrudes from the wiring board 4 toward the first surface 21 of the semiconductor package 1 and can achieve the same effect as described above by coming into contact with the semiconductor package 1.

[0032] (Fourth Modification) (FIG. 8) The protrusion provided for the purpose of maintaining the distance between the surface of the first conductor 11 and the printed wiring board 4 may be a member separate from the sealing resin 15 and the wiring board 4. In this way, by disposing the separate protrusion 16 provided separately and independently from the semiconductor package 1 and the wiring board 4 between the semiconductor package 1 and the wiring board 4, it is possible to achieve the same effect as described above.

[0033] According to the embodiment of the present invention described above, the following advantageous effects are achieved.

[0034] (1) A power conversion device 100 includes a semiconductor package 1 having a semiconductor element 10, a first conductor 11 electrically connected to the semiconductor element 10, and a sealing resin 15 that seals the semiconductor element 10 and the first conductor 11 and exposes the surface of the first conductor 11, and a wiring board 4 that is joined to the surface of the first conductor 11 via a conductive bonding material 6, wherein the semiconductor package 1 has a protrusion 1b around the surface of the first conductor 11 that maintains a gap between the first conductor 11 and the wiring board 4, and the wiring board 4 has a resist layer 8 on its surface, and the resist layer 8 has openings in a region facing the surface of the first conductor 11 and a region facing the protrusion. This configuration makes it possible to provide a power conversion device 100 that achieves reduced voids, suppressed variations in thermal resistance, improved heat dissipation, and miniaturization.

[0035] (2) In the semiconductor package 1, the void evacuation groove 1a is provided on the outer periphery of the surface of the first conductor 11. This allows voids generated when the solder melts to escape to the outside, thereby suppressing variations in thermal resistance.

[0036] (3) The void evacuating grooves 1a have a tapered shape that becomes deeper toward the outer periphery, which can more efficiently evacuate voids.

[0037] (4) In the thickness direction of the wiring board 4, the protruding portion 1b does not overlap with the surface wiring pattern 14 of the wiring board 4. In this way, the copper pattern 14 is not exposed from the opening 8a, and therefore the wiring board 4 can be insulated and protected.

[0038] (5) The protrusions 1b overlap the surface wiring pattern 14 of the wiring board 4 in the thickness direction of the wiring board 4. This allows the protrusions 1b to abut against the copper pattern 14, which has a high degree of flatness, thereby suppressing variations in height with high precision.

[0039] (6) The protrusions 1b are formed in a hemispherical shape. This configuration allows the tips of the protrusions 1b to form point contacts, making them less susceptible to variations in the protrusion surface and reducing variations in height.

[0040] (7) The semiconductor package 1 is electrically connected to the semiconductor element 10 and has a second conductor 12 whose surface is exposed by the sealing resin 15 on the surface opposite to the surface of the first conductor 11, and the surface of the second conductor 12 is thermally connected to the heat dissipation member 2 via the heat conduction member 7, and the thickness of the heat conduction member is smaller than the height of the protrusion 1b. This configuration achieves both improved heat dissipation and miniaturization.

[0041] The present invention is not limited to the above-described embodiments, and various modifications and combinations of other configurations are possible without departing from the spirit of the present invention. Furthermore, the present invention is not limited to those having all of the configurations described in the above-described embodiments, and includes those in which some of the configurations are omitted.

[0042] REFERENCE SIGNS LIST 1 semiconductor package 1a void evacuation groove 1b protrusion 2 heat dissipation member 3 fixing member 4 wiring board 4a protrusion 5 fixing screw 6 conductive bonding material 7 insulating member 8 resist layer 8a opening 10 semiconductor element 11 first conductor 12 second conductor 13 insulating plate 14 copper pattern 14a through hole 15 sealing resin 16 separate protrusion 21 first surface 22 second surface 100 power conversion device

Claims

1. A power conversion device comprising: a semiconductor package having a semiconductor element, a first conductor electrically connected to the semiconductor element, and a sealing resin that seals the semiconductor element and the first conductor and exposes the surface of the first conductor; and a wiring board that is joined to the surface of the first conductor via a conductive bonding material, wherein the semiconductor package has protrusions around the surface of the first conductor that maintain a gap between the first conductor and the wiring board, and the wiring board has a resist layer on its surface, and the resist layer has openings in an area facing the surface of the first conductor and an area facing the protrusions.

2. The power conversion device according to claim 1, wherein the semiconductor package has a void discharge groove on the outer periphery of the surface of the first conductor.

3. The power conversion device according to claim 2, wherein the void discharge grooves have a tapered shape that becomes deeper toward the outer periphery.

4. The power conversion device according to claim 1, wherein the protrusion does not overlap with a surface wiring pattern of the wiring board in the thickness direction of the wiring board.

5. The power conversion device according to claim 1, wherein the protrusion overlaps with a surface wiring pattern of the wiring board in the thickness direction of the wiring board.

6. The power conversion device according to claim 1, wherein the protrusion is formed in a hemispherical shape.

7. The power conversion device according to claim 1, wherein the semiconductor package has a second conductor electrically connected to the semiconductor element and having a surface exposed by the sealing resin on a surface opposite to a surface of the first conductor, the surface of the second conductor being thermally connected to a heat dissipation member via a heat conduction member, and the thickness of the heat conduction member is smaller than the height of the protrusion.

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