High aspect ratio plasma etching with controlled declogging

Abstract

A method of etching a feature includes providing a substrate including at least one layer of a material to be etched and a mask over the at least one layer to an etch chamber, etching a feature in the at least one layer, through a mask opening, by exposing the substrate to a first plasma from a first etch chemistry, and applying a first bias to the substrate. The etching forms a clogging deposit in the feature and / or in the opening in the mask. The method includes declogging the feature by exposing the substrate to a second plasma from a second etch chemistry and applying a second bias that is less than the first bias and between a first voltage threshold for etching the mask and a second voltage where the clogging deposit is substantially etched without substantially etching the mask.

Description

HIGH ASPECT RATIO PLASMA ETCHING WITH CONTROLLED DECLOGGINGRELATED APPLICATION(S)

[0001] A PCT Request Form is filed concurrently with this specification as part of the present application. Each application that the present application claims benefit of or priority to as identified in the concurrently filed PCT Request Form is incorporated by reference herein in its entirety and for all purposes.BACKGROUND

[0002] Plasma etch typically requires anisotropic etch performance to have a vertical etch rate much higher than a lateral etch rate. Ideally, the lateral etch rate is close to zero. As a result, ions are necessary for anisotropic etch behavior. In addition, etch selectivity requires that the mask material is not substantially chemically etched in plasma.

[0003] Background and contextual descriptions contained herein are provided solely for the purpose of generally presenting the context of the disclosure. Much of this disclosure presents work of the inventors, and simply because such work is described in the background section or presented as context elsewhere herein does not mean that such work is admitted prior art.SUMMARY

[0004] Provided are methods of etching a feature in a substrate for fabricating an electronic device. The method includes providing a substrate to an etch chamber. The substrate includes at least one layer of a material to be etched and a mask over the at least one layer. The method further includes etching a feature in the at least one layer, through an opening in the mask, by exposing the substrate to a first plasma produced using a first etch chemistry, and applying a first bias voltage having a first voltage magnitude to the substrate or to an electrode adjacent to the substrate. The etching forms a clogging deposit in the feature and / or in the opening in the mask. The method further includes declogging the feature by exposing the substrate to a second plasma produced using a second etch chemistry that is substantially the same as the first etch chemistry and applying a second bias voltage having a second voltage magnitude that is less than the first voltage magnitude and between a first voltage threshold at which the mask is substantially etched and a second voltage threshold at which the clogging deposit is substantially etched but the mask is not substantially etched.

[0005] In some embodiments, the etching and declogging operations are performed in the etch chamber.

[0006] In some embodiments, the etch chamber includes a transformer coupled plasma (TCP) power source.

[0007] In some embodiments, the etch chamber includes a controller configured to increase the magnitude of bias voltage applied to the substrate as electrical charge on the substrate increases.

[0008] In some embodiments, the etch chamber includes a controller configured to control the first and / or the second bias voltage such that species in the first plasma and / or the second plasma have an ion energy confined within a certain energy distribution.

[0009] In some embodiments, the feature has an aspect ratio of at least about 10: 1.

[0010] In some embodiments, the feature has an aspect ratio of at least about 100:1.

[0011] In some embodiments, method further includes removing a byproduct produced by the etching the at least one layer from the feature. The removing byproduct includes reducing or eliminating a plasma power in the etch chamber.

[0012] In some embodiments, the first plasma has a first plasma power, the second plasma has a second plasma power, and the second plasma power is greater than the first plasma power.

[0013] In some embodiments, the first plasma power is about 1000 to 2000 W and the second plasma power is about 3000 to 5000 W.

[0014] In some embodiments, the first voltage threshold is about 150 V or less. In some embodiments, the second voltage threshold is about 100 V or less.

[0015] In some embodiments, the first voltage magnitude is greater than the first voltage threshold.

[0016] In some embodiments, the second plasma has an ion energy distribution function characterized by a half maximum full width (HMFW) of about 5 to 50 V.

[0017] In some embodiments, the method further includes repeating the etching and declogging operations while forming the feature.

[0018] In some embodiments, the etching and declogging operations are performed repeatedly at a frequency of about 1-1000 Hz.

[0019] In some embodiments, the etching operation has a duty cycle percentage of about 5-20 % and the declogging operation has a duty cycle percentage of about 70-95 %.

[0020] In some embodiments, the at least one layer includes amorphous carbon.

[0021] In some embodiments, the mask includes a silicon nitride, a silicon oxide, a silicon oxynitride, or any combination thereof.

[0022] Another aspect of the disclosure relates to an apparatus for processing a substrate. The apparatus includes an etch chamber configured to receive a substrate including at least one layer to be etched and a mask on the at least one layer, a plasma power source for generating a first plasma and a second plasma within the etch chamber, one or more gas inlets for providing a first etch chemistry and a second etch chemistry to the etch chamber, a substrate support for supporting the substrate, wherein the substrate support includes or is associated with an electrode configured to provide bias voltage to the substrate, and a controller. The controller is configured to cause etching a feature in the at least one layer, through an opening in the mask, by exposing the substrate to the first plasma produced using a first etch chemistry, and applying a first bias voltage having a first voltage magnitude to the substrate or to the electrode adjacent to the substrate. The etching forms a clogging deposit in the feature and / or in the opening in the mask. The controller is also configured to cause declogging the feature by exposing the substrate to the second plasma produced using a second etch chemistry that is substantially the same as the first etch chemistry and applying a second bias voltage having a second voltage magnitude that is less than the first voltage magnitude and between a first voltage threshold at which the mask is substantially etched and a second threshold voltage at which the clogging deposit is substantially etched but the mask is not substantially etched.

[0023] In some embodiments, the plasma power source includes a transformer coupled plasma (TCP) power source.

[0024] In some embodiments, the first plasma has a first plasma power and the second plasma has a second plasma power, and the second plasma power is greater than the first plasma power.

[0025] In some embodiments, the first plasma power is about 1000 to 2000 W and the second plasma power is about 3000 to 5000 W.

[0026] In some embodiments, the first bias voltage is about 150 V or less and the second bias voltage is about 100 V or less.

[0027] In some embodiments, the controller is further configured to cause repeating the etching and declogging while forming the feature.

[0028] In some embodiments, the controller is further configured to cause applying the first bias voltage and the second bias voltage at a frequency of about 1-1000 Hz.

[0029] In some embodiments, the apparatus further includes an outlet for removing an etch byproduct from the etch chamber.

[0030] In some embodiments, the first etch chemistry includes oxygen.

[0031] In some embodiments, the at least one layer includes amorphous carbon.

[0032] In some embodiments, the mask includes a silicon nitride, a silicon oxide, a silicon oxynitride, or any combination thereof.

[0033] These and other features of the disclosure will be presented below, sometimes with reference to drawings.BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1A schematically illustrates a sidewall profile of a high aspect ratio (HAR) etched feature at an initial etching stage.

[0035] Figure IB schematically illustrates a sidewall profile of a HAR etched feature including a clogging deposit and / or a bow after etching proceeds for a time beyond that required to produce the feature in Figure 1A.

[0036] Figure 1C schematically illustrates a sidewall profile of a HAR etched feature including an expanded bow after declogging at least a portion of the clogging deposit formed in Figure IB.

[0037] Figure 2A schematically illustrates a sidewall profile of a HAR etched feature at an initial etching stage with a clogging deposit on a mask layer according to some embodiments.

[0038] Figure 2B schematically illustrates a sidewall profile of a HAR etched feature after a portion of the clogging deposit is removed according to some embodiments.

[0039] Figure 3 presents the relationship between the etch rate of an oxide layer and an applied bias voltage according to some embodiments.

[0040] Figure 4 presents a flow chart of an example etch process for a HAR etched feature, including a HAR etching stage with a high bias voltage and a medium plasma power, a decloggingstage with a controlled bias voltage and a high plasma power, and an optional byproduct removal stage according to some embodiments.

[0041] Figure 5A schematically illustrates a sidewall profile of a HAR etched feature at an etching stage corresponding to operation 430 in Figure 4 according to some embodiments.

[0042] Figure 5B schematically illustrates a sidewall profile of a HAR etched feature of an optional byproduct removal stage corresponding to operation 440 in Figure 4 according to some embodiments.

[0043] Figure 5C schematically illustrates a sidewall profile of a HAR etched feature of a declogging stage corresponding to operation 450 in Figure 4 according to some embodiments.

[0044] Figure 6A illustrates the ion energy distribution function with two peaks across a broad energy range.

[0045] Figure 6B illustrates the ion energy distribution function with two peaks across the energy range narrower than Figure 6A.

[0046] Figure 6C illustrates the ion energy distribution function with a single peak substantially confined in a region for declogging according to some embodiments.

[0047] Figure 7 presents an etching apparatus according to some embodiments.

[0048] Figure 8 presents a semiconductor process cluster according to some embodiments.DETAILED DESCRIPTION

[0049] With the scaling in logic and memory devices such as DRAM and NAND devices, the features of such devices require ever higher aspect ratios. As an example, etched features often require aspect ratios greater than 10:1, e.g., ranging from 10:1 to 300: 1. To provide the etchant necessary at the etch front of such features, the etch process requires high ion energy. However, when using such high ion energies with a mask material that is not chemically etchable, an etch behavior called “mask clogging” or “mask capping” happens near the top of the mask material. This happens because mask material is physically sputtered, and the non-volatile sputtering byproduct sticks to the adjacent sidewall. See e.g., deposit 140 of Figure IB. As the duration of the etch process increases, the sputter-redeposition near top of the mask continues to reduce the opening of the feature, until complete “clogging” or “capping” happens.

[0050] Declogging is sometimes used in high aspect ratio feature etch processes. In one example, declogging employs an etch chemistry that is different from that of the primary etchoperation. This approach can remove the sputter-redeposition (clogging) material. However, because of the chemical composition of clogging material is usually very similar to the original mask material, chemical selectivity in plasma etch is difficult to achieve, resulting in significant mask height loss and etch profile control difficulties.

[0051] As an example, for a high aspect ratio (HAR) etch of carbon material under a mask including SiOx, SiNy, or SiOxNy, etc., a process may use an oxygen plasma as an etchant to etch the carbon. As an example, the ion energy in such process may be between 400 V to 5000 V, which is beyond the sputtering threshold of mask materials. The clogging material generated in this process may be, for example, a silicon oxide, SiOx. To remove the clogging material, a declogging operation may use a halogen-based etch chemistry such as one containing HF, NFs, CF4, CHxFy, and / or CxFy. However, this leads to mask damage and concomitant carbon etch profile degradation during or right after the declogging operation. Another issue is that this separate declogging operation, which does not substantially etch carbon, has a negative impact on the overall etch process throughput.

[0052] Certain embodiments disclosed herein employ a different declogging method, one that relies on physical sputtering rather than etch chemistry to declog features being etched. In some implementations, the physical sputtering is characterized by a bias threshold voltage, V* that depends on ion species and mask material. Because clogging material is created by a non-ideal sputtering process, it may have defects and may have a low density. It is sometimes considered to be a “fluffy” material. As a result, a declogging operation may performed at or above a second bias threshold voltage Vth2 that is typically lower than the original mask material threshold voltage Vthi but sufficient high to remove clogging material. Thus, the declogging operation may be performed by applying a bias voltage between Vth2 and Vthi. Within this regime, only clogging material is sputter away, while the original mask material is kept intact. In some implementations, the ions used for declogging are within a narrow band of energy distribution between Vth2 and Vthi . This ion energy distribution may be achieved by controlling the waveform used to bias the plasma.

[0053] The declogging process can be used as a separate step or combined with original plasma etch process as one of multiple pulsing states. Here is an example of a three state pulsing scheme:Statel: medium source plasma power (e.g., 1000 W to 3000 W for a transformer coupled plasma (TCP) source), with high bias voltage to provide a high etch rate, while improving the etched feature’s bottom shape, and limiting profile bowing and mask clogging; the duty cycle of this state may be about 3 % to 20 %.State2: very high source plasma power (3000 W to 10000 W), low bias voltage and narrow ion energy distribution within Vthi and Vth2; this will remove clogging material and optionally redistribute it inside the etched feature. Because the clogging material is redistributed along the depth of the feature, it may preferentially accumulate more at the bow location where it receives relatively little ion bombardment due to the geometry confinement.State3 (optional): turn off source (TCP) and bias voltage to let volatile byproduct diffuse out of the feature, and be pumped out of the vacuum chamber.

[0054] Figures 1A-1C schematically illustrate sidewall profiles of a high aspect ratio (HAR) etched feature, showing different stages of a conventional etch process during, e.g., the fabrication of a semiconductor device. The Figures illustrate the evolution of an etch process of a structure 100 to form an etched feature 130.

[0055] Figure 1A schematically illustrates the structure 100 including etched feature 130 at an initial etching stage. As illustrated, the structure 100 has a patterned mask layer 110 and a layer being etched 120. In some embodiments, layer 120 is an amorphous carbon layer (ACL). Prior to etching layer 120, patterned mask layer 110 is formed to define a portion of layer 120 to be etched. Initially, the etch process employs a first etch chemistry in the presence of a plasma that etches a portion of layer 120 under an opening in patterned mask layer 110. This forms an initial part of feature 130. The first etch chemistry may include oxygen in a plasma that generates ions. The first etch chemistry may selectively etch the material in layer 120 and not etch material in patterned mask layer 110. Initially, the etch profile of feature 130 may be relatively straight without a clogging deposit and without producing a noticeable bow or undercut.

[0056] Figure IB schematically illustrates the structure 100 and etched feature 130 after etching proceeds for a time beyond that required to produce the feature in Figure 1A. As mentioned, to effectively etch deep, HAR features, a high ion energy is required, which, in the example of Figures 1 A-C, tends to physically sputter mask material from patterned mask layer 110. At least a portion of the sputtered mask material may be redeposited on the sidewalls of the patterned mask layer 110 and form a clogging deposit 140, which may have substantially the same composition as the patterned mask layer 110. For example, as illustrated, the clogging deposit 140 may build up on the upper portion of the patterned mask layer 110. As explained, the material of clogging deposit 140 may be less dense than the patterned mask layer 110. As the clogging deposit 140 increases in size, the opening of feature 130 may be gradually narrowed. In some cases, if the sputtering of the patterned mask layer 110 continues without mitigating the growth of clogging deposit 140, feature 130 may be blocked by the clogging deposit 140, and the etching of the layer 120 cannotproceed further. Separately, due to the impact of clogging deposit 140 on ion trajectories in plasma, a bow 150 may form in layer 120. Specifically, the growth of bow 150 may be promoted by lateral etching from ion particles impinging on feature sidewalls in a non-vertical direction. As illustrated, bow 150 may be formed in an upper portion of feature 130.

[0057] Figure 1C schematically illustrates the evolution of the etching of structure 100 where a separate operation is performed to remove at least a portion of clogging deposit 140 from the feature sidewall of the patterned mask layer 110. The operation effectively unclogs feature 130. The unclogging may be performed using a second etch chemistry, which is different from the etch chemistry employed up to and through the evolution of the etch illustrated in Figures 1A and IB. In conventional processes, the second etch chemistry is often selective for the material of mask layer 110 (e.g., a silicon oxide material) over the material of layer 120 (e.g., carbon). This is because the material of clogging deposit 140 is chemically the same or similar to that of mask layer 110. The second etch chemistry may remove the material of clogging deposit 140, but in so doing also removes some of the material of the patterned mask layer 110, which thereby allows subsequent etching to expand bow 150 in layerl20. Note the reduced height of the patterned mask layer 110 in Figure 1C. The expanded bow 150 may reduce the mechanical stability of structure 100 against stresses induced by subsequent exposure to thermal and chemical conditions.

[0058] Figures 2A and 2B schematically illustrate a declogging process consistent with some embodiments of the present disclosure. Figures 2A and 2B provide a direct comparison with Figures IB and 1C. The structure 100 and etched feature 130 of Figures IB and 1C are formed according to a conventional etch process, while an etched feature 211 of Figures 2A and 2B in a structure 202 is formed according to some embodiments of the present disclosure. The structure 202 includes a mask layer 212 (e.g., a silicon and oxygen containing material) and a layer 214 being etched (e.g., carbon). The structure 202 in Figure 2A may correspond to the structure 100 in Figure IB. As described for Figures 1A-1C, a conventional etch process may produce a structure like the structure 202 including a clogging deposit 242 on the sidewall of mask layer 212 and a bow 252 on the sidewall of mask layer 212 of the material being etched. In a conventional declogging process, mask layer 212 would be eroded and bow 252 would increase in size when clogging deposit 242 is removed by an etch employing chemistry that attacks the material of mask layer 212.

[0059] In an example declogging process of this disclosure, such as one that produces an etch profile represented in Figure 2B, the etch chemistry does not substantially chemically attack the material of mask layer 212. Compared to the conventional declogging process used to form structure 100 and feature 130 as illustrated in Figure 1C, a declogging procedure of this disclosureremoves clogging material without substantially degrading the mask or introducing further bow in etched feature 211. As the example of Figure 2B illustrates, the declogging process can remove clogging material on the sidewall of the mask layer 212 and thereby effectively remove clogging deposit 242. Further, declogging process may redeposit the sputtered mask material from deposit 242 along the depth of feature 211 in the structure 202 to form a protective film 254 on the sidewalls of feature 21 1. As will be further described herein, a clogging deposit may be removed without significantly degrading the mask by controlling a bias voltage during the declogging phase of feature etching. A plasma bias voltage may be controlled between a first threshold voltage (Vthi) for etching the mask material and a second threshold voltage (Vth2), of smaller magnitude than Vthi , for etching clogging deposit. Also as further described herein, this selective declogging regime may further include confining the ion particle energy within a certain range.

[0060] Figure 3 illustrates the relationship between the etch rate of an oxide layer and an applied bias voltage. The oxide in the layer may be typical of material in a mask layer employed in some embodiments of this disclosure. The bias voltage may be applied through the substrate supported on a pedestal or chuck such as a vacuum chuck or an electrostatic chuck. In a typical example, the oxide layer may be etched by a plasma etching that incorporates physical sputtering. Figure 3 shows that, depending on the testing setup and etch chemistry, the oxide layer may not be substantially etched until a bias voltage increases to a threshold voltage (Vth of about 130 V), at which level the oxide begins to etch. Once the bias voltage exceeds the threshold voltage, the oxide etch rate proportionally increases with the bias voltage. The threshold voltage may vary depending on the material composition and / or structure. For example, a material having a higher bonding strength between constituents, or a higher density may require a higher threshold voltage. A material having a low density structure may have a reduced threshold voltage. For a given mask layer, the threshold bias voltage may also depend on certain plasma parameters such as the plasma power and plasma density. Those of skill in the art will understand how to determine a mask layer’s threshold voltage by any suitable test such as that represented by Figure 3.

[0061] Figure 4 illustrates a process flow diagram for etching a structure according to some embodiments of the present disclosure. A process 400 begins in an etch chamber at operation 410 by receiving a substrate having a structure formed thereon. In one example, the structure includes a patterned mask formed on a layer to have features etched therein. In one example, the layer may be an amorphous carbon layer (ACL).

[0062] In an operation 420, the etch chamber may be “primed” by producing a high-density plasma, which may be produced by applying a high RF plasma source power in the etch chamber. In one example, the priming plasma includes species formed from an etch chemistry including oxygen oroxygen-containing gases. In operation 420, the priming may be accompanied by application of a low or modest bias voltage, which may be set to a low level so that the ions produced would not have energy sufficient for substantially attack the mask layer or even etch the layer that is to be etched in the main process. In some embodiments, no bias power is applied during priming operation 420.

[0063] After priming, in an etch operation 430, the bias power is increased, and the source plasma power is optionally decreased. Under these conditions, ions from a first etch chemistry etch the layer beneath the mask openings. A high bias voltage applied to the ions may provide high ion energy, thereby driving the ions through the layer toward the substrate to form a deep etched feature, e.g., a HAR feature. A medium plasma source power may be desirable in minimizing the rate at which the mask is eroded.

[0064] In certain embodiments, the plasma generation conditions associated with operation 430 are controlled such that the ions approaching the substrate structure have a narrow ion energy distribution function (IEDF) tuned to primarily and efficiently sputter material from the layer to be etched.

[0065] According to some embodiments, at least two events may occur during operation 430. The ions and neutrals from the plasma physically and chemically react with the layer to form an etched feature. Separately, the ions having high ion energy may impinge on the patterned mask and physically sputter it. While the ions do not have a chemical composition that substantially attacks the mask, they have sufficient momentum, due to the high bias power, to physically sputter it. The sputtered mask material may be deposited on the sidewall of the patterned mask to form a clogging deposit. The clogging deposit may have substantially the same composition as the patterned mask. Typically, the clogging deposit may be less dense than the patterned mask. As the etching proceeds, a clogging deposit may increase in size, and, depending on the feature geometries and processing conditions, may block the opening of the adjacent etched features. A clogging deposit may change the trajectory of the incoming ions, and a bow may be formed in the upper portion of the layer due to the non- vertical impingement of the ions. In short, etch operation 430 may be accompanied by growth of a clogging deposit.

[0066] In an optional operation 440 following operation 430, the plasma source and bias power are turned off or substantially reduced. This allows etch byproducts generated during etch operation 430 to escape the feature. These byproducts may be generated by chemical and physical etching of the layer being etched. In operation 440, the etch byproducts may be removed from theetch chamber by purging while no further byproducts are being generated because neither a bias voltage nor a RF plasma source power is applied in the etch chamber.

[0067] After operation 430, and optionally operation 440, the process performs a declogging operation 450 to remove a clogging deposit formed on the sidewall of the patterned mask during an etch in operation 430. Declogging may remove a clogging deposit by predominantly physical sputtering of the clogging material rather than chemically etching the clogging deposit. Thus, declogging operation 450 may be performed with an etch chemistry that does not substantially attack the mask material. In fact, the etch chemistry may be selective for material intended to be etched away. In some implementations, the declogging etch chemistry has a composition that is substantially similar to that of the main etch process operation 430.

[0068] For declogging that relies on physical sputtering, the plasma power settings for the RF plasma source power and the bias voltage may be chosen to selectively remove the clogging deposit without substantially sputtering the mask layer.

[0069] Compared to etch operation 430, a lower bias power may be employed along with, optionally, a higher source plasma power. A bias voltage (V) may be set between a first threshold voltage (Vthi) at which the mask layer is substantially sputtered and a second, lower, threshold voltage (Vth2) at which the clogging deposit is sputtered away without substantially sputtering the mask layer. Vthi may be greater than Vth2 by an amount that reflects the density difference between the patterned mask and a clogging deposit, both having substantially the same composition. By applying a bias voltage between the first and second threshold voltages, Vthi and Vth2, the ions have sufficient energy to remove a clogging deposit by sputtering, while the patterned mask is not substantially damaged.

[0070] An etch chemistry for a declogging, i.e., a second etch chemistry, may have a substantially similar composition as the first etch chemistry for etching a layer. Due to the substantially similar selectivity as the first etch chemistry, the second etch chemistry would not chemically etch the patterned mask during a declogging. In some embodiments, the etch chemistry does not change between operations 430 and 450. In other words, the two operations may employ the same etch chemistry. Examples of etch chemistries are described below.

[0071] In some implementations, the material sputtered from a clogging deposit may be redeposited along the depth of the etched feature, forming a passivation against the second etch chemistry during a declogging.

[0072] Similar to operation 430 where the ions have a narrow ion energy distribution function, ions for a declogging may also have a narrow ion energy distribution function (IEDF).

[0073] As illustrated, operations 430, 440, and 450 are typically repeated multiple times over the course of the feature etch process. The cyclic process allows high throughput without risking substantial clogging interference with the overall etch process. In another embodiment, in any given cycle, operation 450 may be independently performed for a certain time period or until a clogging deposit is removed as verified by in situ or ex situ inspection.

[0074] A decision operation 460 follows each cycle of operations 430, 440, and 450 and determines whether another cycle should be performed or whether the overall etch process is complete. In some cases, the determination of whether to perform an additional etch cycle is based on whether a predetermined number of cycles have been completed or based on whether the etch process has been conducted for a predetermined time duration. In some implementations, the etched feature is subject to in situ or ex situ inspection to verify if the etching operation is completed (e.g., end point detection). End point detection may be accomplished by determining whether the feature bottom has reached an etch stop layer.

[0075] Figures 5A-5C schematically illustrate the profiles of a partially etched feature 511 in a layer 514 under a patterned mask 512. Figures 5A-5C correspond to operations 430, 440, and 450 in Figure 4. The structures and features in Figures 5A and 5C may also correspond to the structures and features in Figures 2A and 2B, respectively. Figure 5 A schematically illustrates the etch profile of partial feature 511 after plasma having high bias power etched layer 514. Under the conditions of operation 430, a clogging deposit 542 may be formed on the sidewall of a mask layer 512. Additionally, under these conditions, a bow 552 may be formed on an upper portion of the etched feature 511.

[0076] Figure 5B schematically illustrates that the feature profile after forming an etch profile in Figure 5A is not substantially modified during purging that optionally follows the etching as illustrated in Figure 5A. Figure 5B also illustrates that an etch byproduct 562 is removed from the opening of the etched feature 511, and further from the etch chamber using the pressure difference between the interior and exterior of the etch chamber. An etch byproduct 562 may include material from the etched layer 514 and / or material from the patterned mask 512.

[0077] Figure 5C schematically illustrates a feature profile after declogging is performed according to operation 450. As mentioned, declogging may be implemented using a second etch chemistry having substantially the same chemical composition as the first etch chemistry and setting a bias voltage between the threshold voltages for the patterned mask and a clogging deposit,thereby sputtering the clogging deposit without damaging the patterned mask 512. Figure 5C also illustrates that when clogging deposit 542 is removed, it can be re-deposited as a layer 554 on the sidewall surface of the etched feature 511. There it may provide passivation protection against further bowing and other manifestations of lateral etching.

[0078] Figures 6A-6C illustrate ion energy distribution functions for different plasma conditions. These functions, particularly the one illustrated in Figure 6C may be appropriate for etching and / or declogging according to some embodiments. The vertical axes of Figures 6A-6C represent flux of ions as a function of ion energies as shown on the horizontal axis. As illustrated in Figures 6A- 6C, ion flux distributions may vary significantly from each other. Among the parameters that impact these distributions are source plasma pulsing conditions, bias pulsing conditions, and combinations thereof. In some embodiments, a declogging operation as described herein may be performed with ions having an ion energy distribution according to Figure 6C.

[0079] Figure 6A illustrates an embodiment where the ions distribute into two pronounced peaks across a broad ion energy range. The ion flux plot illustrates that many ions have energies in a region A, which is a low energy regime, and many other ions have energies in a region C, which is a high energy regime. The ions in region A may have insufficient energy to sputter a clogging deposit. The ions in region C may have an energy sufficient to sputter away a mask layer. As shown, one major ion flux peak 610 is in region A and another major ion flux peak 620 is in region C, showing that a majority of ions have either a low ion energy (region A) insufficient to sputter a clogging deposit or a high ion energy (region C) enough to sputter away a mask layer, with relatively few ions having an intermediate energy (region B) suitable for declogging. The ions having ion energy in region B are desired in declogging because these ions mostly do not sputter a mask layer while physically removing a clogging deposit.

[0080] Figure 6B illustrates an embodiment where the ions have ion energies that fall primarily in region A and region B, as illustrated by two ion energy peaks 630 and 640. Peak 630 is in region A, i.e., the low energy regime and the peak 640 is in region B, i.e., an intermediate energy regime. Figure 6B illustrates that there are substantially no ions having ion energy in region C, indicating that the ion energy distribution is narrower than Figure 6A. Also, comparing Figures 6A and 6B, the ion flux in region B is significantly greater in Figure 6B than in Figure 6A, which indicates that a greater portion of the ions can participate in a declogging. However, the ion flux in region A is not negligible. Therefore, a significant portion of the ions are not useful for sputtering a clogging deposit.

[0081] Figure 6C illustrates an embodiment where a peak 650 is confined in region B without any substantial ion energy distribution in region A or region C. Thus, this ion energy distribution is significantly narrower and more focused than the distributions illustrated in Figures 6 A and 6B. Of interest, substantially all the ions in Figure 6C have ion energy within region B, indicating that substantially all the ions are able to participate in declogging without substantially removing the mask material. The ion energy distribution may be described by its half maximum full width (HMFW). In some embodiments, to efficiently remove a clogging deposit, a HMFW of the ion energy distribution may range from about 5 to 50 V, for example, about 5 V, about 10 V, about 15 V, about 20 V, about 30 V, about 40 V, or about 50 V. In certain embodiments, an ion energy distribution employed in certain embodiments such as the one illustrated in Figure 6C is achieved by gradually increasing the bias voltage to account for an accumulation of positive charge on the substrate due to the impingement of positive ions.Etch and Declogging ProcessEtchant Chemistry

[0082] High aspect ratio (HAR) features that avoid problems associated with clogging according to this disclosure may be etched using any of many types of etch processes. Such processes may be characterized by, for example, their process gas composition, temperature, pressure, plasma generation and biasing conditions, etc.

[0083] In certain embodiments, the layer to be etched may include or is an amorphous carbon layer (ACL). An etchant chemistry for etching the ACL may be a gas chemistry and may include an oxygen-containing compound. In some embodiments, the etchant chemistry includes oxygen, carbon dioxide (CO2), sulfur dioxide (SO2), carbonyl sulfide (COS), a fluorine-containing compound, such as HF, NF3, CF4, CHxFy, and / or CxFy, or any combination thereof, etc. For example, the above-cited etchant chemistry may be used to etch a HAR feature 430 as illustrated in Figure 4. As explained, a declogging operation follows an etching operation. The process gas composition for declogging may be substantially the same as the process gas composition for etching. As used herein, “substantially the same chemistry” indicates that, at a minimum, two etch chemistries that are substantially the same will have the same principal chemical etching species such as oxygen or a fluorine-containing compound. Such etching species may be present in slightly different concentrations, but not greater than a few mole percent. One of the two etch chemistries may include one or more minor components not present in the other, particularly if such component(s) do not strongly impact the etch rate or other physical characteristic of the etch. Two etch chemistries that are “substantially the same” may have identical compositions.Plasma Power and Bias Voltage

[0084] In etching a HAR feature without forming a noticeable bow or undercut, a combination of a plasma power and a bias voltage may be used in an etch and a declogging according to some embodiments of this disclosure. In some embodiments, for a HAR structure etch, where a medium plasma power and a high bias voltage are employed, a plasma power may be between about 1000 and about 3000 W, or about 1000 and about 2000 W. In some embodiments, a plasma may be a transformer coupled plasma (TCP). A bias voltage (Vb) may be set between about 1500 and about 2500 V. For pulsed biases, a duty cycle (DC) may be between about 5 and about 20 %. The plasma power and bias voltage for a HAR structure etch may be implemented for a HAR etch 430 in Figure 4. The plasma power and bias voltage can be applied at a frequency of about 1-1000 Hz.

[0085] For a declogging where a high plasma power and the bias voltage between Vthi and Vth2 are employed, a plasma power may be between about 3000 and about 10000 W, or about 3000 and about 5000 W. A bias voltage (Vb) is between Vthi >Vb>Vth2. Vthi may be about 150 V or less for a silicon oxide, a silicon nitride, a silicon oxynitride. For example, a bias voltage may be about 130 V for silicon oxide. Vth2 may be about 100 V or less. For pulsed biases, a duty cycle may be about 70 to about 95 %. The plasma power and bias voltage for a declogging may be implemented for a declogging 450 in Figure 4. The plasma power and bias voltage can be applied at a frequency of about 1-1000 Hz.Temperature and Pressure

[0086] In some embodiments, the temperature range of the substrate or the substrate support is about -80 to 50 °C, or about -40 to 30 °C. In some embodiments, the pressure in the plasma etch chamber is a partial vacuum or lower. For example, the pressure may be about 1 to 100 mT or about 5 to 50 mT.Apparatus

[0087] FIG. 7 schematically shows a cross-sectional view of an inductively coupled plasma etching apparatus 700 in accordance with certain embodiments herein. A Kiyo ™ reactor, produced by Lam Research Corp, of Fremont, CA, is an example of a suitable reactor that may be used to implement the techniques described herein. The inductively coupled plasma etching apparatus 700 includes an overall etching chamber structurally defined by chamber walls 701 and a window 711. The chamber walls 701 may be fabricated from stainless steel or aluminum. The window 711 may be fabricated from quartz or other dielectric material. An optional internalplasma grid 750 divides the overall etching chamber into an upper sub-chamber 702 and a lower sub-chamber 703. The plasma grid 750 may include a single grid or multiple individual grids. In many embodiments, plasma grid 750 may be removed, thereby utilizing a chamber space made of sub-chambers 702 and 703.

[0088] A chuck 717 is positioned within the lower sub-chamber 703 near the bottom inner surface. The chuck 717 is configured to receive and hold a substrate 719 upon which the etching process is performed. The chuck 717 can be an electrostatic chuck for supporting the substrate 719 when present. In some embodiments, an edge ring (not shown) surrounds chuck 717, and has an upper surface that is approximately planar with a top surface of a substrate 719, when present over chuck 717. The chuck 717 also includes electrostatic electrodes for chucking and dechucking the substrate. A filter and DC clamp power supply (not shown) may be provided for this purpose. Other control systems for lifting the substrate 719 off the chuck 717 can also be provided. The chuck 717 can be electrically charged using an RF power supply 723. The RF power supply 723 is connected to matching circuitry 721 through a connection 727. The matching circuitry 721 is connected to the chuck 717 through a connection 725. In this manner, the RF power supply 723 is connected to the chuck 717. The chuck 717 can include one or more electrodes within the chuck 717 to be used to apply a bias to the substrate 719 supported on the surface of the chuck 717. The one or more electrodes may be connected to the RF power supply 723 or another RF power supply (not shown) to provide a bias pulsing to the substrate. The RF power supply 723 or another RF power supply may be configured to generate ion flux having an ion energy having a certain range. For this, the RF power supply may gradually increase the bias voltage to account for an accumulation of positive charges on the substrate due to the impingement of positive ions.

[0089] A coil 733 is positioned above window 711. The coil 733 is fabricated from an electrically conductive material and includes at least one complete turn. The exemplary coil 733 shown in FIG. 7 includes three turns. The cross-sections of coil 733 are shown with symbols, and coils having an “X” extend rotationally into the page, while coils having aextend rotationally out of the page. An RF power supply 741 is configured to supply RF power to the coil 733. In general, the RF power supply 741 is connected to matching circuitry 739 through a connection 745. The matching circuitry 739 is connected to the coil 733 through a connection 743. In this manner, the RF power supply 741 is connected to the coil 733. An optional Faraday shield 749 is positioned between the coil 733 and the window 711. The Faraday shield 749 is maintained in a spaced apart relationship relative to the coil 733. The Faraday shield 749 is disposed immediately above the window 711. The coil 733, the Faraday shield 749, and the window 711 are eachconfigured to be substantially parallel to one another. The Faraday shield may prevent metal or other species from depositing on the dielectric window of the plasma chamber.

[0090] Process gases may be supplied through a main injection port 760 positioned in the upper chamber and / or through a side injection port 770, sometimes referred to as an STG. For example, oxygen-containing gases, fluorine-containing gases, or combination thereof, as described herein may be supplied. A vacuum pump, e.g., a one or two stage mechanical dry pump and / or turbomolecular pump 740, may be used to draw process gases out of the process chamber and to maintain a pressure within the process etching apparatus 700 by using a closed-loop-controlled flow restriction device, such as a throttle valve (not shown) or a pendulum valve (not shown), during operational plasma processing.

[0091] During operation of the apparatus, one or more reactant gases may be supplied through injection ports 760 and / or 770. In certain embodiments, gas may be supplied only through the main injection port 760, or only through the side injection port 770. In some cases, the injection ports may be replaced by showerheads. The Faraday shield 749 and / or optional grid 750 may include internal channels and holes that allow delivery of process gases to the chamber. Either or both of Faraday shield 749 and optional grid 750 may serve as a showerhead for delivery of process gases.

[0092] The process etching apparatus 700 may include a plasma power source. In one embodiment, the plasma power source may include a transformer coupled plasma (TCP) power source. For example, radio frequency power is supplied from the RF power supply 741 to the coil 733 to cause an RF current to flow through the coil 733. The RF current flowing through the coil 733 generates an electromagnetic field about the coil 733. The electromagnetic field generates an inductive current within the upper sub-chamber 702. The physical and chemical interactions of various generated ions and radicals with the substrate 719 selectively etch features of the substrate.

[0093] If the plasma grid 750 is used such that there is both an upper sub-chamber 702 and a lower sub-chamber 703, the inductive current acts on the gas present in the upper sub-chamber 702 to generate an electron-ion plasma in the upper sub-chamber 702. The optional internal plasma grid 750, if present, may act to limit the number of hot electrons in the lower sub-chamber 703. In some embodiments, the apparatus is designed and operated such that the plasma present in the lower sub-chamber 703 is an ion-ion plasma. In other embodiments, the apparatus may be designed and operated such that the plasma present in the lower sub-chamber 703 is an electronion plasma.

[0094] Volatile etching byproducts may be removed from the lower-sub chamber 703 through port 722. The chuck 717 disclosed herein may operate at elevated temperatures ranging between about -80 to 50 °C. In some cases, the chuck 717 may also operate at lower temperatures, for example when the chuck 717 is actively chilled. In such cases, the chuck 717 may operate at substantially lower temperatures, as desired. The temperature will depend on the etching process operation and specific recipe. In some embodiments, the chamber 701 may operate at pressures in the range of between about 1 to 100 mT. In certain embodiments, the pressure may be higher.

[0095] Chamber 701 may be coupled to facilities (not shown) when installed in a clean room or a fabrication facility. Facilities include plumbing that provide processing gases, vacuum, temperature control, and environmental particle control. These facilities are coupled to chamber 701, when installed in the target fabrication facility. Additionally, chamber 701 may be coupled to a transfer chamber that allows robotics to transfer substrates into and out of chamber 701 using typical automation.

[0096] In some embodiments, a system controller 730 (which may include one or more physical or logical controllers) controls some or all of the operations of an etching chamber. The system controller 730 may include one or more memory devices and one or more processors. The processor may include a central processing unit (CPU) or computer, analog and / or digital input / output connections, stepper motor controller boards, and other like components. Instructions for implementing appropriate control operations are executed on the processor. These instructions may be stored on the memory devices associated with the system controller 730 or they may be provided over a network. In certain embodiments, the system controller 730 executes system control software.

[0097] In some cases, the system controller 730 controls gas concentration, substrate movement, and / or the power supplied to the coils 733 and / or electrostatic chuck 717. The system controller 730 may control the gas concentration by, for example, opening and closing relevant valves to produce one or more inlet gas stream that provide the necessary reactant(s) at the proper concentration(s). The substrate movement may be controlled by, for example, directing a substrate positioning system to move as desired. The power supplied to the coils 733 and / or chuck 717 may be controlled to provide particular RF power levels. Similarly, if the internal grid 750 is used, any RF power applied to the grid may be adjusted by the system controller 730. The system controller 730 may be configured to control the bias voltage from the RF power supply 723 (or another RF power supply) to the substrate 719 supported on the chuck 717 during etching and / or declogging.

[0098] The system controller 730 may control these and other aspects based on sensor output (e.g., when power, potential, pressure, etc. reach a certain threshold), the timing of an operation (e.g., opening valves at certain times in a process), or based on received instructions from the user. An example controller is further discussed below.

[0099] FIG. 8 depicts a semiconductor process cluster architecture with various modules that interface with a vacuum transfer module 838 (VTM). The arrangement of transfer modules to “transfer” substrates among multiple storage facilities and processing modules may be referred to as a “cluster tool architecture” system. Airlock 830, also known as a loadlock or transfer module, is shown in VTM 838 with four processing modules 820a- 820d, which may be individually optimized to perform various fabrication processes. By way of example, processing modules 820a-820d may be implemented to perform substrate etching, deposition, ion implantation, substrate cleaning, sputtering, and / or other semiconductor processes. One or more of the substrate etching processing modules (any of 820a-820d) may be implemented as disclosed herein. Airlock 830 and processing module 820 may be referred to as “stations.” Each station has a facet 836 that interfaces the station to VTM 838. Inside each facet, sensors 1-18 are used to detect the passing of substrate 826 when moved between respective stations.

[0100] Robot 822 transfers substrate 826 between stations. In one embodiment, robot 822 has one arm, and in another embodiment, robot 822 has two arms, where each arm has an end effector 824 to pick substrates such as substrate 826 for transport. Front-end robot 832, in atmospheric transfer module (ATM) 840, is used to transfer substrates 826 from cassette or Front Opening Unified Pod (FOUP) 834 in Load Port Module (LPM) 842 to airlock 830. Module center 828 inside processing module 820 is one location for placing substrate 826. Aligner 844 in ATM 840 is used to align substrates.

[0101] In an exemplary processing method, a substrate is placed in one of the FOUPs 834 in the LPM 842. Front-end robot 832 transfers the substrate from the FOUP 834 to an aligner 844, which allows the substrate 826 to be properly centered before it is etched or processed. After being aligned, the substrate 826 is moved by the front-end robot 832 into an airlock 830. Because airlock modules have the ability to match the environment between an ATM and a VTM, the substrate 826 is able to move between the two pressure environments without being damaged. From the airlock module 830, the substrate 826 is moved by robot 822 through VTM 838 and into one of the process modules 820a-820d. In order to achieve this substrate movement, the robot 822 uses end effectors 824 on each of its arms. Once the substrate 826 has been processed, it is moved by robot 822 from the process modules 820a-820d to an airlock module 830. From here, the substrate 826 may be moved by the front-end robot 832 to one of the FOUPs 834 or to the aligner 844.

[0102] It should be noted that the computer controlling the substrate movement can be local to the cluster architecture, or can be located external to the cluster architecture in the manufacturing floor, or in a remote location and connected to the cluster architecture via a network.

[0103] In some implementations, a controller is part of a system, which may be part of the abovedescribed examples. Such systems can include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and / or specific processing components (a substrate pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor substrate or wafer. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and / or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, substrate transfers into and out of a tool and other transfer tools and / or load locks connected to or interfaced with a specific system.

[0104] Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor substrate or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a substrate.

[0105] The controller, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the substrate processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine ahistory of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus, as described above, the controller may be distributed, such as by having one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.

[0106] As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of substrates to and from tool locations and / or load ports in a semiconductor manufacturing factory.Conclusion

[0107] In the foregoing description, numerous specific details are set forth to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all these specific details. In other instances, well-known process operations have not been described in detail to not unnecessarily obscure the disclosed embodiments. While the disclosed embodiments are described in conjunction with the specific embodiments, it will be understood that it is not intended to limit the disclosed embodiments. As used herein, the phrase at least one of A, B, and C should be construed to mean a logical (A OR B OR C), using a non-exclusive logical OR, and should not be construed to mean ‘at least one of A, at least one of B, and at least one of C.

[0108] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, structures, systems, and apparatus of the present embodiments. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein.

Claims

CLAIMS what is claimed is:

1. A method of etching a feature in a substrate for fabricating an electronic device, the method comprising: providing a substrate to an etch chamber, wherein the substrate comprises at least one layer of a material to be etched and a mask over the at least one layer; etching a feature in the at least one layer, through an opening in the mask, by exposing the substrate to a first plasma produced using a first etch chemistry, and applying a first bias voltage having a first voltage magnitude to the substrate or to an electrode adjacent to the substrate, wherein the etching forms a clogging deposit in the feature and / or in the opening in the mask; and declogging the feature by exposing the substrate to a second plasma produced using a second etch chemistry that is substantially the same as the first etch chemistry and applying a second bias voltage having a second voltage magnitude that is less than the first voltage magnitude and between a first voltage threshold at which the mask is substantially etched and a second voltage threshold at which the clogging deposit is substantially etched but the mask is not substantially etched.

2. The method of claim 1 , wherein the etching and declogging operations are performed in the etch chamber.

3. The method of claim 2, wherein the etch chamber comprises a transformer coupled plasma (TCP) power source.

4. The method of claim 2, wherein the etch chamber comprises a controller configured to increase the magnitude of bias voltage applied to the substrate as electrical charge on the substrate increases.

5. The method of claim 2, wherein the etch chamber comprises: a controller configured to control the first and / or the second bias voltage such that species in the first plasma and / or the second plasma have an ion energy confined within a certain energy distribution.

6. The method of claim 1, wherein the feature has an aspect ratio of at least about 10: 1.

7. The method of claim 1, wherein the feature has an aspect ratio of at least about 100:1.

8. The method of claim 1, further comprising removing a byproduct produced by the etching the at least one layer from the feature, wherein removing byproduct comprises reducing or eliminating a plasma power in the etch chamber.

9. The method of claim 1 , wherein the first plasma has a first plasma power, the second plasma has a second plasma power, and the second plasma power is greater than the first plasma power.

10. The method of claim 9, wherein the first plasma power is about 1000 to 2000 W and the second plasma power is about 3000 to 5000 W.

11. The method of claim 1, wherein the first voltage threshold is about 150 V or less.

12. The method of claim 11 wherein the second voltage threshold is about 100 V or less.

13. The method of claim 1, wherein the first voltage magnitude is greater than the first voltage threshold.

14. The method of claim 1, wherein the second plasma has an ion energy distribution function characterized by a half maximum full width (HMFW) of about 5 to 50 V.

15. The method of claim 1, further comprising repeating the etching and declogging operations while forming the feature.

16. The method of claim 15, wherein the etching and declogging operations are performed repeatedly at a frequency of about 1-1000 Hz.

17. The method of claim 15, wherein the etching operation has a duty cycle percentage of about 5-20% and the declogging operation has a duty cycle percentage of about 70-95 %.

18. The method of claim 1, wherein the at least one layer comprises amorphous carbon.

19. The method of claim 1, wherein the mask comprises a silicon nitride, a silicon oxide, a silicon oxynitride, or any combination thereof.

20. An apparatus for processing a substrate comprising: an etch chamber configured to receive a substrate comprising at least one layer to be etched and a mask on the at least one layer; a plasma power source for generating a first plasma and a second plasma within the etch chamber; one or more gas inlets for providing a first etch chemistry and a second etch chemistry to the etch chamber; a substrate support for supporting the substrate, wherein the substrate support comprises or is associated with an electrode configured to provide bias voltage to the substrate; and a controller configured to cause: etching a feature in the at least one layer, through an opening in the mask, by exposing the substrate to the first plasma produced using a first etch chemistry, and applying a first bias voltage having a first voltage magnitude to the substrate or to the electrode adjacent to the substrate, wherein the etching forms a clogging deposit in the feature and / or in the opening in the mask; and declogging the feature by exposing the substrate to the second plasma produced using a second etch chemistry that is substantially the same as the first etch chemistry and applying a second bias voltage having a second voltage magnitude that is less than the first voltage magnitude and between a first voltage threshold at which the mask is substantially etched and a second threshold voltage at which the clogging deposit is substantially etched but the mask is not substantially etched.

21. The apparatus of claim 20, wherein the plasma power source comprises a transformer coupled plasma (TCP) power source.

22. The apparatus of claim 20, wherein the first plasma has a first plasma power and the second plasma has a second plasma power, and the second plasma power is greater than the first plasma power.

23. The apparatus of claim 22, wherein the first plasma power is about 1000 to 2000 W and the second plasma power is about 3000 to 5000 W.

24. The apparatus of claim 20, wherein the first bias voltage is about 150 V or less and the second bias voltage is about 100 V or less.

25. The apparatus of claim 20, wherein the controller is further configured to cause repeating the etching and declogging while forming the feature.

26. The apparatus of claim 25, wherein the controller is further configured to cause applying the first bias voltage and the second bias voltage at a frequency of about 1-1000 Hz.

27. The apparatus of claim 20, further comprising an outlet for removing an etch byproduct from the etch chamber.

28. The apparatus of claim 20, wherein the first etch chemistry comprises oxygen.

29. The apparatus of claim 20, wherein the at least one layer comprises amorphous carbon.

30. The apparatus of claim 20, wherein the mask comprises a silicon nitride, a silicon oxide, a silicon oxynitride, or any combination thereof.

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