Ceramic circuit substrate comprising unidirectional porous metal base plate, and power module equipped with same

Abstract

The present invention provides: a ceramic circuit substrate comprising a unidirectional porous metal base plate, which exhibits excellent heat dissipation performance by having a unidirectional porous metal applied thereto; and a power module equipped with the ceramic circuit substrate. The ceramic circuit substrate according to an embodiment of the present invention comprises: a ceramic substrate including a ceramic layer, a first substrate copper layer disposed on a first surface of the ceramic layer, and a second substrate copper layer disposed on a second surface of the ceramic layer; and a unidirectional porous metal base plate disposed on the second substrate copper layer and having a plurality of pores extending unidirectionally in the vertical direction from the second substrate copper layer.

Description

Ceramic circuit board including a unidirectional porous metal base plate and power module having the same

[0001] The technical idea of ​​the present invention relates to a ceramic circuit board, and more specifically, to a ceramic circuit board including a unidirectional porous metal base plate and a power module having the same.

[0002] Higher performance, miniaturization, and weight reduction of electronic devices require higher density and integration of semiconductor packages. However, higher integration generates more heat, which degrades semiconductor device performance and can lead to defects such as substrate deterioration, thereby reducing product reliability and lifespan. In particular, high-voltage power conversion electrical components for eco-friendly automobiles are used in extremely harsh operating environments, including high-temperature heat generation and thermal shock conditions. Therefore, securing more efficient heat-dissipating materials and structures is essential. Therefore, research on heat-dissipating materials and technologies that can effectively dissipate generated heat while improving semiconductor device performance and suppressing degradation of product performance and reliability is increasingly important.

[0003] For example, power conversion semiconductors used in electric vehicles are crucial components for converting, controlling, and transmitting high-voltage and high-current electric power, and the demand for power modules made of power conversion semiconductors continues to grow. Typically, power modules generate significant heat during operation. For example, IGBT devices generate heat due to switching losses during turn-on / turn-off switching, and because they use silicon as their base material, the operating temperature at the junction must be limited to 150°C or less. Therefore, to ensure the reliability of power semiconductor devices and power modules, it is essential to address the heat generation issue of IGBTs, and a cooling method must be developed.

[0004] For example, insulated gate bipolar transistor (IGBT) devices, which are silicon (Si)-based power conversion semiconductors, must not only control the amount of heat generated by switching losses due to frequency changes when power is supplied, but also effectively control the thermal shock that creates the problem of residual stress asymmetry that causes cracks in the power module joints, while effectively controlling the parasitic inductance of the power conversion device. Thermal and electrical materials and manufacturing methods must be developed to effectively control the amount of heat generated by lowering the junction temperature to below 150℃ due to different heat generation conditions according to switching off-state losses and on-state losses.

[0005] In addition, SiC-based MOSFET (metal oxide semiconductor field effect transistor) devices with a wide bandgap compared to silicon (Si)-based devices can be miniaturized compared to IGBT devices, and the devices themselves can be operated without problems even when the operating temperature of the junction is 400℃ or higher. However, in order to secure stable operation reliability of solder and other passive and active devices used for mounting the gate driver board, the junction temperature must be controlled below 200℃, and thermal and electrical materials and manufacturing methods that can resolve the thermal shock slope that causes cracks in the power module junction due to the operation characteristic that the switching frequency is up to 10 times higher than that of the IGBT and the parasitic inductance caused by the high switching frequency must be prepared.

[0006] [Prior Art Literature]

[0007] (Patent Document 001) Korean Patent Publication No. 2014-0127228

[0008] The technical problem to be achieved by the technical idea of ​​the present invention is to provide a ceramic circuit board including a one-way porous metal base plate having excellent heat dissipation performance by applying a one-way porous metal body, and a power module having the same.

[0009] However, these tasks are exemplary and the technical idea of ​​the present invention is not limited thereto.

[0010] According to one aspect of the present invention, a ceramic circuit board having excellent heat dissipation performance by applying a one-way porous metal body and a power module having the same are provided.

[0011] According to one embodiment of the present invention, the ceramic circuit board may include a ceramic substrate including a ceramic layer, a first substrate copper layer disposed on a first surface of the ceramic layer, and a second substrate copper layer disposed on a second surface of the ceramic layer; and a unidirectional porous metal base plate disposed on the second substrate copper layer and having a plurality of pores extending in one direction in a vertical direction from the second substrate copper layer.

[0012] According to one embodiment of the present invention, the one-way porous metal base plate may have a porosity in the range of 1% by volume to 70% by volume.

[0013] According to one embodiment of the present invention, the one-way porous metal base plate may be formed of a metal casting including copper or a copper alloy, and formed using a mold casting method, a continuous melting zone method, a continuous casting method, or a centrifugal casting method.

[0014] According to one embodiment of the present invention, the one-way porous metal base plate may be formed of a metal molded body including copper or a copper alloy, and formed by press forming, rolling, and then perforating, laser processing, or selective etching a metal material in the shape of a sheet, plate, sheet, or foil.

[0015] According to one embodiment of the present invention, the unidirectional porous metal base plate may include: a unidirectional porous metal body having a plurality of pores disposed in the center and extending in one direction; an upper copper foil disposed on an upper side of the unidirectional porous metal body; an upper adhesive layer that adheres the unidirectional porous metal body and the upper copper foil and includes a copper-zinc alloy; a lower copper foil disposed on a lower side of the unidirectional porous metal body; and a lower adhesive layer that adheres the unidirectional porous metal body and the lower copper foil and includes a copper-zinc alloy.

[0016] According to one embodiment of the present invention, the unidirectional porous metal base plate may include a unidirectional porous metal body having a plurality of pores arranged in the center and extending in one direction; an upper zinc-plated layer arranged on an upper side of the unidirectional porous metal body; and a lower zinc-plated layer arranged on a lower side of the unidirectional porous metal body.

[0017] According to one embodiment of the present invention, the present invention may further include a first spacer disposed on a portion of the first substrate copper layer; and a second spacer disposed on a portion of the first substrate copper layer and having a greater height than the first spacer.

[0018] According to one embodiment of the present invention, at least one of the first spacer and the second spacer may be formed of a unidirectional porous metal body having a plurality of pores extending in one direction in a vertical direction from the first substrate copper layer.

[0019] According to one embodiment of the present invention, at least one of the first substrate copper layer and the second substrate copper layer may be formed of a DBC copper layer formed by bonding copper foil on the ceramic layer through a high-temperature oxidation process, a DPC copper layer formed by forming a seed layer on the ceramic layer and then plating the seed layer with copper, or an AMB copper layer formed by bonding copper foil using an active metal foil to the ceramic layer.

[0020] According to one embodiment of the present invention, the power module may include a ceramic circuit board including a ceramic substrate including a ceramic layer, a first substrate copper layer, and a second substrate copper layer; and a unidirectional porous metal base plate disposed on the second substrate copper layer and having a plurality of pores extending in one direction in a vertical direction from the second substrate copper layer; at least one semiconductor element disposed on the first substrate copper layer; and a mold layer covering the semiconductor element.

[0021] According to one embodiment of the present invention, a heat sink disposed on the second substrate copper layer may be further included.

[0022] According to one embodiment of the present invention, the ceramic substrate may further include a first active metal brazing layer interposed between the ceramic layer and the first substrate copper layer; and a second active metal brazing layer interposed between the ceramic layer and the second substrate copper layer.

[0023] According to one embodiment of the present invention, the power module comprises: an upper ceramic circuit board comprising: an upper ceramic substrate including an upper ceramic layer, an upper first substrate copper layer, and an upper second substrate copper layer; an upper unidirectional porous metal base plate disposed on the upper second substrate copper layer and having a plurality of pores extending in one direction in a vertical direction from the upper second substrate copper layer; an upper first spacer disposed on a portion of the upper first substrate copper layer; and an upper second spacer disposed on a portion of the upper first substrate copper layer and having a greater height than the upper first spacer; a lower ceramic circuit board including: a lower ceramic substrate including a lower ceramic layer, a lower first substrate copper layer, and a lower second substrate copper layer; and a lower unidirectional porous metal base plate disposed on the lower second substrate copper layer and having a plurality of pores extending in one direction in a vertical direction from the lower second substrate copper layer; a first semiconductor element disposed between the upper first spacer and the lower first substrate copper layer; It may include a second semiconductor element disposed between the upper second spacer and the lower first substrate copper layer and having a smaller thickness than the first semiconductor element; and a mold layer filling the space between the upper ceramic circuit board and the lower ceramic circuit board to cover the first semiconductor element and the second semiconductor element.

[0024] According to one embodiment of the present invention, at least one of an upper heat sink disposed on the outside of the upper ceramic circuit board and a lower heat sink disposed on the outside of the lower ceramic circuit board may be further included.

[0025] According to one embodiment of the present invention, the upper ceramic substrate may further include an upper first active metal brazing layer interposed between the upper ceramic layer and the upper first substrate copper layer; and an upper second active metal brazing layer interposed between the upper ceramic layer and the upper second substrate copper layer, and the lower ceramic substrate may further include a lower first active metal brazing layer interposed between the lower ceramic layer and the lower first substrate copper layer; and a lower second active metal brazing layer interposed between the lower ceramic layer and the lower second substrate copper layer.

[0026] According to one embodiment of the present invention, the power module comprises: an upper ceramic circuit board comprising: an upper ceramic substrate including an upper ceramic layer, an upper first substrate copper layer, and an upper second substrate copper layer; an upper unidirectional porous metal base plate disposed on the upper second substrate copper layer and having a plurality of pores extending in one direction in a vertical direction from the upper second substrate copper layer; an upper first spacer disposed on a portion of the upper first substrate copper layer; and an upper second spacer disposed on a portion of the upper first substrate copper layer and having a greater height than the upper first spacer; a lower ceramic substrate including a lower ceramic layer, a lower first substrate copper layer, and a lower second substrate copper layer; a lower unidirectional porous metal base plate disposed on the lower second substrate copper layer and having a plurality of pores extending in one direction in a vertical direction from the lower second substrate copper layer; a lower first spacer disposed on a portion of the lower first substrate copper layer; And it may include a lower ceramic circuit board including a lower second spacer disposed on a portion of the lower first substrate copper layer and having a greater height than the lower first spacer; a first semiconductor element disposed between the upper first spacer and the lower first spacer; a second semiconductor element disposed between the upper second spacer and the lower second spacer and having a smaller thickness than the first semiconductor element; and a mold layer filling a space between the upper ceramic circuit board and the lower ceramic circuit board to cover the first semiconductor element and the second semiconductor element.

[0027] According to one embodiment of the present invention, at least one of an upper heat sink disposed on the outside of the upper ceramic circuit board and a lower heat sink disposed on the outside of the lower ceramic circuit board may be further included.

[0028] According to one embodiment of the present invention, the upper ceramic substrate may further include an upper first active metal brazing layer interposed between the upper ceramic layer and the upper first substrate copper layer; and an upper second active metal brazing layer interposed between the upper ceramic layer and the upper second substrate copper layer, and the lower ceramic substrate may further include a lower first active metal brazing layer interposed between the lower ceramic layer and the lower first substrate copper layer; and a lower second active metal brazing layer interposed between the lower ceramic layer and the lower second substrate copper layer.

[0029] A ceramic circuit board according to the present invention applies a base plate composed of a copper-based unidirectional porous metal body to a power module instead of a copper-based base plate that does not include pores.

[0030] This unidirectional porous metal base plate can use the manufacturing process of conventional power modules, and can increase the reliability of the joint by reducing the elastic modulus while maintaining thermal cooling performance and alleviating horizontal residual stress, and can respond to various thermal shocks and mechanical vibrations by alleviating the difference in thermal expansion coefficient between the silicon layer and the heat sink. Compared to conventional copper-based base plates, the thickness can be reduced, which reduces parasitic inductance and thus switching loss, and can improve cooling efficiency due to reduced thermal resistance, which not only improves the efficiency and reliability of the power conversion module, but also lowers the temperature of the busbar connected to the motor and DC-link film capacitor, thereby improving the efficiency of the entire high-voltage power conversion system. In addition, the unidirectional porosity can be controlled by methods such as press forming, post-rolling perforation, laser processing, or selective etching.

[0031] The effects of the present invention described above are illustrative, and the scope of the present invention is not limited by these effects.

[0032] FIG. 1 is a top view illustrating a unidirectional porous metal body applied to a ceramic circuit board according to one embodiment of the present invention.

[0033] FIG. 2 is a cross-sectional view taken along line AA of the one-way porous metal body of FIG. 1 according to one embodiment of the present invention.

[0034] Figures 3 to 6 are cross-sectional views of a ceramic circuit board according to one embodiment of the present invention.

[0035] FIGS. 7 and 8 are cross-sectional views illustrating a unidirectional porous metal base plate included in a ceramic circuit board according to one embodiment of the present invention.

[0036] FIGS. 9 and 10 are cross-sectional views illustrating a cross-sectional cooling power module according to one embodiment of the present invention.

[0037] Figures 11 to 14 are cross-sectional views illustrating a double-sided cooling power module according to one embodiment of the present invention.

[0038] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings. Embodiments of the present invention are provided to more completely explain the technical idea of ​​the present invention to those skilled in the art. The following embodiments may be modified in various different forms, and the scope of the technical idea of ​​the present invention is not limited to the following embodiments. Rather, these embodiments are provided to more faithfully and completely convey the technical idea of ​​the present invention to those skilled in the art. Like reference numerals throughout this specification denote like elements. Furthermore, various elements and areas in the drawings are schematically drawn. Therefore, the technical idea of ​​the present invention is not limited by the relative sizes or intervals drawn in the attached drawings.

[0039] In this specification, a layer formed "on" another layer may refer to a layer formed directly above the other layer, or may refer to an intermediate layer or layers formed on another layer. It should be noted that the meanings of "upper" and "lower" in this specification are relative, and the direction upward from the ceramic substrate is described as "upper", and the direction downward is described as "lower."

[0040] In the rapidly growing electric vehicle market, power semiconductors are used to variably control the AC voltage and frequency required to drive a three-phase AC motor from the power source, a high-voltage DC battery. Materials and designs that ensure the reliability of power modules in power conversion semiconductors are crucial. This is because both silicon-based IGBTs and SiC-based MOSFETs require control of the junction temperature generated during variable voltage and frequency switching. Furthermore, the heat generated from power conversion semiconductors can induce thermal and mechanical stresses on the solder, passive components, and other active components that make up the package, potentially leading to joint failure and deterioration due to thermal fatigue. Furthermore, high-frequency switching to accommodate the high-speed rotation of the motor can generate thermal shock and parasitic inductance. Therefore, thermal and electrical materials and manufacturing technologies that can effectively control these factors are crucial.

[0041] Recently, with the emergence of wide bandgap power modules such as SiC or GaN, they have higher operating temperatures than conventional silicon-based power modules. To improve heat dissipation of power modules, a double-sided cooling structure has been adopted. In conventional single-sided cooling power modules, the heat dissipation path of the semiconductor device is limited to one direction, whereas a double-sided cooling power module has an upper and lower substrate placed above and below the semiconductor device, which expands the heat dissipation path in two directions and improves heat dissipation capacity. Double-sided cooling structure, planar packaging structure, plate bonded power module, and metal-post interconnected parallel plate structure (MPIPPS) are terms that refer to double-sided cooling structures.

[0042] In a power module, a base plate is interposed between the ceramic substrate and the heat sink. The base plate can function as mechanical support and heat storage management.

[0043] The coefficient of thermal expansion of the aluminum forming the heat sink in the power module is 23 ppm / ℃, the coefficient of thermal expansion of the copper forming the surface copper layer of the ceramic substrate is 16.5 ppm / ℃, and the coefficient of thermal expansion of the aluminum oxide forming the ceramic substrate is 8.4 ppm / ℃. These differences in thermal expansion coefficients can cause residual stress and reliability issues. In addition, the base plate can function as a thermal resistance material, which can deteriorate the heat dissipation characteristics of the power module.

[0044] When a base plate is not applied, the advantages of low thermal resistance and excellent thermal shock are present, but the reduced thermal capacity may limit the size of the mounted semiconductor device. Therefore, power modules in which large semiconductor devices or multiple semiconductor devices are mounted may preferably include a base plate to increase thermal capacity and improve heat dissipation characteristics.

[0045] The technical idea of ​​the present invention is to apply a base plate composed of a copper-based unidirectional porous metal body to a power module instead of a copper-based base plate that does not include pores. Such a unidirectional porous metal body base plate can use the manufacturing process of a conventional power module, can increase reliability by reducing the elastic modulus and alleviating horizontal residual stress, can minimize thermal resistance by alleviating the difference in thermal expansion coefficient between a silicon layer and a heat sink, and can reduce vertical thermal resistance by reducing the thickness.

[0046] For reference, thermal resistance is calculated by dividing thickness by thermal conductivity. Changing the thickness from 3 mm to 1 mm can reduce vertical thermal resistance by approximately half. Furthermore, by attaching copper foil to the top and bottom of a unidirectional porous metal body to block the pores from the outside, the amount of solder, which can vary depending on pore size and porosity during heterojunction, can be quantified. Therefore, this could be advantageous from a commercialization perspective.

[0047] In addition, the copper-based unidirectional porous metal body with a porosity of 40% has an elastic modulus of about 30 GPa, which is about 1 / 4 that of a copper plate without pores. The target thickness of the unidirectional porous metal body may be about 1 / 3 that of the copper plate. The unidirectional porous metal body with a reduced thickness can reduce horizontal residual stress due to the difference in thermal expansion coefficient. As a result, the cooling performance is improved, and the problem of cracking at the joint interface due to the difference in tensile and compressive residual stress when manufacturing a thin plate and the problem of reduced joint strength that is vulnerable to mechanical vibration can be solved. In addition, the parasitic inductance can be reduced at a high switching frequency, thereby improving switching efficiency and overall system efficiency.

[0048] Solder or adhesive may be used as a bonding material for bonding various components such as semiconductor devices, or, for example, Ag based filler sintering or transient liquid phase bonding may be applied to wide bandgap power modules.

[0049] Hereinafter, a one-way porous metal body according to the technical idea of ​​the present invention will be described in detail.

[0050] FIG. 1 is a top view illustrating a unidirectional porous metal body applied to a ceramic circuit board according to one embodiment of the present invention. FIG. 2 is a cross-sectional view taken along line AA of the unidirectional porous metal body of FIG. 1 according to one embodiment of the present invention.

[0051] Referring to FIGS. 1 and 2, the unidirectional porous metal body (1) has a metal body (2) and a plurality of unidirectional pores (3) formed to extend along a pore extending direction within the metal body (2). The unidirectional porous metal body (1) may be referred to as a lotus structure. The unidirectional pores (3) may be formed to a depth that penetrates the metal body (2) or may be formed to a depth that does not penetrate the metal body (2).

[0052] The unidirectional porous metal body (1) can exhibit anisotropic properties, unlike conventional porous metals that include pores in an isotropic manner, since it includes unidirectional pores (3) arranged in one direction. In particular, it has excellent heat transfer performance in the pore direction and a thermal stress relief effect.

[0053] The manufacturing method for forming a one-way porous metal body (1) can be carried out in various ways. For example, in the case of a casting method, there are a mold casting method, a continuous melt zone method, a continuous casting method, a centrifugal casting method, etc., and in the case of a forming method, there are press forming, rolling, perforation, laser processing, or selective etching of a metal material in the shape of a sheet, plate, sheet, or foil.

[0054] The one-way porous metal body (1) can be formed as a metal casting body using a mold casting method, a continuous melting zone method, a continuous casting method, or a centrifugal casting method.

[0055] Alternatively, the one-way porous metal body (1) may be formed as a metal molded body formed by using press forming, rolling, and then perforating, laser processing, or selective etching of a metal material in the shape of a sheet, plate, sheet, or foil.

[0056] The manufacturing method for forming a one-way porous metal body (1) using a casting method can be carried out in various ways, and for example, can be carried out using a mold casting method, a continuous melting zone method, a continuous casting method, a centrifugal casting method, etc.

[0057] The pore characteristics of the unidirectional porous metal body (1) can be controlled by the pressure of the injected hydrogen gas, the solidification speed, etc. As the hydrogen gas pressure and the solidification speed increase, the porosity and pore size can decrease. The unidirectional porous metal body (1) can have a porosity in the range of, for example, 1% by volume to 70% by volume.

[0058] A unidirectional porous metal body (1) refers to a metal in which cylindrical pores are arranged in one direction. In addition, if necessary, the unidirectional porous metal body can be utilized as a composite material composed of other materials.

[0059] A unidirectional porous metal body (1) is a form in which unidirectional pores are contained within the metal. It has the characteristic of anisotropic thermal, electrical, and mechanical properties. This anisotropic characteristic is what differentiates it from other porous metals. For example, the unidirectional porous metal body (1) may have anisotropic elastic modulus, thermal conductivity, and electrical conductivity.

[0060] The one-way porous metal body (1) may include various metals, for example, copper or a copper alloy.

[0061] Table 1 shows the anisotropic thermal, electrical, and mechanical properties of a unidirectional porous metal body (1) composed of copper according to the porosity. In Table 1, “∥” means a direction parallel to the extension direction of the pores, and “⊥” means a direction parallel to the extension direction of the pores.

[0062] Porosity (%)Elasticity modulus (GPa)Thermal conductivity (W / mK)Electrical conductivity (x10 6 Ω -1 m -1 )E ∥ E ⊥ K ∥ K ⊥ σ ∥ σ ⊥0759534034015.015.01067~7480~9430527013.512.02060~6660~7927022012.09.73052~5943~5923517010.57.84045~5130~422001409.05.25037~4420~291651207.54.06030~3613~19130806.02.27022~298~1295504.51.28015~214~760303.00.7

[0063] Referring to Table 1, the elastic modulus, thermal conductivity, and electrical conductivity of a unidirectional porous metal body (1) composed of copper decrease as the porosity increases. In addition, the elastic modulus, thermal conductivity, and electrical conductivity exhibit anisotropy in that they decrease more in the vertical direction than in the direction parallel to the extension direction of the pores as the porosity increases.

[0064] When comparing a copper structure without pores and a unidirectional porous metal body composed of copper, their coefficients of thermal expansion are almost the same. On the other hand, the thermal stress of the unidirectional porous metal body composed of copper is significantly reduced for the same strain, so that mechanical thermal stress can be alleviated. In addition, since the elastic modulus of the unidirectional porous metal body in both the vertical and horizontal directions decreases with respect to external stress, the shock absorption capacity can be improved. Although the thermal conductivity and electrical conductivity of the unidirectional porous metal body composed of copper decrease as the porosity increases, they are higher than those of molybdenum.

[0065] The unidirectional porous metal body described above can hinder the propagation path of cracks occurring at the joint through the pores provided therein. When a crack propagating along the interface encounters the pores, the direction of the path changes, thereby increasing the joint strength.

[0066] By inserting other materials into the pores of the above-mentioned one-way porous metal body, the properties of a composite material can be obtained. Accordingly, properties such as elastic modulus, thermal conductivity, electrical conductivity, and parasitic inductance can be changed, and if necessary, improved.

[0067] Figures 3 to 6 are cross-sectional views of a ceramic circuit board according to one embodiment of the present invention.

[0068] Referring to FIG. 3, the ceramic circuit board (300) may include a ceramic substrate (310) and a unidirectional porous metal base plate (350).

[0069] Referring to FIG. 4, the ceramic circuit board (300a) may include a ceramic substrate (310a) and a unidirectional porous metal base plate (350).

[0070] Referring to FIG. 5, the ceramic circuit board (300b) may include a ceramic substrate (310), a first spacer (320), a second spacer (330), and a unidirectional porous metal base plate (350).

[0071] Referring to FIG. 6, the ceramic circuit board (300c) may include a ceramic substrate (310a), a first spacer (320), a second spacer (330), and a unidirectional porous metal base plate (350).

[0072] Hereinafter, components of the ceramic circuit board will be described in detail with reference to FIGS. 3 to 6.

[0073] The ceramic substrate (310) may include a ceramic layer (311), a first substrate copper layer (312), and a second substrate copper layer (313).

[0074] The ceramic substrate (310a) may include a ceramic layer (311), a first substrate copper layer (312), a second substrate copper layer (313), a first active metal brazing layer (314), and a second active metal brazing layer (315). Compared to the ceramic substrate (310), the ceramic substrate (310a) has a difference in that it further includes a first active metal brazing layer (314) and a second active metal brazing layer (315).

[0075] The ceramic layer (311) may have a first surface (318) and a second surface (319) that face each other. In FIGS. 3 to 6, the first surface (318) is illustrated as the upper surface and the second surface (319) is illustrated as the lower surface with respect to the ceramic layer (311). The ceramic layer (311) may have excellent thermal conductivity and electrical insulation. The ceramic layer (311) may be formed of a ceramic material, and may include, for example, at least one of Al2O3, AlN, Zirconia Toughened Alumina (ZTA), and Si3N4.

[0076] A first substrate copper layer (312) may be disposed on a first surface (318) of a ceramic layer (311). The first substrate copper layer (312) may be patterned to function as a circuit structure for a semiconductor device. The first substrate copper layer (312) may be formed as a single layer or may be formed as a plurality of layers. The first substrate copper layer (312) may have a total thickness in the range of, for example, 100 μm to 1000 μm, and may have a total thickness of, for example, about 300 μm.

[0077] The second substrate copper layer (313) may be disposed on the second surface (319) opposite to the first surface (318) of the ceramic layer (311). The second substrate copper layer (313) may function as a warpage prevention layer that prevents the ceramic layer (311) from warping. In addition, the second substrate copper layer (313) may provide a path for dissipating heat generated from the semiconductor element to the outside. For this purpose, a heat dissipation structure may be attached to the second substrate copper layer (313). The second substrate copper layer (313) may be formed as a single layer or may be formed as a plurality of layers. The second substrate copper layer (313) may have a total thickness of, for example, 100 μm to 1000 μm, and may have a total thickness of, for example, about 300 μm.

[0078] The first substrate copper layer (312) and the second substrate copper layer (313) may include the same material, be formed using the same method, and be formed simultaneously. The first substrate copper layer (312) and the second substrate copper layer (313) may be formed using DBC technology, DPC technology, or AMB technology. However, this is exemplary, and the technical idea of ​​the present invention also includes cases where the first substrate copper layer (312) and the second substrate copper layer (313) include different materials, are formed using different methods, or are formed at different process points.

[0079] At least one of the first substrate copper layer (312) and the second substrate copper layer (313) may be formed as a DBC copper layer formed using a DBC (direct bonded copper) technology. The DBC technology may refer to a technology of forming a copper layer by directly attaching a copper foil to a ceramic layer. The DBC copper layer may be formed by placing a copper foil on one or both sides of a ceramic layer (311), performing a high-temperature oxidation process at a temperature in the range of 1000°C to 1080°C, and bonding the copper foil to the ceramic layer using a copper-oxygen eutectic liquid. The bonding may be performed in a nitrogen atmosphere containing about 30 ppm of oxygen at a temperature lower than 1083°C, which is the melting point of copper, and forming a copper oxide layer on the surface of the copper foil to implement bonding with the ceramic layer (311). Subsequently, if necessary, the DBC copper layer may be patterned using an etching process. Additionally, nickel (Ni), silver (Ag), gold (Au), etc. can be plated on the DBC copper layer.

[0080] At least one of the first substrate copper layer (312) and the second substrate copper layer (313) may be formed as a DPC copper layer formed using a DPC (direct plating copper) technology. The DPC technology may refer to a technology for forming a copper layer by using a thin film process, an etching process, and a plating process. The DPC copper layer may be formed by forming a seed layer of titanium (Ti), titanium-tungsten (TiW), or the like on one or both sides of a ceramic layer (311), and then plating copper (Cu) on the seed layer. In addition, a photoresist pattern may be formed on the seed layer, and then copper (Cu) may be plated on the photoresist pattern, and the photoresist pattern may be removed to form the DPC copper layer having a desired pattern. Subsequently, if necessary, the DPC copper layer may be patterned using an etching process.

[0081] At least one of the first substrate copper layer (312) and the second substrate copper layer (313) may be formed as an AMB copper layer formed using an AMB (active metal brazing) technique. The AMB technique may refer to a technique of bonding a ceramic layer and a copper layer using an active metal foil. An active metal foil and a copper foil are sequentially placed on one or both sides of a ceramic layer (311), and heated to melt the active metal foil, thereby forming a first active metal brazing layer (314) and a second active metal brazing layer (315), thereby bonding the ceramic layer (311) and the copper foil to each other.

[0082] The first active metal brazing layer (314) can serve to bond the ceramic layer (311) and the first substrate copper layer (312). The second active metal brazing layer (315) can serve to bond the ceramic layer (311) and the second substrate copper layer (313). Subsequently, if necessary, the AMB copper layer can be patterned using an etching process.

[0083] The first active metal brazing layer (314) and the second active metal brazing layer (315) may include a metal or metal alloy having a lower melting point than the copper constituting the copper foil, and may include, for example, an active metal alloy in which copper, aluminum, nickel, or silver is added to titanium, hafnium, nickel, molybdenum, or zirconium, which are active toward oxygen, to lower the melting point. The first active metal brazing layer (314) and the second active metal brazing layer (315) may include, for example, an alloy including at least one of silver (Ag), copper (Cu), and titanium (Ti). However, this is exemplary, and the first active metal brazing layer (314) and the second active metal brazing layer (315) may include at least one of aluminum (Al), titanium (Ti), nickel (Ni), niobium (Nb), and molybdenum (Mo).

[0084] As illustrated in FIGS. 4 and 6, the first active metal brazing layer (314) may be disposed on the first surface (318) of the ceramic layer (311). The first substrate copper layer (312) may be disposed on the first active metal brazing layer (314). That is, the first active metal brazing layer (314) may be interposed between the ceramic layer (311) and the first substrate copper layer (312), thereby bonding the ceramic layer (311) and the first substrate copper layer (312) to each other.

[0085] The second active metal brazing layer (315) may be disposed on the second surface (319) of the ceramic layer (311). The second substrate copper layer (313) may be disposed on the second active metal brazing layer (315). That is, the second active metal brazing layer (315) may be interposed between the ceramic layer (311) and the second substrate copper layer (313), thereby bonding the ceramic layer (311) and the second substrate copper layer (313) to each other.

[0086] In addition, a case where at least one of the first substrate copper layer (312) and the second substrate copper layer (313) is composed of a unidirectional porous metal body is also included in the technical idea of ​​the present invention.

[0087] Referring again to FIGS. 3 to 6, the unidirectional porous metal base plate (350) may be placed on the second substrate copper layer (313). The unidirectional porous metal base plate (350) may be bonded to the second substrate copper layer (313) by a suitable adhesive material such as solder or adhesive.

[0088] The unidirectional porous metal base plate (350) may be formed of a unidirectional porous metal (UPM) having a plurality of unidirectional pores extending vertically in one direction from the second substrate copper layer (313). The unidirectional porous metal base plate (350) may have a porosity ranging from 1% by volume to 70% by volume. The unidirectional porous metal base plate (350) may be formed of a metal casting, or may be manufactured by various methods such as press forming and laser processing. The unidirectional porous metal base plate (350) may be formed of copper or a copper alloy. However, these materials are exemplary and the technical idea of ​​the present invention is not limited thereto.

[0089] Referring to FIGS. 5 and 6, the first spacer (320) may be placed on a portion of the ceramic substrate (310), for example, on a portion of the first substrate copper layer (312). The first spacer (320) may be bonded to the first substrate copper layer (312) by a first spacer adhesive layer (322).

[0090] The first spacer (320) may have a first height. The first spacers (320) may be arranged in multiples, and may all have substantially the same height. The first height may refer to the height from the ceramic substrate (310), for example, the height from the first substrate copper layer (312).

[0091] The second spacer (330) may be placed on a portion of the ceramic substrate (310), for example, on a portion of the first substrate copper layer (312). The second spacer (330) may be bonded to the first substrate copper layer (312) by a second spacer adhesive layer (332).

[0092] The second spacer (330) may have a greater height than the first spacer (320), for example, may have a second height greater than the first height. The second spacers (330) may be arranged in multiples, and may all have substantially the same height. The second height may refer to the height from the ceramic substrate (310), for example, the height from the first substrate copper layer (312).

[0093] The first spacer (320) and the second spacer (330) can provide a space for mounting a semiconductor element, and can perform the function of a spacer for correcting a thickness deviation of the semiconductor element. The height at which the semiconductor element is mounted can be changed by the arrangement of the first spacer (320) and the second spacer (330). That is, as the first spacer (320) is arranged in some areas of the ceramic substrate (310) and the second spacer (330) is arranged in other areas of the ceramic substrate (310), the mounting height provided by the second spacer (330) can be greater than the mounting height provided by the first spacer (320). Accordingly, the thickness deviation of semiconductor elements having different thicknesses can be corrected. Here, the semiconductor devices placed on the first spacer (320) and the second spacer (330) may include various semiconductor devices such as power semiconductor devices, memory semiconductor devices, switching semiconductor devices, and diode semiconductor devices.

[0094] The first spacer (320) and the second spacer (330) may have the same planar area or different planar areas, which may have various planar areas corresponding to the semiconductor elements to be mounted.

[0095] Additionally, at least one of the first spacer (320) and the second spacer (330) may additionally perform the function of wiring that provides an electrical path to the semiconductor element.

[0096] The first spacer (320) and the second spacer (330) may be formed of a metal working material that does not include pores inside, such as a copper structure, a copper molybdenum alloy structure, etc.

[0097] Alternatively, at least one of the first spacer (320) and the second spacer (330) may be formed of a unidirectional porous metal (UPM) having a plurality of unidirectional pores extending in one direction from the first substrate copper layer (312). The first spacer (320) and the second spacer (330) may be formed of a metal casting, or may be manufactured by various methods such as press forming and laser processing. The first spacer (320) and the second spacer (330) may include copper or a copper alloy. However, this is merely an example, and the technical idea of ​​the present invention is not limited thereto.

[0098] The first spacer (320) may have a plurality of pores extending in one direction in a vertical direction from the ceramic substrate (310), for example, from the first substrate copper layer (312). The first spacer (320) may have a porosity in a range of, for example, 1% to 70% by volume. The second spacer (330) may have a plurality of pores extending in one direction in a vertical direction from the ceramic substrate (310), for example, from the first substrate copper layer (312). The second spacer (330) may have a porosity in a range of, for example, 1% to 70% by volume.

[0099] When the first spacer (320) and the second spacer (330) are formed of a metal processing material that does not contain pores inside, the porosity is approximately 0%, so they can have high thermal stress and low thermal fatigue fracture characteristics. On the other hand, when the first spacer (320) and the second spacer (330) are formed of a unidirectional porous metal body, they can have low thermal stress, increased crack propagation resistance, and increased shock absorption capacity.

[0100] The first and second spacer adhesive layers (322, 332) may include various materials that function to adhere the first spacer (320) and the second spacer (330), and may be, for example, a solder layer or an adhesive layer. However, this is merely exemplary and the technical concept of the present invention is not limited thereto.

[0101] FIGS. 7 and 8 are cross-sectional views illustrating a unidirectional porous metal base plate included in a ceramic circuit board according to one embodiment of the present invention.

[0102] Referring to FIG. 7, the unidirectional porous metal base plate (350) may include a unidirectional porous metal body (351) having a plurality of pores disposed in the center and extending in one direction, an upper copper foil (352) disposed on the upper side of the unidirectional porous metal body (351), an upper adhesive layer (353) that adheres the unidirectional porous metal body (351) and the upper copper foil (352) and includes a copper-zinc alloy, a lower copper foil (354) disposed on the lower side of the unidirectional porous metal body (351), and a lower adhesive layer (355) that adheres the unidirectional porous metal body (351) and the lower copper foil (354) and includes a copper-zinc alloy.

[0103] The upper adhesive layer (353) can be formed by placing a zinc foil between the one-way porous metal body (351) and the upper copper foil (352) or by forming a zinc powder layer and heat-treating so that copper and zinc form a copper-zinc alloy. In addition, the lower adhesive layer (355) can be formed by placing a zinc foil between the one-way porous metal body (351) and the lower copper foil (354) or by forming a zinc powder layer and heat-treating so that copper and zinc form a copper-zinc alloy. The copper can be provided from the one-way porous metal body (351), the upper copper foil (352), or the lower copper foil (354).

[0104] In the upper bonding layer (353) and the lower bonding layer (355), copper and zinc form a solid solution up to a zinc content of 33 wt%, thereby preventing the formation of brittle intermetallic compounds. Consequently, the intermetallic compounds exhibit excellent electrical and thermal conductivity, enabling the power module to operate at higher temperatures. Furthermore, the intermetallic compounds formed at a zinc content of 33 wt% or higher also have the advantage of being less brittle than the copper-tin intermediate phase.

[0105] Referring to FIG. 8, the unidirectional porous metal base plate (350a) may include a unidirectional porous metal body (351) having a plurality of pores arranged in the center and extending in one direction, an upper zinc plating layer (356) arranged on the upper side of the unidirectional porous metal body (351), and a lower zinc plating layer (357) arranged on the lower side of the unidirectional porous metal body (351).

[0106] However, the above-described configuration of the one-way porous metal base plate (350) is exemplary, and the technical idea of ​​the present invention is not limited thereto.

[0107] Hereinafter, a power module to which a ceramic circuit board according to one embodiment of the present invention is applied will be described.

[0108] FIGS. 9 and 10 are cross-sectional views illustrating a cross-sectional cooling power module according to one embodiment of the present invention.

[0109] Referring to FIG. 9, a power module (3000) may include a ceramic circuit board (300), a first semiconductor element (370), a second semiconductor element (380), a mold layer (390), and a heat sink (340). The ceramic circuit board (300) may include a ceramic substrate (310) including a ceramic layer (311), a first substrate copper layer (312), and a second substrate copper layer (313); and a unidirectional porous metal base plate (350).

[0110] Referring to FIG. 10, a power module (3000a) may include a ceramic circuit board (300a), a first semiconductor element (370), a second semiconductor element (380), a mold layer (390), and a heat sink (340). The ceramic circuit board (300a) may include a ceramic substrate (310a) including a ceramic layer (311), a first substrate copper layer (312), a second substrate copper layer (313), a first active metal brazing layer (314), and a second active metal brazing layer (315); and a unidirectional porous metal base plate (350).

[0111] Referring to FIGS. 9 and 10, at least one semiconductor element may be disposed on a first substrate copper layer (312). A first semiconductor element (370) may be bonded to the first substrate copper layer (312) by a first element adhesive layer (372). A second semiconductor element (380) may be bonded to the first substrate copper layer (312) by a second element adhesive layer (382). The first element adhesive layer (372) and the second element adhesive layer (382) may be solder layers or adhesive layers, which are exemplary and the technical idea of ​​the present invention is not limited thereto.

[0112] The first semiconductor element (370) and the second semiconductor element (380) may be power semiconductor elements, and may be, for example, a gate turn-off thyristor (GTO) semiconductor element, an insulated gate bipolar mode transistor (IGBT) semiconductor element, a SiC MOSFET (Metal Oxide Semiconductor Field Effect Transistor) semiconductor element, a GaN MOSFET semiconductor element, etc., and may perform an operation of converting and supplying power supplied from a power supply unit such as a battery into power for driving a motor through a switching operation. In addition, the first semiconductor element (370) and the second semiconductor element (380) may include electrode members formed on the upper or lower portions. The second semiconductor element (380) may have a smaller thickness than the first semiconductor element (370). However, this is exemplary, and a case in which the power module (3000) includes semiconductor elements of the same height, for example, a case in which it includes only the first semiconductor element (370), is also included in the technical idea of ​​the present invention.

[0113] A mold layer (390) may be placed on a ceramic circuit board (300, 300a) to cover the first semiconductor element (370) and the second semiconductor element (380). The mold layer (390) may insulate the first semiconductor element (370) and the second semiconductor element (380). The mold layer (390) may be composed of, for example, EMC (epoxy molding compound).

[0114] A heat sink (340) may be placed on the second substrate copper layer (313). The heat sink (340) may include a material with excellent heat transfer, such as aluminum or copper. The heat sink (340) may be bonded to a unidirectional porous metal base plate (350) using a suitable adhesive material, such as solder or adhesive.

[0115] The ceramic circuit board (300, 300a) can perform a function of dissipating heat generated from the first semiconductor element (370) and the second semiconductor element (380) to the outside. For this heat dissipation, the unidirectional porous metal base plate (350) can efficiently transfer the heat generated from the first semiconductor element (370) and the second semiconductor element (380) to the heat sink (340). The unidirectional porous metal base plate (350) can reduce mechanical thermal stress and provide excellent shock absorption capability by including unidirectional pores along with excellent thermal conductivity and electrical conductivity. In addition, the unidirectional porous metal base plate (350) can provide structural stability to the power module (3000, 3000a).

[0116] Figures 11 to 14 are cross-sectional views illustrating a double-sided cooling power module according to one embodiment of the present invention.

[0117] Referring to FIG. 11, the power module (3000b) may include an upper ceramic circuit board (300b_U), a lower ceramic circuit board (300_D), a first semiconductor element (370), a second semiconductor element (380), a mold layer (390), an upper heat sink (340_U), and a lower heat sink (340_D).

[0118] The upper ceramic circuit board (300b_U) may include an upper ceramic substrate (310_U) including an upper ceramic layer (311_U), an upper first substrate copper layer (312_U), and an upper second substrate copper layer (313_U); and an upper unidirectional porous metal base plate (350_U). The upper ceramic circuit board (300b_U) may further include an upper first spacer (320_U) and an upper second spacer (330_U).

[0119] The lower ceramic circuit board (300_D) may include a lower ceramic substrate (310_D) including a lower ceramic layer (311_D), a lower first substrate copper layer (312_D), and a lower second substrate copper layer (313_D); and a lower unidirectional porous metal base plate (350_D). Here, the lower ceramic circuit board (300_D) does not include a spacer.

[0120] The upper ceramic circuit board (300b_U) and the lower ceramic circuit board (300_D) can be placed facing each other.

[0121] The upper first spacer (320_U) may be attached to the upper first substrate copper layer (312_U) by the first spacer adhesive layer (322). The upper second spacer (330_U) may be attached to the upper first substrate copper layer (312_U) by the second spacer adhesive layer (332). The upper first spacer (320_U) and the upper second spacer (330_U) may be formed of a unidirectional porous metal body.

[0122] The first semiconductor element (370) may be placed between the upper first spacer (320_U) and the lower first substrate copper layer (312_D). The first semiconductor element (370) may be bonded to the upper first spacer (320_U) and the lower first substrate copper layer (312_D) by a first element adhesive layer (372).

[0123] The second semiconductor element (380) may be placed between the upper second spacer (330_U) and the lower first substrate copper layer (312_D). The second semiconductor element (380) may be bonded to the upper first spacer (320_U) and the lower first substrate copper layer (312_D) by a second element adhesive layer (382).

[0124] The second semiconductor element (380) may have a smaller thickness than the first semiconductor element (370). Therefore, by placing an upper first spacer (320_U) having a relatively smaller thickness on the upper side of the first semiconductor element (370) and placing an upper second spacer (330_U) having a relatively larger thickness on the upper side of the second semiconductor element (380), the thickness difference between the second semiconductor element (380) and the first semiconductor element (370) can be corrected.

[0125] The first element adhesive layer (372) and the second element adhesive layer (382) may be solder layers or adhesive layers, which are exemplary and the technical idea of ​​the present invention is not limited thereto.

[0126] The mold layer (390) can fill the space between the upper ceramic circuit board (300b_U) and the lower ceramic circuit board (300_D). Accordingly, the first semiconductor element (370) and the second semiconductor element (380) can be covered by the mold layer (390). The mold layer (390) can insulate the first semiconductor element (370) and the second semiconductor element (380). The mold layer (390) can be composed of, for example, EMC (epoxy molding compound).

[0127] The power module (3000b) includes an upper first spacer (320_U) and an upper second spacer (330_U), and does not include a spacer at the bottom, so it may have an asymmetrical structure with respect to the first semiconductor element (370) and the second semiconductor element (380).

[0128] The upper unidirectional porous metal base plate (350_U) may be placed on the upper second substrate copper layer (313_U). The lower unidirectional porous metal base plate (350_D) may be placed on the lower second substrate copper layer (313_D).

[0129] Additionally, for efficient heat dissipation to the outside, an upper heat sink (340_U) may be placed on an upper unidirectional porous metal base plate (350_U) on the outside of an upper ceramic circuit board (300b_U). Additionally, a lower heat sink (340_D) may be placed on a lower unidirectional porous metal base plate (350_D) on the outside of a lower ceramic circuit board (300_U).

[0130] The upper ceramic circuit board (300b_U) and the lower ceramic circuit board (300_D) can perform a function of dissipating heat generated from the first semiconductor element (370) and the second semiconductor element (380) to the outside. For this heat dissipation, the upper unidirectional porous metal base plate (350_U) and the lower unidirectional porous metal base plate (350_D) can efficiently transfer the heat generated from the first semiconductor element (370) and the second semiconductor element (380) to the upper heat sink (340_U) and the lower heat sink (340_D), respectively. In addition, the upper unidirectional porous metal base plate (350_U) and the lower unidirectional porous metal base plate (350_D) can provide structural stability to the power module (3000b).

[0131] Additionally, the upper first spacer (320_U) and the upper second spacer (330_U) can efficiently transfer heat generated from the first semiconductor element (370) and the second semiconductor element (380) to the upper ceramic circuit board (300b_U), respectively.

[0132] Hereinafter, descriptions of components identical or similar to those in the embodiment of Fig. 11 will be omitted.

[0133] Referring to FIG. 12, the power module (3000c) may include an upper ceramic circuit board (300c_U), a lower ceramic circuit board (300a_D), a first semiconductor element (370), a second semiconductor element (380), a mold layer (390), an upper heat sink (340_U), and a lower heat sink (340_D).

[0134] The upper ceramic circuit board (300c_U) may include an upper ceramic substrate (310a_U) including an upper ceramic layer (311_U), an upper first substrate copper layer (312_U), an upper second substrate copper layer (313_U), an upper first active metal brazing layer (314_U), and an upper second active metal brazing layer (315_U); and an upper unidirectional porous metal base plate (350_U). The upper ceramic circuit board (300c_U) may further include an upper first spacer (320_U) and an upper second spacer (330_U).

[0135] The lower ceramic circuit board (300a_D) may include a lower ceramic substrate (310a_D) including a lower ceramic layer (311_D), a lower first substrate copper layer (312_D), a lower second substrate copper layer (313_D), a lower first active metal brazing layer (314_D), and a lower second active metal brazing layer (315_D); and a lower unidirectional porous metal base plate (350_D). Here, the lower ceramic circuit board (300_D) does not include a spacer.

[0136] The upper ceramic circuit board (300c_U) and the lower ceramic circuit board (300a_D) can be placed facing each other.

[0137] Compared with the power module (3000b) of FIG. 11, the power module (3000c) of FIG. 12 has a difference in that it further includes an upper first active metal brazing layer (314_U) interposed between the upper ceramic layer (311_U) and the upper first substrate copper layer (312_U) and an upper second active metal brazing layer (315_U) interposed between the upper ceramic layer (311_U) and the upper second substrate copper layer (313_U). In addition, the power module (3000c) has a difference in that it further includes a lower first active metal brazing layer (314_D) interposed between the lower ceramic layer (311_D) and the lower first substrate copper layer (312_D) and a lower second active metal brazing layer (315_D) interposed between the lower ceramic layer (311_D) and the lower second substrate copper layer (313_D).

[0138] Referring to FIG. 13, the power module (3000d) may include an upper ceramic circuit board (300b_U), a lower ceramic circuit board (300b_D), a first semiconductor element (370), a second semiconductor element (380), a mold layer (390), an upper heat sink (340_U), and a lower heat sink (340_D).

[0139] The upper ceramic circuit board (300b_U) may include an upper ceramic substrate (310_U) including an upper ceramic layer (311_U), an upper first substrate copper layer (312_U), and an upper second substrate copper layer (313_U); and an upper unidirectional porous metal base plate (350_U). The upper ceramic circuit board (300b_U) may further include an upper first spacer (320_U) and an upper second spacer (330_U).

[0140] The lower ceramic circuit board (300b_D) may include a lower ceramic substrate (310_D) including a lower ceramic layer (311_D), a lower first substrate copper layer (312_D), and a lower second substrate copper layer (313_D); and a lower unidirectional porous metal base plate (350_D). The lower ceramic circuit board (300b_D) may further include an upper first spacer (320_U) and an upper second spacer (330_U).

[0141] The upper ceramic circuit board (300b_U) and the lower ceramic circuit board (300b_D) can be placed facing each other.

[0142] The upper first spacer (320_U) may be attached to the upper first substrate copper layer (312_U) by the first spacer adhesive layer (322). The upper second spacer (330_U) may be attached to the upper first substrate copper layer (312_U) by the second spacer adhesive layer (332). The upper first spacer (320_U) and the upper second spacer (330_U) may be formed of a unidirectional porous metal body.

[0143] The lower first spacer (320_D) may be attached to the lower first substrate copper layer (312_D) by the first spacer adhesive layer (322). The lower second spacer (330_D) may be attached to the lower first substrate copper layer (312_D) by the second spacer adhesive layer (332). The lower first spacer (320_D) and the lower second spacer (330_D) may be formed of a unidirectional porous metal body.

[0144] The first semiconductor element (370) may be placed between the upper first spacer (320_U) and the lower first spacer (320_D). The first semiconductor element (370) may be bonded to the upper first spacer (320_U) and the lower first spacer (320_D) by a first element adhesive layer (372).

[0145] The second semiconductor element (380) may be placed between the upper second spacer (330_U) and the lower second spacer (330_D). The second semiconductor element (380) may be bonded to the upper first spacer (320_U) and the lower second spacer (330_D) by a second element adhesive layer (382).

[0146] The second semiconductor element (380) may have a smaller thickness than the first semiconductor element (370). Therefore, an upper first spacer (320_U) having a relatively smaller thickness is disposed on the upper side of the first semiconductor element (370), a lower first spacer (320_D) is disposed on the lower side of the first semiconductor element (370), an upper second spacer (330_U) having a relatively larger thickness is disposed on the upper side of the second semiconductor element (380), and a lower second spacer (330_D) is disposed on the lower side of the second semiconductor element (380), thereby correcting the thickness deviation between the second semiconductor element (380) and the first semiconductor element (370).

[0147] The mold layer (390) can fill the space between the upper ceramic circuit board (300b_U) and the lower ceramic circuit board (300b_D). Accordingly, the first semiconductor element (370) and the second semiconductor element (380) can be covered by the mold layer (390).

[0148] Compared to the power module (3000b) of FIG. 11, the power module (3000d) of FIG. 13 has a difference in that it includes a lower ceramic circuit board (300b_D) instead of the lower ceramic circuit board (300_D).

[0149] The power module (3000d) may have a symmetrical structure with respect to the first semiconductor element (370) and the second semiconductor element (380). That is, the upper first spacer (320_U), the lower first spacer (320_D), the upper second spacer (330_U), and the lower second spacer (330_D) may be arranged symmetrically with respect to the first semiconductor element (370) and the second semiconductor element (380). However, this is merely exemplary, and the technical idea of ​​the present invention is not limited thereto. For example, the upper first spacer (320_U) and the lower first spacer (320_D) may have different heights. In addition, the upper second spacer (330_U) and the lower second spacer (330_D) may have different heights.

[0150] The upper first spacer (320_U) and the upper second spacer (330_U) can efficiently transfer heat generated from the first semiconductor element (370) and the second semiconductor element (380) to the upper ceramic circuit board (300b_U), respectively. The lower first spacer (320_D) and the lower second spacer (330_D) can efficiently transfer heat generated from the first semiconductor element (370) and the second semiconductor element (380) to the lower ceramic circuit board (300b_D), respectively.

[0151] Referring to FIG. 14, the power module (3000e) may include an upper ceramic circuit board (300c_U), a lower ceramic circuit board (300c_D), a first semiconductor element (370), a second semiconductor element (380), a mold layer (390), an upper heat sink (340_U), and a lower heat sink (340_D).

[0152] The upper ceramic circuit board (300c_U) may include an upper ceramic substrate (310_U) including an upper ceramic layer (311_U), an upper first substrate copper layer (312_U), an upper second substrate copper layer (313_U), an upper first active metal brazing layer (314_U), and an upper second active metal brazing layer (315_U); and an upper unidirectional porous metal base plate (350_U). The upper ceramic circuit board (300c_U) may further include an upper first spacer (320_U) and an upper second spacer (330_U).

[0153] The lower ceramic circuit board (300c_D) may include a lower ceramic substrate (310_D) including a lower ceramic layer (311_D), a lower first substrate copper layer (312_D), a lower second substrate copper layer (313_D), a lower first active metal brazing layer (314_D), and a lower second active metal brazing layer (315_D); and a lower unidirectional porous metal base plate (350_D). The lower ceramic circuit board (300c_D) may further include an upper first spacer (320_U) and an upper second spacer (330_U).

[0154] The upper ceramic circuit board (300c_U) and the lower ceramic circuit board (300c_D) can be placed facing each other.

[0155] Compared with the power module (3000d) of FIG. 13, the power module (3000e) of FIG. 14 has a difference in that it further includes an upper first active metal brazing layer (314_U) interposed between the upper ceramic layer (311_U) and the upper first substrate copper layer (312_U) and an upper second active metal brazing layer (315_U) interposed between the upper ceramic layer (311_U) and the upper second substrate copper layer (313_U). In addition, the power module (3000e) has a difference in that it further includes a lower first active metal brazing layer (314_D) interposed between the lower ceramic layer (311_D) and the lower first substrate copper layer (312_D) and a lower second active metal brazing layer (315_D) interposed between the lower ceramic layer (311_D) and the lower second substrate copper layer (313_D).

[0156] It will be apparent to a person skilled in the art to which the technical idea of ​​the present invention pertains that the technical idea of ​​the present invention described above is not limited to the above-described embodiments and the attached drawings, and that various substitutions, modifications, and changes are possible within a scope that does not depart from the technical idea of ​​the present invention.

[0157] [Explanation of symbols]

[0158] 1: One-way porous metal body,

[0159] 2: Metal body,

[0160] 3: One-way pores,

[0161] 300, 300a, 300b, 300c: Ceramic circuit board,

[0162] 310, 310a: Ceramic substrate,

[0163] 311: Ceramic layer,

[0164] 312: First substrate copper layer,

[0165] 313: Second substrate copper layer,

[0166] 314: First active metal brazing layer,

[0167] 315: Second active metal brazing layer,

[0168] 318: Page 1,

[0169] 319: Page 2,

[0170] 320: 1st spacer,

[0171] 322: First spacer adhesive layer,

[0172] 330: Second spacer,

[0173] 332: Second spacer adhesive layer,

[0174] 340: Heat sink,

[0175] 350, 350a: One-way porous metal base plate,

[0176] 351: One-way porous metal body,

[0177] 352: Top copper foil,

[0178] 353: Top adhesive layer,

[0179] 354: Lower copper foil

[0180] 355: Lower adhesive layer,

[0181] 356: Top zinc plating layer,

[0182] 357: Lower zinc plating layer,

[0183] 370: First semiconductor element,

[0184] 372: First element adhesive layer,

[0185] 380: Second semiconductor element,

[0186] 382: Second element adhesive layer,

[0187] 390: Mold layer,

[0188] 3000, 3000a, 3000b, 3000c, 3000d, 3000e: Power modules,

Claims

1. A ceramic substrate comprising a ceramic layer, a first substrate copper layer disposed on a first surface of the ceramic layer, and a second substrate copper layer disposed on a second surface of the ceramic layer; and A unidirectional porous metal base plate having a plurality of pores extending in one direction in a vertical direction from the second substrate copper layer, and disposed on the second substrate copper layer. Ceramic circuit board.

2. In paragraph 1, The above one-way porous metal base plate, Having a porosity ranging from 1% by volume to 70% by volume, Ceramic circuit board.

3. In paragraph 1, The above one-way porous metal base plate, A metal casting comprising copper or a copper alloy and formed using a mold casting method, a continuous melting zone method, a continuous casting method, or a centrifugal casting method. Ceramic circuit board.

4. In paragraph 1, The above one-way porous metal base plate, A metal molded body formed by press forming, rolling, and then perforating, laser processing or selective etching a metal material in the form of a sheet, plate, sheet or foil containing copper or a copper alloy. Ceramic circuit board.

5. In paragraph 1, The above one-way porous metal base plate, A unidirectional porous metal body having a plurality of pores arranged in the center and extending in one direction; An upper copper foil disposed on the upper side of the above one-way porous metal body; An upper adhesive layer that bonds the above one-way porous metal body and the above upper copper foil, and includes a copper-zinc alloy; A lower copper foil disposed on the lower side of the above one-way porous metal body; and Bonding the above one-way porous metal body and the lower copper foil, and including a lower adhesive layer including a copper zinc alloy, Ceramic circuit board.

6. In paragraph 1, The above one-way porous metal base plate, A unidirectional porous metal body having a plurality of pores arranged in the center and extending in one direction; An upper zinc plating layer disposed on the upper side of the above one-way porous metal body; and Comprising a lower zinc plating layer disposed on the lower side of the above one-way porous metal body, Ceramic circuit board.

7. In paragraph 1, A first spacer disposed on a portion of the first substrate copper layer; and Further comprising a second spacer disposed on a portion of the first substrate copper layer and having a greater height than the first spacer. Ceramic circuit board.

8. In paragraph 7, At least one of the first spacer and the second spacer, A unidirectional porous metal body having a plurality of pores extending in one direction in a vertical direction from the first substrate copper layer. Ceramic circuit board.

9. In paragraph 1, At least one of the first substrate copper layer and the second substrate copper layer, A DBC copper layer formed by bonding copper foil on the above ceramic layer through a high-temperature oxidation process, After forming a seed layer on the above ceramic layer, a DPC copper layer formed by plating copper on the seed layer, Or, it is made of an AMB copper layer formed by a copper foil bonded using an active metal foil to the above ceramic layer. Ceramic circuit board.

10. A ceramic circuit board comprising a ceramic substrate including a ceramic layer, a first substrate copper layer, and a second substrate copper layer; and a unidirectional porous metal base plate disposed on the second substrate copper layer and having a plurality of pores extending in one direction in a vertical direction from the second substrate copper layer; At least one semiconductor element disposed on the first substrate copper layer; and Including a mold layer covering the semiconductor element, Power module.

11. In paragraph 10, Further comprising a heat sink disposed on the second substrate copper layer, Power module.

12. In paragraph 10, The above ceramic substrate, a first active metal brazing layer interposed between the ceramic layer and the first substrate copper layer; and Further comprising a second active metal brazing layer interposed between the ceramic layer and the second substrate copper layer, Power module.

13. An upper ceramic circuit board comprising: an upper ceramic substrate including an upper ceramic layer, an upper first substrate copper layer, and an upper second substrate copper layer; an upper unidirectional porous metal base plate disposed on the upper second substrate copper layer and having a plurality of pores extending in one direction in a vertical direction from the upper second substrate copper layer; an upper first spacer disposed on a portion of the upper first substrate copper layer; and an upper second spacer disposed on a portion of the upper first substrate copper layer and having a greater height than the upper first spacer; A lower ceramic circuit board comprising: a lower ceramic substrate including a lower ceramic layer, a lower first substrate copper layer, and a lower second substrate copper layer; and a lower unidirectional porous metal base plate disposed on the lower second substrate copper layer and having a plurality of pores extending in one direction in a vertical direction from the lower second substrate copper layer; A first semiconductor element disposed between the upper first spacer and the lower first substrate copper layer; A second semiconductor element disposed between the upper second spacer and the lower first substrate copper layer, and having a smaller thickness than the first semiconductor element; and A mold layer that fills the space between the upper ceramic circuit board and the lower ceramic circuit board and covers the first semiconductor element and the second semiconductor element, Power module.

14. In paragraph 13, an upper heat sink disposed on the outside of the upper ceramic circuit board; and Further comprising at least one lower heat sink disposed on the outer side of the lower ceramic circuit board; Power module.

15. In paragraph 13, The upper ceramic substrate further includes an upper first active metal brazing layer interposed between the upper ceramic layer and the upper first substrate copper layer; and an upper second active metal brazing layer interposed between the upper ceramic layer and the upper second substrate copper layer. The lower ceramic substrate further comprises a lower first active metal brazing layer interposed between the lower ceramic layer and the lower first substrate copper layer; and a lower second active metal brazing layer interposed between the lower ceramic layer and the lower second substrate copper layer. Power module.

16. An upper ceramic circuit board comprising: an upper ceramic substrate including an upper ceramic layer, an upper first substrate copper layer, and an upper second substrate copper layer; an upper unidirectional porous metal base plate disposed on the upper second substrate copper layer and having a plurality of pores extending in one direction in a vertical direction from the upper second substrate copper layer; an upper first spacer disposed on a portion of the upper first substrate copper layer; and an upper second spacer disposed on a portion of the upper first substrate copper layer and having a greater height than the upper first spacer; A lower ceramic circuit board comprising: a lower ceramic substrate including a lower ceramic layer, a lower first substrate copper layer, and a lower second substrate copper layer; a lower unidirectional porous metal base plate disposed on the lower second substrate copper layer and having a plurality of pores extending in one direction in a vertical direction from the lower second substrate copper layer; a lower first spacer disposed on a portion of the lower first substrate copper layer; and a lower second spacer disposed on a portion of the lower first substrate copper layer and having a greater height than the lower first spacer; A first semiconductor element disposed between the upper first spacer and the lower first spacer; A second semiconductor element disposed between the upper second spacer and the lower second spacer and having a smaller thickness than the first semiconductor element; and A mold layer that fills the space between the upper ceramic circuit board and the lower ceramic circuit board and covers the first semiconductor element and the second semiconductor element, Power module.

17. In paragraph 16, an upper heat sink disposed on the outside of the upper ceramic circuit board; and Further comprising at least one lower heat sink disposed on the outer side of the lower ceramic circuit board; Power module.

18. In paragraph 16, The upper ceramic substrate further includes an upper first active metal brazing layer interposed between the upper ceramic layer and the upper first substrate copper layer; and an upper second active metal brazing layer interposed between the upper ceramic layer and the upper second substrate copper layer. The lower ceramic substrate further comprises a lower first active metal brazing layer interposed between the lower ceramic layer and the lower first substrate copper layer; and a lower second active metal brazing layer interposed between the lower ceramic layer and the lower second substrate copper layer. Power module.

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