Topological structure for interleaved parallel flyback converters, and leakage inductance energy recovery method

Abstract

A topological structure for interleaved parallel flyback converters, and a leakage inductance energy recovery method, relating to the technical field of power electronics. The topological structure comprises: a voltage source (Uin), an absorption circuit (1), a power unit (2), and an output circuit (3). The power unit (2) comprises n power circuits connected in parallel, and each power circuit comprises a clamp transistor, a transformer, a primary-side switch transistor, and a secondary-side switch transistor. The clamp transistor of an i-th power circuit is an active clamp transistor, and the clamp transistors of the remaining (n-1) power circuits are passive clamp transistors, wherein n is a natural number greater than 1, and 1≤i≤n. The absorption circuit (1) and the power unit (2) are connected to the voltage source (Uin), and the absorption circuit (1) is used for absorbing leakage inductance energy of the transformer and releasing the leakage inductance energy of the transformer to the output circuit by means of the active clamp transistor. In the present application, the number of power switch transistors is greatly reduced, and the active clamp transistor can also recover the leakage inductance energy while the loss caused by the switch transistors is reduced, thereby reducing the loss caused by the leakage inductance of the transformer.

Description

Topology and Leakage Inductance Energy Recovery Method for Interleaved Parallel Flyback Converters

[0001] Related applications

[0002] This application claims priority to Chinese Patent Application No. 202411047842.2, filed on July 31, 2024, and incorporates the entire contents of the aforementioned patent application as part of this application. Technical Field

[0003] This application belongs to the field of power electronics technology, and particularly relates to the field of DC-DC converter technology. Specifically, it relates to a topology for an interleaved parallel flyback converter and a method for recovering leakage inductance energy. Background Technology

[0004] Flyback converters have great commercial appeal due to their simple structure and low cost. In high-power switching power supply applications, by interleaving flyback converters in parallel, the power can be expanded while making the input and output currents more and more continuous, thereby alleviating the electromagnetic interference problem caused by the discontinuous input and output currents of flyback converters.

[0005] Due to the presence of leakage inductance, the energy conversion efficiency of flyback converters is limited. The industry has invented active clamping technology to recover leakage inductance energy from flyback converters and improve energy conversion efficiency. However, although the more flyback converters are connected in parallel, the more continuous the input and output currents become, if each power circuit in a multi-channel interleaved flyback converter adopts active clamping technology, it will face problems such as doubling the number of power switches and significantly increasing costs. Summary of the Invention

[0006] To address the aforementioned issues, this application provides a topology for an interleaved parallel flyback converter and a method for recovering leakage inductance energy, which can reduce the number of power switches and decrease losses caused by the switches.

[0007] One embodiment of this application provides a topology for an interleaved parallel flyback converter, the topology including: a voltage source, an absorption circuit, a power unit, and an output circuit, wherein:

[0008] The power unit includes n parallel power circuits. Each power circuit includes a clamping transistor, a transformer, a primary-side switch transistor, and a secondary-side switch transistor. The clamping transistor of the i-th power circuit is an active clamping transistor, and the clamping transistors of the remaining (n-1) power circuits are passive clamping transistors. n is a natural number greater than 1, and 1≤i≤n.

[0009] The absorption circuit and the power unit are connected to the voltage source. The absorption circuit is used to absorb the leakage inductance energy of n transformers and release the leakage inductance energy of the n transformers to the output circuit through the active clamping transistor.

[0010] Another embodiment of this application provides a method for recovering leakage inductance energy using the aforementioned topology, the method comprising:

[0011] Configure the phase difference of the drive control signals of two adjacent primary-side switching transistors to be 360° / n.

[0012] The absorption circuit absorbs the leakage inductance energy of n transformers and releases the leakage inductance energy of the n transformers to the output circuit through the conduction of the active clamping transistor.

[0013] The beneficial effects of this application are: by sharing a clamping capacitor among multiple parallel power circuits, the number of power switching transistors in this application is greatly reduced compared to the topology of traditional multi-channel interleaved parallel active clamp flyback converters, effectively reducing the losses caused by the large number of switching transistors in the prior art; at the same time, the active clamping transistor (active clamping) can recover all the leakage inductance energy of the transformer, reducing the energy loss caused by the leakage inductance of the transformer, thereby further improving the energy conversion efficiency of the flyback converter while reducing costs.

[0014] Other features and advantages of this application will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0015] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments of the present application and, together with their description, serve to explain the principles of the present application.

[0016] Figure 1 is a structural diagram of the topology of an n-way interleaved parallel flyback converter according to an embodiment of this application.

[0017] Figure 2 is a structural diagram of the topology of a two-way interleaved parallel flyback converter according to an embodiment of this application.

[0018] Figure 3 is a structural diagram of the topology of a traditional 2-way interleaved parallel flyback converter.

[0019] Figure 4 is a structural diagram of the topology of a 3-way interleaved parallel flyback converter according to an embodiment of this application.

[0020] Figure 5 is a structural diagram of the topology of a traditional 3-way interleaved parallel flyback converter.

[0021] Figure 6 is a structural diagram of the topology of a traditional n-way interleaved parallel flyback converter.

[0022] Figure 7 is an exemplary flowchart of a leakage inductor energy recovery method according to an embodiment of this application.

[0023] Figure 8 is a structural diagram of the topology of a 4-way interleaved parallel flyback converter according to an embodiment of this application.

[0024] Figure 9 is one of the exemplary waveforms of leakage inductance energy absorption and release in the topology shown in Figure 8.

[0025] Figure 10 is a second exemplary waveform diagram of the leakage inductance energy recovery and release of the topology shown in Figure 8. Detailed Implementation

[0026] Various exemplary embodiments of this application will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of this application.

[0027] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the scope of this application and its application or use.

[0028] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0029] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0030] As shown in Figure 1, one embodiment of this application provides a topology for an interleaved parallel flyback converter, the structure comprising:

[0031] The circuit consists of a voltage source Uin, an absorption circuit 1, a power unit 2, and an output circuit 3, wherein:

[0032] The power unit 2 includes n parallel power circuits. Each power circuit includes a clamping transistor, a transformer, a primary-side switch transistor, and a secondary-side switch transistor. The clamping transistor of the i-th power circuit 2i is an active clamping transistor Va, and the clamping transistors of the remaining (n-1) power circuits are passive clamping transistors. n is a natural number greater than 1, and 1≤i≤n.

[0033] The absorption circuit 1 and the power unit 2 are connected to the voltage source Uin. The absorption circuit 1 is used to absorb the leakage inductance energy of n transformers (all transformers) and release the leakage inductance energy of all transformers to the output circuit 3 through the active clamping tube Va.

[0034] It should be understood that for transformers, leakage flux caused by incomplete coupling of magnetic flux between windings or between windings and the core results in a partial magnetic field not completely capturing all windings, thus generating an induced electromotive force. This energy (i.e., leakage inductance energy) is dissipated in the transformer, affecting its efficiency and performance.

[0035] Therefore, based on the topology of the interleaved parallel flyback converter in this embodiment, the absorption circuit 1 can absorb the leakage inductance energy of all transformers and release the leakage inductance energy of all transformers to the output circuit 3 through the active clamping transistor Va, thereby improving the energy conversion efficiency of the flyback converter; and in this embodiment, n parallel power circuits share one absorption circuit, thereby reducing the number of power switching transistors and reducing costs.

[0036] Further, as shown in Figure 1, the i-th power circuit 2i includes an active clamping transistor Va, an i-th transformer Ti, an i-th primary-side switch Qi, and an i-th secondary-side switch Di, wherein:

[0037] The primary winding terminal of the i-th transformer Ti is connected to the absorption circuit 1.

[0038] The non-same-name terminal of the primary winding of the i-th transformer Ti is connected to the source of the active clamping transistor Va and the drain of the i-th primary switching transistor Qi.

[0039] The non-same-name terminal of the secondary winding of the i-th transformer Ti is connected to the positive terminal of the i-th secondary switching transistor Di;

[0040] The secondary winding terminal of the i-th transformer Ti and the negative terminal of the i-th secondary switching transistor Di are connected to the output circuit 3.

[0041] The drain of the active clamping transistor Va is connected to the absorption circuit 1, and the gate of the active clamping transistor Va is used to input a clamping control signal, wherein the clamping control signal is used to control the conduction and shutdown of the active clamping transistor Va.

[0042] The source of the i-th primary-side switch Qi is connected to the negative terminal of the voltage source Uin, and the gate of the i-th primary-side switch Qi is used to input the i-th drive control signal, wherein the i-th drive control signal is used to control the conduction and shutdown of the i-th primary-side switch Qi.

[0043] Furthermore, as shown in Figure 1, the circuit connections and circuit structures of the remaining (n-1) power circuits are the same. The circuit structure and circuit connections of the m-th power circuit will be used as an example for explanation:

[0044] The m-th power circuit 2m includes the m-th passive clamping transistor Vpm, the m-th transformer Tm, the m-th primary-side switch Qm, and the m-th secondary-side switch, where:

[0045] The primary winding terminal of the m-th transformer Tm is connected to the positive terminal of the voltage source Uin;

[0046] The non-same-name terminal of the primary winding of the m-th transformer Tm is connected to the positive terminal of the m-th passive clamping transistor Vpm and the drain of the m-th primary switching transistor Qm.

[0047] The non-same-name terminal of the secondary winding of the m-th transformer Tm is connected to the positive terminal of the m-th secondary switching transistor Dm;

[0048] The secondary winding terminal of the m-th transformer Tm and the negative terminal of the m-th secondary switching transistor Dm are connected to the output circuit 3.

[0049] The negative terminal of the m-th passive clamping transistor Vpm is connected to the absorption circuit 1;

[0050] The source of the m-th primary-side switch Qm is connected to the negative terminal of the voltage source Uin. The gate of the m-th primary-side switch Qm is used to input the m-th drive control signal, wherein the m-th drive control signal is used to control the conduction and shutdown of the m-th primary-side switch, and 1≤m≤n and m≠i.

[0051] It should be noted that, in order to achieve the interleaved parallel connection between the various power circuits and ensure the continuity of the input and output currents, in this embodiment, the phase difference between the drive control signals of two adjacent primary-side switches is 360° / n. That is, the phase difference between two adjacent drive control signals of the 1st drive control signal, the 2nd drive control signal, the 3rd drive control signal, ... the nth drive control signal is 360° / n.

[0052] In an optional embodiment, as shown in FIG1, the absorption circuit 1 includes a clamping capacitor C1, wherein:

[0053] The absorption circuit is used to absorb the leakage inductance energy of the n transformers through the clamping capacitor C1, and release the leakage inductance energy of the n transformers to the output circuit 3 through the active clamping transistor.

[0054] The first end of the clamping capacitor C1 is connected to the same-name terminal of the primary winding of the n transformers (i.e., all transformers) and the positive terminal of the voltage source Uin. The second end of the clamping capacitor is connected to the drain of the active clamping transistor and the negative terminal of all passive clamping transistors.

[0055] In another optional embodiment, as shown in FIG2, the absorption circuit 1 further includes a clamping resistor R1, wherein the first end of the clamping resistor R1 is connected to the positive terminal of the voltage source Uin and the first end of the clamping capacitor C1; the second end of the clamping resistor R1 is connected to the second end of the clamping capacitor C1, the drain of the active clamping transistor and the negative terminals of all the passive clamping transistors.

[0056] Referring to Figure 1, the n power circuits connected in parallel share a clamping capacitor C1. When each power circuit is turned on, the clamping capacitor C1 can absorb the leakage inductance energy of the corresponding transformer, and when the active clamping transistor is turned on, it releases the absorbed leakage inductance energy of the transformer to the output circuit through the active clamping transistor.

[0057] It should be noted that the active clamping transistor turns on after the i-th primary-side switch is turned off, and before the i-th primary-side switch is turned off, the remaining (n-1) primary-side switches are turned on alternately. That is to say, before the i-th primary-side switch is turned off, the clamping capacitor can absorb all the leakage inductance energy of the transformer, and when the active clamping transistor is turned on, the absorbed leakage inductance energy of the transformer is released to the output circuit through the active clamping transistor, thereby improving the energy conversion efficiency of the interleaved parallel flyback converter.

[0058] Furthermore, as shown in Figure 1, the output circuit 3 includes an output capacitor C0, wherein:

[0059] The first terminal of the output capacitor C0 is connected to the negative terminal of all secondary-side switching transistors; the second terminal of the output capacitor C0 is connected to the same-name terminal of all secondary windings of the transformer. It should be understood that, as shown in Figure 1, the output circuit 3 is further connected to an external load, which will not be described in detail in this application.

[0060] Thus, the topology for the interleaved parallel flyback converter proposed in this application embodiment allows multiple parallel power circuits to share a single clamping capacitor. This clamping capacitor can absorb all the leakage inductance energy of the transformer, significantly reducing the number of power switches compared to the traditional multi-channel interleaved parallel active clamp flyback converter topology, effectively reducing the losses caused by the large number of switches in the prior art. At the same time, by turning on the active clamping transistor (active clamping) once, all the leakage inductance energy of the transformer can be recovered, that is, all the absorbed leakage inductance energy of the transformer can be released to the output circuit through the active clamping transistor, reducing the energy loss caused by transformer leakage inductance, thereby further improving the energy conversion efficiency of the flyback converter while reducing costs.

[0061] Next, as shown in Figure 2, the topology of the interleaved parallel flyback converter in this application will be described using n=2 and i=1 as an example:

[0062] Specifically, Figure 2 shows the topology of the power circuits of the two flyback converters connected in an interleaved parallel configuration. The first power circuit uses active clamping technology, and its clamping transistor is an active switching transistor Va. The second power circuit uses traditional passive clamping technology, and its clamping transistor is a passive clamping transistor Vp2. In Figure 2, the passive clamping transistor Vp2 is a diode device, such as a silicon diode or a silicon carbide diode. This application does not limit this.

[0063] The first and second power circuits share a clamping capacitor C1. In this topology, the power switches are the active clamping transistor Va, the first primary-side switch Q1, and the second primary-side switch Q2. That is, the number of power switches is 3.

[0064] Figure 3 shows a schematic diagram of the power circuit of a conventional 2-way active clamp flyback converter connected in an interleaved parallel configuration. It can be seen that the conventional interleaved parallel active clamp flyback converter has 4 power switches, labeled Y1, Y2, Q1 and Q2 respectively. In the 2-way interleaved parallel topology of this application, the number of power switches is 3, which is 25% less than the prior art.

[0065] Next, as shown in Figure 4, the topology of the interleaved parallel flyback converter in this application will be described using n=3 and i=1 as an example:

[0066] Specifically, Figure 4 shows the interleaved parallel topology of the power circuits of the 3-way flyback converter. The first power circuit uses active clamping technology, and its clamping transistor is an active switch. The second and third power circuits use traditional passive clamping technology, and their clamping transistors are the second passive clamping transistor Vp2 and the third passive clamping transistor Vp3, respectively. In Figure 4, the second passive clamping transistor Vp2 and the third passive clamping transistor Vp3 are diode devices, such as silicon diodes or silicon carbide diodes. This application does not limit them.

[0067] The first, second, and third power circuits share a clamping capacitor C1. In this topology, the power switches are the active clamping transistor Va, the first primary-side switch Q1, the second primary-side switch Q2, and the third primary-side switch Q3. That is, the number of power switches is 4.

[0068] Figure 5 shows a schematic diagram of the power circuit of a conventional 3-way active clamp flyback converter connected in an interleaved parallel configuration. It can be seen that the conventional interleaved parallel active clamp flyback converter has 6 power switches, labeled Y1, Y2, Y3, Q1, Q2 and Q3 respectively. In the 3-way interleaved parallel topology of this application, the number of power switches is 4, which is 33% less than the prior art.

[0069] Next, taking Figure 1 above as an example, when the power circuits of the n-way flyback converter are interleaved and connected in parallel, the first power circuit adopts active clamping technology, and its clamping transistor is an active switching transistor Va; the remaining (n-1) power circuits (i.e., the second power circuit, the third power circuit, ... the nth power circuit) adopt passive clamping technology, and their clamping transistors are the second passive clamping transistor Vp2, the third passive clamping transistor Vp3, ... the nth passive clamping transistor Vpn, respectively. In Figure 1, the second passive clamping transistor Vp2, the third passive clamping transistor Vp3, ... the nth passive clamping transistor Vpn are diode devices, such as silicon diodes or silicon carbide diodes, which are not limited in this application.

[0070] The first power circuit, the second power circuit, the third power circuit, ... the nth power circuit share a clamping capacitor C1. In this topology, the power switches are the active clamping transistor Va, the first primary-side switch Q1, the second primary-side switch Q2, the third primary-side switch Q3, ... the nth primary-side switch Qn. That is to say, the number of power switches is (n+1).

[0071] Figure 6 shows a schematic diagram of a conventional n-channel active clamp flyback power module connected in an interleaved parallel configuration. It can be seen that the conventional interleaved parallel active clamp flyback converter has 2n power switches, labeled Y1, Y2, Y3, ..., Yn, Q1, Q2, Q3, ..., Qn. In the n-channel interleaved parallel topology of this application, the number of power switches is (n+1). Compared with the prior art, the power switches in the embodiment of this application are reduced by (n-1) / 2n.

[0072] It should be noted that, under extreme conditions, compared with the prior art, the number of power switches in the embodiments of this application can be reduced by nearly 50%, and the cost loss of power switches is infinitely close to that of the traditional passive clamping topology. However, the traditional passive clamping topology often cannot achieve the recovery of leakage inductance energy. Therefore, this further verifies that the topology proposed in the embodiments of this application for interleaved parallel flyback converters can not only reduce the cost loss of power switches, but also recover all the leakage inductance energy of the transformer, reduce the energy loss caused by the transformer leakage inductance, and improve the energy conversion efficiency of the flyback converter.

[0073] It should be noted that, in this application, the active clamping transistor is a silicon MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), a silicon carbide MOSFET, or a gallium nitride device; the passive clamping transistor is a silicon diode or a silicon carbide diode; the primary-side switching transistor is a silicon MOSFET, a silicon carbide MOSFET, or a gallium nitride device; and the secondary-side switching transistor is a diode or a MOSFET. It should be understood that the device symbols in the accompanying drawings are merely illustrative and do not constitute an undue limitation of this application.

[0074] To further reduce the energy loss of the power switching transistors, based on the topology proposed in the aforementioned embodiments, as shown in Figure 7, another embodiment of this application provides a leakage inductance energy recovery method, including:

[0075] Step 10: Configure the phase difference of the drive control signals of two adjacent primary-side switching transistors to be 360° / n.

[0076] Step 20: The absorption circuit absorbs the leakage inductance energy of n transformers and releases the leakage inductance energy of the n transformers to the output circuit through the conduction of the active clamping transistor.

[0077] It should be noted that, since the principle of the problem solved by this leakage inductance energy recovery method is based on the aforementioned topology, the aforementioned embodiments and the beneficial effects thereon are also applicable to this embodiment. Therefore, the same parts will not be repeated.

[0078] In this embodiment, a power switching cycle is defined as the entire primary-side switching transistors going from on to off. The clamping control signal is used to control the active clamping transistor to turn on after every r power switching cycles to absorb and release leakage inductance energy once, where r is a natural number greater than 0.

[0079] In other words, as shown in Figure 1, n flyback converters share a single leakage inductance energy absorption capacitor, i.e., clamping capacitor C1, and a single leakage inductance energy recovery clamping power switch, i.e., active clamping transistor Va. Under the control of the clamping control signal, the active clamping transistor can turn on once every r power switching cycles to recover leakage inductance energy once.

[0080] Based on the premise that all primary-side switches go from turn-on to turn-off in one power switching cycle, in r power switching cycles, the clamping capacitor continuously absorbs the energy of (r×n) leakage inductors. By turning on the active clamping transistor once, the energy of (r×n) leakage inductors continuously absorbed by the clamping capacitor is released to the output circuit in one go.

[0081] In this embodiment, for an application scenario with n flyback converters connected in parallel, the leakage inductance energy can be absorbed (r×n) times through the shared clamping capacitor. Through one turn-on of the active clamping transistor, the energy of (r×n) leakage inductors is recovered to the output circuit. Since each turn-on of the active clamping power switch results in corresponding losses, the larger r is, the fewer times the active clamping power switch is turned on, resulting in less loss and higher energy recovery efficiency.

[0082] Next, we will take the interleaved parallel topology of the power circuits of the 4-way flyback converter shown in Figure 8 as an example for explanation. Here, i is 1. The first, second, third and fourth power circuits share a clamping capacitor C1. The gate of the first primary-side switch Q1 receives the first drive control signal, the gate of the second primary-side switch Q2 receives the second drive control signal, the gate of the third primary-side switch Q3 receives the third drive control signal, and the gate of the fourth primary-side switch Q4 receives the fourth drive control signal.

[0083] As shown in Figures 9 and 10, the phase difference between two adjacent drive control signals in the first, second, third, and fourth drive control signals is 90°, thereby enabling the interleaved conduction of the first, second, third, and fourth power circuits.

[0084] It should be noted that, as shown in Figure 9, based on the waveforms of the first drive control signal, the second drive control signal, the third drive control signal, and the fourth drive control signal, the first primary-side switch is continuously in the on state to the left of the dashed line l1 (left of the horizontal coordinate 25.01), and switches to the off state at the dashed line l1. The second, third, and fourth primary-side switches also complete one on and off cycle to the left of the dashed line l1.

[0085] According to the waveform diagram of the clamping control signal of the active clamping transistor, the clamping control signal is at a low level to the left of the dashed line l1, the active clamping transistor is off, and the clamping capacitor continuously absorbs the leakage inductance energy of the 4th transformer, 3rd transformer, 2nd transformer and 1st transformer. From the waveform diagram of the clamping capacitor, after the 4th primary-side switch, 3rd primary-side switch, 2nd primary-side switch and 1st primary-side switch are turned off, the voltage of the clamping capacitor will rise by one step, which means that the clamping capacitor absorbs the leakage inductance energy of the corresponding power circuit.

[0086] At the dashed line l1, the first drive control signal (i-th drive control signal) switches to low level, the first primary-side switch (i-th primary-side switch) is turned off, the clamp control signal switches to high level, and the active clamping transistor is turned on.

[0087] It should be noted that the delay time after the first primary-side switch is turned off is the continuous conduction time of the active clamping transistor, that is, the interval between the dashed lines l1 and l2. When the active clamping transistor is turned on, it is used to release all the leakage inductance energy of the transformer absorbed by the clamping capacitor to the output circuit, thereby realizing the recovery of leakage inductance energy.

[0088] Looking at the voltage waveform of the clamping capacitor, after the active clamping transistor is turned on, the voltage of the clamping capacitor will drop by a large step, which means that the leakage inductance energy absorbed in the clamping capacitor has been released and recovered. Correspondingly, we can see a relatively large boost pulse on the waveform of the first output current of the first power circuit, which means that the leakage inductance energy is released to the output circuit through the first power circuit (active clamping transistor). Similarly, we can also see a large boost pulse on the total output current of the output circuit.

[0089] It should be noted that the first output current is the current flowing before node A in Figure 8, and the total output current is the current flowing after node A.

[0090] From the waveform of the output voltage, after the active clamping transistor is turned on, the leakage inductance energy is released to the output circuit through the first power circuit (active clamping transistor), and there is a boost pulse on the waveform of the output voltage.

[0091] Additionally, as shown in Figure 9, from the waveform diagram of the first control signal to the fourth control signal, to the left of the dashed line l1, i.e. before time 25.01, the first primary-side switch to the fourth primary-side switch only experienced one turn-on to turn-off cycle. That is, r is 1, the clamping capacitor absorbs the leakage inductance energy of the four transformers, and the peak voltage of the clamping capacitor is around 590. When the active clamping transistor is turned on, it releases the leakage inductance energy absorbed from the four transformers to the output circuit.

[0092] That is, in each switching cycle, the active clamping transistor on the first power circuit performs one leakage inductance energy recovery.

[0093] It should be noted that, as shown in Figure 10, based on the waveforms of the first drive control signal, the second drive control signal, the third drive control signal, and the fourth drive control signal, the first primary-side switch is continuously in the on state to the left of the dashed line (left of the horizontal coordinate 25.03), and switches to the off state at the dashed line l3. The second, third, and fourth primary-side switches also complete one on and off cycle to the left of the dashed line l1.

[0094] According to the waveform diagram of the clamping control signal of the active clamping transistor, the clamping control signal is at a low level to the left of the dashed line l3, the active clamping transistor is off, and the clamping capacitor continues to absorb the leakage inductance energy of the 4th transformer, 3rd transformer, 2nd transformer and 1st transformer. From the waveform diagram of the clamping capacitor, after the 4th primary-side switch, 3rd primary-side switch, 2nd primary-side switch and 1st primary-side switch are turned off, the voltage of the clamping capacitor will rise by a step, which means that the clamping capacitor absorbs the leakage inductance energy of the corresponding power circuit.

[0095] It should be noted that, unlike Figure 9 above, as shown in Figure 10, from the waveform diagram of the first control signal to the fourth control signal, at the dashed line l3 and to the left, that is, before time 25.03, the first primary-side switch to the fourth primary-side switch experienced two turn-on and turn-off cycles. In other words, when r is 2, the clamping capacitor absorbs the leakage inductance energy of the four transformers twice, which is equivalent to absorbing the leakage inductance energy of eight transformers. The peak voltage of the clamping capacitor is about 630, which is higher than the leakage inductance energy when r is 1.

[0096] Furthermore, at the dashed line l1, the first drive control signal (i-th drive control signal) switches to a low level, the first primary-side switch (i-th primary-side switch) is turned off, the clamp control signal switches to a high level, and the active clamping transistor is turned on.

[0097] It should be noted that the delay time after the first primary-side switch is turned off is the continuous conduction time of the active clamping transistor, that is, the interval between the dashed lines l3 and l4. When the active clamping transistor is turned on, it is used to release the 8 portions of leakage inductance energy of the transformer absorbed by the clamping capacitor to the output circuit, thereby realizing the recovery of leakage inductance energy.

[0098] Looking at the voltage waveform of the clamping capacitor, after the active clamping transistor is turned on, the voltage of the clamping capacitor will drop by a large step, which means that the leakage inductance energy absorbed in the clamping capacitor has been released and recovered. Correspondingly, we can see a relatively large boost pulse on the waveform of the first output current of the first power circuit, which means that the leakage inductance energy is released to the output circuit through the first power circuit (active clamping transistor). Similarly, we can also see a large boost pulse on the total output current of the output circuit.

[0099] From the waveform of the output voltage, after the active clamping transistor is turned on, the leakage inductance energy is released to the output circuit through the first power circuit (active clamping transistor), and there is a boost pulse on the waveform of the output voltage.

[0100] That is, in every two switching cycles, the active clamping transistor on the first power circuit recovers leakage inductance energy once.

[0101] It is evident that for the same multi-channel topology, the larger r is, the greater the leakage inductance energy recovered in one operation. Furthermore, since the active switch incurs losses each time it is turned on, the larger r is, the fewer times the active switch is turned on, resulting in more leakage inductance energy absorbed by the clamping capacitor. Consequently, the power switch losses are reduced, and the efficiency of leakage inductance energy recovery is higher.

[0102] It is understood that the above examples are merely examples listed to better understand the technical solutions of the embodiments of the present invention, and are not intended to be the only limitation on the embodiments of the present invention.

[0103] It should be noted that in the description of this application, the terms "upper," "lower," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0104] It should also be noted that, in the description of this application, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0105] In the embodiments of this application, the singular forms "a," "the," etc., including the plural forms, should be broadly understood as "a kind" or "a class" rather than limited to the meaning of "an." Furthermore, the term "the" should be understood to include both the singular and plural forms, unless the context explicitly indicates otherwise. Additionally, the term "according to" should be understood as "at least partially based on…," and the term "based on" should be understood as "at least partially based on…," unless the context explicitly indicates otherwise.

[0106] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this disclosure can be achieved, and this is not limited herein.

[0107] The specific embodiments described above do not constitute a limitation on the scope of protection of this disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

[0108] While specific embodiments of this application have been described in detail by way of examples, those skilled in the art should understand that the above examples are for illustrative purposes only and are not intended to limit the scope of this application. Those skilled in the art should understand that modifications can be made to the above embodiments without departing from the scope and spirit of this application. The scope of this application is defined by the appended claims.

Claims

1. A topology for an interleaved flyback converter, comprising: The voltage source, the absorption circuit, the power unit and the output circuit, wherein: The power unit comprises n parallel power circuits, each power circuit comprising a clamping tube, a transformer, a primary side switch tube and a secondary side switch tube, wherein the clamping tube of the i th power circuit is an active clamping tube, and the clamping tubes of the remaining (n-1) power circuits are passive clamping tubes, n is a natural number greater than 1, and 1≤i≤n; The absorption circuit is connected with the voltage source, the power unit and the output circuit, and is used for absorbing leakage energy of the n transformers and releasing the leakage energy of the n transformers to the output circuit through the active clamping tube.

2. The topology of claim 1, wherein, The i th power circuit comprises an active clamping tube, an i th transformer, an i th primary side switch tube and an i th secondary side switch tube, wherein: The same name end of the primary side winding of the i th transformer is connected with the absorption circuit; The non-same name end of the primary side winding of the i th transformer is connected with the source of the active clamping tube and the drain of the i th primary side switch tube; The non-same name end of the secondary side winding of the i th transformer is connected with the positive electrode of the i th secondary side switch tube; The same name end of the secondary side winding of the i th transformer and the negative electrode of the i th secondary side switch tube are connected with the output circuit; The drain of the active clamping tube is connected with the absorption circuit, and the gate of the active clamping tube is used for inputting a clamping control signal, wherein the clamping control signal is used for controlling the conduction and the closing of the active clamping tube; The source of the i th primary side switch tube is connected with the negative electrode of the voltage source, and the gate of the i th primary side switch tube is used for inputting an i th driving control signal, wherein the i th driving control signal is used for controlling the conduction and the closing of the i th primary side switch tube.

3. The topology of claim 1, wherein, The circuit connection relationship and the circuit structure of the remaining (n-1) power circuits are the same, wherein the m th power circuit comprises an m th passive clamping tube, an m th transformer, an m th primary side switch tube and an m th secondary side switch tube, wherein: The same name end of the primary side winding of the m th transformer is connected with the positive electrode of the voltage source; The non-same name end of the primary side winding of the m th transformer is connected with the positive electrode of the m th passive clamping tube and the drain of the m th primary side switch tube; The non-same name end of the secondary side winding of the m th transformer is connected with the positive electrode of the m th secondary side switch tube; The same name end of the secondary side winding of the m th transformer and the negative electrode of the m th secondary side switch tube are connected with the output circuit; The negative electrode of the m th passive clamping tube is connected with the absorption circuit; The source of the m th primary side switch tube is connected with the negative electrode of the voltage source, and the gate of the m th primary side switch tube is used for inputting an m th driving control signal, wherein the m th driving control signal is used for controlling the conduction and the closing of the m th primary side switch tube, wherein 1≤m≤n and m≠i.

4. The topology of claim 1, wherein, The phase difference between the driving control signals of the adjacent two primary side switch tubes is 360° / n.

5. The topology of claim 2, wherein, The absorption circuit comprises a clamping capacitor, wherein: The absorption circuit is used for absorbing leakage energy of the n transformers through the clamping capacitor, and releasing the leakage energy of the n transformers to the output circuit through the active clamping tube.

6. The topology of claim 5, wherein, The first end of the clamping capacitor is connected with the positive pole of the voltage source and the same-named end of the primary winding of the n transformers.

7. The topology of claim 1, wherein, The output circuit comprises an output capacitor, wherein: The first end of the output capacitor is connected with the negative pole of all the secondary-side switch tubes; The second end of the output capacitor is connected with the same-named end of the secondary winding of all the transformers.

8. The topology of any one of claims 1-7, wherein: The transistor type of the active clamping tube is silicon MOSFET, silicon carbide MOSFET or gallium nitride device; The transistor type of the passive clamping tube is silicon diode or silicon carbide diode; The transistor type of the primary-side switch tube is silicon MOSFET, silicon carbide MOSFET or gallium nitride device; The transistor type of the secondary-side switch tube is diode or MOSFET.

9. A leakage energy recovery method using the topology of any one of claims 1-8, comprising: The phase difference of the driving control signals of the adjacent two primary-side switch tubes is 360° / n; The absorption circuit absorbs the leakage energy of the n transformers and releases the leakage energy of the n transformers to the output circuit through the conduction of the active clamping tube.

10. The method of claim 9, wherein, From the conduction to the turn-off of all the primary-side switch tubes is one power switching period, and the clamping control signal controls the active clamping tube to conduct once every r power switching periods to perform leakage energy recovery once, wherein r is a natural number greater than 0.

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