Electronic device and method by which electronic device manages memory

Abstract

This electronic device comprises: at least one processor including a processing circuit; a volatile memory; and a non-volatile memory for storing instructions, wherein, when the instructions are individually or collectively executed by the at least one processor, the electronic device stores data for driving a first type of application in a first heap area allocated in the volatile memory and stores data for driving a second type of application in a second heap area allocated in the volatile memory when the first and second types of applications are executed, and compresses the data stored in the first heap area prior to the data stored in the second heap area in order to increase available space of the volatile memory when it is identified that the available space of the volatile memory is less than a determined space.

Description

Electronic devices and methods for managing memory in electronic devices

[0001] The present disclosure relates to an electronic device and a method for managing memory of the electronic device, and more particularly, to a method for managing available capacity of memory of the electronic device.

[0002] On electronic devices, application processes operate using heap memory of a fixed size. Heap memory is used for dynamic memory allocation, and memory can be allocated or freed as needed during program execution.

[0003] The process of reclaiming or reallocating memory allocated to heap memory may cause the application's response time to decrease.

[0004] An electronic device according to one or more embodiments of the present disclosure includes at least one processor including a processing circuit, a volatile memory, and a non-volatile memory storing instructions, wherein when the instructions are individually or collectively executed by the at least one processor, the electronic device stores data for driving the first type of application in a first heap area allocated to the volatile memory when first and second types of applications are executed, stores data for driving the second type of application in a second heap area allocated to the volatile memory, and, when it is determined that the available space of the volatile memory is less than a predetermined space, compresses data stored in the first heap area in preference to data stored in the second heap area in order to increase the available space of the volatile memory.

[0005] The volatile memory includes a general memory area and an auxiliary memory area, the general memory area includes the first heap area and the second heap area, and when the instructions are individually or collectively executed by the at least one processor, the electronic device can move the compressed dynamic data from the first heap memory area to the compressed memory area.

[0006] When the above instructions are individually or collectively executed by the at least one processor, the electronic device can restore the compressed data and move the restored data from the auxiliary memory area to the first heap area when the first type of application is run.

[0007] When the above instructions are individually or collectively executed by the at least one processor, the electronic device may be such that the first type of application is an application not related to the artificial intelligence model, and the second type of application is an application related to the artificial intelligence model.

[0008] When the above instructions are individually or collectively executed by the at least one processor, the electronic device can move the compressed data from the volatile memory to the non-volatile memory if the available space of the auxiliary memory area satisfies a predetermined condition.

[0009] When the above instructions are individually or collectively executed by the at least one processor, the electronic device can, when the second type of application is executed, allocate the second heap area to the volatile memory using a compatible API in the OS running on the electronic device, and store data for running the second type of application in the second heap area.

[0010] When the above instructions are individually or collectively executed by the at least one processor, the electronic device, when an event for executing an application is detected, identifies whether the application is the second type of application including an artificial intelligence model, and if the application is the second type of application, allocates the second heap area using a separately defined argument to allocate the second heap area to the volatile memory.

[0011] When the above instructions are individually or collectively executed by the at least one processor, the electronic device can determine a memory usage score of each of the plurality of second type applications by using properties of each of the plurality of second type applications when a plurality of second type applications are executed, and when the available space of the volatile memory becomes less than the determined space, move the plurality of second type applications in the order of the memory usage scores from the second heap area to the compressed memory area of ​​the volatile memory.

[0012] A method for controlling an electronic device according to one or more embodiments of the present disclosure includes, when first and second types of applications are executed, storing data for driving the first type of application in a first heap area allocated to volatile memory, storing data for driving the second type of application in a second heap area allocated to volatile memory, and, when it is determined that the available space of the volatile memory is less than a predetermined space, compressing data stored in the first heap area prior to data stored in the second heap area in order to increase the available space of the volatile memory.

[0013] The volatile memory includes a general memory area and an auxiliary memory area, the general memory area includes the first heap area and the second heap area, and the step of compressing data stored in the first heap area may further include a step of moving the compressed dynamic data from the first heap memory area to the compressed memory area.

[0014] The above control method may further include a step of restoring the compressed data when the first type of application is run, and a step of moving the restored data from the auxiliary memory area to the first heap area.

[0015] The first type of application may be an application not related to an artificial intelligence model, and the second type of application may be an application related to the artificial intelligence model.

[0016] The above control method may further include a step of moving the compressed data from the volatile memory to the non-volatile memory when the available space of the auxiliary memory area satisfies a predetermined condition.

[0017] The above control method may further include a step of allocating the second heap area to the volatile memory using a compatible API in an OS running on the electronic device when the second type of application is executed, and a step of storing data for running the second type of application in the second heap area.

[0018] The above control method may further include, when an event for executing an application is detected, a step of identifying whether the application is a second type of application including an artificial intelligence model, and, if the application is a second type of application, a step of allocating the second heap area using a separately defined argument to allocate the second heap area to the volatile memory.

[0019] The above control method may further include a step of determining a memory usage score of each of the plurality of second type applications by using properties of each of the plurality of second type applications when a plurality of second type applications are executed, and a step of moving, when the available space of the volatile memory becomes less than the determined space, applications of the plurality of second types in the order of the memory usage scores from the second heap area to the compressed memory area of ​​the volatile memory.

[0020] A non-transitory computer-readable recording medium comprising a program for executing a control method of an electronic device according to one or more embodiments of the present disclosure, wherein the control method comprises the steps of: when first and second types of applications are executed, storing data for driving the first type of application in a first heap area allocated to volatile memory, storing data for driving the second type of application in a second heap area allocated to volatile memory, and when it is determined that the available space of the volatile memory is less than a predetermined space, compressing data stored in the first heap area prior to data stored in the second heap area in order to increase the available space of the volatile memory.

[0021] The volatile memory includes a general memory area and an auxiliary memory area, the general memory area includes the first heap area and the second heap area, and the step of compressing data stored in the first heap area may further include a step of moving the compressed dynamic data from the first heap memory area to the compressed memory area.

[0022] The above control method may further include a step of restoring the compressed data when the first type of application is run, and a step of moving the restored data from the auxiliary memory area to the first heap area.

[0023] The first type of application may be an application not related to an artificial intelligence model, and the second type of application may be an application related to the artificial intelligence model.

[0024] FIG. 1 is a block diagram illustrating a configuration of an electronic device according to one or more embodiments of the present disclosure.

[0025] FIG. 2 is a diagram illustrating a memory according to one embodiment of the present disclosure.

[0026] FIG. 3 is a diagram illustrating allocation of an area for storing data in a memory by an electronic device according to one embodiment of the present disclosure.

[0027] FIGS. 4 and 5 are diagrams for explaining memory pages according to one embodiment of the present disclosure.

[0028] FIG. 6 is a diagram illustrating a heap area according to one embodiment of the present disclosure.

[0029] FIG. 7 is a diagram illustrating a memory page in which an artificial intelligence model is stored according to one embodiment of the present disclosure.

[0030] FIG. 8 is a diagram for explaining an operation of an electronic device according to one embodiment of the present disclosure to allocate and retrieve data for driving a general application and data for driving an artificial intelligence application to a volatile memory.

[0031] FIG. 9 is a diagram for explaining the properties of an artificial intelligence application according to one embodiment of the present disclosure.

[0032] FIG. 10 is a diagram for explaining an operation of an electronic device according to one embodiment of the present disclosure to recover an area allocated to a volatile memory.

[0033] FIG. 11 is a flowchart for explaining a method for controlling an electronic device according to one embodiment of the present disclosure.

[0034] The present embodiments may be modified and have various embodiments. Therefore, specific embodiments are illustrated in the drawings and described in detail in the detailed description. However, this is not intended to limit the scope to specific embodiments, but should be understood to encompass various modifications, equivalents, and / or alternatives of the embodiments of the present disclosure. In connection with the description of the drawings, similar reference numerals may be used for similar components.

[0035] In describing the present disclosure, if it is determined that a specific description of a related known function or configuration may unnecessarily obscure the gist of the present disclosure, a detailed description thereof will be omitted.

[0036] Additionally, the following embodiments may be modified in various other forms, and the scope of the technical concepts of the present disclosure is not limited to the following embodiments. Rather, these embodiments are provided to further faithfully and completely convey the technical concepts of the present disclosure to those skilled in the art.

[0037] The terminology used in this disclosure is for the purpose of describing specific embodiments only and is not intended to limit the scope of the rights. Singular expressions include plural expressions unless the context clearly dictates otherwise.

[0038] In this disclosure, expressions such as “has,” “can have,” “includes,” or “may include” indicate the presence of a corresponding feature (e.g., a component such as a number, function, operation, or part), and do not exclude the presence of additional features.

[0039] In this disclosure, expressions such as “A or B,” “at least one of A and / or B,” or “one or more of A or / and B” can include all possible combinations of the listed items. For example, “A or B,” “at least one of A and B,” or “at least one of A or B” can all refer to (1) including at least one A, (2) including at least one B, or (3) including both at least one A and at least one B.

[0040] The expressions “first,” “second,” “first,” or “second,” etc., used in this disclosure can describe various components, regardless of order and / or importance, and are only used to distinguish one component from another, but do not limit the components.

[0041] When it is said that a component (e.g., a first component) is “(operatively or communicatively) coupled with / to” or “connected to” another component (e.g., a second component), it should be understood that said component may be directly coupled to said other component, or may be coupled via another component (e.g., a third component).

[0042] On the other hand, when it is said that a component (e.g., a first component) is "directly connected" or "directly connected" to another component (e.g., a second component), it can be understood that no other component (e.g., a third component) exists between said component and said other component.

[0043] The expression "configured to" used in the present disclosure may be used interchangeably with, for example, "suitable for," "having the capacity to," "designed to," "adapted to," "made to," or "capable of." The term "configured to" may not necessarily mean only "specifically designed to" in terms of hardware.

[0044] Instead, in some contexts, the phrase "a device configured to" may mean that the device, in conjunction with other devices or components, is "capable of" performing A, B, and C. For example, the phrase "a processor configured (or set) to perform A, B, and C" may refer to a dedicated processor (e.g., an embedded processor) for performing those operations, or a general-purpose processor (e.g., a CPU or application processor) that can perform those operations by executing one or more software programs stored in a memory device.

[0045] In the embodiments, a 'module' or 'part' performs at least one function or operation, and may be implemented as hardware or software, or as a combination of hardware and software. Furthermore, a plurality of 'modules' or 'parts' may be integrated into at least one module and implemented as at least one processor, except for a 'module' or 'part' that needs to be implemented as a specific hardware.

[0046] Meanwhile, the various elements and areas in the drawings are schematically drawn. Therefore, the technical concept of the present invention is not limited by the relative sizes or spacing depicted in the attached drawings.

[0047] Hereinafter, with reference to the attached drawings, embodiments according to the present disclosure will be described in detail so that a person having ordinary knowledge in the technical field to which the present disclosure pertains can easily implement the present disclosure.

[0048] FIG. 1 is a block diagram illustrating a configuration of an electronic device according to one or more embodiments of the present disclosure.

[0049] The electronic device (100) may include at least one of a memory (110) and a processor (120). The electronic device (100) may further include other components in addition to the above components.

[0050] The electronic device (100) may be implemented as a smartphone, but this is only one or more embodiments, and the electronic device (100) may be implemented in various forms, such as a TV, a smart TV, a set-top box, a mobile phone, a server, a PDA (personal digital assistant), a laptop, a media player, an e-book reader, a digital broadcasting terminal, a navigation device, a kiosk, an MP3 player, a wearable device, a home appliance, and other mobile or non-mobile computing devices.

[0051] The memory (110) can store instructions for the electronic device (100). The memory (110) can store an operating system (O / S) for driving the electronic device (100). In addition, the memory (110) can store various software programs or applications for operating the electronic device (100) according to various embodiments of the present disclosure. In addition, the memory (110) can include a semiconductor memory such as a flash memory or a magnetic storage medium such as a hard disk.

[0052] Specifically, the memory (110) can store various software modules for operating the electronic device (100) according to various embodiments of the present disclosure, and the processor (120) can control the operation of the electronic device (100) by executing various software modules stored in the memory (110). That is, the memory (110) is accessed by the processor (120), and data reading / recording / modifying / deleting / updating, etc. can be performed by the processor (120).

[0053] Meanwhile, in the present disclosure, the term memory (110) may be used to mean a memory (110), a ROM (not shown), a RAM (not shown) in a processor (120), or a memory card (not shown) (e.g., a micro SD card, a memory stick) mounted on an electronic device (100).

[0054] The processor (120) can control the overall operation and function of the electronic device (100). Specifically, the processor (120) is connected to the configuration of the electronic device (100) including the memory (110), and can control the overall operation of the electronic device (100) by executing at least one command stored in the memory (110) as described above.

[0055] The processor (120) may be implemented in various ways. For example, the processor (120) may be implemented as at least one of an application specific integrated circuit (ASIC), a logic integrated circuit, an embedded processor, a microcomputer (Micom), a microprocessor, hardware control logic, a hardware finite state machine (FSM), and a digital signal processor (DSP).

[0056] In particular, the processor (120) may include one or more processors. Specifically, the one or more processors may include one or more of a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), an Accelerated Processing Unit (APU), a Many Integrated Core (MIC), a Digital Signal Processor (DSP), a Neural Processing Unit (NPU), a Main Processing Unit (MPU), a hardware accelerator, or a machine learning accelerator. The one or more processors may control one or any combination of other components of the electronic device, and may perform operations related to communication or data processing. The one or more processors may execute one or more programs or instructions stored in a memory. For example, the one or more processors may perform a method according to an embodiment of the present disclosure by executing one or more instructions stored in a memory.

[0057] When a method according to one or more embodiments of the present disclosure includes multiple operations, the multiple operations may be performed by one processor or by multiple processors. That is, when a first operation, a second operation, and a third operation are performed by a method according to one or more embodiments, the first operation, the second operation, and the third operation may all be performed by the first processor, or the first operation and the second operation may be performed by the first processor (e.g., a general-purpose processor) and the third operation may be performed by the second processor (e.g., an artificial intelligence-specific processor).

[0058] One or more processors may be implemented as a single core processor including one core, or may be implemented as one or more multicore processors including multiple cores (e.g., homogeneous multicores or heterogeneous multicores). When one or more processors are implemented as a multicore processor, each of the multiple cores included in the multicore processor may include internal processor memory, such as cache memory or on-chip memory, and a common cache shared by the multiple cores may be included in the multicore processor. In addition, each of the multiple cores (or some of the multiple cores) included in the multicore processor may independently read and execute program instructions for implementing a method according to one or more embodiments of the present disclosure, or all (or some) of the multiple cores may be linked to read and execute program instructions for implementing a method according to one or more embodiments of the present disclosure.

[0059] When a method according to one or more embodiments of the present disclosure includes a plurality of operations, the plurality of operations may be performed by one core among the plurality of cores included in a multi-core processor, or may be performed by the plurality of cores. For example, when a first operation, a second operation, and a third operation are performed by a method according to one or more embodiments, the first operation, the second operation, and the third operation may all be performed by a first core included in the multi-core processor, or the first operation and the second operation may be performed by a first core included in the multi-core processor, and the third operation may be performed by a second core included in the multi-core processor.

[0060] In embodiments of the present disclosure, the processor (120) may mean a system on a chip (SoC) in which one or more processors and other electronic components are integrated, a single-core processor, a multi-core processor, or a core included in a single-core processor or a multi-core processor, wherein the core may be implemented as a CPU, a GPU, an APU, a MIC, a DSP, an NPU, a hardware accelerator, or a machine learning accelerator, but embodiments of the present disclosure are not limited thereto.

[0061] The operation of the electronic device (100) for implementing various embodiments of the present disclosure may be implemented through a plurality of modules.

[0062] Specifically, data for a plurality of modules according to the present disclosure can be stored in a memory (110), and the processor (120) can access the memory (110) to load the data for the plurality of modules into a memory or buffer within the processor (120), and then implement various embodiments according to the present disclosure using the plurality of modules.

[0063] At least one of the plurality of modules according to the present disclosure may be implemented in hardware and included in a processor (120) in the form of a system on chip.

[0064] Alternatively, at least one of the plurality of modules according to the present disclosure may be implemented as a separate external device, and the electronic device (100) and each module may communicate and perform operations according to the present disclosure.

[0065] In particular, the processor (120) can control the operation of the electronic device (100) by executing commands stored in the memory (110).

[0066] Hereinafter, the invention according to the present disclosure will be described in detail with reference to the attached drawings.

[0067] FIG. 2 is a diagram illustrating a memory according to one embodiment of the present disclosure.

[0068] Referring to FIG. 2, memory (110) may include volatile memory (111) and non-volatile memory (112). Volatile memory may be implemented in the form of RAM (Random Access Memory) such as DRAM (Dynamic Random Access Memory), and may have the characteristic of data disappearing when the system is shut down. Non-volatile memory is mainly in the form of storage devices such as flash memory, SSD (Solid State Drive), and HDD (Hard Disk Drive), and may have the characteristic of data being maintained even when the system is shut down. Volatile memory provides high-speed data reading and writing performance, and may be used as the main memory of the system to store data of currently running applications and processes. Non-volatile memory is used for the purpose of permanent storage of large amounts of data, and may store system booting information, user files, files for installing applications, files for executing applications, etc.

[0069] The volatile memory (111) may include a general memory area (111a) and an auxiliary memory area (111b). The general memory area (111a) may be used to store data of a running application. The auxiliary memory area (111b) may be used to store compressed data using a memory compression technology such as zRAM.

[0070] The electronic device (100) can store data for running an application in volatile memory (111). When the application is executed, the electronic device (100) can allocate an area in the volatile memory (111) to store data for running the application. This will be described with reference to FIG. 3.

[0071] FIG. 3 is a diagram illustrating allocation of an area for storing data in a memory by an electronic device according to one embodiment of the present disclosure.

[0072] Referring to FIG. 3, when an application is executed, the electronic device (100) can allocate a code area (310), a data area (320), a heap area (330), a stack area (340), and a process area (350) to the volatile memory (111). At this time, the electronic device (100) can allocate the above-described multiple areas to the general memory area (111a) of the volatile memory (111).

[0073] In addition, the electronic device (100) can store data for driving an application in each allocated area. In the present disclosure, “storage” may be replaced with a term of the same / similar concept, such as “load.”

[0074] The electronic device (100) can store the source code of the application in the allocated code area (310). The electronic device (100) can store the global variables and static variables of the application in the allocated data area (320). The electronic device (100) can store dynamic data that the application must create and manage in the allocated heap area (330). The electronic device (100) can store local variables, parameters, pointers, etc. of the application in the allocated stack area (340). The electronic device (100) can store data for managing the execution of the application's process in the allocated process area (350).

[0075] In particular, the heap area (330) of the memory (110) may be a dynamic space that can be dynamically allocated or released depending on the operation of the application. In other words, the heap area (330) may be an area where dynamic data is allocated depending on the operation of the application. The size of the heap area (330) may be determined at runtime.

[0076] At this time, each area allocated to the memory (110) may be composed of a memory page. A memory page may refer to a basic unit for managing memory. The electronic device (100) may divide the memory (110) into page units and manage it, and the memory pages may be mapped to physical memory. The size of a memory page may be set to 4KB, 8KB, 2MB, or 1GB, etc.

[0077] Memory page types can include file-backed pages and anonymous pages. File-backed pages can be pages mapped to files in the file system. Anonymous pages can refer to pages not associated with a file.

[0078] The heap area (330) may be composed of multiple anonymous pages, and the electronic device (100) may allocate multiple anonymous pages to the heap area (330) and store dynamic data of the application in the allocated anonymous pages.

[0079] For example, the code area (310), the data area (320), and the process area (350) may be composed of file-based pages, and the heap area (330) and the stack area (340) may be composed of anonymous pages. That is, as illustrated in FIG. 4, the type of memory page where dynamic data (410) is stored may be an anonymous page. In addition, the type of memory page where data (420) constituting the code area, the data area, and the process area is stored may be a file-based page.

[0080] Meanwhile, when running an artificial intelligence application related to an artificial intelligence model, the electronic device (100) may allocate a heap area for storing the artificial intelligence model in volatile memory (111) and store the artificial intelligence model in the allocated heap area. At this time, the type of memory page constituting the area where the artificial intelligence model is stored may be an anonymous page.

[0081] In this disclosure, applications not related to artificial intelligence models may be referred to as "general applications" or "type 1 applications." Applications related to artificial intelligence models may be referred to as "artificial intelligence applications" or "type 2 applications."

[0082] For example, as illustrated in FIG. 5, the type of memory page where dynamic data (510) and artificial intelligence models (520) are stored may be an anonymous page. In addition, the type of memory page where data (530) constituting the code area, data area, and process area are stored may be a file-based page.

[0083] Meanwhile, when the available space of the volatile memory (111) becomes less than a predetermined space, the electronic device (100) can increase the available space of the volatile memory (111) by reclaiming at least a portion of the area allocated to the volatile memory (111).

[0084] At this time, the electronic device (100) can reclaim an area composed of anonymous pages among the multiple areas allocated to the volatile memory (111) with priority over an area composed of file-based pages. In other words, the electronic device (100) can reclaim a heap area of ​​the volatile memory (111) with priority over other areas.

[0085] That is, when the available space of the volatile memory (111) becomes less than a predetermined space, the electronic device (100) can increase the available space of the volatile memory (111) by reclaiming the heap area allocated to the volatile memory (111).

[0086] Thereafter, if data stored in the recovered heap area is needed to run the application, the electronic device (100) can reallocate the recovered heap area to volatile memory (111).

[0087] Meanwhile, when an electronic device (100) allocates, recovers, and reallocates a heap area in volatile memory (111), a problem may arise where the application's response time is significantly reduced. In addition, frequent reclamation and reallocation of memory areas may lead to a problem of consuming system resources.

[0088] In particular, in the case of an artificial intelligence application related to an artificial intelligence model, as described with reference to FIG. 5, the artificial intelligence model may be stored in an area comprised of anonymous pages in the volatile memory (111). In addition, when the available space of the volatile memory (111) becomes less than a predetermined space, the electronic device (100) may retrieve the area in which the artificial intelligence model is stored in the volatile memory (111) with priority over other areas.

[0089] Subsequently, when the AI ​​model needs to be reused in the AI ​​application, the electronic device (100) may need to reallocate the heap area for storing the AI ​​model in memory and store the AI ​​model in the reallocated heap area. This may result in a significant decrease in the response time and usability of the AI ​​application.

[0090] To solve the above-described technical problem, the electronic device (100) of the present disclosure can, when an artificial intelligence application is executed, allocate a heap area defined separately from the heap area where dynamic data of a general application is stored to the volatile memory (111). In addition, the electronic device (100) can store an artificial intelligence model in the separately defined heap area.

[0091] Specifically, as illustrated in FIG. 6, the heap area (330) of the volatile memory (111) may include a first area (331) where dynamic data is stored and a second area (332) where an artificial intelligence model is stored.

[0092] At this time, the first region (331) may be composed of "anonymous pages" as described above. On the other hand, the second region (332) may be composed of memory pages defined separately from the "anonymous pages." At this time, the name of the memory page constituting the second region (332) may be defined as "model page," but is not limited thereto, and may be defined with various names.

[0093] When the artificial intelligence application is executed, the electronic device (100) can allocate a second area (332) to the volatile memory (111) using an API compatible with the OS (e.g., Linux) running on the electronic device (100).

[0094] Specifically, the electronic device (100) may use API functions such as malloc, a memory allocation function, and mmap, a memory mapping function, to allocate a heap area in a volatile memory (111). When an artificial intelligence application is executed, the electronic device (100) may use a separately defined flag (or argument), such as “MAP_MODEL” or “MAP_MODEL_QUICK,” when making an API request for allocating a heap area in a volatile memory (111). In this case, when the “MAP_MODEL_QUICK” flag is used, compared to when the “MAP_MODEL” flag is used, the size of the allocated memory area may increase, or a processor with higher performance may be mapped when mapping the processor that processes the allocated memory area. In this case, in the case of a general application that calls a heap area without using a separately defined flag, the existing memory allocation method may be used as is.

[0095] As illustrated in FIG. 7, the type of memory page where data constituting the first area of ​​the heap area where dynamic data (710) is stored may be an anonymous page. Furthermore, the type of memory page where data (720) constituting the code area, data area, and process area are stored may be a file-based page. Furthermore, the type of memory page where data constituting the second area of ​​the heap area where the artificial intelligence model (720) is stored may be a “model page,” which is defined to be distinct from “anonymous pages” and “file-based pages.”

[0096] When the available space of the memory (110) becomes less than a predetermined space, the electronic device (100) can preferentially recover the area composed of anonymous pages. Referring again to FIG. 6, the electronic device (100) can preferentially recover the first area (331) of the heap area (330) in the memory (110) over the second area (332) of the heap area (330) in which the artificial intelligence model is stored. In addition, the electronic device (100) can preferentially recover the stack area (340) over the second area (332) of the heap area (330) in which the artificial intelligence model is stored.

[0097] That is, the electronic device (100) may not retrieve the area where the artificial intelligence model is stored in the volatile memory (111) or may delay the time at which the area where the artificial intelligence model is stored is retrieved. Accordingly, the invention according to the present disclosure has the technical effect of maintaining the response time of the artificial intelligence application without increasing and increasing usability.

[0098] Meanwhile, when an AI application and a general application are running simultaneously, the electronic device (100) of the present disclosure can retrieve the area in volatile memory (111) where the data of the general application is stored prior to the area where the data of the AI ​​application is stored. Accordingly, the usability of the AI ​​application can be increased. This will be described with reference to FIG. 8.

[0099] FIG. 8 is a drawing for explaining an operation of an electronic device (100) according to one embodiment of the present disclosure to allocate and retrieve data for driving a general application and data for driving an artificial intelligence application to a volatile memory (111).

[0100] Referring to FIG. 8, when a general application is executed, the electronic device (100) can allocate an area (810) to store data for driving the general application in the volatile memory (111).

[0101] At this time, the allocated area may include a first code area (811), a first data area (812), a first heap area (813), a first stack area (814), and a first process area (815). At least a portion of the first code area (811), the first data area (812), the first heap area (813), the first stack area (814), and the first process area (815) may be the same as described with reference to FIG. 3.

[0102] And, when the artificial intelligence application is executed, the electronic device (100) can allocate an area (820) to store data for driving the artificial intelligence application in the volatile memory (111).

[0103] At this time, the allocated area may include a second code area (821), a second data area (822), a second heap area (823), a second stack area (824), and a second process area (825). At least a portion of the second code area (821), the second data area (822), the second heap area (823), the second stack area (824), and the second process area (825) may be the same as described with reference to FIG. 6.

[0104] The second heap area (823) may include a first area (823a) for storing dynamic data of an artificial intelligence application and a second area (823b) for storing an artificial intelligence model.

[0105] That is, the electronic device (100) can be defined by distinguishing between a first heap area (813) of memory for storing data of a general application and a second heap area (823) of memory for storing data of an artificial intelligence application.

[0106] Specifically, the first heap area (813) may be composed of anonymous pages, and at least a portion of the second heap area (823) may be composed of pages that are defined separately from the anonymous pages. For example, in the second heap area (823), the first area (823a) may be composed of anonymous pages, and the second area (823b) may be composed of model pages that are defined separately from the anonymous pages. Alternatively, although not illustrated in the drawing, both the first area (823a) and the second area (823b) in the second heap area (823) may be composed of model pages. That is, when an artificial intelligence application is executed, the electronic device (100) may store an artificial intelligence model in the second heap area (823) that is defined separately to store the artificial intelligence model.

[0107] If the available space of the volatile memory (111) is less than the specified space, the electronic device (100) can recover the first heap area (813) in priority over the second heap area (823). That is, the electronic device (100) can compress the data stored in the first heap area (813) in priority over the data stored in the second heap area (823) and move the compressed data to the auxiliary memory area.

[0108] Meanwhile, the electronic device (100) can run multiple applications simultaneously. When the space in the volatile memory (111) becomes insufficient, the electronic device (100) can determine the priority for reclaiming memory areas using the memory usage scores of each of the multiple applications.

[0109] That is, when multiple artificial intelligence applications are running, the electronic device (100) can identify the retrieval priority of each of the multiple artificial intelligence applications and perform memory retrieval operations for each of the multiple artificial intelligence applications according to the identified priority. This will be described with reference to FIG. 9.

[0110] When an artificial intelligence application is executed, the electronic device (100) can identify the properties of the executed artificial intelligence application.

[0111] For example, as illustrated in FIG. 9, the properties (900) of the artificial intelligence application can be classified into six types, as illustrated in FIG. 9.

[0112] Here, the level can represent the classification level or importance level of the artificial intelligence application.

[0113] The properties of artificial intelligence applications can be categorized as foreground applications or background applications.

[0114] AI applications can be classified based on the properties of the AI ​​models that drive them.

[0115] The properties of artificial intelligence models can be categorized into foreground applications, visible applications, invisible applications, hidden applications, service applications, and synchronization applications.

[0116] Depending on the nature of the AI ​​model, each AI application may be indexed separately, such as in the "AI model memory partitioning diagram." For example, if the AI ​​model associated with an AI application is a "foreground application," the AI ​​application may be indexed as a "foreground application."

[0117] Depending on the nature of the AI ​​application, the weighting of the memory usage score assigned may be determined. For example, if the AI ​​model is a visual application, the weighting of the memory usage score assigned may be 2.

[0118] Each of the plurality of AI applications may have a predetermined memory usage score. In this case, the electronic device (100) may assign a weight to the memory usage score of each of the plurality of AI applications. In this case, the electronic device (100) may assign a weight to the memory usage score of each of the plurality of AI applications based on the attributes of each of the plurality of AI applications. Based on the weighted memory usage score of each of the plurality of AI applications, the electronic device (100) may prioritize reclaiming memory for at least one of the plurality of AI applications.

[0119] When the available space of the volatile memory (111) becomes less than a predetermined space, the electronic device (100) can give priority to retrieving a memory area in which data of an artificial intelligence application with a high weighted memory usage score is stored.

[0120] Meanwhile, in the present disclosure, the weights of the memory usage score may be assigned as 0, 2, 4, 8, 16, and 32, but this is only an example and may be assigned in various forms. At this time, the interval between the assigned weights may be determined according to the capacity of the volatile memory (111). As the capacity of the volatile memory (111) decreases, the electronic device (100) may have to precisely control the memory recovery operation. Accordingly, as the capacity of the volatile memory (111) decreases, the electronic device (100) may determine the weight values ​​so that the interval between the assigned weights becomes narrower. Conversely, as the capacity of the volatile memory (111) increases, the electronic device (100) may determine the weight values ​​so that the interval between the assigned weights becomes wider.

[0121] FIG. 10 is a diagram for explaining an operation of an electronic device according to one embodiment of the present disclosure to recover an area allocated to a volatile memory.

[0122] Referring to FIG. 10, the electronic device (100) can store application data (112a) stored in non-volatile memory (112) in an area allocated to volatile memory (111).

[0123] When the available space of the non-volatile memory (112) becomes less than a predetermined space, the electronic device (100) can compress the data stored in the general memory area (111a) of the volatile memory (111) and move it to the auxiliary memory area (111b) of the volatile memory (111). At this time, the electronic device (100) can compress the data stored in the general memory area (111a) and move it to the auxiliary memory area (111b). Then, the electronic device (100) can retrieve the area where the data was stored from the general memory area (111a). At this time, the auxiliary memory area (111b) can be referred to as a zRAM area.

[0124] In a situation where multiple applications are running, the electronic device (100) can move the area where data of each of the multiple applications is stored from the general memory area (111a) to the auxiliary memory area (111b) with different priorities as described above.

[0125] If all running applications have been moved to the auxiliary memory area (111b), if the available capacity of the auxiliary memory area (111b) becomes less than a specified space, or if multiple applications are in a memory competition relationship, the electronic device (100) can perform an additional memory reclamation operation.

[0126] Specifically, the electronic device (100) can move data stored in the auxiliary memory area (111b) to the non-volatile memory (112). For example, the electronic device (100) can move data stored in the auxiliary memory area (111b) to a separate area (112b) allocated to the non-volatile memory (112). At this time, the name of the area (112b) allocated to the non-volatile memory (112) may be defined as a “SWAP” area, but is not limited thereto. At this time, the priority order in which the electronic device (100) moves data from the auxiliary memory area (111b) to the non-volatile memory (112) may be the same as the order in which the electronic device (100) moves data from the general memory area (111a) to the auxiliary memory area (111b).

[0127] If all running applications have been moved to volatile memory (111), if all data stored in the auxiliary memory area (111b) has been moved to the area allocated to volatile memory (112b), or if the available capacity of the auxiliary memory area (111b) becomes less than a specified space, the electronic device (100) can perform an additional memory recovery operation.

[0128] At this time, the electronic device (100) may perform a Low Memory Killer Daemon (LMKD) and / or an Out Of Memory Killer (OOMK) operation.

[0129] Specifically, the electronic device (100) can delete data stored in an area (112b) allocated to the volatile memory (111). At this time, the electronic device (100) can terminate the process of the application corresponding to the deleted data.

[0130] At this time, the order in which the electronic device (100) deletes data from the volatile memory (111) may be the same as the order in which the electronic device (100) moves data from the general memory area (111a) to the auxiliary memory area (111b).

[0131] The method of reallocating the recovered memory area may be the reverse of the method described above.

[0132] The electronic device (100) of the present disclosure can store data of a recovered area and data of an allocated area in a list form.

[0133] The electronic device (100) can store data stored in the recovered area in a list defined with a name such as "inactive_list." Furthermore, the electronic device (100) can store data stored in the allocated area in a list defined with a name such as "active_list." At this time, the electronic device (100) can also store the type of memory page where the data is stored in the list.

[0134] FIG. 11 is a flowchart for explaining a method for controlling an electronic device according to one embodiment of the present disclosure.

[0135] Referring to FIG. 11, when the first and second types of applications are executed, the electronic device (100) can store data for driving the first type of application in a first heap area allocated from volatile memory, and store data for driving the second type of application in a second heap area allocated from volatile memory (S1110).

[0136] If the electronic device (100) determines that the available space of the volatile memory is less than a predetermined space, the electronic device (100) may compress the data stored in the first heap area prior to the data stored in the second heap area to increase the available space of the volatile memory (S1120).

[0137] Although various embodiments have been described above, each embodiment is not necessarily implemented individually, and may be implemented together in a single product by being combined in whole or in part with at least one other embodiment.

[0138] Meanwhile, the terms "part" or "module" used in the present disclosure include units composed of hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A "part" or "module" may be an integrally composed component, a minimum unit performing one or more functions, or a portion thereof. For example, a module may be composed of an application-specific integrated circuit (ASIC).

[0139] Various embodiments of the present disclosure may be implemented as software including instructions stored in a machine-readable storage medium that can be read by a machine (e.g., a computer). The device, which is a device capable of calling instructions stored in the storage medium and operating according to the called instructions, may include an electronic device (100) according to the disclosed embodiments. When the instructions are executed by a processor, the processor may directly or under the control of the processor perform a function corresponding to the instructions using other components. The instructions may include code generated or executed by a compiler or interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, "non-transitory" means that the storage medium does not contain signals and is tangible, but does not distinguish between data being stored semi-permanently or temporarily in the storage medium.

[0140] According to one or more embodiments, the methods according to various embodiments disclosed herein may be provided as a computer program product. The computer program product may be traded as a commodity between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read-only memory (CD-ROM)) or online through an application store (e.g., Play Store™). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily generated in a storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0141] Each component (e.g., a module or a program) according to various embodiments may be composed of one or more entities, and some of the aforementioned sub-components may be omitted, or other sub-components may be further included in various embodiments. Alternatively or additionally, some components (e.g., a module or a program) may be integrated into a single entity, which may perform the same or similar functions as those performed by each of the respective components prior to integration. Operations performed by a module, program, or other component according to various embodiments may be executed sequentially, in parallel, iteratively, or heuristically, or at least some operations may be executed in a different order, omitted, or other operations may be added.

Claims

1. In electronic devices, At least one processor comprising a processing circuit; volatile memory; and Includes non-volatile memory that stores instructions; When the above instructions are individually or collectively executed by the at least one processor, the electronic device, When the first and second types of applications are executed, data for driving the first type of application is stored in a first heap area allocated to the volatile memory, and data for driving the second type of application is stored in a second heap area allocated to the volatile memory. An electronic device that compresses data stored in the first heap area prior to data stored in the second heap area in order to increase the available space of the volatile memory, when the available space of the volatile memory is identified to be less than a predetermined space.

2. In paragraph 1, The volatile memory includes a general memory area and an auxiliary memory area, and the general memory area includes the first heap area and the second heap area. When the above instructions are individually or collectively executed by the at least one processor, the electronic device, An electronic device that moves the compressed dynamic data from the first heap memory area to the compressed memory area.

3. In paragraph 2, When the above instructions are individually or collectively executed by the at least one processor, the electronic device, When the above first type of application is run, the compressed data is restored, An electronic device that moves the restored data from the auxiliary memory area to the first heap area.

4. In paragraph 1, When the above instructions are individually or collectively executed by the at least one processor, the electronic device, The above first type of application is an application not related to an artificial intelligence model, The second type of application is an electronic device that is an application related to the artificial intelligence model.

5. In paragraph 1, When the above instructions are individually or collectively executed by the at least one processor, the electronic device, An electronic device that moves the compressed data from the volatile memory to the non-volatile memory when the available space in the auxiliary memory area satisfies a predetermined condition.

6. In paragraph 1, When the above instructions are individually or collectively executed by the at least one processor, the electronic device, When the second type of application is executed, the second heap area is allocated to the volatile memory using a compatible API in the OS running on the electronic device, An electronic device that stores data for driving the second type of application in the second heap area.

7. In paragraph 1, When the above instructions are individually or collectively executed by the at least one processor, the electronic device, When an event to execute an application is detected, it is identified whether the application is a second type of application including an artificial intelligence model, An electronic device that allocates the second heap area using a separately defined argument to allocate the second heap area to the volatile memory, if the application is the second type of application.

8. In paragraph 1, When the above instructions are individually or collectively executed by the at least one processor, the electronic device, When multiple second type applications are executed, the memory usage score of each of the multiple second type applications is determined using the properties of each of the multiple second type applications, An electronic device that moves, when the available space of the volatile memory becomes less than the predetermined space, the memory usage scores of the plurality of second types of applications in descending order from the second heap area to the compressed memory area of ​​the volatile memory.

9. In a method for controlling an electronic device, When the first and second types of applications are executed, a step of storing data for driving the first type of application in a first heap area allocated to volatile memory and storing data for driving the second type of application in a second heap area allocated to volatile memory; and A control method comprising: a step of compressing data stored in the first heap area prior to data stored in the second heap area in order to increase the available space of the volatile memory, when it is determined that the available space of the volatile memory is less than a predetermined space; 10. In paragraph 9, The volatile memory includes a general memory area and an auxiliary memory area, and the general memory area includes the first heap area and the second heap area. The step of compressing the data stored in the first heap area is: A control method further comprising: a step of moving the compressed dynamic data from the first heap memory area to the compressed memory area.

11. In paragraph 10, The above control method is, When the first type of application is run, a step of restoring the compressed data; and A control method further comprising a step of moving the restored data from the auxiliary memory area to the first heap area.

12. In paragraph 9, The above control method is, A control method further comprising a step of moving the compressed data from the volatile memory to the non-volatile memory when the available space in the auxiliary memory area satisfies a predetermined condition.

13. In paragraph 9, The above control method is, When the second type of application is executed, a step of allocating the second heap area to the volatile memory using a compatible API in the OS running on the electronic device; and A control method further comprising: a step of storing data for driving the second type of application in the second heap area.

14. In paragraph 9, The above control method is, When an event for executing an application is detected, a step of identifying whether the application is a second type of application including an artificial intelligence model; and A control method further comprising: a step of allocating the second heap area using a separately defined argument to allocate the second heap area to the volatile memory, if the application is an application of the second type.

15. In paragraph 9, The above control method is, When a plurality of second type applications are executed, a step of determining a memory usage score of each of the plurality of second type applications using the properties of each of the plurality of second type applications; and A control method further comprising: when the available space of the volatile memory becomes less than the predetermined space, moving applications of the plurality of second types in descending order of memory usage scores from the second heap area to the compressed memory area of ​​the volatile memory.

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