Process for improving passivation effect of surface oxide layer of crystalline silicon cell

Abstract

Provided in the present invention is a process for improving the passivation effect of a surface oxide layer of a crystalline silicon cell. In a TOPCon cell manufacturing process, during a drying process of an alkaline texturing or RCA cleaning step, an oxidizing gas is introduced to grow a dry-oxygen oxide layer on the surface of a silicon wafer. Without additional apparatuses, the present invention can increase the tolerance of silicon wafers to non-process environments during the manufacturing process, improve the rhythm stability of production lines, and extend the process queue time (Q-Time) after a wet process ends, or reduce the negative impact of non-process environments on the process during the process Q-time. The present invention avoids inconsistency in the density of wet-process oxide layers caused by non-uniform activity cycles of wet chemicals; the obtained surface oxide layers can be denser, providing stronger passivation gain for subsequent cell structures, and improving the conversion efficiency of cells; in the present invention, before a first drying step in a drying chamber, there is no oxide layer on the surface of a silicon wafer, thus preventing liquid retention and wafer sticking during the drying process of large-size and thin silicon wafers, and improving the mass production yield.

Description

A process for improving the passivation effect of the surface oxide layer of a crystalline silicon cell

[0001] The present application claims priority to the Chinese patent application No. 202411075233.8, filed on August 5, 2024, and entitled "A process for improving the passivation effect of the surface oxide layer of a crystalline silicon cell", the entire content of which is incorporated herein by reference. TECHNICAL FIELD

[0002] The present application belongs to the field of photovoltaic technology, and particularly relates to a process for improving the passivation effect of the surface oxide layer of a crystalline silicon cell. BACKGROUND

[0003] TOPCon refers to a passivation structure of a tunneling oxide silicon and a doped polysilicon on the back surface of a solar cell. The TOPCon passivation structure can make most of the carriers pass through the oxide layer and block the minority carriers, effectively realizing the selective passing of the carriers, thereby greatly reducing the recombination rate of the minority carriers and effectively improving the passivation performance of the cell, and improving the efficiency of the cell.

[0004] The n-type TOPCon cell has an n-type single crystal silicon substrate, a p+ doped layer on the front surface obtained by boron diffusion, a tunneling oxide layer and a polysilicon on the back surface, and an n+ doped layer obtained by in-situ phosphorus doping or intrinsic phosphorus diffusion. An AlO X (aluminum oxide) layer is deposited on the front surface, and a SiN X (silicon nitride) layer is deposited on the front and back surfaces. The corresponding metal electrodes are usually obtained by screen printing. The conventional process of TOPCon includes texturing, boron diffusion, etching, alkali etching, deposition of a tunneling oxide layer and a doped polysilicon layer (the doped polysilicon layer can be doped in-situ or deposited first and then doped to realize), RCA cleaning, front AlO X , front SiN X , back SiN X , screen printing and sintering, classification, detection and packaging.

[0005] In the process of n-type TOPCon cell, after the end of alkali etching or RCA cleaning process, the front and back surfaces of the silicon wafer are exposed to the workshop environment, which is easy to cause the surface pollution of the silicon wafer. And the back surface of the silicon wafer without oxide layer structure is easy to be naturally oxidized with the air in the environment, and an uneven natural oxide layer with uncontrollable quality is generated. The above-mentioned silicon surface natural oxide layer is a self-inhibiting film layer, so it can be immersed in an oxygen-rich environment before being exposed to a non-process environment, so that a uniform oxide layer is grown before being exposed to air, thereby reducing the subsequent production variables. In order to produce a non-natural oxide layer on the surface of the silicon wafer to protect the silicon wafer, the prior art uses hydrogen peroxide (H2O2) in the alkali etching process to form a wet oxygen oxide layer with slightly higher quality. However, due to the presence of the oxide layer on the silicon wafer, the dehydration effect of the silicon wafer after the end of the slow pulling in the alkali etching process is poor, and liquid is easy to enter the drying slot for drying. With the increasing thickness of the silicon wafer, this method is easy to cause the adjacent silicon wafers to adhere to each other in the drying stage, which has a great influence on the subsequent process and affects the product yield. Moreover, the wet oxidation layer participates in the composition of the subsequent battery structure, and the growth quality of the wet oxidation layer will greatly affect the overall battery passivation effect. In the prior art, due to the activity change of the wet reagent (such as the activity change of H2O2 and the accumulation of by-products caused by the continuous reaction of the alkali solution in the same tank) in the entire production cycle, the actual growth of the wet oxidation layer cannot maintain a uniform standard within the replacement cycle of the reagent, which greatly affects the actual production line stability. That is, in the prior art, due to the oxidation limitation of the activity of the wet reagent such as hydrogen peroxide solution, the oxide layer cannot well play the passivation and selective tunneling effect. SUMMARY

[0006] The purpose of the present application is to provide a process for improving the passivation effect of the surface oxide layer of a crystalline silicon cell. The process in the present application does not affect the product yield, and the obtained oxide layer is more uniform and dense, and has a stronger passivation effect on the subsequent battery structure.

[0007] The present application provides a process for improving the passivation effect of the surface oxide layer of a crystalline silicon cell, characterized in that, in the process of TOPCon cell, an oxidizing gas is introduced during the drying process of the alkali etching or RCA cleaning step to grow a dry oxygen oxide layer on the surface of the silicon wafer.

[0008] Preferably, in the process of TOPCon cell, the silicon wafer is first dried, and then an oxidizing gas is introduced during the drying process of the alkali etching or RCA cleaning step to grow a dry oxygen oxide layer on the surface of the silicon wafer.

[0009] Preferably, the drying temperature is 20-600℃, and the drying time is 60-1000s.

[0010] Preferably, the drying temperature is 80-100℃; the drying time is 600-1000s.

[0011] Preferably, inert gas is introduced during the drying process.

[0012] Preferably, the flow rate of the oxidizing gas is 500-20000sccm.

[0013] Preferably, the temperature for growing the dry-oxygen oxidation layer is 20-600℃; the time is 20-1000s.

[0014] Preferably, the temperature for growing the dry-oxygen oxidation layer is 20-100℃; the time is 20-1000s.

[0015] Preferably, the drying and growing of the dry-oxygen oxidation layer are performed in a drying tank connected with an oxygen / ozone generator.

[0016] Preferably, the drying tank comprises a drying tank body, a drying device and the oxygen / ozone generator, the drying device and the oxygen / ozone generator are respectively connected with the drying tank body through air supply pipelines, and the drying device and the oxygen / ozone generator deliver gas into the drying tank body through annular nozzles.

[0017] Preferably, when the dry-oxygen oxidation layer is grown during the drying process of the alkali etching step, a mixed oxidation layer is formed on the back of the TOPCon cell, the mixed oxidation layer comprises the dry-oxygen oxidation layer and a deposited ultra-thin oxidation layer.

[0018] Preferably, when the dry-oxygen oxidation layer is grown during the drying process of the RCA cleaning step, the structure of the TOPCon cell comprises a front SiN X layer, a front AlO X layer, a front dry-oxygen oxidation layer, a p+ doped layer, a silicon wafer substrate, an ultra-thin oxidation layer, an n+ doped polysilicon layer, a back dry-oxygen oxidation layer and a back SiN X layer.

[0019] The present application provides a process for improving the passivation effect of the surface oxidation layer of a crystalline silicon cell, characterized in that, in the process of a TOPCon cell, an oxidizing gas is introduced during the drying process of the alkali etching or RCA cleaning step, and a dry-oxygen oxidation layer is grown on the surface of a silicon wafer.

[0020] Compared with the prior art, the present application has the following advantages:

[0021] (1) Without adding additional equipment, using the existing equipment of the production line, a dense and more uniform oxide layer is formed on the surface of the silicon wafer, the process wafer is more resistant to non-process environment, the production line rhythm stability is increased, and the process waiting Q-Time time after the wet process is increased or the negative impact of the non-process environment on the process within the process waiting Q-time is reduced.

[0022] On the basis of the existing alkali etching machine, the uniformity, passivation effect and process stability of the back surface oxide layer of the TOPCon cell are all improved;

[0023] On the basis of the existing RCA cleaning machine, the process stability and passivation effect of the n-type cell are improved; the front and back surface oxide layers have passivation gain for the front aluminum oxide film layer and the back silicon nitride film layer.

[0024] (2) The quality of the surface oxide layer can be controlled by adjusting the concentration of the oxidizing gas; the wet oxidation layer density is not uniform due to the non-uniform activity period of the wet reagent; the obtained surface oxide layer is more dense, and the passivation gain for the subsequent cell structure is stronger;

[0025] (3) The silicon wafer surface does not have an oxide layer before the first drying step of the drying tank, which avoids the liquid sticking of large-size thin pieces during drying and improves the yield of mass production. BRIEF DESCRIPTION OF DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiment or prior art description. Obviously, the drawings in the following description are only embodiments of the present application, and those skilled in the art can obtain other drawings according to the provided drawings without creative labor.

[0027] Fig. 1 is a structural schematic diagram of a drying tank used in the process in the present application;

[0028] In Fig. 1, A is an oxygen / ozone generator, B is a drying device, C is an air pipe, D is an adjustable exhaust component, E is a drying tank body, F is a wafer basket, and G is a ring-shaped spray pipe.

[0029] Fig. 2 is a structural schematic diagram of a silicon wafer after forming a dry oxygen oxide layer in an alkali etching process;

[0030] Fig. 3 is a structural diagram of a TOPCon cell after forming a dry oxygen oxide layer in an alkali etching process;

[0031] In Fig. 2 and Fig. 3, 1 is an n-type silicon wafer, 2 is a p+ doped layer, 3 is a dry oxygen oxide layer, 4 is a deposited ultra-thin oxide layer, 5 is an n+ doped polysilicon layer, 6 is an AlO X layer, and 7 is a front SiN Xlayer, 8 is back SiN X layer, 9 is metal electrode, 10 is BSG layer

[0032] Fig. 4 is a schematic diagram of the structure of the silicon wafer after forming the dry oxygen oxidation layer in the RCA cleaning process;

[0033] Fig. 5 is a structure diagram of the TOPCon cell after forming the dry oxygen oxidation layer in the RCA cleaning process;

[0034] In Fig. 4 and Fig. 5, 1 is an n-type silicon wafer, 2 is a p+ doped layer, 3-1 is a front dry oxygen oxidation layer, 4 is a deposited ultra-thin oxide layer, 5 is an n+ doped polysilicon layer, 3-2 is a back dry oxygen oxidation layer, 6 is an AlO X layer, 7 is front SiN X layer, 8 is back SiN X layer, 9 is metal electrode

[0035] Fig. 6 is a box plot distribution comparison of the photoelectric conversion efficiency of the TOPCon cell prepared by the embodiment and the comparative example of the present application;

[0036] Fig. 7 is a typical picture of the PL dark sheet of the comparative example 1 of the present application;

[0037] Fig. 8 is a typical picture of the PL dark sheet of the comparative example 2 of the present application. DETAILED DESCRIPTION

[0038] The present application provides a process for improving the passivation effect of the surface oxide layer of a crystalline silicon cell. In the TOPCon cell process, during the drying process of the alkali etching or RCA cleaning step, an oxidizing gas is introduced to grow a dry oxygen oxidation layer on the surface of the silicon wafer. Preferably, in the TOPCon cell process, during the drying process of the alkali etching or RCA cleaning step, the silicon wafer is first dried, and then an oxidizing gas is introduced to grow a dry oxygen oxidation layer on the surface of the silicon wafer.

[0039] The present application protects the silicon wafer by generating a controllable quality non-natural oxidation layer on the surface of the silicon wafer to prevent contamination of the surface of the silicon wafer. Unlike the wet oxygen oxidation layer prepared by hydrogen peroxide in the prior art, in the present application, the non-natural oxidation layer is formed by dry oxidation, specifically, by dry oxidation of the surface of the silicon wafer by an oxidizing gas to form a dry oxygen oxidation layer. The dry oxygen oxidation layer can isolate the surface of the silicon wafer from the environment, avoiding the generation of a non-uniform natural oxidation layer on the surface of the silicon wafer due to fluctuations in temperature and humidity in the environment, and further avoiding the influence of the non-uniform natural oxidation layer on the subsequent deposition of the ultra-thin oxide layer to provide good interface passivation, thereby improving the passivation effect of the oxidation layer of the TOPCon cell.

[0040] Moreover, compared with the wet oxygen oxidation layer, the dry oxygen oxidation layer in the application can avoid the problem of product yield reduction caused by the phenomenon of sticking of the silicon wafer due to liquid during the drying process, and can also avoid the problem of inconsistent density of the oxidation layer caused by the inconsistent active period of wet reagents such as hydrogen peroxide.

[0041] In the application, the oxidizing gas preferably comprises ozone and / or oxygen, and preferably, the oxidizing gas further comprises nitrogen, which is used to adjust the concentration of the oxidizing gas.

[0042] In the application, the volume concentration of oxygen is preferably > 99.5%, and the volume concentration of ozone is preferably 1-4%, more preferably 2-3%; the flow rate of the oxidizing gas is preferably 500-20000 sccm, more preferably 1000-10000 sccm, such as 500 sccm, 1000 sccm, 2000 sccm, 5000 sccm, 8000 sccm, 10000 sccm, 15000 sccm, 20000 sccm, and preferably a range value above or below any of the above values.

[0043] In the application, the preparation of the dry oxygen oxidation layer is completed in the alkali throwing step or the RCA cleaning step, specifically, in the drying tank in the alkali throwing step or the drying tank in the RCA cleaning step. The preparation of the dry oxygen oxidation layer by means of the drying tank in the alkali throwing process or the RCA cleaning process not only does not increase additional equipment, but also is simple and easy to realize in the modification of the original drying tank, and the composite structure formed by the dry oxygen oxidation layer prepared in the alkali throwing step or the RCA cleaning step and other film layers of the TOPCon cell has a gain effect on the passivation effect of the cell.

[0044] In the application, the alkali throwing process steps and the tank body are as follows: feeding, alkali throwing pretreatment, water tank, etching, mixed acid washing, slow pulling tank, drying tank, and discharging. When the dry oxygen oxidation layer is prepared in the drying tank of the alkali throwing, the process for improving the passivation effect of the surface oxidation layer of the crystalline silicon cell preferably comprises the following steps:

[0045] A) After slow pulling, the silicon wafer is placed in the drying tank, and inert gas is introduced to dry the silicon wafer;

[0046] B) After drying, the oxidizing gas is introduced to grow a dry oxygen oxidation layer on the surface of the dried silicon wafer.

[0047] In the present application, the structure of the alkali-throwing drying tank is shown in Fig. 1. The drying tank body E is connected with the oxygen / ozone generator A for conveying oxidizing gas into the drying tank body E. The drying tank body E is connected with the drying device B which is the inert gas source. The drying device B can contain a heater for heating the inert gas. The drying tank is provided with a heating device (not shown) for heating during the drying and oxidation processes in the drying tank body E. The inert gas and the oxidizing gas enter the drying tank body E through the air pipe C and the annular nozzle G for drying and oxidizing the silicon wafers in the wafer basket F.

[0048] In the present application, the inert gas is nitrogen or a mixture of nitrogen and other gases which do not react with the silicon wafers. The proportion of nitrogen is not particularly limited and can be adjusted according to the requirements.

[0049] In the present application, the drying temperature is preferably 20-600°C, more preferably 80-100°C, and still more preferably 90-95°C, such as 20°C, 50°C, 80°C, 85°C, 90°C, 95°C, 100°C, 200°C, 300°C, 400°C, 500°C, 600°C, and preferably a range with any of the above values as the upper or lower limit. The drying time is preferably 60-1000s, more preferably 600-1000s, and still more preferably 700-900s, such as 60s, 100s, 200s, 300s, 400s, 500s, 600s, 650s, 700s, 750s, 800s, 850s, 900s, 950s, 1000s, and preferably a range with any of the above values as the upper or lower limit.

[0050] After the drying is completed, the air pipe C connected with the drying tank body E is switched to conveying oxidizing gas. The oxidizing gas enters the drying tank body E through the annular nozzle G. The composition and content of the oxidizing gas are the same as those described above, and will not be described again in the present application.

[0051] In the present application, the temperature for growing the dry-oxygen oxidation layer is preferably 20-600°C, more preferably 20-100°C, and still more preferably 50-80°C, such as 20°C, 30°C, 40°C, 50°C, 60°C, 70°C, 80°C, 90°C, 100°C, 200°C, 300°C, 400°C, 500°C, 600°C, and preferably a range with any of the above values as the upper or lower limit. The time for growing the dry-oxygen oxidation layer is preferably 20-1000s, more preferably 100-900s, such as 20s, 50s, 100s, 200s, 300s, 400s, 500s, 600s, 700s, 800s, 900s, 1000s, and preferably a range with any of the above values as the upper or lower limit.

[0052] The structure of the silicon wafer formed by the dry oxygen oxidation in the drying tank of the alkali etching process is shown in Figure 2. Since the n-type silicon wafer 1 is protected by the thick BSG layer 10 formed in the boron diffusion process, the oxidation layer formed on the front surface can be ignored, and a dry oxygen oxidation layer 3 is mainly formed on the back surface. The BSG layer 10 is a boron-containing silicon oxide layer formed during the boron diffusion process, and BSG is also called borosilicate glass.

[0053] Further, after the dry oxygen oxidation layer is formed in the drying tank of the alkali etching process, the TOPCon cell can be prepared according to the conventional TOPCon process, such as depositing an ultra-thin oxide layer and a doped polysilicon layer, RCA cleaning, front surface AlO X , front surface SiN X , back surface SiN X , screen printing and sintering, to obtain a cell structure as shown in Figure 3.

[0054] The present application adds a dry oxygen oxidation link in the alkali etching process, and finally forms a mixed oxide layer (i.e. dry oxygen oxidation layer 3 + ultra-thin oxide layer 4) on the back surface of the TOPCon cell, as shown in Figure 3. The dry oxygen oxidation layer 1 in the present application can improve the uniformity of the mixed oxide layer, provide good back surface interface passivation, reduce the sensitivity of the silicon wafer to the environment during the process, and improve the photoelectric conversion efficiency and yield of the cell.

[0055] In the present application, the RCA cleaning process and the tank structure are as follows: feeding, RCA cleaning tank (the RCA cleaning tank is not unique, and the cleaning chemicals in the cleaning tank are selected according to the cleaning requirements, which are not limited here), slow pulling tank, drying tank, and discharging. When the dry oxygen oxidation layer is prepared in the drying tank of the RCA cleaning process, the process for improving the passivation effect of the surface oxide layer of the crystalline silicon cell preferably comprises the following steps:

[0056] A) placing the silicon wafer after slow pulling into the drying tank, introducing inert gas to dry the silicon wafer;

[0057] B) after drying, introducing oxidizing gas to grow a dry oxygen oxidation layer on the surface of the dried silicon wafer.

[0058] In the present application, the structure of the drying tank of the RCA cleaning process is shown in Figure 1. The drying tank body E is connected to the oxygen / ozone generator A for conveying oxidizing gas into the drying tank body E. The drying tank body E is connected to the drying device B, which is an inert gas source. The drying device B can include a heater for heating the inert gas. The drying tank is provided with a heating device (not shown) for heating during the drying and oxidation processes in the drying tank body E. The inert gas and the oxidizing gas enter the drying tank body E through the gas pipeline C and the annular spray pipe G for drying and oxidizing the silicon wafer in the wafer basket F.

[0059] In the present application, the inert gas is nitrogen, or a mixture of nitrogen and other gases that do not react with the silicon wafer. The proportion of nitrogen is not particularly limited in the present application, and can be adjusted as needed.

[0060] In the present application, the drying temperature is preferably 80-100°C, more preferably 90-95°C, such as 80°C, 85°C, 90°C, 95°C, 100°C, preferably a range with any of the above values as the upper or lower limit; the drying time is preferably 600-1000s, more preferably 700-900s, such as 600s, 650s, 700s, 750s, 800s, 850s, 900s, 950s, 1000s, preferably a range with any of the above values as the upper or lower limit.

[0061] After drying is complete, the air supply pipeline C connected to the drying tank body E is switched to start delivering the oxidizing gas, which enters the drying tank body E through the annular nozzle G. The composition and content of the oxidizing gas are the same as those described above, and will not be described again in the present application.

[0062] In the present application, the temperature for growing the dry oxygen oxidation layer is preferably 20-100°C, more preferably 50-80°C, such as 20°C, 30°C, 40°C, 50°C, 60°C, 70°C, 80°C, 90°C, 100°C, preferably a range with any of the above values as the upper or lower limit; the time for growing the dry oxygen oxidation layer is preferably 20-1000s, more preferably 100-900s, such as 20s, 50s, 100s, 200s, 300s, 400s, 500s, 600s, 700s, 800s, 900s, 1000s, preferably a range with any of the above values as the upper or lower limit.

[0063] The silicon wafer is oxidized in the drying tank through the RCA cleaning process, and the structure of the silicon wafer formed is shown in FIG. 4. Dry oxidation is performed in the RCA cleaning drying tank to form a dry oxygen oxidation layer on both the front and back surfaces of the silicon wafer, with the back dry oxygen oxidation layer 3-2 on the surface of the n+ doped polysilicon layer 5 and the front dry oxygen oxidation layer 3-1 on the surface of the p+ doped layer 2.

[0064] Further, after the dry oxygen oxidation layer is formed in the RCA cleaning drying tank, a TOPCon cell can be prepared according to the conventional TOPCon process, such as front AlO X , front SiN X , back SiN X , screen printing and sintering, to obtain a cell structure as shown in FIG. 5.

[0065] As can be seen from FIG. 5, the dry oxygen oxidation link is added in the drying tank of RCA cleaning, and finally the TOPCon cell structure obtained is that the back dry oxygen oxidation layer 3-2 is located between the n+ doped polysilicon layer 5 and the back SiN X layer 8, and such a structure can achieve the following effects:

[0066] a. Reduce the substrate damage caused by plasma bombardment in the process of back SiN X film deposition;

[0067] b. High-quality back dry oxygen oxidation layer can provide part of the interface positive charge Qf, and improve the field effect passivation effect;

[0068] c. High-quality back dry oxygen oxidation layer can repair the dangling bonds on the polysilicon surface, and reduce the loss caused by defect recombination;

[0069] d. Reduce the process passivation loss caused by the long waiting time Q-Time of the existing process front SiN X back SiN X structure in a non-process environment.

[0070] In the drying tank of RCA cleaning, the dry oxygen oxidation link is added, and finally the TOPCon cell structure obtained is that the front dry oxygen oxidation layer 3-1 is located between the p+ doped layer 2 and the front AlO X layer 6, and such a structure can achieve the following effects:

[0071] a. The front dry oxygen oxidation layer increases the adsorption probability of the substrate surface -OH hydroxyl group, provides reactants for the subsequent AlO X reaction, reduces the island-shaped deposition probability of the interface AlO X layer, improves the uniformity of the interface AlO X film layer, and improves the overall passivation effect;

[0072] b. Provide a buffer layer between the crystalline silicon and AlO X , reduce the probability of dangling bonds on the crystalline silicon interface, provide chemical passivation, and improve the passivation effect of the AlO X layer.

[0073] The application provides a process for improving the passivation effect of the surface oxidation layer of a crystalline silicon cell, characterized in that in the TOPCon process, in the drying process of the alkali etching or RCA cleaning step, the silicon wafer is dried first, and then an oxidizing gas is introduced to grow a dry oxygen oxidation layer on the surface of the silicon wafer.

[0074] Compared with the prior art, the application has the following advantages:

[0075] (1) Without adding additional processes, using existing equipment on the production line, a denser and more uniform oxide layer is formed on the surface of the silicon wafer, increasing the process silicon wafer's resistance to non-process environment, increasing the stability of the production line rhythm, increasing the process waiting Q-Time time after the end of the slot wet process or reducing the negative impact of non-process environment on the process during the process waiting Q-time.

[0076] On the basis of the existing machine alkali etching machine, the uniformity, passivation effect and process stability of the back surface oxide layer of the TOPCon cell are improved;

[0077] On the basis of the existing machine RCA cleaning machine, the process stability and passivation effect of the TOPCon cell are improved; the dry oxygen oxide layers formed on the front and back surfaces have passivation gain for the subsequent AlO X membrane layer, back SiN X membrane layer.

[0078] (2) The quality of the surface dry oxygen oxide layer can be controlled by adjusting the ozone generator parameters / concentration; the ozone generator concentration is controllable, which avoids the non-uniformity of the wet process oxide layer caused by the non-uniformity of the wet process reagent activity period; the ozone oxide layer is denser and has stronger passivation gain for the subsequent cell structure;

[0079] (3) No oxide layer before the first drying step of the drying tank, avoiding liquid sticking during the drying process of large-size wafers, and improving the yield of mass production.

[0080] In order to further illustrate the present application, the following embodiments will describe in detail the process for improving the passivation effect of the surface oxide layer of the crystalline silicon cell provided by the present application, but it should not be understood as limiting the scope of protection of the present application.

[0081] The preparation method of the TOPCon solar cell is as follows (alkali etching and drying tank for growing dry oxygen oxide layer)

[0082] Step 1) Texturing: using n-type monocrystalline silicon wafers with a size of 182mm*210mm as the silicon substrate, a 1.5wt% NaOH alkaline compound solution is used for texturing treatment, the temperature is 68℃, and the time is 7-12min, the purpose is to form a pyramid-shaped texturing structure to increase the light incidence effect.

[0083] Step 2) Boron diffusion: trichloroboron (BCl3) is introduced into a high-temperature quartz tube at 1000±50℃, reacts with oxygen to generate B2O3, deposits on the surface of the silicon wafer and reacts with Si to form B atoms, and forms a layer of boron-silicon glass (BSG) on the surface of the silicon wafer, and the B atoms diffuse into the silicon wafer to form a pn junction.

[0084] Step 3) Etching: BSG and pn junction on the backside and edge of the wafer are removed using 10% HF solution.

[0085] Step 4) Alkaline stripping:

[0086] 1. The wafer is put into a mixed solution of 0.5% NaOH and 1.5% H2O2 for alkaline stripping pretreatment at 55°C for 120s, and the wafer after alkaline stripping pretreatment is washed with water.

[0087] 2. The wafer after washing is put into a solution of 1.5% NaOH for etching treatment to form a uniform and clean backside morphology.

[0088] 3. Then, the wafer is cleaned using a mixed acid solution of 0.5% HCl and 0.5% HF at room temperature for 120s.

[0089] 4. Slow lifting: deionized water at room temperature is used to slowly lift the flower basket by a mechanical hand to prevent water marks on the surface of the wafer.

[0090] 5. Drying:

[0091] Step 1: The wafer and flower basket are dried at 90°C by passing high-purity N2 for 500s to prevent liquid residues on the wafer and flower basket during unloading.

[0092] Step 2: The wafer surface is treated by passing 2000sccm O2 at 95°C for about 300s to grow a 1±0.25nm SiO x layer to form a dry oxygen oxidation layer structure.

[0093] Steps 5-7) Deposition of ultra-thin oxide layer and doped polysilicon layer:

[0094] 1. An ultra-thin oxide layer, a doped amorphous silicon film, and a silicon oxide mask are deposited on the backside of the wafer by PECVD, the ultra-thin oxide layer is a 0.8±0.25nm silicon oxide layer, the ultra-thin oxide layer and the dry oxygen oxidation layer in the previous step together form a 1.8±0.5nm tunneling oxide layer, the thickness of the doped amorphous silicon film is controlled at 150nm, and the thickness of the silicon oxide mask is controlled at 10nm.

[0095] 2. Then, the wafer is put into a quartz tube by a carrier, N2 is passed in, the temperature is slowly raised to 910°C at a rate of 12-15°C / min, and the wafer is kept at this temperature for about 900s to start crystallizing the amorphous silicon into polysilicon and activate the doped phosphorus atoms in the polysilicon film to form an effective phosphorus-doped polysilicon film, and the annealing time is about 3000s.

[0096] Step 8) RCA cleaning:

[0097] 1. Chain HF acid washing: using 10% HF solution to remove the silicon mask on the front side and edge of the silicon wafer, and then washing the silicon wafer after chain HF acid washing;

[0098] 2. Etching: placing the silicon wafer after washing into a mixed solution of 1.5% NaOH to remove the excess polysilicon film on the front side and edge, so as to avoid the problems of poor appearance of the subsequent battery, poor passivation effect, etc.

[0099] 3. Alkaline washing: after the etching of the silicon wafer is completed, placing the silicon wafer into a mixed solution of 1.5% H2O2 and 0.5% NaOH, at a temperature of 55°C, for 180s, to remove the residual reagent in the previous etching process and the impurities on the surface of the silicon wafer;

[0100] 4. Mixed acid washing: then using 0.5% HCl and 0.5% HF mixed acid solution to clean, at room temperature, for 120s, to neutralize the residual alkali in the previous step and remove metal impurity ions;

[0101] 5. Slow pulling: using normal temperature deionized water, the mechanical hand slowly pulls the flower basket to prevent water marks left on the surface of the silicon wafer;

[0102] 6. Drying: passing high-purity N2 into the silicon wafer and the flower basket at a high temperature of 90°C for 800s to prevent liquid residues of the silicon wafer and the flower basket from affecting the subsequent process.

[0103] Step 9) Front side AlO X : depositing AlO X film on the front side of the silicon wafer by using a tubular atomic layer deposition (ALD) equipment, and the thickness is controlled at 3nm;

[0104] Steps 10-11) Front side & back side SiN X : depositing SiN X film on the front side and back side of the silicon wafer by using a PECVD equipment, wherein the thickness of the front side SiN X film is controlled at 90nm, and the thickness of the back side SiN X film is controlled at 97nm;

[0105] Step 12) Screen printing and sintering: after the texturing, diffusion and film plating processes, the pn junction preparation and passivation are completed, and the current can be generated under light. In order to lead out and collect the generated current, the positive and negative electrodes need to be made on the surface of the battery, and the metal paste is printed and sintered to form the metallized contact. The p-type contact is formed at the junction of the p-type emitter and the silicon substrate, and the n-type contact is formed between the n-type electrode and the n-type emitter.

[0106] The preparation method of the TOPCon solar cell of Example 2 is as follows (RCA cleaning and drying slot growth dry oxygen oxide layer)

[0107] Step 1) Texturing: n-type monocrystalline silicon wafers with a size of 182mm*210mm are used as silicon substrates, and a 1.5wt% NaOH alkaline compound solution is used for texturing treatment at a temperature of 68°C for 7-12min, with the purpose of forming a pyramid-shaped texturing structure to increase the light incidence effect.

[0108] Step 2) Boron diffusion: boron trichloride (BCl3) is introduced into a high-temperature quartz tube at 1000±50°C, reacts with oxygen to form B2O3, which is deposited on the surface of the silicon wafer and reacts with Si to form B atoms, and forms a layer of borosilicate glass (BSG) on the surface of the silicon wafer, and the B atoms diffuse into the silicon wafer to form a pn junction.

[0109] Step 3) Etching: a 10wt% HF solution is used to remove the BSG and pn junction on the back and edges of the silicon wafer.

[0110] Step 4) Alkaline etching:

[0111] 1. The silicon wafer is placed in a mixed solution of 0.5wt% NaOH and 1.5wt% H2O2 for alkaline etching pretreatment at a temperature of 55°C for 120s, and the silicon wafer after alkaline etching pretreatment is washed with water;

[0112] 2. The water-washed silicon wafer is placed in a 1.5wt% NaOH solution for etching treatment to form a uniform and clean back surface morphology;

[0113] 3. Then use a mixed acid solution of 0.5wt% HCl and 0.5wt% HF to clean, at room temperature for 120s;

[0114] 4. Slow lifting: use room temperature deionized water to slowly lift the flower basket with a mechanical hand to prevent water marks on the surface of the silicon wafer;

[0115] 5. Drying: dry the silicon wafer and flower basket at a high temperature of 90°C with high-purity N2 for 800s to prevent liquid residues on the silicon wafer and flower basket during unloading, which affects the subsequent process.

[0116] Steps 5-7) Deposition of tunnel oxide layer and doped polysilicon layer:

[0117] 1. PECVD is used to deposit a tunnel oxide layer & doped amorphous silicon film & silicon oxide mask on the back of the silicon wafer, the tunnel oxide layer is a 1.8±0.5nm thick silicon oxide layer, the thickness of the doped amorphous silicon film is controlled at 150nm, and the thickness of the silicon oxide mask is controlled at 10nm;

[0118] 2. Then enter the annealing step, using the carrier to put the silicon wafer into the quartz tube, and then slowly increase the temperature to 910℃ at a rate of 12-15℃ / min, and keep the temperature for about 900s, so as to start the crystallization of amorphous silicon into polycrystalline silicon, and activate the phosphorus atoms in the polycrystalline silicon film to form an effective doped polycrystalline silicon film, and the annealing time is about 3000s.

[0119] Step 8) RCA cleaning:

[0120] 1. Chain HF pickling: use a 10% HF solution to remove the silicon oxide mask on the front side and the edge of the silicon wafer, and then wash the silicon wafer after chain HF pickling;

[0121] 2. Etching: put the silicon wafer after water washing into a 1.5% NaOH solution for etching treatment, so as to remove the excess polycrystalline silicon film on the front side and the edge, so as to avoid the problems of poor appearance of the subsequent battery, poor passivation effect, etc.;

[0122] 3. Alkaline cleaning: after the etching of the silicon wafer is completed, the silicon wafer is placed in a mixed solution of 1.5% H2O2 and 0.5% NaOH, the temperature is 55℃, and the time is 180s, so as to remove the residual reagent in the previous etching process and the impurities on the surface of the silicon wafer;

[0123] 4. Mixed acid cleaning: then use a mixed acid solution of 0.5% HCl and 0.5% HF to clean, at room temperature, for 120s, to neutralize the residual alkali in the previous step and remove metal impurity ions;

[0124] 5. Slow lifting: use deionized water at room temperature to slowly lift the flower basket with the mechanical hand to prevent water marks on the surface of the silicon wafer;

[0125] 6. Drying:

[0126] Step 1: dry the silicon wafer and the flower basket at a high temperature of 90℃ by passing high-purity N2 for 500s to prevent liquid residues on the silicon wafer and the flower basket during unloading;

[0127] Step 2: pass 2000sccm O2 at a high temperature of 95℃ to process the surface of the silicon wafer for about 300s, so as to grow a layer of 1±0.25nm SiO x structure on the front side and the back side of the silicon wafer respectively to form a dry oxygen oxidation layer;

[0128] Step 9) Front side AlO X : use a tubular atomic layer deposition (ALD) device to deposit an AlO X film on the front side of the silicon wafer, and the thickness is controlled at 3nm;

[0129] Step 10-11) Front side & back side SiN X: SiN X thin films, wherein the front side SiN X thin films have a thickness of 90 nm; the back side SiN X thin films have a thickness of 97 nm;

[0130] Step 12) screen printing and sintering: after the preparation of pn junction and passivation through the processes of texturing, diffusion and film plating, an electric current can be generated under light. In order to lead out and collect the generated current, positive and negative electrodes need to be made on the surface of the cell. The p-type electrode and the silicon substrate form a p-type contact, and the n-type electrode and the n-type emitter form an n-type contact.

[0131] The preparation method of the TOPCon solar cell in Comparative Example 1 is as follows (no dry oxygen oxidation layer is grown in the drying tank)

[0132] Step 1) texturing: an n-type monocrystalline silicon wafer with a size of 182 mm*210 mm is used as a silicon substrate, and a 1.5wt% NaOH alkaline compound solution is used for texturing treatment at a temperature of 68℃ for 7-12 min, so as to form a pyramid-shaped texturing structure to increase the light incidence effect.

[0133] Step 2) boron diffusion: boron trichloride (BCl3) is introduced into a high-temperature quartz tube at 1000±50℃, reacts with oxygen to generate B2O3, which is deposited on the surface of the silicon wafer and reacts with Si to generate B atoms, and a layer of borosilicate glass (BSG) is formed on the surface of the silicon wafer. B atoms diffuse into the silicon wafer to form a pn junction.

[0134] Step 3) etching: a 10wt% HF solution is used to remove the BSG and pn junction on the back surface and edges of the silicon wafer.

[0135] Step 4) alkali etching:

[0136] 1. The silicon wafer is placed in a mixed solution of 0.5wt% NaOH and 1.5wt% H2O2 for alkali etching pretreatment at a temperature of 55℃ for 120s, and then the silicon wafer after alkali etching pretreatment is washed with water;

[0137] 2. The silicon wafer after water washing is placed in a 1.5wt% NaOH solution for etching treatment to form a uniform and clean back surface morphology;

[0138] 3. Then, a mixed acid solution of 0.5wt% HCl and 0.5wt% HF is used for cleaning at room temperature for 120s;

[0139] 4. Slow lifting: deionized water at room temperature is used, and the mechanical hand slowly lifts the flower basket to prevent water marks on the surface of the silicon wafer;

[0140] 5. Drying: high-purity N2 is introduced at 90°C to dry the silicon wafer and the basket for 800s to prevent liquid residues on the silicon wafer and the basket from affecting the subsequent process.

[0141] Step 5-7) Deposition of a tunneling oxide layer and a doped polysilicon layer:

[0142] 1. A tunneling oxide layer, a doped amorphous silicon film and a silicon oxide mask are deposited on the back of the silicon wafer by PECVD, the tunneling oxide layer is a 1.8±0.5 nm-thick silicon oxide layer, the thickness of the doped amorphous silicon film is controlled to be 150 nm, and the thickness of the silicon oxide mask is controlled to be 10 nm.

[0143] 2. Then, the silicon wafer is placed in a quartz tube by a carrier, N2 is introduced, and the temperature is slowly increased to 910°C at a rate of 12-15°C / min, and the temperature is maintained for about 900s to start crystallizing the amorphous silicon into polysilicon and activate the phosphorus atoms in the polysilicon film to form an effective doped polysilicon film, and the annealing time is about 3000s.

[0144] Step 8) RCA cleaning:

[0145] 1. Chain HF pickling: a 10% HF solution is used to remove the silicon oxide mask formed on the front and edges of the silicon wafer, and the silicon wafer after chain HF pickling is washed with water.

[0146] 2. Etching: the water-washed silicon wafer is placed in a 1.5% NaOH solution for etching treatment to remove the excess polysilicon film on the front and edges to avoid problems such as poor appearance of the subsequent battery and poor passivation effect.

[0147] 3. Alkaline cleaning: after the silicon wafer etching is completed, the silicon wafer is placed in a mixed solution of 1.5% H2O2 and 0.5% NaOH at a temperature of 55°C for 180s to remove the residual reagents and impurities on the surface of the silicon wafer in the previous etching process.

[0148] 4. Mixed acid cleaning: then, a mixed acid solution of 0.5% HCl and 0.5% HF is used for cleaning at room temperature for 120s to neutralize the residual alkali solution and remove metal impurity ions.

[0149] 5. Slow lifting: deionized water at room temperature is used to slowly lift the basket by a mechanical hand to prevent water marks on the surface of the silicon wafer.

[0150] 6. Drying: high-purity N2 is introduced at 90°C to dry the silicon wafer and the basket for 800s to prevent liquid residues on the silicon wafer and the basket from affecting the subsequent process.

[0151] Step 9) Frontside AlO X : Depositing AlO on the frontside of the silicon wafer by using a tube atomic layer deposition (ALD) equipment X thin film, the thickness of which is controlled at 3 nm.

[0152] Step 10-11) Frontside & Backside SiN X : Depositing SiN on the frontside and backside of the silicon wafer respectively by using a PECVD equipment X thin film, wherein the thickness of the frontside SiN X thin film is controlled at 90 nm; and the thickness of the backside SiN X thin film is controlled at 97 nm.

[0153] Step 12) Screen printing and sintering: After the processes of texturing, diffusion and film plating, the preparation of pn junction and passivation are completed, and the current can be generated under light. In order to lead out and collect the generated current, the positive and negative electrodes need to be made on the surface of the battery, and the metalized contact is formed by printing metal paste, the p-type contact is formed at the junction of the p-type emitter and the silicon substrate, and the n-type contact is formed between the n-type electrode and the n-type emitter.

[0154] The preparation method of the TOPCon solar cell of Comparative Example 2 is as follows (wet oxidation process is added to the alkali etching process)

[0155] Step 1) Texturing: n-type monocrystalline silicon wafer with a size of 182 mm*210 mm is used as the silicon substrate, and the texturing treatment is performed by using a solution containing 1.5wt% NaOH alkaline compound, the temperature is 68℃, and the time is 7-12 min, so as to form a pyramid-shaped texturing structure to increase the light incidence effect.

[0156] Step 2) Boron diffusion: boron trichloride (BCl3) is introduced into a high-temperature quartz tube at 1000±50℃, reacts with oxygen to generate B2O3, which is deposited on the surface of the silicon wafer and reacts with Si to generate B atoms, and a layer of borosilicate glass (BSG) is formed on the surface of the silicon wafer, and the B atoms diffuse into the silicon wafer to form a pn junction.

[0157] Step 3) Etching: HF solution with a mass fraction of 10% is used to remove the BSG and pn junction on the backside and edge of the silicon wafer.

[0158] Step 4) Alkali etching:

[0159] 1. The silicon wafer is placed in a mixed solution of 0.5wt% NaOH and 1.5wt% H2O2 for alkali etching pretreatment, the temperature is 55℃, and the time is 120s, and the silicon wafer after alkali etching pretreatment is washed with water;

[0160] 2. The water-washed silicon wafer is placed in a solution of 1.5wt% NaOH for etching treatment to form a uniform and clean backside morphology;

[0161] 3. The silicon wafer is placed in a mixed solution of 1.5% H2O2 and 0.5% NaOH by mass fraction, at a temperature of 55°C for 180s to form a wet oxidation layer of SiO2 of 1.0±0.25nm thick. x ;

[0162] 4. Slow pull: using deionized water at room temperature, the mechanical hand slowly pulls the flower basket to prevent water marks on the surface of the silicon wafer;

[0163] 5. Drying: high-purity N2 is introduced at a high temperature of 90°C to dry the silicon wafer and the flower basket for 800s to prevent liquid residues on the silicon wafer and the flower basket during unloading, which affects the subsequent process.

[0164] Step 5-7) Deposition of ultra-thin oxide layer and doped polysilicon layer:

[0165] 1. PECVD is used to deposit an ultra-thin oxide layer & doped amorphous silicon thin film & silicon oxide mask on the back of the silicon wafer, the ultra-thin oxide layer is 0.8±0.25nm thick silicon oxide layer, the ultra-thin oxide layer and the wet oxidation layer in the previous step together form a 1.8±0.5nm tunnel oxide layer, the thickness of the doped amorphous silicon thin film is controlled at 150nm, and the thickness of the silicon oxide mask is controlled at 10nm;

[0166] 2. Then enter the annealing step, use the carrier to put the silicon wafer into the quartz tube, introduce N2, slowly heat to 910°C at a heating rate of 12-15°C / min, keep the temperature for about 900s, start to crystallize the amorphous silicon into polysilicon, and activate the doped phosphorus atoms in the polysilicon thin film to form an effective phosphorus-doped polysilicon thin film, the annealing time is about 3000s.

[0167] Step 8) RCA cleaning:

[0168] 1. Chain HF pickling: use 10% HF solution by mass fraction to remove the silicon oxide mask on the front and edge of the silicon wafer, and then wash the silicon wafer after chain HF pickling;

[0169] 2. Etching: the water-washed silicon wafer is placed in a 1.5% NaOH solution by mass fraction for etching treatment to remove excess polysilicon thin film on the front and edge, to avoid problems such as poor appearance of the subsequent battery, poor passivation effect, etc;

[0170] 3. Alkaline cleaning: after the silicon wafer etching is completed, the silicon wafer is placed in a mixed solution of 1.5% H2O2 and 0.5% NaOH by mass fraction, at a temperature of 55°C for 180s to remove the residual reagents in the previous etching process and impurities on the surface of the silicon wafer;

[0171] 4. Mixed acid cleaning: then using 0.5% mass fraction of HCl and 0.5% mass fraction of HF mixed acid solution for cleaning, room temperature, time 120s, neutralizing the residual alkali solution of the previous step, removing metal impurity ions;

[0172] 5. Slow pulling: using normal temperature deionized water, the mechanical hand slowly pulls the flower basket to prevent water marks left on the surface of the silicon wafer;

[0173] 6. Drying: high-purity N2 is introduced at 90°C to dry the silicon wafer and the flower basket for 800s to prevent liquid residues of the silicon wafer and the flower basket from affecting the subsequent process.

[0174] Step 9) Front side AlO X : using a tubular atomic layer deposition (ALD) device to deposit AlO X thin film on the front side of the silicon wafer, with the thickness controlled at 3nm;

[0175] Steps 10-11) Front & back side SiN X : depositing SiN X thin film on the front and back sides of the silicon wafer respectively through a PECVD device, wherein the front side SiN X thin film thickness is controlled at 90nm; and the back side SiN X thin film thickness is controlled at 97nm;

[0176] Step 12) Screen printing and sintering: after the texturing, diffusion and film plating processes, the pn junction preparation and passivation are completed, which can generate current under light. In order to lead out and collect the generated current, it is necessary to make positive and negative electrodes on the surface of the battery. The metal paste is printed and sintered to form the metallized contact. The p-type emitter forms a p-type contact with the silicon substrate, and the n-type electrode forms an n-type contact with the n-type emitter.

[0177] In summary, Example 1 grows a dry oxygen oxide layer in the drying tank of the alkali etching process; Example 2 grows a dry oxygen oxide layer in the drying tank of the RCA cleaning process; Comparative Example 1 does not grow a dry oxygen oxide layer; and Comparative Example 2 adds a wet oxidation layer in the alkali etching process. It should be noted that regardless of the method used to form the tunneling oxide layer, the above examples or comparative examples control the same thickness of the tunneling oxide layer.

[0178] The open-circuit voltage (Voc), short-circuit current (Isc), fill factor (FF) and solar cell conversion efficiency (Eff) of the solar cells prepared in the above examples and comparative examples are tested at 25°C using a steady-state solar simulator, and repeated twice. The calculation formula of Eff is Eff = {Isc*Voc*FF / (cell area*incident light power per unit area)}*100%, wherein the incident light power per unit area, i.e. the light intensity, is 1000W / m 2The average values of each parameter in two detections are shown in Table 1.

[0179] Table 1 Performance parameters of solar cells in examples and comparative examples

[0180] Figure 6 is a box plot distribution comparison of the conversion efficiency (Eff) of the cells in the examples and comparative examples of the present application. The efficiency distribution of the example group is more concentrated than that of the comparative examples.

[0181] The process rework rate of the semi-finished silicon wafer before screen printing and the dark sheet proportion in the photoluminescence (PL) picture of the finished solar cell are statistically analyzed. The calculation formula of the process rework rate is process rework rate = {number of reworked semi-finished silicon wafers / (total number of cells in the group + reworked semi-finished silicon wafers)} * 100%, and the PL dark sheet proportion is (number of PL dark sheet cells / total number of cells in the group) * 100%.

[0182] Table 2 Process rework rate and EL dark sheet proportion in examples and comparative examples

[0183] Figure 7 is a typical picture of the PL dark sheet of Comparative Example 1. Since there is no oxide layer on the surface of the silicon wafer, it is easy to be contaminated in a non-process environment, resulting in partial contamination of the prepared cell sheet.

[0184] Figure 8 is a typical picture of the PL dark sheet of Comparative Example 2. Due to the influence of the activity of the wet oxygen process liquid and the non-uniformity of the growth of the wet oxygen oxide layer, the passivation effect of the prepared cell is poor.

[0185] In summary, compared with Comparative Example 1 without adding a dry oxygen oxide layer, the TOPCon cell photoelectric conversion efficiency (Eff) can be improved by 0.19-0.25% (absolute value) by using the scheme of the present application. The process rework rate and the PL dark sheet proportion of the process using the scheme of the present application are significantly lower than those of Comparative Example 1 without adding a dry oxygen oxide layer and Comparative Example 2 using a wet oxygen oxide layer. The scheme of the present application can significantly improve the passivation effect of the cell and the yield of the cell mass production.

[0186] The above only describes the preferred embodiments of the present application. It should be noted that those skilled in the art can make several improvements and refinements without departing from the principles of the present application, and these improvements and refinements should also be considered as the protection scope of the present application.

Claims

1. A process for improving passivation effect of the surface oxide layer of a crystalline silicon cell, characterized in that, In the process of the TOPCon cell, during the drying process of the alkali etching or RCA cleaning step, an oxidizing gas is introduced to grow a dry oxygen oxide layer on the surface of the silicon wafer.

2. The process of claim 1, wherein the process is characterized by, In the process of the TOPCon cell, during the drying process of the alkali etching or RCA cleaning step, an oxidizing gas is introduced to grow a dry oxygen oxide layer on the surface of the silicon wafer.

3. The process of claim 1, wherein the process further comprises the step of: The drying temperature is 20-600℃; the drying time is 60-1000s. ​ 4. The process of claim 1, wherein the process further comprises the step of: 4-1) applying a passivation layer on the surface of the crystalline silicon solar cell. The drying temperature is 80-100℃; the drying time is 600-1000s.

5. The process of claim 2, wherein the process further comprises the step of: 5.

1. applying a passivation layer on the surface of the crystalline silicon solar cell. Inert gas is introduced during the drying process.

6. The process of claim 1, wherein the process further comprises the step of: 6.

1. applying a passivation layer on the surface of the crystalline silicon solar cell. The oxidizing gas includes ozone and / or oxygen.

7. The process for improving passivation effect of the surface oxide layer of crystalline silicon cells according to claim 1 or 6, characterized in that, The flow rate of the oxidizing gas is 500-20000sccm.

8. The process of claim 1, wherein the process further comprises the step of: 8.

1. applying a passivation layer on the surface of the crystalline silicon solar cell. The temperature for growing the dry oxygen oxide layer is 20-600℃; the time is 20-1000s.

9. The process of claim 1, wherein the process further comprises the step of: 9.

1. applying a passivation layer on the surface of the crystalline silicon solar cell. The temperature for growing the dry oxygen oxide layer is 20-100℃; the time is 20-1000s.

10. The process of claim 1, wherein the process further comprises the step of: 10.

1. applying a passivation layer on the surface of the crystalline silicon solar cell. The drying and growing of the dry oxygen oxide layer are carried out in a drying tank connected with an oxygen / ozone generator.

11. The process of claim 10, wherein the process further comprises the step of: 1) applying a passivation layer on the surface of the crystalline silicon solar cell. The drying tank comprises a drying tank body, a drying device and the oxygen / ozone generator, the drying device and the oxygen / ozone generator are respectively connected with the drying tank body through gas pipelines, and the drying device and the oxygen / ozone generator deliver gas into the drying tank body through annular nozzles.

12. The process for improving the passivation effect of the oxide layer on the surface of crystalline silicon solar cells according to claim 1, characterized in that, When the dry oxygen oxide layer is grown during the drying process of the alkali etching step, a mixed oxide layer is formed on the back surface of the TOPCon cell, and the mixed oxide layer comprises the dry oxygen oxide layer and a deposited ultra-thin oxide layer.

13. The process for improving the passivation effect of the oxide layer on the surface of crystalline silicon solar cells according to claim 1, characterized in that, when growing the dry-oxidation layer during the drying process of the RCA cleaning step, the TOPCon cell structure is obtained comprising a front side SiN X layer, a front side AlO X layer, a front side dry-oxidation layer, a p+ doped layer, a silicon wafer substrate, an ultra-thin oxide layer, an n+ doped poly-silicon layer, a back side dry-oxidation layer, and a back side SiN X layer.

Images