Wiring board

The wiring board design addresses the need for lower heights and higher densities by overlapping first and second components within a cavity and connecting a third component, resulting in improved mounting density and reduced height.

WO2026033954A1PCT designated stage Publication Date: 2026-02-12MURATA MFG CO LTD
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Patent Information

Application Number
PCT/JP2025/018369
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-08-07
Filing Date
2025-05-21
Publication Date
2026-02-12

AI Technical Summary

Technical Problem

Existing methods for achieving low profile and high density module mounting, such as those described in Patent Documents 1 and 2, do not meet the demands for even lower heights and higher densities.

Method used

A wiring board design that includes a substrate with a cavity, where first and second electronic components are positioned to overlap in the thickness direction within the cavity, and a third component is connected to the first component, allowing for increased density and reduced height.

Benefits of technology

The design achieves a low profile and high density by optimizing component placement and connection, enhancing mounting density and reducing the overall height of the wiring board.

✦ Generated by Eureka AI based on patent content.

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Abstract

A wiring board 1 is characterized by comprising a board 10 that has a first main surface 10a and a second main surface 10b on the opposite sides in the thickness direction, a cavity 20 that opens in the first main surface 10a of the board 10, a first electronic component 30 and a second electronic component 40 that are disposed in the cavity 20, and a third electronic component 50 that is mounted on the first main surface 10a side of the board 10, wherein the first electronic component 30 and the second electronic component 40 are disposed in the cavity 20 at positions overlapping each other in the thickness direction, the first electronic component 30 is disposed on the first main surface 10a side of the cavity 20, and the second electronic component 40 is disposed on the second main surface 10b side of the cavity 20, and the third electronic component 50 is disposed at a position where at least a portion thereof overlaps the first electronic component 30 when viewed in the thickness direction, and is connected to the first electronic component 30.
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Description

wiring board

[0001] The present invention relates to a wiring board.

[0002] A known method for achieving a low profile and high density mounting of a module is to provide a cavity inside the substrate and accommodate components in the cavity.

[0003] For example, Patent Document 1 discloses a method of accommodating one die in a cavity, which connects semiconductor dies (hereinafter also simply referred to as dies) such as ICs, which are a type of electronic component. The die that connects dies together is also called a bridge die.

[0004] Similarly, Patent Document 2 discloses a wiring board in which one bridge die is housed in a cavity.

[0005] U.S. Patent Publication No. 11594491 JP 2021-153173 A

[0006] However, there is a demand for even lower heights and higher densities than those achieved by the methods described in Patent Documents 1 and 2.

[0007] The present invention has been made to solve the above problems, and has an object to provide a wiring board that can achieve a low profile and high density.

[0008] The wiring board of the present invention comprises a substrate having a first main surface and a second main surface opposing each other in a thickness direction, a cavity opening to the first main surface of the substrate, a first electronic component and a second electronic component disposed in the cavity, and a third electronic component mounted on the first main surface side of the substrate, wherein the first electronic component and the second electronic component are disposed in positions overlapping in the thickness direction within the cavity, the first electronic component being disposed on the first main surface side of the cavity and the second electronic component being disposed on the second main surface side of the cavity, and the third electronic component being disposed in a position where at least a portion of the third electronic component overlaps with the first electronic component when viewed from the thickness direction, and is connected to the first electronic component.

[0009] According to the present invention, it is possible to provide a wiring board that can achieve a low profile and high density.

[0010] FIG. 1 is a cross-sectional view schematically showing an example of a wiring board of the present invention. FIG. 2 is a cross-sectional view schematically showing another example of a wiring board of the present invention. FIG. 3 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 4 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 5 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 6 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 7 is a top view of the wiring board shown in FIG. 6. FIG. 8 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 9 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 10 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 11 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 12 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention.

[0011] The wiring board of the present invention will be described below. Note that the present invention is not limited to the following configurations and may be modified as appropriate within the scope of the present invention. In addition, a combination of multiple individual preferred configurations described below also constitutes the present invention.

[0012] The drawings shown below are schematic diagrams, and the dimensions, aspect ratio, and other scales may differ from those of the actual product. In the drawings, the same or equivalent parts will be designated by the same reference numerals. In addition, the same elements will be designated by the same reference numerals in each drawing, and duplicate explanations will be omitted.

[0013] In this specification, terms indicating the relationship between elements (e.g., "opposite," "orthogonal," etc.) and terms indicating the shape of elements not only mean the literal strict form, but also mean a range that is substantially equivalent, for example, a range that includes a difference of about a few percent.

[0014] The following embodiments are merely examples, and it goes without saying that partial substitution or combination of the configurations shown in different embodiments is possible. In the description of each embodiment, descriptions of matters common to the previously described embodiments will be omitted, and only differences will be described. In particular, similar effects resulting from similar configurations will not be mentioned in each embodiment.

[0015] [Wiring Board] A wiring board of the present invention includes a substrate having a first main surface and a second main surface opposing each other in a thickness direction, a cavity opening to the first main surface of the substrate, a first electronic component and a second electronic component disposed in the cavity, and a third electronic component mounted on the first main surface side of the substrate, wherein the first electronic component and the second electronic component are disposed in positions overlapping in the thickness direction within the cavity, the first electronic component is disposed on the first main surface side of the cavity and the second electronic component is disposed on the second main surface side of the cavity, and the third electronic component is disposed in a position where at least a portion of the third electronic component overlaps with the first electronic component when viewed from the thickness direction, and is connected to the first electronic component.

[0016] FIG. 1 is a cross-sectional view schematically showing an example of a wiring board according to the present invention.

[0017] The wiring board 1 shown in FIG. 1 includes a substrate 10 , a cavity 20 , a first electronic component 30 , and a second electronic component 40 .

[0018] The substrate 10 has a first main surface 10a and a second main surface 10b that face each other in a thickness direction (the direction indicated by the arrow Z in FIG. 1), a first side surface 10c and a second side surface 10d that face each other in a length direction (the direction indicated by the arrow X in FIG. 1) that is perpendicular to the thickness direction Z, and a third side surface and a fourth side surface that face each other in a width direction that is perpendicular to the thickness direction Z and the length direction X. The second main surface 10b of the substrate 10 also serves as the bottom surface 1b of the wiring substrate 1.

[0019] The substrate 10 may be a printed circuit board (also called a p-board) or a low-temperature co-fired ceramic (LTCC) substrate. Alternatively, the substrate 10 may be a resin multilayer substrate in which copper foil wiring is formed on a thermoplastic resin (e.g., polyetheretherketone (PEEK), polyimide (PI), or liquid crystal polymer (LCP)). The low-temperature co-fired ceramic (LTCC) substrate is a substrate formed by laminating insulating layers made of low-temperature co-fired ceramic (LTCC) material and having wiring (internal wiring) inside.

[0020] Low-temperature co-fired ceramic materials are ceramic materials that can be fired at temperatures of 1000°C or less and can be co-fired with Au, Ag, Cu, etc., which have low resistivity. Specific examples of low-temperature co-fired ceramic materials include glass composite low-temperature co-fired ceramic materials obtained by mixing ceramic powders such as alumina, zirconia, magnesia, and forsterite with borosilicate glass; ZnO-MgO-Al 2 O 3 -SiO 2 Glass-ceramic low-temperature fired ceramic material using BaO-Al 2 O 3 -SiO 2 ceramic powder and Al 2 O 3 -CaO-SiO 2 -MgO-B 2 O 3 Examples of suitable ceramic materials include non-glass-based low-temperature fired ceramic materials using ceramic powders.

[0021] The internal wiring may be made of Cu, Ag, Au or the like.

[0022] The cavity 20 is a bottomed cavity that opens to the first main surface 10a of the substrate 10 and has a bottom on the second main surface 10b side.

[0023] The first electronic component 30 and the second electronic component 40 are arranged in positions that overlap in the thickness direction Z within the cavity 20. By arranging the first electronic component 30 and the second electronic component 40 in positions that overlap in the thickness direction Z within the cavity 20, the mounting density of the electronic components can be increased and the height of the wiring board can be reduced.

[0024] When viewed from the thickness direction, the first electronic component and the second electronic component may overlap exactly or partially. That is, the entire first electronic component may overlap with a portion of the second electronic component, a portion of the first electronic component may overlap with the entire second electronic component, or a portion of the first electronic component may overlap with a portion of the second electronic component. In the wiring board 1 shown in FIG. 1 , a portion of the first electronic component 30 overlaps with the entire second electronic component 40.

[0025] Within the cavity 20, the first electronic component 30 and the second electronic component 40 may be in contact with each other in the thickness direction or may be spaced apart. When the first electronic component 30 and the second electronic component 40 are in contact with each other in the thickness direction within the cavity 20, the dimensions in the thickness direction occupied by the first electronic component 30 and the second electronic component 40 are reduced, thereby improving the mounting density of the substrate. Furthermore, the temperatures of the first electronic component 30 and the second electronic component 40 can be adjusted to be approximately the same. When the first electronic component 30 and the second electronic component 40 are spaced apart in the thickness direction within the cavity 20, the influence of heat between the first electronic component 30 and the second electronic component 40 can be suppressed.

[0026] The volume of the cavity 20 is larger than the sum of the volumes of the first electronic component 30 and the second electronic component 40. The dimensions of the cavity 20 can be adjusted as appropriate to match the dimensions of the first electronic component and the second electronic component to be placed therein.

[0027] The cavity 20 may have any dimensions that are large enough to accommodate the first electronic component 30 and the second electronic component 40 stacked in the thickness direction Z, and may have, for example, a rectangular parallelepiped shape with a length of 0.5 mm, a width of 0.5 mm, and a thickness of 0.1 mm. The area of ​​the cavity 20 as viewed in the thickness direction Z is preferably 5% to 25% of the area of ​​the substrate.

[0028] The first electronic component 30 is an electronic component that is disposed on the first main surface 10 a side in the cavity 20 .

[0029] Examples of the first electronic component 30 include active components such as diodes and ICs, and passive components such as capacitors, coils, and filters. The first electronic component 30 may also be a semiconductor chip (die) manufactured by a semiconductor process. Examples of dies include a power amplifier controller (PAC) and a chiplet (a portion of a large-area die divided by function). The filter may also be a surface acoustic wave (SAW) filter or a bulk acoustic wave (BAW) filter.

[0030] No external electrodes are provided on the side or bottom surfaces of the first electronic component 30. Therefore, the first electronic component 30 is not directly connected to the substrate 10 on the side or bottom surfaces.

[0031] Two or more first electronic components 30 may be accommodated in one cavity 20. The types of the multiple first electronic components 30 arranged in the same cavity 20 may be the same or different. By accommodating two or more first electronic components 30 in one cavity 20, the mounting density of the electronic components can be further improved.

[0032] The second electronic component 40 is an electronic component disposed on the second main surface 10b side in the cavity 20 .

[0033] Examples of the second electronic component 40 include passive components such as diodes and ICs, as well as passive components such as capacitors, coils, and filters. The second electronic component 40 may also be a semiconductor chip (die) manufactured by a semiconductor process. Examples of dies include PACs and chiplets. The filter may also be a SAW filter or a BAW filter.

[0034] An external electrode is provided on the bottom surface of the second electronic component 40, and the external electrode is connected to an electrode arranged on the bottom surface 20a of the cavity 20. In other words, the second electronic component 40 is mounted on the substrate 10 within the cavity 20.

[0035] Two or more second electronic components 40 may be arranged in one cavity 20. The types of the multiple second electronic components 40 arranged in the same cavity 20 may be the same or different. By arranging two or more second electronic components 40 in one cavity 20, it is possible to further improve the mounting density of the electronic components.

[0036] The second electronic component 40 may be mounted on the substrate at the bottom surface 20a of the cavity 20, or may be connected to a fourth electronic component, which will be described later.

[0037] When two or more electronic components that do not overlap in the thickness direction are arranged on the first main surface 10a side of the cavity 20, these are all regarded as the first electronic component 30. When two or more electronic components overlap in the thickness direction of the cavity 20, the electronic component on the first main surface 10a side is regarded as the first electronic component 30, and the electronic component on the second main surface 10b side is regarded as the second electronic component 40.

[0038] 1, when the cavity 20 is a bottomed cavity, the second electronic component 40 is preferably mounted on the substrate at the bottom surface 20a of the cavity 20. In the wiring substrate 1 shown in FIG. 1, an external electrode is provided on the bottom surface of the second electronic component 40, and the external electrode is connected to an electrode arranged on the bottom surface 20a of the cavity 20. In other words, the second electronic component 40 can be said to be mounted on the substrate 10 within the cavity 20.

[0039] A third electronic component 50 is mounted on the first main surface 10a of the substrate 10. The third electronic component 50 is an electronic component that is mounted on the first main surface 10a side of the substrate 10 and is arranged in a position where at least a portion of the third electronic component 50 overlaps with the first electronic component 30 when viewed from the thickness direction Z.

[0040] Examples of the third electronic component 50 include passive components such as diodes and ICs, as well as passive components such as capacitors, coils, and filters. The third electronic component 50 may also be a semiconductor chip (die) manufactured by a semiconductor process. Examples of dies include ICs such as a power amplifier (PA) and a low noise amplifier (LNA).

[0041] The third electronic component 50 is disposed in a position where at least a portion thereof overlaps the first electronic component 30 when viewed from the thickness direction Z, and is connected to the first electronic component 30. By connecting the first electronic component 30 to the third electronic component 50, the position of the first electronic component 30 within the cavity 20 is fixed, and electrical connection with the substrate 10 is ensured. Note that the connection between the first electronic component and the third electronic component may be such that the electrodes of the respective electronic components are directly connected via solder, or such that the electrodes of one of the electronic components have solder bumps and the electrodes are connected via the solder bumps.

[0042] Mounting refers to the state in which an electronic component is fixed to a substrate without any other electronic components in between, thereby enabling the electronic component to perform its function. Therefore, an electronic component fixed in a cavity 20 via a third electronic component 50 mounted on the first main surface 10a of the substrate 10, such as the first electronic component 30 shown in Figure 1, is not said to be mounted on the substrate 10, but rather to be housed in the cavity 20.

[0043] A preferred combination of the first electronic component, the second electronic component, and the third electronic component is, for example, a combination in which the first electronic component is a PAC, the second electronic component is a capacitor, and the third electronic component is a PA.

[0044] A fifth electronic component 70 may be mounted on the first main surface 10a and / or the second main surface 10b of the substrate 10. Examples of the fifth electronic component 70 include passive components such as diodes and ICs, as well as passive components such as capacitors, coils, and filters. The fifth electronic component 70 may also be a semiconductor chip (die) manufactured by a semiconductor process. Examples of dies include ICs such as PAs and LNAs. The fifth electronic component 70 is an electronic component mounted on the first main surface 10a and / or the second main surface 10b of the substrate 10, and is an electronic component other than the third electronic component 50 described above and a fourth electronic component described below.

[0045] The third electronic component 50 and the fifth electronic component 70 mounted on the first main surface 10a of the substrate 10 may be sealed with a sealing resin 81. The sealing resin 81 may cover the entire first main surface 10a of the substrate 10 to form a resin layer 80. The upper surface of the resin layer 80 may constitute a part of the upper surface 1a of the wiring substrate 1.

[0046] A part of the sealing resin 81 may be present inside the cavity 20 .

[0047] The type of resin constituting the sealing resin 81 is not particularly limited, but examples thereof include epoxy resin, etc. The resin layer 80 may contain additives such as fillers in addition to the sealing resin 81.

[0048] The sealing resin 81 covering the first main surface 10 a of the substrate 10 is also referred to as the first sealing resin 81 to distinguish it from the sealing resin covering the second main surface 10 b, which will be described later. The resin layer 80 formed by the first sealing resin 81 is also referred to as the first resin layer 80.

[0049] A shielding film may be formed on the surfaces (top and side surfaces) of the resin layer 80. When a shielding film is formed on the top surface of the resin layer 80, a through conductor may be provided in the resin layer 80, penetrating the resin layer 80 in the thickness direction Z and connecting the first main surface 10a of the substrate 10 to the shielding film. Shielding films may also be formed on the side surfaces of the substrate 10 (the first side surface 10c, the second side surface 10d, and the third and fourth side surfaces not shown).

[0050] Hereinafter, another example of the wiring board of the present invention will be described with reference to FIGS.

[0051] An example of a wiring board in which a plurality of second electronic components are arranged in a cavity will be described with reference to FIG.

[0052] FIG. 2 is a cross-sectional view schematically showing another example of the wiring board of the present invention.

[0053] The wiring board 2 shown in Fig. 2 corresponds to the wiring board 1 shown in Fig. 1 except that the number of second electronic components is changed to two. Therefore, in the wiring board 2, one first electronic component 30 and two second electronic components 41, 42 are arranged in the cavity 20. Both of the two second electronic components 41, 42 are mounted on the substrate 10 at the bottom surface 20a of the cavity 20.

[0054] Both of the two second electronic components 41, 42 overlap with the first electronic component 30 in the thickness direction Z, but are spaced apart from (not in contact with) the first electronic component 30. However, among the multiple second electronic components, some of the second electronic components may be in contact with the first electronic components, and some of the second electronic components may be spaced apart from the first electronic components.

[0055] A fourth electronic component may be mounted on the second main surface of the substrate. An example of a wiring substrate including a fourth electronic component will be described with reference to FIG.

[0056] FIG. 3 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0057] In the wiring board 3A shown in FIG. 3, a fourth electronic component 60 is mounted on the second main surface 10b of the substrate 10.

[0058] The fourth electronic component 60 may be a semiconductor chip (die) manufactured by a semiconductor process. Examples of the die include an IC such as a PA or LNA. The fourth electronic component 60 may also be an active component such as a diode, or a passive component such as a capacitor, a coil, or a filter.

[0059] The cavity 21 provided in the substrate 10 is a bottomless cavity that penetrates the substrate 10 in the thickness direction Z. Therefore, the bottom surface of the second electronic component 40 disposed in the cavity 21 is exposed on the second main surface 10b side of the substrate 10.

[0060] The fourth electronic component 60 is disposed at a position overlapping the second electronic component 40 when viewed in the thickness direction Z, and the fourth electronic component 60 and the second electronic component 40 are connected to each other.

[0061] By connecting the second electronic component 40 to the fourth electronic component 60, the position of the second electronic component 40 within the cavity 21 is fixed and electrical connection with the substrate 10 is ensured, so it can be said that the second electronic component 40 is accommodated within the cavity 21.

[0062] The fourth electronic component 60 and the fifth electronic component 70 mounted on the second main surface 10b of the substrate 10 may be sealed with a sealing resin 91. The sealing resin 91 may cover the entire second main surface 10b of the substrate 10 and form a resin layer 90.

[0063] A part of the sealing resin 91 may be present inside the cavity 21 .

[0064] The type of resin constituting the sealing resin 91 is not particularly limited, but examples thereof include epoxy resin. The resin layer 90 may contain an additive such as a filler in addition to the sealing resin 91. The sealing resin 91 may be the same as or different from the sealing resin 81.

[0065] The sealing resin 91 covering the second main surface 10b of the substrate 10 is also referred to as a second sealing resin 91 to distinguish it from the sealing resin 81 covering the first main surface 10a. The resin layer 90 formed by the second sealing resin 91 is also referred to as a second resin layer 90. A shielding film may also be formed on the side surfaces of the second resin layer 90, as needed.

[0066] The wiring substrate 3A may have a through conductor 93 that penetrates the second resin layer 90 in the thickness direction Z. The through conductor 93 allows an electrode exposed on the second main surface 10b of the substrate 10 to be drawn to the bottom surface 3Ab of the wiring substrate 3A (the bottom surface of the resin layer 90).

[0067] A plurality of fourth electronic components may be mounted on the second main surface of the substrate. An example of a wiring substrate having a plurality of fourth electronic components will be described with reference to FIG.

[0068] FIG. 4 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0069] 4 includes two fourth electronic components 61, 62 mounted on the second main surface 10b of the substrate 10. The fourth electronic components 61, 62 are each disposed at a position overlapping the second electronic component 40 in the thickness direction Z. Each of the two fourth electronic components 61, 62 is connected to one second electronic component 40.

[0070] When the two fourth electronic components 61 and 62 and the second electronic component 40 are all dies, the second electronic component 40 bridging the multiple dies (fourth electronic components 61 and 62) is also called a bridge die.

[0071] When the second electronic component 40 (die) connects multiple fourth electronic components 60 (die) mounted on the second main surface 10b of the substrate 10, the second electronic component 40 is also called a bridge die.

[0072] An example of a combination of the second electronic component 40 and the fourth electronic components 61 and 62 is a case where both the fourth electronic components 61 and 62 are dies and the second electronic component 40 is a passive element such as a capacitor. The passive element may be a die. That is, both the second electronic component 40 and the fourth electronic components 61 and 62 may be dies. Examples of dies include integrated circuits (ICs) such as PAs and LNAs. Examples of bridge dies include high-density silicon capacitors (also known as deep trench capacitors (DTCs)) manufactured using a semiconductor MOS process. DTCs are also a type of capacitor. The fourth electronic components 61 and 62 combined with the DTCs may be chiplets (portions of large-area dies divided according to function).

[0073] Because the DTC can lead out all of its electrodes from one surface, it can ensure connection on the same surface to multiple fourth electronic components 61, 62. This makes it easy to design the connection between the second electronic component 40 and the fourth electronic components 61, 62. Furthermore, even if the number of fourth electronic components 61, 62 connected to the second electronic component 40 increases, it is easy to accommodate an increase in the number of fourth electronic components 61, 62 because complex electrode routing is not required.

[0074] If the second electronic component 40 and the fourth electronic components 61 and 62 are all ICs, a fifth electronic component 70 such as a coil or a capacitor may be further mounted on the substrate 10 as an impedance matching circuit element corresponding to each IC.

[0075] A plurality of third electronic components may be mounted on the first main surface of the substrate. An example of a wiring substrate having a plurality of third electronic components mounted on the first main surface of the substrate will be described with reference to FIG.

[0076] FIG. 5 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0077] 5 includes two third electronic components 51 and 52 mounted on the first main surface 10a of the substrate 10. The third electronic components 51 and 52 are each disposed at a position overlapping the first electronic component 30 in the thickness direction Z. Furthermore, each of the third electronic components 51 and 52 is connected to one first electronic component 30.

[0078] When the two third electronic components 51, 52 and the first electronic component 30 are all dies, the first electronic component 30 that bridges multiple dies (third electronic components 51, 52), as in the wiring board 3C shown in Figure 5, is also called a bridge die.

[0079] An example of a combination of the first electronic component 30 and the third electronic components 51 and 52 is when both the third electronic components 51 and 52 are dies and the first electronic component 30 is a passive element such as a capacitor. The passive element may be a die. That is, both the first electronic component 30 and the third electronic components 51 and 52 may be dies. Examples of dies include ICs such as PAs and LNAs. Examples of bridge dies include DTCs. The third electronic components 51 and 52 combined with the DTCs may be chiplets (portions of large-area dies divided according to function).

[0080] When viewed from the thickness direction, the cavity may be exposed on one, two, or three sides of the outer shape of the substrate. An example of a wiring substrate in which the cavity is exposed on two sides of the outer shape of the substrate will be described with reference to Figures 6 and 7.

[0081] Fig. 6 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. Fig. 7 is a top view of the wiring board shown in Fig. 6. Fig. 6 is also a cross-sectional view taken along line VI-VI of the wiring board shown in Fig. 7.

[0082] 6 includes a substrate 10, a cavity 22, a first electronic component 30, a second electronic component 40, a third electronic component 50, and a fourth electronic component 60. The first electronic component 30 and the second electronic component 40 are arranged in the cavity 22 so as to be in contact with each other in the thickness direction Z.

[0083] 7, the substrate 10 has a first side surface 10c and a second side surface 10d that face each other in the length direction X, and a third side surface 10e and a fourth side surface 10f that face each other in the width direction Y. When the wiring substrate 4A is viewed from the thickness direction Z, the cavity 22 is exposed on two sides of the substrate 10 (the first side surface 10c and the fourth side surface 10f).

[0084] When a cavity is formed in a substrate, an area around the cavity is created where internal wiring or electronic components cannot be installed due to manufacturing errors, etc. This area is called a dead area (also called a margin area). If the cavity is exposed on one, two, or three sides of the substrate's outer shape, the dead area can be reduced. In addition, a shielding film can be used on the exposed surface of the substrate, which reduces the area where the compartment shield is formed.

[0085] The greater the number of exposed sides of the cavity, the greater the effect of reducing the dead area and the area where the compartment shield is formed.

[0086] The sides of the external shape of the board are determined by the positional relationship between the side surfaces of the board constituting the wiring board, the side surfaces of the resin layer, and the electronic components mounted on the board. Specifically, if the board is exposed on the side surface of the wiring board excluding the shielding film, the sides formed by the board are considered to be the sides of the external shape of the board. Also, if there is a notch on the side surface of the board, the side surface of the board as if the notch did not exist is considered to be the side of the external shape of the board.

[0087] On the other hand, if a resin layer, rather than the substrate, is exposed on the side of the wiring board excluding the shielding film (i.e., if the side of the resin layer protrudes outward from the side of the substrate), the side of the resin layer is considered to be a side in the external shape of the substrate.

[0088] Fig. 8 is a cross-sectional view schematically illustrating another example of a wiring board according to the present invention. The wiring board 4B shown in Fig. 8 has the same configuration as the wiring board 4A shown in Fig. 6 and Fig. 7, except that the first electronic component 30 and the second electronic component 40 are spaced apart in the thickness direction Z.

[0089] As shown in FIG. 8, the first electronic component 30 and the second electronic component 40 disposed in the cavity 22 may be spaced apart in the thickness direction Z.

[0090] A plurality of fourth electronic components may be mounted on the second main surface of the substrate. An example of a wiring substrate in which a plurality of fourth electronic components are each connected to one second electronic component will be described with reference to FIG.

[0091] FIG. 9 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0092] 9, one first electronic component 30 and two second electronic components 41, 42 are arranged in cavity 20. In addition, one third electronic component 50 is mounted on first main surface 10a of substrate 10, and two fourth electronic components 61, 62 are mounted on second main surface 10b.

[0093] The second electronic components 41 and 42 are connected to the fourth electronic components 61 and 62, respectively. As shown in Fig. 9 , when a plurality of fourth electronic components 61 and 62 are mounted on the second main surface 10b of the substrate 10, each of the fourth electronic components 61 and 62 may be connected to one second electronic component 41 and one second electronic component 42.

[0094] The first electronic component 30 and the second electronic component 41 are in contact with each other in the thickness direction, but the first electronic component 30 and the second electronic component 42 are spaced apart from each other in the thickness direction.

[0095] The cavity may be a multi-stage cavity, which is a cavity having two or more portions with different opening areas between the portion on the first main surface side and the portion on the second main surface side.

[0096] The multi-stage cavity may be a cavity having, for example, a first portion that opens to the first main surface side of the substrate and a second portion that opens to the second main surface side of the substrate. The multi-stage cavity may have different opening areas between the first portion and the second portion as viewed in the thickness direction. The opening area of ​​the first portion may be relatively large and the opening area of ​​the second portion may be relatively small, or the opening area of ​​the first portion may be relatively small and the opening area of ​​the second portion may be relatively large.

[0097] That is, the multi-stage cavity may be a multi-stage cavity consisting of a first portion that opens to the first main surface side of the substrate and a second portion that opens to the second main surface side of the substrate, with the opening area of ​​the second portion being larger than the opening area of ​​the first portion, or a multi-stage cavity consisting of a first portion that opens to the first main surface side of the substrate and a second portion that opens to the second main surface side of the substrate, with the opening area of ​​the second portion being smaller than the opening area of ​​the first portion.

[0098] When the multi-stage cavity has an opening area of ​​the second portion larger than the opening area of ​​the first portion, a portion of the top surface of the second portion is formed on the surface of the second main surface side of the substrate. In such a multi-stage cavity, a fourth electronic component may be mounted in the second portion of the cavity. When there are multiple fourth electronic components, at least one fourth electronic component may be mounted in the second portion.

[0099] An example of a wiring board having a multi-stage cavity will be described with reference to FIG.

[0100] FIG. 10 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0101] 10, the substrate 10 has a cavity 23. The cavity 23 is composed of a first portion 23A that opens to the first main surface 10a side of the substrate 10 and a second portion 23B that opens to the second main surface 10b side.

[0102] In the cavity 23, the opening area of ​​the second portion 23B is larger than the opening area of ​​the first portion 23A. Therefore, when the substrate 10 is viewed from the second main surface 10b, the top surface 23Ba of the second portion 23B is visible. Furthermore, one of the two fourth electronic components 61, 62 (the fourth electronic component 62) is connected to an electrode of the substrate 10 exposed on the top surface 23Ba of the second portion 23B. Therefore, it can be said that the fourth electronic component 62 is mounted on the substrate 10 at the second portion 23B of the cavity 23.

[0103] In the wiring board of the present invention, when the cavity is a multi-stage cavity in which the opening area of ​​the second portion is smaller than the opening area of ​​the first portion, the first electronic component may be housed in the first portion and the second electronic component may be housed in the second portion. An example of such a wiring board will be described with reference to FIG.

[0104] FIG. 11 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0105] 11 includes a substrate 10, a cavity 24, a first electronic component 30 and a second electronic component 40 housed in the cavity 24, a third electronic component 50 mounted on the first main surface 10a of the substrate 10, and two fourth electronic components 61 and 62 mounted on the second main surface 10b of the substrate 10. The cavity 24 is a bottomless cavity having a first portion 24A disposed on the first main surface 10a side of the substrate 10 and a second portion 24B disposed on the second main surface 10b side of the substrate 10. The cavity 24 is also a multi-stage cavity in which the opening area of ​​the first portion 24A is larger than the opening area of ​​the second portion 24B.

[0106] The first electronic component 30 is disposed in the first portion 24A and is connected to the third electronic component 50. The second electronic component 40 is disposed in the second portion 24B and is connected to two fourth electronic components 61 and 62.

[0107] Furthermore, when the cavity is a multi-stage cavity in which the opening area of ​​the second portion is smaller than the opening area of ​​the first portion, and a first electronic component is housed in the first portion and a second electronic component is housed in the second portion, a metal layer disposed on the first electronic component side and in contact with the first electronic component, and an insulating layer disposed on the second electronic component side and in contact with the metal layer and the second electronic component, may be disposed between the first electronic component and the second electronic component. The metal layer may extend from between the first electronic component and the second electronic component to a bottom surface of the first portion of the cavity. The substrate may be provided with a connecting conductor penetrating in the thickness direction from the bottom surface of the first portion of the cavity to the second main surface of the substrate. The metal layer may be connected to the connecting conductor.

[0108] An example of the above-mentioned wiring substrate in which a metal layer and a heat insulating layer are provided inside the multi-stage cavity will be described with reference to FIG.

[0109] FIG. 12 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0110] The wiring board 7 shown in FIG. 12 includes a substrate 10 , a cavity 25 , a first electronic component 30 , a second electronic component 40 , and a third electronic component 50 .

[0111] The first main surface 10a of the substrate 10 and the third electronic component 50 are sealed with a sealing resin 81. A part of the upper surface of a resin layer 80 formed by the sealing resin 81 constitutes the upper surface 7a of the wiring substrate 7.

[0112] The cavity 25 is a bottomed cavity having a first portion 25A arranged on the first main surface 10a side of the substrate 10 and a second portion 25B arranged on the second main surface 10b side of the substrate 10. The cavity 25 is also a multi-stage cavity in which the opening area of ​​the first portion 25A is larger than the opening area of ​​the second portion 25B.

[0113] The wiring board 7 further includes a metal layer 27, an insulating layer 28, and a connecting conductor 15. The metal layer 27 and the insulating layer 28 are provided between the first electronic component 30 and the second electronic component 40.

[0114] The metal layer 27 is disposed on the first electronic component 30 side and is in contact with the first electronic component 30 and the insulating layer 28 .

[0115] Since no electrode is provided on the bottom surface of the first electronic component 30, the first electronic component 30 and the metal layer 27 are not electrically connected.

[0116] The insulating layer 28 is disposed on the second electronic component 40 side and is in contact with the metal layer 27 and the second electronic component 40 .

[0117] The second electronic component 40 is connected to an electrode provided on the bottom surface 25Ba of the second portion 25B of the cavity 25. Therefore, the second electronic component 40 is mounted on the substrate 10 in the second portion 25B of the cavity 25.

[0118] The substrate 10 is provided with a connecting conductor 15 that penetrates in the thickness direction Z from the bottom surface 25Aa of the first portion 25A of the cavity 25 to the second main surface 10b of the substrate.

[0119] The second main surface 10 b of the substrate 10 also serves as the bottom surface 7 b of the wiring board 7 .

[0120] The metal layer 27 extends to the bottom surface of the first portion of the cavity and is connected to the connecting conductor 15 .

[0121] That is, in the wiring board 7, heat generated by the first electronic component 30 can be transported to the bottom surface 7b of the wiring board 7 via the metal layer 27 and the connecting conductor 15. At this time, the insulating layer 28 is provided between the metal layer 27 and the second electronic component 40, so that the heat from the first electronic component 30 is prevented from affecting the second electronic component 40. Therefore, the wiring board 7 shown in FIG. 12 can achieve both efficient heat dissipation from the first electronic component 30 and suppression of the thermal effect on the second electronic component 40.

[0122] This specification describes the following:

[0123] The present disclosure (1) is a wiring board comprising: a substrate having a first main surface and a second main surface opposing each other in a thickness direction; a cavity opening to the first main surface of the substrate; a first electronic component and a second electronic component disposed in the cavity; and a third electronic component mounted on the first main surface side of the substrate, wherein the first electronic component and the second electronic component are disposed in positions overlapping in the thickness direction within the cavity, the first electronic component is disposed on the first main surface side of the cavity, and the second electronic component is disposed on the second main surface side of the cavity, and the third electronic component is disposed in a position where at least a portion of the third electronic component overlaps with the first electronic component when viewed from the thickness direction and is connected to the first electronic component.

[0124] The present disclosure (2) is the wiring board according to the present disclosure (1), in which the first electronic component and the second electronic component are in contact with each other in the thickness direction.

[0125] The present disclosure (3) is the wiring board according to the present disclosure (1), wherein the first electronic component and the second electronic component are spaced apart in the thickness direction.

[0126] The present disclosure (4) is a wiring board in any combination with any of the present disclosures (1) to (3), in which a plurality of third electronic components are mounted on the first main surface side of the board, and each of the plurality of third electronic components is connected to one of the first electronic components.

[0127] The present disclosure (5) is a wiring board in any combination with any of the present disclosures (1) to (4), in which a plurality of the first electronic components are housed in one of the cavities.

[0128] The present disclosure (6) further includes a fourth electronic component mounted on the second main surface side of the substrate and positioned so that at least a portion of the fourth electronic component overlaps with the second electronic component when viewed in the thickness direction, and the fourth electronic component is connected to the second electronic component, and is a wiring substrate in any combination with any of the present disclosures (1) to (5).

[0129] The present disclosure (7) is a wiring board described in the present disclosure (6), in which a plurality of the fourth electronic components are mounted on the second main surface side of the board, and each of the plurality of fourth electronic components is connected to one of the second electronic components.

[0130] The present disclosure (8) is the wiring board according to the present disclosure (7), wherein the cavity is a multi-stage cavity consisting of a first portion that opens to the first main surface side of the substrate and a second portion that opens to the second main surface side of the substrate, the opening area of ​​the second portion being larger than the opening area of ​​the first portion, and at least one of the fourth electronic components is mounted in the second portion.

[0131] The present disclosure (9) is a wiring board in any combination with any of the present disclosures (1) to (7), wherein the cavity is a multi-stage cavity consisting of a first portion that opens to the first main surface side of the substrate and a second portion that opens to the second main surface side of the substrate, and the opening area of ​​the second portion is smaller than the opening area of ​​the first portion, and the first electronic component is housed in the first portion, and the second electronic component is housed in the second portion.

[0132] The present disclosure (10) is the wiring board according to the present disclosure (9), in which a metal layer is arranged on the first electronic component side and in contact with the first electronic component, and an insulating layer is arranged on the second electronic component side and in contact with the metal layer and the second electronic component, and the substrate is provided with a connection conductor that penetrates in the thickness direction from the bottom surface of the first part of the cavity to the second main surface of the substrate, and the metal layer is extended to the bottom surface of the first part of the cavity and connected to the connection conductor.

[0133] The present disclosure (11) is a wiring board in any combination with any of the present disclosures (1) to (10), in which the cavity is exposed to one side, two sides, or three sides of the outer shape of the board when viewed from the thickness direction.

[0134] 1, 2, 3A, 3B, 3C, 4A, 4B, 5A, 5B, 6, 7 Wiring board 1a Top surface of wiring board 1b, 3Ab Bottom surface of wiring board 10 Substrate 10a First main surface of substrate 10b Second main surface of substrate 10c First side surface of substrate 10d Second side surface of substrate 10e Third side surface of substrate 10f Fourth side surface of substrate 15 Connecting conductor 20 Cavity (cavity with bottom) 20a Bottom surface of cavity 21, 22 Cavity (cavity without bottom) 23, 24, 25 Cavity (multi-stage cavity) 23A, 24A, 25A First portion 23B, 24B, 25B Second portion 23Ba Top surface of second portion 25Aa Bottom surface of first portion 25Ba Bottom surface of second portion 27 Metal layer 28 Insulating layer 30, 31, 32 First electronic component 40, 41, 42 Second electronic component 50, 51, 52 Third electronic component 60, 61, 62 Fourth electronic component 70 Fifth electronic component 80 Resin layer (first resin layer) 81 Sealing resin (first sealing resin) 90 Resin layer (second resin layer) 91 Sealing resin (second sealing resin) 93 Through conductor

Claims

1. A wiring board comprising: a substrate having first and second main surfaces opposing each other in a thickness direction; a cavity opening to the first main surface of the substrate; a first electronic component and a second electronic component disposed within the cavity; and a third electronic component mounted on the first main surface side of the substrate, wherein the first electronic component and the second electronic component are disposed in positions overlapping in the thickness direction within the cavity, the first electronic component is disposed on the first main surface side of the cavity and the second electronic component is disposed on the second main surface side of the cavity, and the third electronic component is disposed in a position where at least a portion of the third electronic component overlaps with the first electronic component when viewed from the thickness direction and is connected to the first electronic component.

2. The wiring board according to claim 1, wherein the first electronic component and the second electronic component are in contact with each other in the thickness direction.

3. The wiring board according to claim 1, wherein the first electronic component and the second electronic component are spaced apart in the thickness direction.

4. A wiring board according to any one of claims 1 to 3, wherein a plurality of third electronic components are mounted on the first main surface side of the board, and each of the plurality of third electronic components is connected to one of the first electronic components.

5. The wiring board according to any one of claims 1 to 4, wherein a plurality of the first electronic components are housed in one cavity.

6. The wiring board according to any one of claims 1 to 5, further comprising a fourth electronic component mounted on the second main surface side of the board and positioned so that at least a portion of the fourth electronic component overlaps with the second electronic component when viewed in the thickness direction, and the fourth electronic component is connected to the second electronic component.

7. The wiring board according to claim 6, wherein a plurality of the fourth electronic components are mounted on the second main surface side of the board, and each of the plurality of fourth electronic components is connected to one of the second electronic components.

8. The wiring board according to claim 7, wherein the cavity is a multi-stage cavity consisting of a first portion that opens to the first main surface side of the substrate and a second portion that opens to the second main surface side of the substrate, the opening area of ​​the second portion being larger than the opening area of ​​the first portion, and at least one of the fourth electronic components is mounted in the second portion.

9. A wiring board according to any one of claims 1 to 7, wherein the cavity is a multi-stage cavity consisting of a first portion that opens to the first main surface side of the substrate and a second portion that opens to the second main surface side of the substrate, the opening area of ​​the second portion being smaller than the opening area of ​​the first portion, and the first electronic component is housed in the first portion, and the second electronic component is housed in the second portion.

10. A wiring board as described in claim 9, wherein a metal layer is arranged on the first electronic component side and in contact with the first electronic component, and an insulating layer is arranged on the second electronic component side and in contact with the metal layer and the second electronic component, and the substrate is provided with a connecting conductor that penetrates in the thickness direction from the bottom surface of the first part of the cavity to the second main surface of the substrate, and the metal layer extends to the bottom surface of the first part of the cavity and is connected to the connecting conductor.

11. The wiring board according to any one of claims 1 to 10, wherein the cavity is exposed on one, two or three sides of the outer shape of the board when viewed from the thickness direction.

Citation Information

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