Wiring substrate

Abstract

Provided is a wiring substrate 1 comprising a substrate 10 that has a first main surface 10a and a second main surface 10b which are opposite from each other in the thickness direction, a first electronic component 20 that is mounted to the first main surface 10a side of the substrate 10, a second electronic component 30 that is mounted to the second main surface 10b side of the substrate 10, a first connection conductor 40 that extends in the thickness direction and that connects the first electronic component 20 and the second electronic component 30, and a sealing resin 65 that seals the periphery of the substrate 10, the first electronic component 20, the second electronic component 30, and the first connection conductor 40, said wiring substrate 1 being characterized in that the substrate 10 has a first region A1 in which signal wiring is disposed in a view from the thickness direction, and the first region A1 and the first connection conductor 40 are separated by the sealing resin 65.

Description

wiring board

[0001] The present invention relates to a wiring board.

[0002] A known method for achieving a low profile and high density mounting of a module is to provide a cavity inside the substrate and accommodate components in the cavity.

[0003] For example, Patent Document 1 discloses a method of accommodating one die in a cavity, which connects semiconductor dies (hereinafter also simply referred to as dies) such as ICs, which are a type of electronic component. The die that connects dies together is also called a bridge die.

[0004] U.S. Patent Publication No. 11605594

[0005] In recent years, there has been a demand for wiring between electronic components arranged in modules for purposes such as power supply, etc. However, wiring for purposes such as power supply tends to have a large current flow and become hot, which can adversely affect other signal wiring, and countermeasures were therefore required.

[0006] The present invention has been made to solve the above problems, and has an object to provide a wiring board that can suppress the deterioration of characteristics that accompanies heat generation in the connection wiring between electronic components.

[0007] The wiring board of the present invention is a wiring board comprising: a substrate having a first main surface and a second main surface opposing each other in a thickness direction; a first electronic component mounted on the first main surface side of the substrate; a second electronic component mounted on the second main surface side of the substrate; a first connecting conductor extending in the thickness direction and connecting the first electronic component and the second electronic component; and a sealing resin that seals the periphery of the substrate, the first electronic component, the second electronic component, and the first connecting conductor, wherein the substrate, when viewed in the thickness direction, has a first region in which signal wiring is arranged, and the first region and the first connecting conductor are separated by the sealing resin.

[0008] According to the present invention, it is possible to provide a wiring board capable of suppressing deterioration in characteristics due to heat generation in connection wiring between electronic components.

[0009] FIG. 1 is a top view schematically showing an example of a wiring board of the present invention. FIG. 2 is a cross-sectional view taken along line II-II in FIG. 1. FIG. 3 is a cross-sectional view schematically showing another example of a wiring board of the present invention. FIG. 4 is a top view schematically showing yet another example of a wiring board of the present invention. FIG. 5 is a cross-sectional view taken along line V-V of the wiring board shown in FIG. 4. FIG. 6 is a top view schematically showing yet another example of a wiring board of the present invention. FIG. 7 is a top view schematically showing yet another example of a wiring board of the present invention. FIG. 8 is a cross-sectional view taken along line VIII-VIII of the wiring board shown in FIG. 7. FIG. 9 is a cross-sectional view taken along line IX-IX of the wiring board shown in FIG. 7. FIG. 10 is a top view schematically showing yet another example of a wiring board of the present invention. FIG. 11 is a cross-sectional view taken along line XI-XI of the wiring board shown in FIG. 10. FIG. 12 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 13 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 14 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0010] The wiring board of the present invention will be described below. Note that the present invention is not limited to the following configurations and may be modified as appropriate within the scope of the present invention. In addition, a combination of multiple individual preferred configurations described below also constitutes the present invention.

[0011] The drawings shown below are schematic diagrams, and the dimensions, aspect ratio, and other scales may differ from those of the actual product. In the drawings, the same or equivalent parts will be designated by the same reference numerals. In addition, the same elements will be designated by the same reference numerals in each drawing, and duplicate explanations will be omitted.

[0012] In this specification, terms indicating the relationship between elements (e.g., "opposite," "orthogonal," etc.) and terms indicating the shape of elements not only mean the literal and strict form, but also mean a range that is substantially equivalent, for example, a range that includes a difference of about a few percent.

[0013] The following embodiments are merely examples, and it goes without saying that partial substitution or combination of the configurations shown in different embodiments is possible. In the description of each embodiment, descriptions of matters common to the previously described embodiments will be omitted, and only differences will be described. In particular, similar effects resulting from similar configurations will not be mentioned in each embodiment.

[0014] [Wiring Board] The wiring board of the present invention is a wiring board comprising: a substrate having a first main surface and a second main surface opposing each other in a thickness direction; a first electronic component mounted on the first main surface side of the substrate; a second electronic component mounted on the second main surface side of the substrate; a first connecting conductor extending in the thickness direction and connecting the first electronic component and the second electronic component; and a sealing resin that seals the periphery of the substrate, the first electronic component, the second electronic component, and the first connecting conductor, wherein the substrate has, when viewed in the thickness direction, a first region in which signal wiring is arranged, and the first region and the first connecting conductor are separated by the sealing resin.

[0015] Fig. 1 is a top view schematically showing an example of a wiring board of the present invention, and Fig. 2 is a cross-sectional view taken along line II-II in Fig. 1.

[0016] The substrate 10 has a first main surface 10a and a second main surface 10b that face each other in the thickness direction (the direction indicated by the arrow Z in FIG. 2), a first side surface 10c and a second side surface 10d that face each other in the length direction (the direction indicated by the arrow X in FIGS. 1 and 2) that is perpendicular to the thickness direction Z, and a third side surface 10e and a fourth side surface 10f that face each other in the width direction (the direction indicated by the arrow Y in FIG. 1) that is perpendicular to the thickness direction Z and the length direction X.

[0017] The substrate 10 may be a printed circuit board (also called a p-board) or a low-temperature co-fired ceramic (LTCC) substrate. Alternatively, the substrate 10 may be a resin multilayer substrate in which copper foil wiring is formed on a thermoplastic resin (e.g., polyetheretherketone (PEEK), polyimide (PI), or liquid crystal polymer (LCP)). A low-temperature co-fired ceramic (LTCC) substrate is a substrate formed by laminating insulating layers made of low-temperature co-fired ceramic (LTCC) material and having wiring (signal wiring) inside.

[0018] Low-temperature co-fired ceramic materials are ceramic materials that can be fired at temperatures of 1000°C or less and can be co-fired with Au, Ag, Cu, etc., which have low resistivity. Specific examples of low-temperature co-fired ceramic materials include glass composite low-temperature co-fired ceramic materials obtained by mixing ceramic powders such as alumina, zirconia, magnesia, and forsterite with borosilicate glass; ZnO-MgO-Al ２ O ３ -SiO ２ Glass-ceramic low-temperature fired ceramic material using BaO-Al ２ O ３ -SiO ２ Ceramic powder and Al ２ O ３ -CaO-SiO ２ -MgO-B ２ O ３ Examples of suitable ceramic materials include non-glass-based low-temperature fired ceramic materials using ceramic powders.

[0019] The signal wiring may be made of Cu, Ag, Au or the like.

[0020] As shown in Figures 1 and 2, the wiring board 1 has a substrate 10, a first electronic component 20 mounted on a first main surface 10a side of the substrate 10, and a second electronic component 30 mounted on a second main surface 10b side of the substrate 10.

[0021] The first electronic component 20 may be a semiconductor chip (die) manufactured by a semiconductor process. Examples of the die include integrated circuits (ICs) such as power amplifiers (PAs) and low noise amplifiers (LNAs). The first electronic component 20 may also be an active component such as a diode, or a passive component such as a capacitor, coil, or filter. Of these, a PA is preferred.

[0022] A plurality of first electronic components 20 may be mounted on the first main surface 10 a side of the substrate 10 .

[0023] The second electronic component 30 may be a semiconductor chip (die) manufactured by a semiconductor process. Examples of the die include an IC such as a PAC (Power Amplifier Controller). The die may also be a high-density silicon capacitor (also called a DTC: Deep Trench Capacitor) manufactured using a semiconductor MOS process, or a chiplet (a portion of a large-area die divided by function). The second electronic component 30 may also be an active component such as a diode, or a passive component such as a capacitor, coil, or filter. The filter may be a SAW (Surface Acoustic Wave) filter, a BAW (Bulk Acoustic Wave) filter, or the like.

[0024] A plurality of second electronic components 30 may be mounted on the second main surface 10b side of the substrate 10.

[0025] A preferred combination of the first electronic component and the second electronic component is, for example, a combination in which the first electronic component is a PA and the second electronic component is a PAC.

[0026] The first electronic component 20 and the second electronic component 30 are connected by a first connecting conductor 40 that is a conductor extending in the thickness direction Z.

[0027] The first connecting conductor 40 connects the first electronic component 20 and the second electronic component 30, allowing a larger current to flow than when connecting via signal wiring on a substrate. Therefore, the first connecting conductor 40 can be suitably used as a power supply wiring. It can also be used for shielding purposes and heat dissipation.

[0028] There may be a plurality of first connection conductors 40 .

[0029] The material forming the first connecting conductor 40 is preferably a metal such as copper, silver, gold, or aluminum.

[0030] The shape of the first connecting conductor 40 is not particularly limited as long as it extends in the thickness direction Z, but is preferably, for example, a columnar shape extending in the thickness direction Z. The columnar shape includes both a cylindrical shape and a prismatic shape. Therefore, the outer shape of the first connecting conductor may be a cylindrical shape or a prismatic shape. For example, the first connecting conductor 40 is a prismatic metal pin.

[0031] The cross-sectional area of ​​the first connecting conductor 40 is preferably larger than the cross-sectional area of ​​the signal wiring. If the cross-sectional area of ​​the first connecting conductor 40 varies in the thickness direction, the smallest cross-sectional area is taken as the cross-sectional area of ​​the first connecting conductor.

[0032] The cross-sectional area of ​​the first connecting conductor 40 is 490 μm ２ Above, 32000μm ２ It is preferable that:

[0033] The first connection conductor may be, for example, a metal pin or a bump.

[0034] The substrate 10 has a first region A1. The first region A1 is a region where signal wiring (not shown) is arranged when viewed from the thickness direction of the substrate 10. The first region A1 is indicated by the region surrounded by a dashed line in Fig. 1 and by a double-headed arrow in Fig. 2.

[0035] Signal wiring is a normal wiring provided on a substrate, and is mainly used to transmit electrical signals. Signal wiring usually has a cross-sectional area of ​​20 μm. ２ More than 4000 μm ２ The cross-sectional area of ​​a general signal wiring means the cross-sectional area of ​​the wiring portion (in-plane conductor) excluding the via portion.

[0036] In the first area A1 of the substrate 10, wiring other than signal wiring, for example, GND wiring and power supply wiring, may be provided.

[0037] The ratio of the area of ​​the first region A1 to the area of ​​the substrate 10 is preferably 50% or more and 95% or less.

[0038] The substrate 10 , the first electronic component 20 , the second electronic component 30 , and the first connecting conductor 40 are sealed with a sealing resin 65 .

[0039] The resin layer formed by the sealing resin 65 that covers the first main surface 10 a of the substrate 10 and the periphery of the first electronic component 20 is also referred to as a first resin layer 61 .

[0040] The top surface of the first resin layer 61 constitutes the first main surface 1 a of the wiring substrate 1 .

[0041] The resin layer formed by the sealing resin 65 that covers the second main surface 10 b of the substrate 10 and the periphery of the second electronic component 30 is also referred to as a second resin layer 62 .

[0042] The bottom surface of the second resin layer 62 forms the bottom surface 1 b of the wiring substrate 1 .

[0043] The type of resin constituting the sealing resin 65 is not particularly limited, but examples thereof include epoxy resin, etc. The sealing resin 65 may contain additives such as fillers in addition to the above resins.

[0044] The second resin layer 62 may have a through conductor 80 that penetrates the second resin layer 62 in the thickness direction Z. The through conductor 80 allows the electrode exposed on the second main surface 10b of the substrate 10 to be drawn to the bottom surface 1b of the wiring board 1 (the bottom surface of the second resin layer 62).

[0045] A fifth electronic component 74 may be mounted on the first main surface 10a and / or the second main surface 10b of the substrate 10. Examples of the fifth electronic component 74 include passive components such as capacitors, coils, and filters. The fifth electronic component 74 is an electronic component mounted on the first main surface 10a and / or the second main surface 10b of the substrate 10, and is an electronic component other than the first electronic component 20 and the second electronic component 30 described above.

[0046] When a fifth electronic component 74 is mounted on the substrate 10 , it is preferable that the periphery of the fifth electronic component 74 is also sealed with the sealing resin 65 .

[0047] The substrate 10 may be provided with a cavity 50. The cavity 50 is a bottomless cavity that penetrates the substrate 10 from the first main surface 10a to the second main surface 10b.

[0048] The first connecting conductor 40 may be disposed within the cavity 50 .

[0049] When the first connecting conductor 40 is disposed in the cavity 50, it is preferable that the cavity 50 be filled with a sealing resin 65. This allows the periphery of the first connecting conductor 40 to be sealed with the sealing resin 65.

[0050] When the first connecting conductor 40 is disposed in the cavity 50, it is preferable that the first region A1 and the first connecting conductor 40 are separated by a sealing resin 65 disposed in the cavity 50. When the first connecting conductor 40 and the first region A1 are separated by the sealing resin 65, the signal wiring disposed in the first region A1 is less susceptible to the effects of heat generated by the first connecting conductor 40.

[0051] When there are a plurality of first connection conductors 40 as in the wiring board 1, it is preferable that all of the first connection conductors 40 are separated from the first region A1 by the sealing resin 65.

[0052] It is preferable that both the first electronic component 20 and the second electronic component 30 straddle the first region A1 and the region in which the first connecting conductor 40 is arranged when viewed in the thickness direction Z.

[0053] When viewed from the thickness direction, the cavity may be exposed on one, two, or three sides of the outer shape of the substrate. The cavity 50 provided in the wiring substrate 1 is exposed on two sides (the first side surface 10c and the fourth side surface 10f) of the outer shape of the substrate 10.

[0054] When a cavity is formed in a substrate, an area around the cavity is created where internal wiring or electronic components cannot be installed due to manufacturing errors, etc. This area is called a dead area (also called a margin area). If the cavity is exposed on one, two, or three sides of the substrate's outer shape, the dead area can be reduced. In addition, a shielding film can be used on the exposed surface of the substrate, which reduces the area where the compartment shield is formed.

[0055] The greater the number of exposed sides of the cavity, the greater the effect of reducing the dead area and the area where the compartment shield is formed.

[0056] The sides of the external shape of the board are determined by the positional relationship between the side surfaces of the board constituting the wiring board, the side surfaces of the resin layer, and the electronic components mounted on the board. Specifically, if the board is exposed on the side surface of the wiring board excluding the shielding film, the sides formed by the board are considered to be the sides of the external shape of the board. Also, if there is a notch on the side surface of the board, the side surface of the board as if the notch did not exist is considered to be the side of the external shape of the board.

[0057] On the other hand, if a resin layer, rather than the substrate, is exposed on the side of the wiring board excluding the shielding film (i.e., if the side of the resin layer protrudes outward from the side of the substrate), the side of the resin layer is considered to be a side in the external shape of the substrate.

[0058] A shielding film may be provided on the top surface and side surfaces of the first resin layer 61. When a shielding film is provided, the first resin layer 61 may be provided with a through conductor that penetrates the first resin layer 61 in the thickness direction. The through conductor allows internal wiring (e.g., ground wiring) of the substrate to be connected to the shielding film. Shielding films may also be provided on the side surfaces (first side surface 10c, second side surface 10d, third side surface 10e, and fourth side surface 10f) of the substrate 10 and the side surfaces of the second resin layer 62.

[0059] Hereinafter, another example of the wiring board of the present invention will be described with reference to FIGS.

[0060] An example of a wiring board in which the first connection conductors are formed of bumps will be described with reference to FIG.

[0061] FIG. 3 is a cross-sectional view schematically showing another example of the wiring board of the present invention.

[0062] The wiring board 2 shown in Figure 3 has a substrate 10, a first electronic component 20 mounted on a first main surface 10a of the substrate 10, a second electronic component 30 mounted on a second main surface 10b of the substrate 10, and a first connecting conductor 42 connecting the first electronic component 20 and the second electronic component 30.

[0063] The first connecting conductor 42 is composed of a plurality of bumps 42 a, 42 b. The bumps 42 a are provided on the surface of the first electronic component 20 , and the bumps 42 b are provided on the surface of the second electronic component 30 .

[0064] The first region A2 of the substrate 10 and the first connection conductor 42 are separated by a sealing resin 65 disposed in the cavity 50 .

[0065] Fig. 4 is a top view schematically showing yet another example of the wiring board of the present invention, and Fig. 5 is a cross-sectional view taken along line VV of the wiring board shown in Fig. 4.

[0066] The wiring board 3 shown in Figures 4 and 5 has a substrate 10, a first electronic component 20 mounted on a first main surface 10a of the substrate 10, a second electronic component 30 mounted on a second main surface 10b of the substrate 10, and three first connecting conductors 41 connecting the first electronic component 20 and the second electronic component 30.

[0067] The first connection conductor 41 is a cylindrical metal pin extending in the thickness direction Z.

[0068] 5, a low thermal conductive layer 45 is provided on the side surface of the columnar first connecting conductor 41. By providing the low thermal conductive layer 45 on the side surface of the columnar first connecting conductor 41, the diffusion of heat from the first connecting conductor 41 to the first region A3 is further suppressed, and the influence of heat on the signal wiring can be further reduced.

[0069] The thermal conductivity of the low thermal conductive layer 45 is lower than that of the first connecting conductor 41. The low thermal conductive layer 45 may be made of a material having a lower thermal conductivity than the first connecting conductor 41, such as a resin. The low thermal conductive layer 45 may also have pores. Pores reduce the thermal conductivity. The thermal conductivity of the low thermal conductive layer 45 is preferably lower than that of the sealing resin separating the first connecting conductor 41 and the first region A3.

[0070] The low thermal conductive layer 45 may be, for example, a layer containing resin. The resin constituting the low thermal conductive layer 45 may be a porous resin containing pores. The resin constituting the low thermal conductive layer 45 may contain a filler, but the filler content is preferably lower than the filler content of the sealing resin separating the first connecting conductor 41 and the first region A3.

[0071] The thickness of the low thermal conductive layer 45 is preferably, for example, 10 μm or more and 200 μm or less. However, the thickness of the low thermal conductive layer 45 is defined as the thickness of the low thermal conductive layer 45 that passes through when connecting the first connecting conductor 41 and the first region A3 over the shortest distance. For example, in the wiring board 3 shown in FIG. 5 , the length in the longitudinal direction X of the low thermal conductive layer 45 adjacent to the sealing resin 65 that separates the first region A3 and the first connecting conductor 41 corresponds to the thickness of the low thermal conductive layer 45.

[0072] When there are a plurality of first connection conductors 41, the low thermal conductive layer 45 may cover the side surfaces of the plurality of first connection conductors 41 collectively or individually.

[0073] FIG. 6 is a top view schematically showing still another example of the wiring board of the present invention.

[0074] The wiring board 4 shown in FIG. 6 corresponds to the wiring board 3 shown in FIGS. 4 and 5, except that the shape of the cavity and the shapes and number of the first connecting conductors are changed.

[0075] In the wiring substrate 4, the cavity 50 is exposed on three sides of the outer shape of the substrate 10 (the first side surface 10c, the third side surface 10e, and the fourth side surface 10f).

[0076] The first electronic component 20 and the second electronic component 30 are connected by five first connecting conductors 41. A low thermal conductive layer 45 is provided on the side surface of each of the first connecting conductors 41. The low thermal conductive layer 45 covers the side surfaces of all five of the first connecting conductors 41.

[0077] The first region A4 and the five first connection conductors 41 are separated from each other by a sealing resin 65 .

[0078] Fig. 7 is a top view schematically showing yet another example of the wiring board of the present invention. Fig. 8 is a cross-sectional view of the wiring board shown in Fig. 7 taken along line VIII-VIII. Fig. 9 is a cross-sectional view of the wiring board shown in Fig. 7 taken along line IX-IX.

[0079] The wiring board 5 shown in Figures 7, 8, and 9 corresponds to the wiring board 4 shown in Figure 6 in which the shape of the second electronic component is changed and one of the five first connecting conductors is changed to a second connecting conductor.

[0080] 8 , a second connecting conductor 48 is provided in the second resin layer 62 and cavity 50 of the wiring board 5, penetrating the sealing resin 65 in the thickness direction from the bottom surface of the first electronic component 20 toward the bottom surface 5 b of the wiring board 5. The second connecting conductor 48 is a connecting conductor for external connection, and a power supply current can be supplied to the first electronic component 20 from the outside via the second connecting conductor 48.

[0081] As shown in FIG. 9 , the first electronic component 20 and the second electronic component 30 are connected by four first connecting conductors 41 .

[0082] In addition to separating the first region A5 from the four first connecting conductors, the first region A5 and one second connecting conductor are also preferably separated by the sealing resin 65. When the first region A5 and the second connecting conductor 48 are separated by the sealing resin 65, heat from the second connecting conductor 48 is less likely to affect the signal wiring.

[0083] Fig. 10 is a top view schematically showing yet another example of the wiring board of the present invention, and Fig. 11 is a cross-sectional view taken along line XI-XI of the wiring board shown in Fig. 10.

[0084] As shown in FIGS. 10 and 11, the wiring board 6 includes a substrate 10, a first electronic component 20, a second electronic component 30, and a first connecting conductor 41 that connects the first electronic component 20 and the second electronic component.

[0085] The substrate 10 has two slits 55 penetrating the substrate 10 in the thickness direction Z. In the substrate 10 shown in FIG. 10 , one slit 55 extends from near the fourth side surface 10f of the substrate 10 toward the third side surface 10e to a position that is approximately 50% of the width of the substrate 10 in the width direction Y, and the other slit 55 extends from near the first side surface 10c of the substrate 10 toward the second side surface 10d to a position that is approximately 15% of the length of the substrate 10 in the length direction X. This divides the substrate 10 into a portion (right portion) that is approximately 15% of the width of the half of the substrate 10 on the fourth side surface 10f side (the lower half in FIG. 10 ) on the first side surface 10c side in the length direction X, and the remaining portion (left portion). The left portion divided by the slit 55 is a first region A6.

[0086] Three first connecting conductors 41 are arranged in the right-hand portion partitioned by the slit 55. The first connecting conductors 41 are not directly sealed with the sealing resin 65, but since the sealing resin 65 is filled in the slit 55 near the first connecting conductors 41, it can be said that the periphery of the first connecting conductors 41 is sealed with the sealing resin 65. The sealing resin 65 does not have to be in direct contact with the first connecting conductors 41.

[0087] The first region A6 and the first connection conductor 41 are separated by a sealing resin 65 disposed in the slit 55 .

[0088] The first connection conductor 41 may be a metal pin inserted into a hole drilled in the substrate 10, or may be a hole drilled in the substrate 10 filled with a conductive material.

[0089] 12 is a cross-sectional view schematically illustrating another example of a wiring board according to the present invention. The wiring board 7 shown in FIG. 12 has one first connecting conductor 41 and one third electronic component 70 disposed within a cavity 50.

[0090] The third electronic component 70 may be an active component such as a diode or an IC, or a passive component such as a capacitor, a coil, or a filter. The third electronic component 70 may also be a semiconductor chip (die) manufactured by a semiconductor process. Examples of the die include an IC such as a PA or an LNA. The filter may also be a SAW filter or a BAW filter.

[0091] The third electronic component 70 is disposed at a position overlapping the first electronic component 20 in the thickness direction Z, and is connected to the first electronic component 20 .

[0092] By connecting the third electronic component 70 to the first electronic component 20, the position of the third electronic component 70 within the cavity 50 is fixed, and electrical connection with the substrate 10 is ensured. Note that the connection between the third electronic component and the first electronic component may be such that the electrodes of the respective electronic components are directly connected via solder, or such that the electrodes of one of the electronic components have solder bumps and the electrodes are connected via the solder bumps.

[0093] Mounting refers to the state in which an electronic component is fixed to a substrate without any other electronic components in between, thereby enabling the electronic component to perform its function. Therefore, an electronic component fixed in a cavity 50 via a first electronic component 20 mounted on the first main surface 10a of the substrate 10, such as the third electronic component 70 shown in Figure 13, is not said to be mounted on the substrate 10, but rather to be housed in the cavity 50.

[0094] When a third electronic component 70 (die) connects multiple first electronic components 20 (dies) mounted on the first main surface 10a of the substrate 10, the third electronic component 70 is also referred to as a bridge die. The third electronic component 70 may be a bridge die. Examples of bridge dies include high-density silicon capacitors (also called deep trench capacitors (DTCs)) manufactured using a semiconductor MOS process. The first electronic component 20 combined with the DTC may be a chiplet. When the first electronic component 20 is an IC and the third electronic component 70 is an IC, a stack structure is formed in which the ICs are stacked on top of each other.

[0095] The first region A7 of the substrate 10 and the first connection conductor 41 are separated by a sealing resin 65 disposed in the cavity 50 .

[0096] Fig. 13 is a cross-sectional view schematically showing another example of a wiring board according to the present invention. The wiring board 8 shown in Fig. 13 has two first connecting conductors 41 and a third electronic component 70 disposed in a cavity 50. The third electronic component 70 is disposed at a position overlapping the first electronic component 20 in the thickness direction, and is connected to the first electronic component 20.

[0097] 13 , the first region A8 is disposed at both ends of the cavity 50 in the longitudinal direction X. Therefore, the first region A8 and the first connecting conductor 41 are separated from each other by the sealing resin 65 disposed in the cavity 50.

[0098] The first connecting conductor 41 and the third electronic component 70 are also separated by the sealing resin 65. This makes it possible to prevent the heat of the first connecting conductor 41 from affecting the third electronic component 70.

[0099] 14 is a cross-sectional view schematically illustrating another example of a wiring board according to the present invention. In the wiring board 9 shown in FIG. 14, one first connecting conductor 41, a third electronic component 70, and a fourth electronic component 72 are arranged within a cavity 50.

[0100] The third electronic component 70 is disposed at a position overlapping the first electronic component 20 in the thickness direction Z, and is connected to the first electronic component 20 .

[0101] The fourth electronic component 72 is disposed at a position overlapping the second electronic component 30 in the thickness direction Z, and is connected to the second electronic component 30 .

[0102] By connecting the fourth electronic component 72 to the second electronic component 30, the position of the fourth electronic component 72 within the cavity 50 is fixed and electrical connection with the substrate 10 is ensured. Note that the connection between the fourth electronic component and the second electronic component may be such that the electrodes of the respective electronic components are directly connected via solder, or such that the electrodes of one of the electronic components have solder bumps and the electrodes are connected via the solder bumps.

[0103] The third electronic component 70 and the fourth electronic component 72 are housed in the cavity 50 .

[0104] Examples of the fourth electronic component 72 include active components such as diodes and ICs, and passive components such as capacitors, coils, and filters. The fourth electronic component 72 may also be a semiconductor chip (die) manufactured by a semiconductor process. Examples of dies include ICs such as PAs and LNAs.

[0105] When a fourth electronic component 72 (die) connects multiple second electronic components 30 (dies) mounted on the second main surface 10b of the substrate 10, the fourth electronic component 72 is also referred to as a bridge die. The fourth electronic component 72 may be a bridge die. An example of a bridge die is a DTC. The second electronic component 30 combined with the DTC may be a chiplet. When the second electronic component 30 is an IC and the fourth electronic component 72 is an IC, a stack structure is formed in which the ICs are stacked on top of each other.

[0106] The third electronic component 70 and the fourth electronic component 72 may be in contact with each other in the thickness direction, or may be spaced apart from each other.

[0107] The first region A9 and the first connection conductor 41 are separated by a sealing resin 65 .

[0108] In addition, the first connecting conductor 41 is also separated from the third electronic component 70 and the fourth electronic component 72 by the sealing resin 65. This also makes it possible to prevent the heat of the first connecting conductor 41 from affecting the third electronic component 70 and the fourth electronic component 72.

[0109] This specification describes the following:

[0110] The present disclosure (1) provides a wiring board comprising: a substrate having a first main surface and a second main surface opposing each other in a thickness direction; a first electronic component mounted on the first main surface side of the substrate; a second electronic component mounted on the second main surface side of the substrate; a first connecting conductor extending in the thickness direction and connecting the first electronic component and the second electronic component; and a sealing resin that seals the periphery of the substrate, the first electronic component, the second electronic component, and the first connecting conductor, wherein the substrate has a first region in which signal wiring is arranged when viewed from the thickness direction, and the first region and the first connecting conductor are separated by the sealing resin.

[0111] The present disclosure (2) is the wiring board according to the present disclosure (1), in which the first connection conductor is a metal pin.

[0112] The present disclosure (3) is the wiring board according to the present disclosure (1), in which the first connection conductor is a bump.

[0113] The present disclosure (4) is a wiring board in any combination with any of the present disclosures (1) to (3), in which the cross-sectional area of ​​the first connection conductor is larger than the cross-sectional area of ​​the signal wiring.

[0114] The present disclosure (5) is a wiring board in any combination with any of the present disclosures (1) to (4), in which the first connecting conductor is columnar and extends in the thickness direction, and a low thermal conductivity layer is formed on the side surface of the first connecting conductor.

[0115] The present disclosure (6) is a wiring board in any combination with any of the present disclosures (1) to (5), in which the first electronic component further comprises a second connecting conductor for external connection, and when viewed in the thickness direction, the first region and the second connecting conductor are separated by the sealing resin.

[0116] The present disclosure (7) is a wiring board in any combination with any of the present disclosures (1) to (6), in which the substrate has a slit penetrating the substrate in the thickness direction, and the first region and the first connection conductor are separated by the sealing resin disposed in the slit.

[0117] The present disclosure (8) is a wiring board in any combination with any of the present disclosures (1) to (6), wherein the substrate has a cavity penetrating from the first main surface to the second main surface of the substrate, the first connecting conductor is disposed in the cavity, and the first region and the first connecting conductor are separated by the sealing resin disposed in the cavity.

[0118] The present disclosure (9) is the wiring board according to the present disclosure (8), wherein the cavity further accommodates a third electronic component, the third electronic component is positioned so as to overlap the first electronic component when viewed in the thickness direction, and the third electronic component and the first electronic component are connected to each other.

[0119] The present disclosure (10) is the wiring board according to the present disclosure (8) or (9), wherein the cavity further accommodates a fourth electronic component, the third electronic component and the fourth electronic component overlap in the thickness direction within the cavity, the second electronic component is positioned so as to overlap the fourth electronic component when viewed from the thickness direction, and the second electronic component and the fourth electronic component are connected.

[0120] The present disclosure (11) is a wiring board in any combination with any of the present disclosures (8) to (10), in which the cavity is exposed to one side, two sides, or three sides of the outer shape of the board when viewed from the thickness direction.

[0121] 1, 2, 3, 4, 5, 6, 7, 8, 9 Wiring board 1a Top surface of wiring board 1b, 5b Bottom surface of wiring board 10 Substrate 10a First main surface of substrate 10b Second main surface of substrate 10c First side surface of substrate 10d Second side surface of substrate 10e Third side surface of substrate 10f Fourth side surface of substrate 20 First electronic component 30 Second electronic component 40 First connecting conductor (cylindrical metal pin) 41 First connecting conductor (rectangular metal pin) 42 First connecting conductor formed of bump 42a, 42b Bump 45 Low thermal conductivity layer 48 Second connecting conductor (connecting conductor for external connection) 50 Cavity 55 Slit 61 First resin layer 62 Second resin layer 65 Sealing resin 70 Third electronic component 72 Fourth electronic component 74 Electronic component 80 Through conductor A1, A2, A3, A4, A5, A6, A7, A8, A9 1st region

Claims

1. A wiring board comprising: a substrate having a first main surface and a second main surface opposing each other in a thickness direction; a first electronic component mounted on the first main surface side of the substrate; a second electronic component mounted on the second main surface side of the substrate; a first connecting conductor extending in the thickness direction and connecting the first electronic component and the second electronic component; and a sealing resin that seals the periphery of the substrate, the first electronic component, the second electronic component, and the first connecting conductor, wherein, when viewed in the thickness direction, the substrate has a first region in which signal wiring is arranged, and the first region and the first connecting conductor are separated by the sealing resin.

2. The wiring board according to claim 1, wherein said first connecting conductor is a metal pin.

3. The wiring board according to claim 1, wherein the first connection conductor is a bump.

4. The wiring board according to any one of claims 1 to 3, wherein the cross-sectional area of ​​the first connection conductor is larger than the cross-sectional area of ​​the signal wiring.

5. A wiring board according to any one of claims 1 to 4, wherein the first connecting conductor is columnar and extends in the thickness direction, and a low thermal conductivity layer is formed on the side surface of the first connecting conductor.

6. A wiring board according to any one of claims 1 to 5, wherein the first electronic component further comprises a second connecting conductor for external connection, and when viewed in the thickness direction, the first region and the second connecting conductor are separated by the sealing resin.

7. A wiring board according to any one of claims 1 to 6, wherein the substrate has a slit penetrating the substrate in the thickness direction, and the first region and the first connection conductor are separated by the sealing resin disposed in the slit.

8. A wiring board according to any one of claims 1 to 6, wherein the substrate has a cavity that penetrates from the first main surface to the second main surface of the substrate, the first connecting conductor is disposed within the cavity, and the first region and the first connecting conductor are separated by the sealing resin disposed within the cavity.

9. The wiring board according to claim 8, wherein the cavity further accommodates a third electronic component, the third electronic component is positioned so as to overlap the first electronic component when viewed in the thickness direction, and the third electronic component and the first electronic component are connected.

10. A wiring board as described in claim 8 or 9, wherein the cavity further accommodates a fourth electronic component, the third electronic component and the fourth electronic component overlap in the thickness direction within the cavity, the second electronic component is positioned so as to overlap the fourth electronic component when viewed from the thickness direction, and the second electronic component and the fourth electronic component are connected.

11. The wiring board according to any one of claims 8 to 10, wherein the cavity is exposed on one, two or three sides of the outer shape of the board when viewed from the thickness direction.

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