Wiring board

Abstract

A wiring board 1 is characterized by comprising: a substrate 10 having a first principal surface 10a and a second principal surface 10b facing each other in the thickness direction; a first electronic component 20 mounted on the first principal surface 10a side of the substrate 10; a first cavity 30 opened to the first principal surface 10a of the substrate 10; a second electronic component 40 housed in the first cavity 30 and overlapping the first electronic component 20 when viewed from the thickness direction; and a third electronic component 50 mounted on the second principal surface 10b side of the substrate 10 and overlapping the first electronic component 20 when viewed from the thickness direction, wherein the second electronic component 40 and the third electronic component 50 are both connected in parallel with the first electronic component 20, and at least parts of the second electronic component 40 and the third electronic component 50 overlap each other when viewed from the thickness direction.

Description

wiring board

[0001] The present invention relates to a wiring board.

[0002] As a method for realizing a low-profile module and high-density mounting, a method of providing a cavity inside a substrate and accommodating components in the cavity is known.

[0003] At this time, it is known that the longer the wiring length of the connection wiring connecting the components mounted on the module, the greater the noise and loss, and therefore, studies are being conducted to shorten the wiring length.

[0004] Patent Document 1 discloses a high-frequency module in which a chip inductor built into a mounting substrate and a first electronic component mounted on a first main surface of the mounting substrate are arranged to overlap in a plan view in order to shorten the wiring length.

[0005] Furthermore, Patent Document 2 discloses that, in order to reduce the height and ensure flatness of the module, a second electronic component built into a through hole in a core substrate and a first electronic component placed on the core substrate are positioned so that they overlap in the thickness direction.

[0006] International Publication No. WO 2022 / 124262 International Publication No. WO 2023 / 223952

[0007] However, the methods described in Patent Documents 1 and 2 only take into consideration the connection between two types of electronic components, and therefore have the problem that the wiring length cannot be shortened when the number of electronic components increases, resulting in increased noise and loss.

[0008] The present invention has been made to solve the above problems, and aims to provide a wiring board that can suppress noise and loss even when the number of electronic components is increased.

[0009] The wiring board of the present invention comprises a substrate having a first main surface and a second main surface opposing each other in a thickness direction, a first electronic component mounted on the first main surface side of the substrate, a first cavity opening to the first main surface of the substrate, a second electronic component housed in the first cavity and overlapping the first electronic component when viewed in the thickness direction, and a third electronic component mounted on the second main surface side of the substrate and overlapping the first electronic component when viewed in the thickness direction, wherein the second electronic component and the third electronic component are both connected in parallel with the first electronic component, and at least a portion of the second electronic component and the third electronic component overlap each other when viewed in the thickness direction.

[0010] According to the present invention, it is possible to provide a wiring board that can suppress noise and loss even when the number of electronic components is increased.

[0011] FIG. 1 is a cross-sectional view schematically showing an example of a wiring board of the present invention. FIG. 2 is a cross-sectional view schematically showing another example of a wiring board of the present invention. FIG. 3 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 4 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 5 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 6 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 7 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 8 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 9 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 10 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention. FIG. 11 is a cross-sectional view schematically showing yet another example of a wiring board of the present invention.

[0012] The wiring board of the present invention will be described below. Note that the present invention is not limited to the following configurations and may be modified as appropriate within the scope of the present invention. In addition, a combination of multiple individual preferred configurations described below also constitutes the present invention.

[0013] The drawings shown below are schematic diagrams, and the dimensions, aspect ratio, and other scales may differ from those of the actual product. In the drawings, the same or equivalent parts will be designated by the same reference numerals. In addition, the same elements will be designated by the same reference numerals in each drawing, and duplicate explanations will be omitted.

[0014] In this specification, terms indicating the relationship between elements (e.g., "opposite," "orthogonal," etc.) and terms indicating the shape of elements not only mean the literal strict form, but also mean a range that is substantially equivalent, for example, a range that includes a difference of about a few percent.

[0015] The following embodiments are merely examples, and it goes without saying that partial substitution or combination of the configurations shown in different embodiments is possible. In the description of each embodiment, descriptions of matters common to the previously described embodiments will be omitted, and only differences will be described. In particular, similar effects resulting from similar configurations will not be mentioned in each embodiment.

[0016] [Wiring Board] The wiring board of the present invention comprises a substrate having a first main surface and a second main surface opposing each other in a thickness direction, a first electronic component mounted on the first main surface side of the substrate, a first cavity opening to the first main surface of the substrate, a second electronic component housed in the first cavity and overlapping the first electronic component when viewed in the thickness direction, and a third electronic component mounted on the second main surface side of the substrate and overlapping the first electronic component when viewed in the thickness direction, wherein the second electronic component and the third electronic component are both connected in parallel with the first electronic component, and at least a portion of the second electronic component and the third electronic component overlap each other when viewed in the thickness direction.

[0017] FIG. 1 is a cross-sectional view schematically showing an example of a wiring board according to the present invention.

[0018] The wiring board 1 shown in FIG. 1 includes a substrate 10 , a first electronic component 20 , a first cavity 30 , a second electronic component 40 , and a third electronic component 50 .

[0019] The substrate 10 has a first main surface 10a and a second main surface 10b that face each other in the thickness direction (the direction indicated by the arrow Z in FIG. 1 ), a first side surface and a second side surface that face each other in the length direction (the direction indicated by the arrow X in FIG. 1 ) that is perpendicular to the thickness direction Z, and a third side surface and a fourth side surface that face each other in the width direction (the direction indicated by the arrow Y in FIG. 1 ) that is perpendicular to the thickness direction Z and the length direction X.

[0020] The substrate 10 may be a printed circuit board (also called a p-board) or a low-temperature co-fired ceramic (LTCC) substrate. Alternatively, the substrate 10 may be a resin multilayer substrate in which copper foil wiring is formed on a thermoplastic resin (e.g., polyetheretherketone (PEEK), polyimide (PI), or liquid crystal polymer (LCP)). The low-temperature co-fired ceramic (LTCC) substrate is a substrate formed by laminating insulating layers made of low-temperature co-fired ceramic (LTCC) material and having wiring 15 (internal wiring) inside.

[0021] Low-temperature co-fired ceramic materials are ceramic materials that can be fired at temperatures of 1000°C or less and can be co-fired with Au, Ag, Cu, etc., which have low resistivity. Specific examples of low-temperature co-fired ceramic materials include glass composite low-temperature co-fired ceramic materials obtained by mixing ceramic powders such as alumina, zirconia, magnesia, and forsterite with borosilicate glass; ZnO-MgO-Al ２ O ３ -SiO ２ Glass-ceramic low-temperature fired ceramic material using BaO-Al ２ O ３ -SiO ２ Ceramic powder and Al ２ O ３ -CaO-SiO ２ -MgO-B ２ O ３ Examples of suitable ceramic materials include non-glass-based low-temperature fired ceramic materials using ceramic powders.

[0022] The internal wiring 15 may be made of Cu, Ag, Au or the like.

[0023] The first electronic component 20 is mounted on the first main surface 10 a side of the substrate 10 .

[0024] The first electronic component 20 may be a semiconductor chip (die) manufactured by a semiconductor process. Examples of the die include integrated circuits (ICs) such as a power amplifier (PA) or a low noise amplifier (LNA). The first electronic component 20 may also be an active component such as a diode, or a passive component such as a capacitor, a coil, or a filter. The first electronic component 20 may also be a semiconductor chip (die) manufactured by a semiconductor process. Examples of the die include integrated circuits (ICs) such as a power amplifier (PA) or a low noise amplifier (LNA).

[0025] Note that mounting on the first main surface 10a side of the substrate 10 includes both a state where the electronic component is mounted on the first main surface 10a of the substrate 10 and a state where the mounted electronic component is located on the first main surface side of the mounting surface. Therefore, the first electronic component 20 may be mounted on the first main surface 10a of the substrate 10. Furthermore, if a first cavity (described later) has a portion on the first main surface side that has a larger opening area than a portion where the second electronic component is accommodated, the first electronic component 20 may be mounted on the substrate in that portion.

[0026] A plurality of first electronic components 20 may be mounted on the first main surface 10 a side of the substrate 10 .

[0027] The first cavity 30 is a bottomed cavity that opens to the first main surface 10a of the substrate 10 and has a bottom on the second main surface 10b side.

[0028] The first cavity may be a bottomless cavity, which is a cavity that penetrates from the first main surface to the second main surface of the substrate.

[0029] The dimensions of the first cavity 30 can be adjusted appropriately to match the dimensions of the second electronic component to be housed therein.

[0030] The first cavity 30 accommodates a second electronic component 40 .

[0031] The second electronic component 40 may be a semiconductor chip (die) manufactured by a semiconductor process. Examples of the die include an integrated circuit (IC) such as a power amplifier controller (PAC). The die may also be a high-density silicon capacitor (also called a deep trench capacitor (DTC)) manufactured using a semiconductor MOS process. The second electronic component 40 may also be an active component such as a diode, or a passive component such as a capacitor, coil, or filter. The filter may be a surface acoustic wave (SAW) filter or a bulk acoustic wave (BAW) filter.

[0032] When a second electronic component 40 (die) connects multiple first electronic components 20 (dies) mounted on the first main surface 10a of the substrate 10, the second electronic component 40 is also referred to as a bridge die. The second electronic component 40 may be a bridge die. Examples of bridge dies include passive components such as DTCs. The first electronic component 20 combined with the DTC may be a chiplet (a portion of a large-area die divided by function).

[0033] The second electronic component 40 is disposed at a position overlapping the first electronic component 20 in the thickness direction Z, and is connected to the first electronic component 20. By connecting the second electronic component 40 to the first electronic component 20, the position of the second electronic component 40 within the first cavity 30 is fixed, and electrical connection with the substrate 10 is ensured. Note that the connection between the second electronic component and the first electronic component may be such that the electrodes of the respective electronic components are directly connected via solder, or such that the electrodes of one of the electronic components have solder bumps and the electrodes are connected to each other via the solder bumps.

[0034] Mounting refers to the state in which an electronic component is fixed to a substrate without the intervention of other electronic components, thereby enabling the electronic component to perform its function. Therefore, an electronic component fixed in a first cavity 30 via a first electronic component 20 mounted on a first main surface 10a of a substrate 10, such as the second electronic component 40 shown in Figure 1, is not said to be mounted on the substrate 10, but rather to be housed in the first cavity 30.

[0035] The third electronic component 50 is mounted on the second main surface 10b of the substrate 10. The third electronic component 50 is disposed in a position overlapping the first electronic component 20 when viewed from the thickness direction Z. Mounting the third electronic component 50 on the second main surface 10b of the substrate 10 includes both a state in which the third electronic component 50 is mounted on the second main surface 10b of the substrate 10 and a state in which the mounted third electronic component is located on the second main surface side of the mounting surface. Therefore, the third electronic component 50 may be mounted on the second main surface 10b of the substrate 10, or may be mounted on the substrate in a second portion of the first cavity or in the second cavity, which will be described later.

[0036] The third electronic component 50 may suitably be the same as the second electronic component 40. The third electronic component 50 may also be a bridge die. That is, a plurality of first electronic components 20 (dies) mounted on the first main surface 10a of the substrate 10 may be connected to each other by the third electronic component 50 (die). The third electronic component 50 may also be a filter such as a SAW filter or a BAW filter.

[0037] The third electronic component 50 is disposed so that at least a portion thereof overlaps with the second electronic component 40 when viewed in the thickness direction Z.

[0038] The first electronic component 20 has solder bumps on its surface and is connected to the second electronic component 40 via the solder bumps. The first electronic component 20 is also connected to internal wiring 15 in the substrate 10 via the solder bumps. Because the internal wiring 15 is connected to the third electronic component 50, it can be said that the first electronic component 20 is connected to the third electronic component 50 via the solder bumps and the internal wiring 15. Therefore, the second electronic component 40 and the third electronic component 50 are each connected in parallel to the first electronic component 20.

[0039] 1 , by arranging the second electronic component 40 and the third electronic component 50 as in wiring board 1, the length of the connection wiring connecting first electronic component 20 and second electronic component 40 and the length of the connection wiring connecting first electronic component 20 and third electronic component 50 can be shortened compared to when the first electronic component, second electronic component, and third electronic component are mounted on the first main surface of the board and the second electronic component and the third electronic component are connected in parallel to the first electronic component, respectively. Therefore, even if the number of electronic components is increased, noise and loss can be suppressed.

[0040] A preferred combination of the first electronic component 20, the second electronic component 40, and the third electronic component 50 is, for example, a combination in which the first electronic component 20 is a PA, the second electronic component 40 is a PAC, and the third electronic component 50 is a passive component such as a DTC. Another example is a combination in which the first electronic component 20 is a PA, and the second electronic component 40 and the third electronic component 50 are all passive components such as DTCs.

[0041] A fourth electronic component 60 may be mounted on the first main surface 10a and / or the second main surface 10b of the substrate 10. Examples of the fourth electronic component 60 include passive components such as capacitors, coils, and filters. The fourth electronic component 60 is an electronic component mounted on the first main surface 10a and / or the second main surface 10b side of the substrate 10, and is an electronic component other than the first electronic component 20 and the third electronic component 50 described above.

[0042] The first electronic component 20 and the fourth electronic component 60 mounted on the first main surface 10a of the substrate 10 may be sealed with a sealing resin 71. The sealing resin 71 may cover the entire first main surface 10a of the substrate 10 to form a resin layer 70. The upper surface of the resin layer 70 may constitute a part of the upper surface 1a of the wiring substrate 1.

[0043] The type of resin constituting the sealing resin 71 is not particularly limited, but examples thereof include epoxy resin, etc. The resin layer 80 may contain additives such as fillers in addition to the sealing resin 71.

[0044] A part of the sealing resin 71 may be present inside the first cavity 30 .

[0045] The sealing resin 71 covering the first main surface 10 a of the substrate 10 is also referred to as the first sealing resin 71 to distinguish it from the sealing resin covering the second main surface 10 b described below. The resin layer 70 formed by the first sealing resin 71 is also referred to as the first resin layer 70.

[0046] A shielding film may be formed on the surfaces (top surface and side surfaces) of the resin layer 70. When a shielding film is formed on the top surface of the resin layer 70, a through conductor may be provided in the resin layer 70, penetrating the resin layer 70 in the thickness direction Z and connecting the first main surface 10a of the substrate 10 to the shielding film. In addition, a shielding film may also be formed on the side surfaces of the substrate 10.

[0047] The third electronic component 50 and the fourth electronic component 60 mounted on the second main surface 10b of the substrate 10 may be sealed with a sealing resin 81. The sealing resin 81 may form a resin layer 80 covering the entire second main surface 10b of the substrate 10.

[0048] The sealing resin 81 covering the second main surface 10b of the substrate 10 is also referred to as the second sealing resin 81 to distinguish it from the sealing resin 71 covering the first main surface 10a. The resin layer formed by the second sealing resin 81 is also referred to as the second resin layer 80.

[0049] A shielding film may also be formed on the side surface of the second resin layer 80 as needed.

[0050] The second resin layer 80 may be provided with a through conductor 90 that penetrates the second resin layer 80 in the thickness direction Z and connects the second main surface 10 b of the substrate 10 and the bottom surface 1 b of the wiring board 1 .

[0051] Hereinafter, another example of the wiring board of the present invention will be described with reference to FIGS.

[0052] FIG. 2 is a cross-sectional view schematically showing another example of the wiring board of the present invention.

[0053] In the wiring board 2 shown in FIG. 2, the substrate 10 has a second cavity 35 that opens to the second main surface 10 b of the substrate 10 .

[0054] The third electronic component 50 may be mounted on the second main surface 10b side of the substrate 10 in the second cavity 35. By mounting the third electronic component 50 on the second main surface 10b side of the substrate 10 in the second cavity 35, the height of the entire wiring board can be reduced.

[0055] The third electronic component 50 is connected to the substrate 10 at the bottom surface 35 a of the second cavity 35 .

[0056] A part of the sealing resin 81 may be present in the second cavity 35 .

[0057] FIG. 3 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0058] The substrate 11 constituting the wiring substrate 3 shown in Figure 3 consists of a first substrate 110, a second substrate 120, an adhesive layer 130 that bonds the first substrate 110 and the second substrate 120, and a via 140 that connects the internal wiring 115 of the first substrate 110 and the internal wiring 125 of the second substrate 120.

[0059] In this case, the main surface on which the first substrate 110 is disposed becomes the first main surface 11a, and the main surface on which the second substrate 120 is disposed becomes the second main surface 11b.

[0060] The first cavity 30 may be a bottomless cavity provided in the first substrate 110. When the first cavity 30 is a bottomless cavity provided in the first substrate 110, the bottomless cavity of the first substrate 110 can be used as the first cavity as it is.

[0061] The second cavity 35 may be a bottomed cavity provided in the second substrate 120. When the second cavity 35 is a bottomed cavity provided in the second substrate 120, the third electronic component 50 can be mounted on the substrate 10 using an electrode provided on the bottom surface 35a of the second cavity 35. In this case, it can be said that the third electronic component 50 is mounted on the second main surface 11b side of the substrate 11.

[0062] FIG. 4 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0063] The wiring board 4A shown in FIG. 4 includes a substrate 10, a first electronic component 20, a first cavity 31, a second electronic component 40, and a third electronic component 50.

[0064] The first cavity 31 is a bottomless cavity that penetrates the substrate 10 from the first main surface 10a to the second main surface 10b.

[0065] The planar dimension of the third electronic component 50 (length L3 in the X direction in FIG. 4 ) may be larger (longer) than the planar dimension of the second electronic component 40 (length L2 in the X direction in FIG. 4 ) and smaller (shorter) than the planar dimension of the first electronic component 20 (length L1 in the X direction in FIG. 4 ).

[0066] It is preferable that the planar dimensions of both the second electronic component 40 and the third electronic component 50 are smaller than the planar dimensions of the first electronic component 20. It is also preferable that the sum of the planar dimensions of the second electronic component 40 and the third electronic component 50 is larger than the planar dimensions of the first electronic component 20. Satisfying these conditions not only shortens the wiring length between the first electronic component 20 and the second electronic component 40 and the wiring length between the first electronic component 20 and the third electronic component 50, but also contributes to reducing the area of ​​the wiring board.

[0067] 5 is a cross-sectional view schematically illustrating another example of a wiring board according to the present invention. In the wiring board 4B shown in FIG. 5, second electronic components 41 and 42 are housed in the same first cavity 31. The two second electronic components 41 and 42 do not overlap in the thickness direction Z, but are arranged adjacent to each other in a direction (plane direction) perpendicular to the thickness direction Z. In other words, a plurality of second electronic components 41 and 42 may be housed in the first cavity 31.

[0068] The plurality of second electronic components 41 and 42 are all connected to the first electronic component 20 .

[0069] FIG. 6 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0070] In the wiring substrate 5A shown in Figure 6, the first cavity 32 is a multi-stage cavity consisting of a first portion 32A that opens to the first main surface 10a side of the substrate 10 and a second portion 32B that opens to the second main surface 10b side.

[0071] The third electronic component 50 may be mounted on the second main surface 10 b side of the substrate 10 in the second portion 32B of the first cavity 32 .

[0072] The opening area of ​​the second portion 32B is larger than the opening area of ​​the first portion 32A. Therefore, a bottom surface 32Ba of the second portion 32B is exposed on the second main surface 10b side of the substrate 10. In this case, the third electronic component 50 mounted on the substrate 10 at the bottom surface 32Ba of the second portion 32B is located on the second main surface 10b side of the mounting surface (the bottom surface 32Ba of the second portion 32B), and can be said to be mounted on the second main surface 10b side of the substrate 10.

[0073] FIG. 7 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0074] In the wiring board 5B shown in Figure 7, two second electronic components 41, 42 are accommodated in the first portion 32A of the first cavity 32, and a third electronic component 50 is mounted on the second main surface 10b side of the substrate 10 in the second portion 32B.

[0075] The third electronic component 50 is mounted on the substrate 10 at the bottom surface 32Ba of the second portion 32B of the first cavity 32 .

[0076] 8 is a cross-sectional view schematically illustrating yet another example of a wiring board according to the present invention. In the wiring board 6 shown in FIG. 8, a plurality of third electronic components 51 and 52 are mounted on the second main surface 10b of the substrate 10.

[0077] Both of the third electronic components 51 and 52 are connected to the first electronic component 20 via the internal wiring 15 of the substrate 10 .

[0078] FIG. 9 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0079] The wiring board 7A shown in FIG. 9 includes two second cavities 36 and 37 that open to the second main surface 10b of the substrate 10.

[0080] The two third electronic components 51, 52 are connected to the substrate 10 in different second cavities 36, 37. The third electronic components 51, 52 are located closer to the second main surface 10b than the mounting surfaces (bottom surfaces 36a, 37a of the second cavities 36, 37), respectively. Therefore, it can be said that both the third electronic components 51, 52 are mounted on the second main surface 10b side of the substrate 10 in the second cavities 36, 37.

[0081] Both of the two third electronic components 51 and 52 are connected to the first electronic component 20 via the internal wiring 15 of the substrate 10 .

[0082] The substrate 10 is also provided with two connection electrodes 95 exposed on the second main surface 10b. Each of the two connection electrodes 95 is connected to one of the third electronic components 51 or 52 without going through the first electronic component 20. The connection electrodes 95 are connected to the through conductors 90.

[0083] FIG. 10 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0084] In the wiring board 7B shown in FIG. 10, one connection electrode 95 is provided on the substrate 10 and exposed on the second main surface 10b.

[0085] One connection electrode 95 is connected to a plurality of third electronic components 51 and 52 without going through the first electronic component 20 .

[0086] That is, when a plurality of third electronic components are provided, the number of connection electrodes may be the same as or less than the number of third electronic components. For example, one connection electrode may be connected to a plurality of third electronic components without going through a first electronic component.

[0087] FIG. 11 is a cross-sectional view schematically showing still another example of the wiring board of the present invention.

[0088] In the wiring board 8 shown in Figure 11, the board 12 consists of a first board 110, a second board 120, an adhesive layer 130 that bonds the first board 110 and the second board 120, and a via 140 that connects the internal wiring 115 of the first board 110 and the internal wiring 125 of the second board 120.

[0089] Two third electronic components 51 and 52 are mounted on the second main surface 12 b of the substrate 12 .

[0090] This specification describes the following:

[0091] The present disclosure (1) is a wiring board comprising: a substrate having a first main surface and a second main surface opposing each other in a thickness direction; a first electronic component mounted on the first main surface side of the substrate; a first cavity opening to the first main surface of the substrate; a second electronic component housed in the first cavity and overlapping the first electronic component when viewed in the thickness direction; and a third electronic component mounted on the second main surface side of the substrate and overlapping the first electronic component when viewed in the thickness direction, wherein the second electronic component and the third electronic component are both connected in parallel with the first electronic component, and at least a portion of the second electronic component and the third electronic component overlap each other when viewed in the thickness direction.

[0092] The present disclosure (2) is the wiring board described in the present disclosure (1), further having a second cavity that opens to the second main surface of the board, and the third electronic component is mounted on the second main surface side of the board within the second cavity.

[0093] The present disclosure (3) is the wiring board described in the present disclosure (1), wherein the first cavity is a multi-stage cavity consisting of a first portion that opens to the first main surface side of the substrate and a second portion that opens to the second main surface side of the substrate, and the opening area of ​​the second portion is larger than the opening area of ​​the first portion, and the third electronic component is mounted on the second main surface side of the substrate in the second portion of the first cavity.

[0094] The present disclosure (4) is the wiring board according to the present disclosure (1) or (2), wherein the board comprises a first board and a second board arranged in the thickness direction, the main surface on which the first board is arranged becomes the first main surface of the board, and the main surface on which the second board is arranged becomes the second main surface of the board, and the first cavity is a bottomless cavity that penetrates the first board in the thickness direction.

[0095] The present disclosure (5) is a wiring board in any combination with any of the present disclosures (1) to (4), in which the planar dimensions of the third electronic component are larger than those of the second electronic component and smaller than those of the first electronic component.

[0096] The present disclosure (6) is a wiring board in any combination with any of the present disclosures (1) to (5), in which a plurality of the second electronic components are housed in the first cavity.

[0097] The present disclosure (7) is a wiring board in any combination with any of the present disclosures (1) to (6), in which the substrate has a connection electrode exposed on the second main surface, and the connection electrode is connected to the third electronic component without going through the first electronic component.

[0098] The present disclosure (8) is a wiring board in any combination with any of the present disclosures (1) to (6), in which a plurality of the third electronic components are mounted on the second main surface side of the board.

[0099] The present disclosure (9) is the wiring board according to the present disclosure (8), wherein the substrate has a connection electrode exposed on the second main surface, and the connection electrode is connected to a plurality of the third electronic components without going through the first electronic component.

[0100] 1, 2, 3, 4A, 4B, 5A, 5B, 6, 7A, 7B, 8 Wiring board 10, 11, 12 Substrate 10a, 11a, 12a First main surface of substrate 10b, 11b, 12b Second main surface of substrate 15 Internal wiring 20 First electronic component 30, 31, 32 First cavity 32A First portion 32B Second portion 32Ba Bottom surface of second portion 35 Second cavity 35a Bottom surface of second cavity 40 Second electronic component 50 Third electronic component 60 Other electronic components 70 First resin layer 71 First sealing resin 80 Second resin layer 81 Second sealing resin 90 Through conductor 110 First substrate 115, 125 Internal wiring 120 Second substrate 130 Adhesive layer 140 Via

Claims

1. A wiring board comprising: a substrate having first and second main surfaces opposing each other in a thickness direction; a first electronic component mounted on the first main surface side of the substrate; a first cavity opening to the first main surface of the substrate; a second electronic component housed in the first cavity and overlapping the first electronic component when viewed in the thickness direction; and a third electronic component mounted on the second main surface side of the substrate and overlapping the first electronic component when viewed in the thickness direction, wherein the second electronic component and the third electronic component are both connected in parallel with the first electronic component, and at least a portion of the second electronic component and the third electronic component overlap each other when viewed in the thickness direction.

2. The wiring board according to claim 1, further comprising a second cavity opening to the second main surface of the board, and the third electronic component is mounted on the second main surface side of the board within the second cavity.

3. The wiring board according to claim 1, wherein the first cavity is a multi-stage cavity consisting of a first portion that opens onto the first main surface side of the substrate and a second portion that opens onto the second main surface side of the substrate, the opening area of ​​the second portion being larger than the opening area of ​​the first portion, and the third electronic component is mounted on the second main surface side of the substrate in the second portion of the first cavity.

4. The wiring board according to claim 1 or 2, wherein the substrate comprises a first substrate and a second substrate arranged in the thickness direction, the main surface on which the first substrate is arranged becomes the first main surface of the substrate, and the main surface on which the second substrate is arranged becomes the second main surface of the substrate, and the first cavity is a bottomless cavity that penetrates the first substrate in the thickness direction.

5. The wiring board according to any one of claims 1 to 4, wherein the third electronic component has a planar dimension larger than that of the second electronic component and smaller than that of the first electronic component.

6. The wiring board according to any one of claims 1 to 5, wherein a plurality of the second electronic components are housed in the first cavity.

7. The wiring board according to any one of claims 1 to 6, wherein the substrate is provided with a connection electrode exposed on the second main surface, and the connection electrode is connected to the third electronic component without going through the first electronic component.

8. The wiring board according to any one of claims 1 to 6, wherein a plurality of the third electronic components are mounted on the second main surface side of the board.

9. The wiring board according to claim 8, wherein the substrate is provided with connection electrodes exposed on the second main surface, and the connection electrodes are connected to a plurality of the third electronic components without going through the first electronic components.

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