Pixel circuit system, driving method for pixel circuit system, and display device

Abstract

The present disclosure relates to a pixel circuit system, a driving method for a pixel circuit system, and a display device. The pixel circuit system comprises: a video processing module, used for generating a pixel circuit driving signal on the basis of video source data; a pixel circuit module, connected to the video processing module, and used for separating a high-bit signal and a low-bit signal in the pixel circuit driving signal, and respectively performing digital-to-analog conversion on the high-bit signal and the low-bit signal to obtain a high-bit voltage value and a low-bit voltage value; respectively comparing the high-bit voltage value and the low-bit voltage value with corresponding ramp voltage data on the basis of a high-bit clock frequency and a low-bit clock frequency, and outputting a high-bit pulse width modulation signal corresponding to the high-bit voltage value and a low-bit pulse width modulation signal corresponding to the low-bit voltage value. The described pixel circuit system can reduce the loss of display grayscale accuracy without increasing the design area and power consumption of an original pixel circuit system.

Description

Pixel circuit system, driving method of pixel circuit system and display device

[0001] Related application

[0002] The present disclosure claims priority to the Chinese patent application No. 2024111172166, filed on August 15, 2024, entitled "Pixel circuit system, driving method of pixel circuit system and display device", the contents of which are hereby incorporated by reference in its entirety. TECHNICAL FIELD

[0003] The present disclosure relates to the field of display, and in particular, to a pixel circuit system, a driving method of the pixel circuit system and a display device. BACKGROUND

[0004] The pixel circuit system refers to a whole system composed of a plurality of pixel circuits. The pixel circuit system, in combination with the display device, jointly completes the processing and display of images. Each pixel circuit controls the brightness and color of one display pixel. With the development of display technology, the design of the pixel circuit system is also constantly improved to achieve higher resolution, lower power consumption and better display effect. The pixel circuit system is limited by the size and precision of the pixel circuit, resulting in loss of display gray scale precision.

[0005] In the traditional way, to solve the problem of loss of display gray scale precision caused by the limitation of the size and precision of the pixel circuit, the size of the pixel circuit is increased and the precision of the digital-to-analog conversion module is improved. However, the traditional way will increase the design area of the whole pixel circuit system, increase the power consumption, and is complex to implement. SUMMARY

[0006] Therefore, it is necessary to provide a pixel circuit system, a driving method of the pixel circuit system and a display device which can reduce the loss of display gray scale precision without increasing the original design area and power consumption of the pixel circuit system.

[0007] In a first aspect, the present disclosure provides a pixel circuit system, comprising: a video processing module configured to generate a pixel circuit driving signal according to video source data; a pixel circuit module connected to the video processing module, configured to separate a high-bit signal and a low-bit signal in the pixel circuit driving signal, and perform digital-to-analog conversion on the high-bit signal and the low-bit signal respectively to obtain a high-bit voltage value and a low-bit voltage value; and compare the high-bit voltage value and the low-bit voltage value with corresponding ramp voltage data according to a high-bit clock frequency and a low-bit clock frequency respectively, and output a high-bit pulse width modulation signal corresponding to the high-bit voltage value and a low-bit pulse width modulation signal corresponding to the low-bit voltage value.

[0008] In one of the embodiments, the video processing module is further configured to perform gamma correction on the pixel circuit driving signal to generate a continuous gray scale signal conforming to human visual; the pixel circuit module comprises a digital-to-analog conversion unit configured to separate a high bit signal and a low bit signal in the continuous gray scale signal, and perform digital-to-analog conversion on the high bit signal and the low bit signal respectively to obtain a high bit voltage value and a low bit voltage value.

[0009] In one of the embodiments, the pixel circuit module comprises a color separation module configured to perform color separation processing on the pixel circuit driving signal to obtain a plurality of sub-circuit driving signals corresponding to the pixel circuit driving signal, separate a high bit signal and a low bit signal in each sub-circuit driving signal, and perform digital-to-analog conversion on the high bit signal and the low bit signal in each sub-circuit driving signal respectively to obtain a high bit voltage value and a low bit voltage value corresponding to each sub-circuit driving signal.

[0010] In one of the embodiments, the pixel circuit module comprises a pixel circuit comprising a high bit storage capacitor, a low bit storage capacitor and a comparator; the pixel circuit is configured to charge the corresponding high bit storage capacitor according to the high bit voltage value of each sub-circuit driving signal, and charge the corresponding low bit storage capacitor according to the low bit voltage value corresponding to each sub-circuit driving signal; the high bit storage capacitor and the low bit storage capacitor of the pixel circuit are configured to be turned on in time sharing manner with the comparator to input the high bit voltage value and the low bit voltage value corresponding to each sub-circuit driving signal to the comparator in time sharing manner; the comparator is configured to compare the high bit voltage value with corresponding high bit ramp voltage data according to a high bit clock frequency, and compare the low bit voltage value with corresponding low bit ramp voltage data according to a low bit clock frequency.

[0011] In one of the embodiments, the pixel circuit is further configured to turn on the high bit storage capacitor and the low bit storage capacitor of the pixel circuit in time sharing manner with a first input end of the comparator to input the high bit voltage value and the low bit voltage value corresponding to each sub-circuit driving signal to the first input end of the comparator in time sharing manner; the comparator is further configured to compare the high bit voltage value with high bit ramp voltage data at a second input end of the comparator according to a high bit clock frequency, and compare the low bit voltage value with low bit ramp voltage data at the second input end of the comparator according to a low bit clock frequency.

[0012] In one of the embodiments, the pixel circuit module further comprises: a power management unit configured to provide high-bit slope voltage data corresponding to the high-bit voltage value and low-bit slope voltage data corresponding to the low-bit voltage value to the comparator of the pixel circuit; and the comparator is configured to compare the high-bit voltage value with the corresponding high-bit slope voltage data according to the high-bit clock frequency, and output a high-bit pulse width modulation signal of a first value when the high-bit voltage value is less than the high-bit slope voltage data, and output a high-bit pulse width modulation signal of a second value when the high-bit voltage value is greater than or equal to the high-bit slope voltage data; and the comparator is further configured to compare the low-bit voltage value with the corresponding low-bit slope voltage data according to the low-bit clock frequency, and output a low-bit pulse width modulation signal of the first value when the low-bit voltage value is less than the low-bit slope voltage data, and output a low-bit pulse width modulation signal of the second value when the low-bit voltage value is greater than or equal to the low-bit slope voltage data.

[0013] In one of the embodiments, the pixel circuit module further comprises: a clock management unit configured to provide a high-bit clock frequency and a low-bit clock frequency to the comparator of the pixel circuit; and a power management unit configured to generate high-bit slope voltage data corresponding to the high-bit voltage value according to the high-bit clock frequency, and generate low-bit slope voltage data corresponding to the low-bit voltage value according to the low-bit clock frequency, and input the high-bit slope voltage data and the low-bit slope voltage data to the comparator of the pixel circuit; wherein the slope of the high-bit slope voltage data matches the high-bit clock frequency, and the slope of the low-bit slope voltage data matches the low-bit clock frequency.

[0014] In one of the embodiments, the pixel circuit module is further configured to output the high-bit pulse width modulation signal and the low-bit pulse width modulation signal in any of the following manners: outputting the high-bit pulse width modulation signal first and then outputting the low-bit pulse width modulation signal; outputting the low-bit pulse width modulation signal first and then outputting the high-bit pulse width modulation signal; or outputting the high-bit pulse width modulation signal and the low-bit pulse width modulation signal alternately.

[0015] In a second aspect, the disclosure further provides a driving method of a pixel circuit system, configured to drive the pixel circuit system in any of the above embodiments, comprising: generating a pixel circuit driving signal according to video source data; separating a high-bit signal and a low-bit signal in the pixel circuit driving signal, and performing digital-to-analog conversion on the high-bit signal and the low-bit signal respectively to obtain a high-bit voltage value and a low-bit voltage value; comparing the high-bit voltage value and the low-bit voltage value with corresponding slope voltage data respectively according to a high-bit clock frequency and a low-bit clock frequency, and outputting a high-bit pulse width modulation signal corresponding to the high-bit voltage value and a low-bit pulse width modulation signal corresponding to the low-bit voltage value.

[0016] In a third aspect, the present disclosure also provides a display device comprising the pixel circuit system according to any one of the above embodiments.

[0017] The pixel circuit system, the driving method of the pixel circuit system and the display device, the pixel circuit module in the pixel circuit system divides the pixel circuit driving signal into a high-bit signal and a low-bit signal, and converts the high-bit signal and the low-bit signal into a high-bit voltage value and a low-bit voltage value respectively, and then compares the high-bit voltage value and the low-bit voltage value with corresponding ramp voltage data at different clock frequencies respectively, and outputs corresponding pulse width modulation signals. By generating the pulse width modulation signals corresponding to the high-bit voltage value and the low-bit voltage value at different clock frequencies respectively, the pulse width modulation signals corresponding to the high-bit voltage value and the low-bit voltage value have different accuracies, more signal bits can be retained, the display gray scale precision loss (gray scale loss) is reduced without increasing the original pixel circuit system design area and power consumption, the display gray scale level is improved, the display resolution is improved, the display picture color is more realistic, and the picture is more delicate. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art without creative labor based on the disclosed drawings.

[0019] FIG. 1 is a schematic diagram of a pixel circuit system in an embodiment;

[0020] FIG. 2 is a schematic diagram of a pixel circuit system in another embodiment;

[0021] FIG. 3 is a structural schematic diagram of a pixel circuit in an embodiment;

[0022] FIG. 4 is a working principle diagram of a pixel circuit in an embodiment;

[0023] FIG. 5 is a clock frequency diagram of a comparator in an embodiment;

[0024] FIG. 6 is a principle block diagram of a pixel circuit system in an embodiment;

[0025] FIG. 7 is a cycle schematic diagram of four pulse width modulation signals of a pixel circuit system in an embodiment;

[0026] FIG. 8 is a loss gray scale ratio comparison schematic diagram of a traditional pixel circuit system and a pixel circuit system of the present disclosure in an embodiment;

[0027] FIG. 9 is a flow schematic diagram of a driving method of a pixel circuit system in an embodiment.

[0028] Reference signs: 100, video processing module; 200, pixel circuit module; 201, digital-to-analog conversion unit; 202, pixel circuit; 203, power management unit; 204, clock management unit. DETAILED DESCRIPTION

[0029] The technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of the present disclosure.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. The terminology used in the description of the present disclosure herein is only for the purpose of describing specific embodiments of the present disclosure and is not intended to limit the present disclosure.

[0031] It can be understood that the terms "first", "second", and the like used in the present disclosure can be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from another element. For example, without departing from the scope of the present disclosure, a first resistor can be referred to as a second resistor, and similarly, a second resistor can be referred to as a first resistor. The first resistor and the second resistor are both resistors, but they are not the same resistor.

[0032] It can be understood that "connection" in the following embodiments, if the circuits, modules, units, etc. connected to each other have the transmission of electrical signals or data, should be understood as "electrically connected", "communicatively connected", etc.

[0033] As used herein, the singular forms "a", "an" and "the" can also include plural forms unless the context clearly indicates otherwise. It should also be understood that the term "comprise / comprising" or "have / having" specifies the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but does not exclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in the specification includes any and all combinations of the related listed items.

[0034] In an example embodiment, as shown in FIG. 1, which is a schematic diagram of a pixel circuit system, the pixel circuit module 200 includes a video processing module 100 and the pixel circuit module 200. The video processing module 100 is configured to generate a pixel circuit driving signal according to video source data. The pixel circuit module 200 is connected to the video processing module 100 and is configured to separate a high-bit signal and a low-bit signal in the pixel circuit driving signal, to separately perform digital-to-analog conversion on the high-bit signal and the low-bit signal to obtain a high-bit voltage value and a low-bit voltage value, and to compare the high-bit voltage value and the low-bit voltage value with corresponding ramp voltage data according to a high-bit clock frequency and a low-bit clock frequency, and to output a high-bit pulse width modulation signal corresponding to the high-bit voltage value and a low-bit pulse width modulation signal corresponding to the low-bit voltage value.

[0035] The video source data is original data of a video signal and contains continuous sampling of each frame of an image in time. The video source data can be an unprocessed data stream obtained from a camera, a video capture card or other video source device. The pixel circuit driving signal is a control signal for driving a pixel circuit. The high-bit clock frequency and the low-bit clock frequency are working clock frequencies.

[0036] Specifically, the video processing module 100 obtains video source data, generates a data format and a control signal for driving a pixel circuit according to the video source data, and the control signal is a pixel circuit driving signal. The data format for driving the pixel circuit can be determined according to actual requirements. For example, the data format can include, but is not limited to, a data video interface, a video serial interface, a high-definition multimedia interface and a digital display interface.

[0037] The pixel circuit module 200 is connected to an output end of the video processing module 100 and is configured to separate a high-bit signal and a low-bit signal in the pixel circuit driving signal. The high-bit signal refers to a signal at a front position, and the low-bit signal refers to a signal at a rear position. The number of bits of the high-bit signal and the low-bit signal can be determined according to the number of bits that can be processed by the pixel circuit module 200. The number of bits of the high-bit signal and the low-bit signal cannot exceed the maximum number of bits that can be processed by the pixel circuit module 200. For example, the number of bits of the high-bit signal and the low-bit signal can be the same or different. The pixel circuit module 200 is further configured to perform digital-to-analog conversion on the high-bit signal to obtain a high-bit voltage value, and to perform digital-to-analog conversion on the low-bit signal to obtain a low-bit voltage value.

[0038] The slope voltage data corresponding to the high-bit voltage value is high-bit slope voltage data, and the slope voltage data corresponding to the low-bit voltage value is low-bit slope voltage data. The pixel circuit module 200 is configured to compare the high-bit voltage value with the corresponding high-bit slope voltage data according to a high-bit clock frequency, and output a high-bit pulse width modulation signal corresponding to the high-bit voltage value according to a comparison result. The pixel circuit module 200 is also configured to compare the low-bit voltage value with the corresponding low-bit slope voltage data according to a low-bit clock frequency, and output a low-bit pulse width modulation signal corresponding to the low-bit voltage value according to a comparison result. The high-bit clock frequency is different from the low-bit clock frequency, and further, the high-bit clock frequency is lower than the low-bit clock frequency. By setting different high-bit clock frequencies and low-bit clock frequencies, the high-bit voltage value and the low-bit voltage value are processed respectively, and high-bit pulse width modulation signals and low-bit pulse width modulation signals with different precisions can be generated.

[0039] In the embodiment, the pixel circuit module in the pixel circuit system divides the pixel circuit driving signal into a high-bit signal and a low-bit signal, and converts the high-bit signal and the low-bit signal into a high-bit voltage value and a low-bit voltage value respectively. Then, the high-bit voltage value and the low-bit voltage value are compared with corresponding slope voltage data respectively under different clock frequencies, and corresponding pulse width modulation signals are output. By generating the pulse width modulation signals corresponding to the high-bit voltage value and the low-bit voltage value respectively under different clock frequencies, the pulse width modulation signals corresponding to the high-bit voltage value and the low-bit voltage value have different precisions, more signal bits can be retained, the loss of display gray scale precision (gray scale loss) can be reduced without increasing the design area and power consumption of the original pixel circuit system, the display gray scale level is improved, the display resolution is improved, the display picture color is more realistic, and the picture is more delicate.

[0040] In an exemplary embodiment, the video processing module 100 is also configured to perform gamma correction on the pixel circuit driving signal to generate a continuous gray scale signal conforming to human eye vision. The pixel circuit module 200 includes a digital-to-analog conversion unit configured to separate the high-bit signal and the low-bit signal in the continuous gray scale signal, and perform digital-to-analog conversion on the high-bit signal and the low-bit signal respectively to obtain the high-bit voltage value and the low-bit voltage value.

[0041] Specifically, the video processing module 100 is configured to perform gamma correction on the pixel circuit driving signal to generate a continuous gray scale signal conforming to human visual. For example, the gamma value of the gamma correction can be 2.2. The bit number of the high-bit signal and the low-bit signal can be determined according to the maximum bit number that the digital-to-analog conversion unit in the pixel circuit module 200 can process, and the bit number of the high-bit signal or the low-bit signal cannot exceed the maximum bit number that the digital-to-analog conversion unit can process. Therefore, the digital-to-analog conversion unit is configured to separate the high-bit signal and the low-bit signal in the continuous gray scale signal according to the maximum bit number that the digital-to-analog conversion unit can process. For example, if the data bit width (bit number) of the continuous gray scale signal after the gamma correction is n bits, the digital-to-analog conversion unit is configured to separate the high-bit signal and the low-bit signal in the continuous gray scale signal to obtain a low-bit signal of m bits and a high-bit signal of n-m bits. The digital-to-analog conversion unit is further configured to perform digital-to-analog conversion on the high-bit signal and the low-bit signal respectively to obtain a high-bit voltage value and a low-bit voltage value.

[0042] In the embodiment, the video processing module performs gamma correction on the pixel circuit driving signal, which can perform nonlinear transformation on the brightness of the pixel circuit driving signal, so that the signal is more consistent with human visual when displayed.

[0043] The digital-to-analog conversion unit separates the high-bit signal and the low-bit signal in the continuous gray scale signal and performs digital-to-analog conversion, which can drive the pixel circuit system to adjust the display resolution by converting the digital signal into an analog voltage.

[0044] In an exemplary embodiment, the pixel circuit module 200 includes a color separation module configured to perform color separation processing on the pixel circuit driving signal to obtain a plurality of sub-circuit driving signals corresponding to the pixel circuit driving signal, separate the high-bit signal and the low-bit signal in each sub-circuit driving signal, and perform digital-to-analog conversion on the high-bit signal and the low-bit signal in each sub-circuit driving signal respectively to obtain a high-bit voltage value and a low-bit voltage value corresponding to each sub-circuit driving signal.

[0045] Specifically, the pixel circuit module 200 receives a pixel circuit driving signal in the form of an RGB (Red, Green, Blue) signal, and the color separation module in the pixel circuit module 200 processes the three colors of red, green and blue in the RGB signal separately, and each color corresponds to a sub-circuit driving signal. For each sub-circuit driving signal, signal processing is performed to obtain a high-bit voltage value and a low-bit voltage value corresponding to each sub-circuit driving signal, and a high-bit pulse width modulation signal and a low-bit pulse width modulation signal corresponding to each sub-circuit driving signal are generated. Further, for each sub-circuit driving signal, the high-bit signal and the low-bit signal are separated, and the high-bit signal and the low-bit signal are converted into a high-bit voltage value and a low-bit voltage value corresponding to each sub-circuit driving signal respectively.

[0046] In the embodiment, the pixel circuit driving signal is RGB data, data of three colors is received at the same time, the pixel circuit driving signal is color-separated by a color separation module to obtain a plurality of sub-circuit driving signals, and high and low bits of each sub-circuit driving signal are processed and digital-to-analog converted, so that the color of the display picture is more realistic.

[0047] In an exemplary embodiment, as shown in FIG. 2, a schematic diagram of a pixel circuit system is shown, a pixel circuit module 200 includes a pixel circuit 202, the pixel circuit 202 includes a high-bit storage capacitor, a low-bit storage capacitor and a comparator; the pixel circuit 202 is configured to charge the corresponding high-bit storage capacitor according to the high-bit voltage value of each sub-circuit driving signal, and charge the corresponding low-bit storage capacitor according to the low-bit voltage value of each sub-circuit driving signal; the high-bit storage capacitor and the low-bit storage capacitor of the pixel circuit 202 are time-divisionally turned on with the comparator to time-divisionally input the high-bit voltage value and the low-bit voltage value corresponding to each sub-circuit driving signal to the comparator; the comparator is configured to compare the high-bit voltage value with the corresponding high-bit ramp voltage data according to the high-bit clock frequency, and compare the low-bit voltage value with the corresponding low-bit ramp voltage data according to the low-bit clock frequency.

[0048] The high-bit storage capacitor and the low-bit storage capacitor are storage capacitors corresponding to the high-bit voltage value and the low-bit voltage value, respectively.

[0049] Specifically, the type of the pixel circuit 202 in the embodiment can include but is not limited to liquid crystal type, LED (Light Emitting Diode, light emitting diode) type, OLED (Organic Light Emitting Diode, organic light emitting diode) type, micro LED (micro Light Emitting Diode, micro light emitting diode) and Q-LED (Quantum Dot light Emitting Diode, quantum dot light emitting diode). Taking the LED type pixel circuit as an example, as shown in FIG. 3, a structural schematic diagram of the pixel circuit 202 is shown, the pixel circuit 202 includes a plurality of channels, R channel, G channel and B channel. Each channel includes a high-bit storage capacitor, a low-bit storage capacitor and a comparator for processing the corresponding sub-circuit driving signal. The signal processing mode of the plurality of channels is the same.

[0050] The R channel receives the high voltage value V_high_R and the low voltage value V_low_R of the sub-circuit driving signal corresponding to red. The high storage capacitor C_high_R is charged according to the high voltage value V_high_R, and the low storage capacitor C_low_R is charged according to the low voltage value V_low_R. The high storage capacitor C_high_R and the low storage capacitor C_low_R are time-divisionally turned on with the comparator of the R channel to time-divisionally input the high voltage value V_high_R and the low voltage value V_low_R of the sub-circuit driving signal corresponding to red to the comparator of the R channel. The comparator of the R channel compares the high voltage value V_high_R with the corresponding high ramp voltage data V_RAMP_high according to the high clock frequency, outputs the high pulse width modulation signal PWM_high_R according to the comparison result, compares the low voltage value V_low_R with the corresponding low ramp voltage data V_RAMP_low according to the low clock frequency, outputs the low pulse width modulation signal PWM_low_R according to the comparison result, and lights the red LED lamp according to the high pulse width modulation signal PWM_high_R and the low pulse width modulation signal PWM_low_R.

[0051] Meanwhile, the G channel receives the high voltage value V_high_G and the low voltage value V_low_G of the sub-circuit driving signal corresponding to green, charges the corresponding high storage capacitor C_high_G and the low storage capacitor C_low_G, respectively, time-divisionally turns on the high storage capacitor C_high_G and the low storage capacitor C_low_G with the comparator of the G channel to time-divisionally input the high voltage value V_high_G and the low voltage value V_low_G of the sub-circuit driving signal corresponding to green to the comparator of the G channel. The comparator of the G channel compares the high voltage value V_high_G with the high ramp voltage data V_RAMP_high according to the high clock frequency, outputs the high pulse width modulation signal PWM_high_G according to the comparison result, compares the low voltage value V_low_G with the low ramp voltage data V_RAMP_low according to the low clock frequency, outputs the low pulse width modulation signal PWM_low_G according to the comparison result, and lights the green LED lamp according to the high pulse width modulation signal PWM_high_G and the low pulse width modulation signal PWM_low_G.

[0052] The B channel receives the high voltage value V_high_B and the low voltage value V_low_B of the blue corresponding sub-circuit driving signal, and charges the corresponding high storage capacitor C_high_B and low storage capacitor C_low_B, respectively. The high storage capacitor C_high_B and the low storage capacitor C_low_B are time-divisionally turned on with the comparator of the B channel, so as to time-divisionally input the high voltage value V_high_B and the low voltage value V_low_B of the blue corresponding sub-circuit driving signal to the comparator of the B channel. The comparator of the B channel compares the high voltage value V_high_B with the high ramp voltage data V_RAMP_high according to the high clock frequency, and outputs the high pulse width modulation signal PWM_high_B according to the comparison result. The comparator of the B channel also compares the low voltage value V_low_B with the low ramp voltage data V_RAMP_low according to the low clock frequency, and outputs the low pulse width modulation signal PWM_low_B according to the comparison result. The blue LED lamp is lit according to the high pulse width modulation signal PWM_high_B and the low pulse width modulation signal PWM_low_B.

[0053] In the embodiment, the corresponding storage capacitor is charged according to the high voltage value and the low voltage value of each sub-circuit driving signal, and then time-divisionally turned on with the comparator, so that the comparator receives the high voltage value and the low voltage value according to the pre-set different clock frequencies, generates the pulse width modulation signals with different precisions, reduces the display gray scale precision loss (gray scale loss) without increasing the original pixel circuit system design area and power consumption, improves the display gray scale level, improves the display resolution, makes the display picture color more realistic, and the picture more delicate.

[0054] In an exemplary embodiment, the pixel circuit 202 is further configured to time-divisionally turn on the high storage capacitor and the low storage capacitor of the pixel circuit 202 and the first input end of the comparator, so as to time-divisionally input the high voltage value and the low voltage value corresponding to each sub-circuit driving signal to the first input end of the comparator. The comparator is further configured to compare the high voltage value with the high ramp voltage data of the second input end of the comparator according to the high clock frequency, and compare the low voltage value with the low ramp voltage data of the second input end of the comparator according to the low clock frequency.

[0055] Specifically, the comparator includes two input ends, a first input end and a second input end. Referring to FIG. 3, when the first input end of the comparator is the "-" end, the second input end is the "+" end.

[0056] The pixel circuit 202 is further configured to time-share the high-bit storage capacitor and the low-bit storage capacitor of the pixel circuit 202 with the first input end of the comparator. The comparator is configured to receive the high-bit voltage value according to the high-bit clock frequency, compare the high-bit voltage value with the high-bit ramp voltage data of the second input end of the comparator, and receive the low-bit voltage value according to the low-bit clock frequency, compare the low-bit voltage value with the low-bit ramp voltage data of the second input end of the comparator.

[0057] Further, the two input ends of the comparator are sequentially interchangeable, and the high and low of the output pulse width modulation signal are also opposite. When the first input end is the "+" end, the second input end is the "-" end.

[0058] In the embodiment, the high-bit voltage value and the low-bit voltage value can be accurately and quickly compared with the size relationship of the corresponding ramp voltage data through the two input ends of the comparator, so as to accurately and quickly output the pulse width modulation signal.

[0059] In an exemplary embodiment, the pixel circuit module 200 further includes: a power management unit configured to provide the comparator of the pixel circuit with high-bit ramp voltage data corresponding to a high-bit voltage value and low-bit ramp voltage data corresponding to a low-bit voltage value; and the comparator is configured to compare the high-bit voltage value with the corresponding high-bit ramp voltage data according to a high-bit clock frequency, output a high-bit pulse width modulation signal of a first value when the high-bit voltage value is less than the high-bit ramp voltage data, and output a high-bit pulse width modulation signal of a second value when the high-bit voltage value is greater than or equal to the high-bit ramp voltage data; and the comparator is further configured to compare the low-bit voltage value with the corresponding low-bit ramp voltage data according to a low-bit clock frequency, output a low-bit pulse width modulation signal of the first value when the low-bit voltage value is less than the low-bit ramp voltage data, and output a low-bit pulse width modulation signal of the second value when the low-bit voltage value is greater than or equal to the low-bit ramp voltage data.

[0060] Specifically, the voltage management unit is configured to provide the comparator of the pixel circuit with high-bit ramp voltage data V_RAMP_high and low-bit ramp voltage data V_RAMP_low. The comparator is configured to receive a high-bit voltage value V_high according to a high-bit clock frequency, compare the high-bit voltage value V_high with the corresponding high-bit ramp voltage data V_RAMP_high, output 1 when the high-bit voltage value V_high is less than the high-bit ramp voltage data V_RAMP_high, and output 0 when the high-bit voltage value V_high is greater than or equal to the high-bit ramp voltage data V_RAMP_high.

[0061] The operation of the low voltage value is similar. When the low voltage value V_low is less than the low ramp voltage data V_RAMP_low, the comparator outputs 1. When the low voltage value V_low is greater than or equal to the low ramp voltage data V_RAMP_low, the comparator outputs 0.

[0062] The high ramp voltage data V_RAMP_high and the low ramp voltage data V_RAMP_low are voltage curves from 0 to V_max, as shown in FIG. 4, which is a working principle diagram of the pixel circuit. Assuming that the high voltage value V_high and the low voltage value V_low output by the digital-to-analog conversion unit are equal, the high voltage value V_high and the low voltage value V_low are compared with the high ramp voltage data V_RAMP_high and the low ramp voltage data V_RAMP_low respectively, and the high pulse width modulation signal PWM_high and the low pulse width modulation signal PWM_low are output.

[0063] In this embodiment, the comparator can accurately and quickly compare the size relationship between the high voltage value and the low voltage value and the corresponding ramp voltage curve, thereby accurately and quickly outputting the pulse width modulation signal.

[0064] In an exemplary embodiment, the pixel circuit module 200 further includes: a clock management unit configured to provide a high clock frequency and a low clock frequency for the comparator of the pixel circuit; and a power management unit configured to generate high ramp voltage data corresponding to the high voltage value according to the high clock frequency, generate low ramp voltage data corresponding to the low voltage value according to the low clock frequency, and send the high ramp voltage data and the low ramp voltage data to the comparator of the pixel circuit corresponding to each type of circuit driving signal; wherein the slope of the high ramp voltage data matches the high clock frequency, and the slope of the low ramp voltage data matches the low clock frequency.

[0065] Specifically, the clock management unit is configured to provide the high clock frequency and the low clock frequency to the comparator. The power management unit is configured to generate the high ramp voltage data corresponding to the high voltage value according to the high clock frequency, generate the low ramp voltage data corresponding to the low voltage value according to the low clock frequency, and input the high ramp voltage data and the low ramp voltage data to the comparator of the pixel circuit.

[0066] The high ramp voltage data and the low ramp voltage data are both voltage curves linearly increasing from 0 to VDD (power voltage) according to a certain slope, but the increasing slopes of the high ramp voltage data and the low ramp voltage data are different, and the slopes match the clock video.

[0067] Further, the clock frequency of the comparator for the high-bit signal is F, and the clock frequency of the comparator for the low-bit signal is F*2m, and the clock frequency of the comparator is shown in FIG. 5.

[0068] In the embodiment, the clock management unit provides different high-bit clock frequencies and low-bit clock frequencies for the comparators of the pixel circuit, and the power management unit generates corresponding ramp voltage data according to the high-bit clock frequencies and the low-bit clock frequencies, and inputs the corresponding ramp voltage data to the comparators, so that the comparators are configured to receive the high-bit signals and the low-bit signals at different clock frequencies, and compare the high-bit signals and the low-bit signals with the corresponding ramp voltage data respectively, to generate pulse width modulation signals with different precisions, so that the display gray scale precision loss (gray scale loss) is reduced, the display gray scale is improved, the display resolution is improved, the display picture color is more realistic, and the picture is more delicate.

[0069] In an exemplary embodiment, the pulse width modulation signal is cyclically generated for each pixel circuit in one frame period. For the high-bit voltage value, the high-bit pulse width modulation signal can be cyclically generated a times, and the corresponding comparator clock frequency is doubled a times. For the low-bit voltage value, the low-bit pulse width modulation signal can be cyclically generated b times, and the corresponding comparator clock frequency is doubled b times, where a≥1 and b≥1. a and b can be set according to actual requirements, and the larger the better within the range that the comparator can achieve.

[0070] In an exemplary embodiment, the pixel circuit module 200 is further configured to output the high-bit pulse width modulation signal and the low-bit pulse width modulation signal in any of the following ways: outputting the high-bit pulse width modulation signal first and then outputting the low-bit pulse width modulation signal; outputting the low-bit pulse width modulation signal first and then outputting the high-bit pulse width modulation signal; or outputting the high-bit pulse width modulation signal and the low-bit pulse width modulation signal alternately.

[0071] Specifically, in one frame period, the high-bit pulse width modulation signal and the low-bit pulse width modulation signal generated for each pixel circuit can be outputted in the following ways: outputting the high-bit pulse width modulation signal a times first and then outputting the low-bit pulse width modulation signal b times; outputting the low-bit pulse width modulation signal b times first and then outputting the high-bit pulse width modulation signal a times; or outputting the high-bit pulse width modulation signal and the low-bit pulse width modulation signal alternately to weaken the flicker phenomenon.

[0072] In the embodiment, by setting multiple output modes of the high-bit pulse width modulation signal and the low-bit pulse width modulation signal, the display material lighting mode can be flexibly selected.

[0073] In an exemplary embodiment, as shown in FIG. 6, which is a schematic diagram of the pixel circuit system, the embodiment takes the LED pixel circuit as an example, the pixel circuit system comprises a video processing module 100 and a pixel circuit module 200, the pixel circuit module 200 comprises a digital-to-analog conversion unit 201, a pixel circuit 202, a power management unit 203 and a clock management unit 204. The control signal represents the pixel circuit driving signal, the pixel circuit driving signal comprises a row selection signal and a column driving signal. The pixel circuit_R, the pixel circuit_G and the pixel circuit_B can represent the R pixel, the G pixel and the B pixel of the pixel circuit, i.e. the R channel, the G channel and the B channel. The pixel circuit comprises a plurality of row pixels and a plurality of column pixels, each row pixel is arranged in the order of the R pixel, the G pixel and the B pixel from left to right, and each column pixel is a single pixel. The row selection signal is used to select the row pixel receiving data. A plurality of column driving signals are independent of each other, and the column driving signal is used to provide the high-bit ramp voltage data, the low-bit ramp voltage data, the high-bit clock frequency and the low-bit clock frequency, the high-bit voltage value and the low-bit voltage value for the column pixel in each row pixel, so as to control the color and the gray scale of the LED pixel circuit.

[0074] For example, the video source data is taken as an 8-bit gray scale depth, after gamma correction, 12-bit precision is reserved, the high-bit and the low-bit are separated, each of which is 6-bit for subsequent processing. Taking the R channel as an example, after the digital-to-analog conversion unit 201, the high-bit signal and the low-bit signal become the analog voltage V_high_R and V_low_R. During the digital-to-analog conversion, the high-bit signal and the low-bit signal need to be converted according to the same weight. The high-bit ramp voltage data V_RAMP_high and the low-bit ramp voltage data V_RAMP_low are both in the range of 0-5V. In 1 frame, the high-bit voltage value PWM_high and the low-bit voltage value PWM_low are generated 4 times respectively, which are PWM_low_1, PWM_low_2, PWM_low_3, PWM_low_4 and PWM_high_1, PWM_high_2, PWM_high_3, PWM_high_4, and the low effective, as shown in FIG. 7, which is a cycle diagram of 4 pulse width modulation signals of the pixel circuit system. The alternating signal PWM_high_1, PWM_low_1, PWM_high_2, PWM_low_2, PWM_high_3, PWM_low_3, PWM_high_4, PWM_low_4 is used for outputting the LED lamp, and the same processing is performed on the G channel and the B channel according to the above processing process.

[0075] As shown in FIG. 8, a comparison diagram of loss of gray scale between a traditional pixel circuit system and the pixel circuit system of the present disclosure is shown. In the traditional way, after gamma 2.2 correction, the original 256 gray scales can only display 8-bit gray scale accuracy, and 72 gray scales will be lost. However, the pixel circuit system of the present disclosure can display 12-bit gray scale accuracy, and the final output display gray scale only loses 7 gray scales. Therefore, the loss of display gray scale accuracy (loss of gray scale) is reduced, the display gray scale level is improved, the display picture color is more realistic, and the display picture is more delicate without increasing the design area and power consumption of the original pixel circuit system.

[0076] In an exemplary embodiment, as shown in FIG. 9, a driving method of a pixel circuit system is provided for driving the pixel circuit system in any of the above embodiments. The method comprises the following steps:

[0077] Step 902, generating a pixel circuit driving signal according to video source data.

[0078] Step 904, separating the high-bit signal and the low-bit signal in the pixel circuit driving signal, and performing digital-to-analog conversion on the high-bit signal and the low-bit signal respectively to obtain a high-bit voltage value and a low-bit voltage value.

[0079] Step 906, comparing the high-bit voltage value and the low-bit voltage value with corresponding ramp voltage data respectively according to a high-bit clock frequency and a low-bit clock frequency, and outputting a high-bit pulse width modulation signal corresponding to the high-bit voltage value and a low-bit pulse width modulation signal corresponding to the low-bit voltage value.

[0080] In the present embodiment, the pixel circuit driving signal is separated into a high-bit signal and a low-bit signal, and the high-bit signal and the low-bit signal are converted into a high-bit voltage value and a low-bit voltage value respectively. Then, the high-bit voltage value and the low-bit voltage value are compared with corresponding ramp voltage data respectively at different clock frequencies, and corresponding pulse width modulation signals are outputted. By generating the pulse width modulation signals corresponding to the high-bit voltage value and the low-bit voltage value respectively at different clock frequencies, the pulse width modulation signals corresponding to the high-bit voltage value and the low-bit voltage value have different accuracies, more signal bits can be retained, the loss of display gray scale accuracy (loss of gray scale) is reduced, the display gray scale level is improved, the display resolution is improved, the display picture color is more realistic, and the display picture is more delicate without increasing the design area and power consumption of the original pixel circuit system.

[0081] In an exemplary embodiment, a display device is provided, comprising the pixel circuit system in any of the above embodiments.

[0082] In the description of the specification, the description of the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in connection with the embodiments or examples are contained in at least one embodiment or example of the present application. In the description, the illustrative description of the above terms does not necessarily refer to the same embodiment or example.

[0083] The technical features of the above-described embodiments can be combined arbitrarily. In order to make the description simple, all possible combinations of the technical features in the above-described embodiments are not described, but as long as the combinations of the technical features do not contradict each other, they should be considered as the scope of the present disclosure.

[0084] The above-described embodiments only express several implementation manners of the present disclosure, and the description is relatively specific and detailed, but it should not be understood as a limitation on the patent scope of the application. It should be noted that for those skilled in the art, some modifications and improvements can be made without departing from the concept of the present disclosure, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the patent of the present disclosure should be subject to the appended claims.

Claims

1. A pixel circuit system, wherein, The method comprises the following steps: A video processing module is configured to generate a pixel circuit driving signal based on video source data; A pixel circuit module is connected to the video processing module and configured to separate high-bit signals and low-bit signals in the pixel circuit driving signal, and to convert the high-bit signals and the low-bit signals into high-bit voltage values and low-bit voltage values, respectively; The high-bit voltage values and the low-bit voltage values are compared with corresponding ramp voltage data based on high-bit clock frequencies and low-bit clock frequencies, respectively, and high-bit pulse width modulation signals corresponding to the high-bit voltage values and low-bit pulse width modulation signals corresponding to the low-bit voltage values are output.

2. The pixel circuitry of claim 1, wherein, The video processing module is further configured to perform gamma correction on the pixel circuit driving signal to generate continuous gray scale signals conforming to human visual perception; The pixel circuit module comprises a digital-to-analog conversion unit configured to separate high-bit signals and low-bit signals in the continuous gray scale signals, and to convert the high-bit signals and the low-bit signals into high-bit voltage values and low-bit voltage values, respectively.

3. The pixel circuitry of claim 1, wherein, The pixel circuit module comprises: A color separation module is configured to perform color separation processing on the pixel circuit driving signal to obtain a plurality of sub-circuit driving signals corresponding to the pixel circuit driving signal, to separate high-bit signals and low-bit signals in each sub-circuit driving signal, and to convert the high-bit signals and the low-bit signals in each sub-circuit driving signal into high-bit voltage values and low-bit voltage values corresponding to each sub-circuit driving signal, respectively.

4. The pixel circuitry of claim 3, wherein, The pixel circuit module comprises a pixel circuit comprising a high-bit storage capacitor, a low-bit storage capacitor, and a comparator; The pixel circuit is configured to charge the corresponding high-bit storage capacitor based on the high-bit voltage value of each sub-circuit driving signal, and to charge the corresponding low-bit storage capacitor based on the low-bit voltage value corresponding to each sub-circuit driving signal; and the high-bit storage capacitor and the low-bit storage capacitor of the pixel circuit are connected to the comparator in a time-sharing manner to input the high-bit voltage value and the low-bit voltage value corresponding to each sub-circuit driving signal to the comparator in a time-sharing manner. The comparator is configured to compare the high-bit voltage value with corresponding high-bit ramp voltage data based on a high-bit clock frequency, and to compare the low-bit voltage value with corresponding low-bit ramp voltage data based on a low-bit clock frequency.

5. The pixel circuitry of claim 4, wherein, The pixel circuit is further configured to connect the high-bit storage capacitor and the low-bit storage capacitor of the pixel circuit to a first input end of the comparator in a time-sharing manner to input the high-bit voltage value and the low-bit voltage value corresponding to each sub-circuit driving signal to the first input end of the comparator in a time-sharing manner. The comparator is further configured to compare the high-bit voltage value with high-bit ramp voltage data at a second input end of the comparator based on a high-bit clock frequency, and to compare the low-bit voltage value with low-bit ramp voltage data at the second input end of the comparator based on a low-bit clock frequency.

6. The pixel circuitry of claim 4, wherein, The pixel circuit module further comprises: A power management unit is configured to provide high-bit ramp voltage data corresponding to the high-bit voltage value and low-bit ramp voltage data corresponding to the low-bit voltage value for the comparator of the pixel circuit. a comparator configured to compare the high-bit voltage value with corresponding high-bit ramp voltage data according to a high-bit clock frequency, and output a high-bit pulse width modulation signal of a first value when the high-bit voltage value is less than the high-bit ramp voltage data, and output a high-bit pulse width modulation signal of a second value when the high-bit voltage value is greater than or equal to the high-bit ramp voltage data; the comparator is further configured to compare the low-bit voltage value with corresponding low-bit ramp voltage data according to a low-bit clock frequency, and output a low-bit pulse width modulation signal of a first value when the low-bit voltage value is less than the low-bit ramp voltage data, and output a low-bit pulse width modulation signal of a second value when the low-bit voltage value is greater than or equal to the low-bit ramp voltage data.

7. The pixel circuitry of claim 6, wherein, The pixel circuit module further comprises: a clock management unit configured to provide the comparator of the pixel circuit with a high-bit clock frequency and a low-bit clock frequency; a power management unit configured to generate high-bit ramp voltage data corresponding to the high-bit voltage value according to the high-bit clock frequency, and generate low-bit ramp voltage data corresponding to the low-bit voltage value according to the low-bit clock frequency, and input the high-bit ramp voltage data and the low-bit ramp voltage data to the comparator of the pixel circuit; wherein a slope of the high-bit ramp voltage data matches the high-bit clock frequency, and a slope of the low-bit ramp voltage data matches the low-bit clock frequency.

8. The pixel circuitry of claim 1, wherein, The pixel circuit module is further configured to output the high-bit pulse width modulation signal corresponding to the high-bit voltage value and the low-bit pulse width modulation signal corresponding to the low-bit voltage value in any of the following ways: output the high-bit pulse width modulation signal first, and then output the low-bit pulse width modulation signal; output the low-bit pulse width modulation signal first, and then output the high-bit pulse width modulation signal; alternately output the high-bit pulse width modulation signal and the low-bit pulse width modulation signal.

9. A driving method of a pixel circuit system, wherein, A method for driving the pixel circuit system of any one of claims 1-8, the method comprising the following steps: generating pixel circuit driving signals according to video source data; separating high-bit signals and low-bit signals in the pixel circuit driving signals, and performing digital-to-analog conversion on the high-bit signals and the low-bit signals respectively to obtain high-bit voltage values and low-bit voltage values; comparing the high-bit voltage values and the low-bit voltage values with corresponding ramp voltage data according to high-bit clock frequencies and low-bit clock frequencies, and outputting high-bit pulse width modulation signals corresponding to the high-bit voltage values and low-bit pulse width modulation signals corresponding to the low-bit voltage values.

10. A display device, wherein, A display device comprising the pixel circuit system of any one of claims 1-8.

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