Driver circuit, controller and vehicle

Abstract

The present application relates to the technical field of electronic circuits. Disclosed are a driver circuit, a controller and a vehicle. The circuit comprises a current sampling module, a first control module, a delay module and a second control module, wherein the current sampling module is connected to the delay module and the first control module; the second control module is connected to the delay module, the first control module and a driver module; the current sampling module collects a current value of an input current of a driven object of the driver module, and outputs a first overcurrent notification signal by means of a first output end thereof when determining that the input current is an overcurrent; the delay module outputs a second overcurrent notification signal to the second control module when receiving the first overcurrent notification signal, and the second control module continuously controls, from a first moment to a second moment, the driver module to be out of the enable state; and the first control module outputs a third overcurrent notification signal to the second control module when receiving the first overcurrent notification signal, and the second control module continuously controls, from a third moment onward, the driver module to be out of the enable state.

Description

[Amended according to Regulation 26, July 23, 2025] Drive circuit, controller and vehicle

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411197851.X, filed on August 28, 2024, entitled "Drive Circuit, Controller and Vehicle", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of electronic circuit technology, and more specifically, to a drive circuit, controller, and vehicle. Background Technology

[0004] In electronic devices, driver chips are core components and are widely used in power management, motor control, LED lighting and many other fields.

[0005] For example, driver chips can be used in motor controllers. A motor controller also includes power transistors, a control board, and a current sampling module. The power transistors are used to form at least three-phase bridge arms, and the current sampling module is used to sample the input current of the three-phase bridge arms.

[0006] If an overcurrent occurs in the input current of the power transistors in the motor controller, the power transistors driven by the driver chip may experience performance degradation or damage, potentially leading to more serious safety issues such as explosions or burnout of the motor controller. Therefore, how to protect the input current of the power transistors under overcurrent conditions has become an urgent technical problem to be solved. Summary of the Invention

[0007] One objective of this application is to provide a new technical solution for a drive circuit.

[0008] According to a first aspect of this application, a driving circuit is provided, comprising:

[0009] Current sampling module;

[0010] The first control module, wherein the first output terminal of the current sampling module is connected to the first input terminal of the first control module;

[0011] The delay module is provided, wherein the first output terminal of the current sampling module is connected to the input terminal of the delay module.

[0012] The second control module has a first input terminal connected to the output terminal of the delay module, a second input terminal connected to the first output terminal of the first control module, and an output terminal connected to the enable terminal of the drive module.

[0013] The current sampling module is used to collect the current value of the input current of the driven object of the driving module. When it is determined that the input current is overcurrent, a first overcurrent notification signal is output through the first output terminal of the current sampling module.

[0014] The delay module is used to output a second overcurrent notification signal to the second control module when the first overcurrent notification signal is received. The second control module continuously controls the drive module to stop enabling from the first time to the second time based on the second overcurrent notification signal.

[0015] The first control module is used to output a third overcurrent notification signal to the second control module when it receives a first overcurrent notification signal. The second control module continuously controls the drive module to stop enabling from a third time point based on the third overcurrent notification signal. The third time point is a time point between the first time point and the second time point.

[0016] Optionally, the time interval between the second time and the first time is t1, and the time interval between the third time and the first time is t2, where t1 = N*t2, and N ≥ 1.5.

[0017] Optionally, the second output terminal of the current sampling module is connected to the second input terminal of the first control module, and the current sampling module is further used to convert the input current into a voltage signal and transmit the voltage signal to the first control module through the second output terminal of the current sampling module;

[0018] The first control module is configured to output a second overcurrent notification signal to the second control module if it is determined, at least based on the voltage signal, that the input current is overcurrent.

[0019] Optionally, the current sampling module is further configured to output a first no-overcurrent notification signal through the first output terminal of the current sampling module when it is determined that the input current is not overcurrent;

[0020] The delay module is used to output a second no-overcurrent notification signal to the second control module when the first no-overcurrent notification signal is received, or to output a second no-overcurrent notification signal to the second control module after the second time when the first no-overcurrent notification signal is received after the first overcurrent notification signal and before the second time.

[0021] The first control module is used to output a third no-overcurrent notification signal to the second control module upon receiving a first no-overcurrent notification signal;

[0022] The second control module is used to enable the drive module upon receiving the second no-overcurrent notification signal and the third no-overcurrent notification signal.

[0023] Optionally, the second control module is an AND gate circuit, the first input terminal of the AND gate circuit is connected to the output terminal of the delay module, and the second input terminal of the AND gate circuit is connected to the first output terminal of the first control module.

[0024] Optionally, the value of N is between 10 and 100.

[0025] Optionally, the delay module includes: a first resistor, the second end of which is connected to the first input terminal of the second control module;

[0026] A capacitor, wherein the second terminal of the first resistor is grounded through the capacitor:

[0027] A pull-up power supply, wherein the power output terminal of the pull-up power supply is connected to the first terminal of the first resistor;

[0028] And a second resistor, wherein the current sampling module is connected to the second end of the first resistor through the second resistor.

[0029] Optionally, the charging time of the capacitor is greater than the time interval between the first time moment and the third time moment.

[0030] Optionally, the first control module includes a first core, which is connected to both the first output terminal and the second output terminal of the current sampling module.

[0031] And a second core, which is communicatively connected to the first core, and is connected to both the first output terminal and the second output terminal of the current sampling module, and is connected to the first input terminal of the second control module;

[0032] The first kernel is configured to send an overcurrent feedback indication signal to the second kernel when it receives the first overcurrent notification signal and / or determines that the drive current is overcurrent based on the voltage signal.

[0033] The second core is connected to both the first output terminal and the second output terminal of the current sampling module, and the second core is connected to the first input terminal of the second control module.

[0034] Upon receiving the return check indication signal, the second kernel determines whether a first overcurrent notification signal has been received, and determines whether the drive current is overcurrent based on the voltage signal. If the first overcurrent notification signal is received and the drive current is determined to be overcurrent based on the voltage signal, the second kernel sends a second overcurrent notification signal to the second control module.

[0035] Optionally, the second output terminal of the first control module is connected to the drive signal input terminal of the drive module, wherein:

[0036] When the first control module outputs the third overcurrent notification signal, it stops outputting drive signals to the drive module.

[0037] According to a second aspect of this application, a controller is provided, comprising: a current sensor;

[0038] The first control chip, wherein the first output terminal of the current sensor is connected to the first input terminal of the first control chip;

[0039] The time delay unit, wherein the first output terminal of the current sensor is connected to the input terminal of the time delay unit.

[0040] And a second control chip, wherein the first input terminal of the second control chip is connected to the output terminal of the time delayer, the first input terminal of the second control chip is connected to the output terminal of the time delayer, and the output terminal of the second control chip is connected to the enable terminal of the driver chip;

[0041] The current sensor is used to collect the current value of the input current of the driven object. When it is determined that the input current is overcurrent, a first overcurrent notification signal is output through the first output terminal of the current sensor.

[0042] The delay device is used to output a second overcurrent notification signal to the second control chip when the first overcurrent notification signal is received. Based on the second overcurrent notification signal, the second control chip continuously controls the driver chip to stop enabling from the first time to the second time.

[0043] The first control chip is used to output a third overcurrent notification signal to the second control chip when it receives a first overcurrent notification signal. The second control chip continuously controls the driver chip to stop enabling from a third time point based on the third overcurrent notification signal. The third time point is a time point between the first time point and the second time point.

[0044] Optionally, the time delayer includes: a first resistor, the second end of which is connected to the first input terminal of the second control module;

[0045] A capacitor, wherein the second terminal of the first resistor is grounded through the capacitor;

[0046] A pull-up power supply, wherein the power output terminal of the pull-up power supply is connected to the first terminal of the first resistor;

[0047] And a second resistor, wherein the current sensor is connected to the second end of the first resistor via the second resistor;

[0048] The charging time of the capacitor is the time interval between the first moment and the second moment.

[0049] Optionally, the first overcurrent notification signal, the second overcurrent notification signal, and the third overcurrent notification signal are all low-level signals.

[0050] Optionally, the first output terminal of the current sensor is the overcurrent protection pin of the current sensor.

[0051] According to a third aspect of this application, a vehicle is provided, the vehicle including a drive circuit as described in any of the first aspects;

[0052] Alternatively, it may include a controller as described in any of the second aspects.

[0053] This application provides a driving circuit, including: a current sampling module, a first control module, a time delay module, and a second control module, wherein: the first output terminal of the current sampling module is connected to the input terminal of the time delay module and the first input terminal of the first control module respectively; the first input terminal of the second control module is connected to the output terminal of the time delay module, the second input terminal of the second control module is connected to the first output terminal of the first control module, and the output terminal of the second control module is connected to the enable terminal of the driving module; wherein, the current sampling module is used to collect the current value of the input current of the driven object of the driving module, and outputs a first overcurrent notification signal through the first output terminal of the current sampling module when it is determined that the input current is overcurrent; the time delay module is used to output a second overcurrent notification signal to the second control module when it receives the first overcurrent notification signal, and the second control module continuously controls the driving module to stop enabling from a first time moment to a second time moment based on the second overcurrent notification signal; the first control module is used to output a third overcurrent notification signal to the second control module when it receives the first overcurrent notification signal, and the second control module continuously controls the driving module to stop enabling from a third time moment based on the third overcurrent notification signal, the third time moment being a time moment between the first time moment and the second time moment. This drive circuit enables protection of the driven object of the drive module under overcurrent conditions. For example, when the driven object is a power device in a power module, it can protect the input current of the power transistor under overcurrent conditions. Furthermore, if the current sampling module cannot continuously output a first overcurrent notification signal during an overcurrent event, a delay module can extend the output time of a third overcurrent notification signal formed by the response of the current sampling module to the first overcurrent notification signal. This extension is made at least until the first control module outputs the third overcurrent notification signal to the second control module. This avoids the problem of overheating and transistor failure in the driven object, such as the power transistor, caused by the second control module continuously switching the drive module between enabling and disabling. Additionally, in the drive circuit provided in this application, the current sampled by the current sampling module is the input current of the driven object, i.e., the actual current. This eliminates the problems of false alarms and false triggers in the drive circuit provided in this application. On the other hand, the second control module combines the two signals output by the first control module and the delay module and inputs them to an enable pin of the drive module to achieve dual control of the drive module. Attached Figure Description

[0054] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0055] Figure 1 is a schematic diagram of a driving circuit provided in this application;

[0056] Figure 2 is a schematic diagram of another driving circuit provided in this application;

[0057] Reference numerals: 100 - Drive circuit; 101 - Current sampling module; 101a - First output terminal of current sampling module; 101b - Second output terminal of current sampling module; 102 - First control module; 102a - First input terminal of first control module; 102b - First output terminal of first control module; 102c - Second input terminal of first control module; 102d - Second output terminal of first control module; 103 - Time delay module; 103a - Input terminal of time delay module; 103b - Output terminal of time delay module; 1031 - Second resistor; 1032 - First resistor; 1032a - 1032b - First terminal of the first resistor; 1033 - Pull-up power supply; 1033a - Power output terminal of the pull-up power supply; 1034 - Capacitor; 104 - Second control module; 104a - First input terminal of the second control module; 104b - Second input terminal of the second control module; 104c - Output terminal of the second control module; 1041 - AND gate circuit; 1041a - First input terminal of the AND gate circuit; 1041b - Second input terminal of the AND gate circuit; 200 - Driver module; 200a - Enable terminal of the driver module; 200b - Drive signal input terminal of the driver module. Detailed Implementation

[0058] Various exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the present application.

[0059] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the scope of this application and its application or use.

[0060] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0061] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0062] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0063] In related technologies, once an overcurrent occurs in the power transistors of a motor controller, the power transistors can only withstand the overcurrent for a relatively short time. Therefore, it is necessary to quickly control the driver chip to stop enabling, thereby achieving the purpose of rapidly shutting down the power transistors. However, the driver chip is generally controlled by the control chip in the motor controller. After receiving the overcurrent signal from the current sampling module, the processing time of the control chip (DSP) far exceeds the overcurrent withstand time of the power transistors. Therefore, an additional path is needed to control the driver chip to quickly stop enabling.

[0064] In related technologies, some solutions can control the driver chip to quickly stop enabling; however, new technical problems arise. Specifically, the current sampling module that samples the input current of the power transistor lacks a latching function. Thus, when the power transistor experiences overcurrent, the output signal of the current sampling module frequently switches between indicating overcurrent and no overcurrent. Consequently, the driver chip also frequently switches between enabling and disabling, leading to frequent switching of the power transistor between on and off. This frequent switching can cause the power transistor to explode, ultimately burning out the motor controller.

[0065] To address the aforementioned problems, this application provides a driving circuit 100, as shown in Figure 1, comprising: a current sampling module 101, a first control module 102, a time delay module 103, and a second control module 104, wherein:

[0066] The first output terminal 101a of the current sampling module 101 is connected to the input terminal 103a of the time delay module 103 and the first input terminal 102a of the first control module 102, respectively.

[0067] The first input terminal 104a of the second control module 104 is connected to the output terminal 103b of the delay module 103, the second input terminal 104b of the second control module 104 is connected to the first output terminal 102b of the first control module 102, and the output terminal 104c of the second control module 104 is connected to the enable terminal 200a of the drive module 200.

[0068] The current sampling module 101 is used to collect the current value of the input current of the driven object of the drive module 200. When it is determined that the input current is overcurrent, the first overcurrent notification signal is output through the first output terminal 101a of the current sampling module 101.

[0069] The delay module 103 is used to output a second overcurrent notification signal to the second control module 104 when the first overcurrent notification signal is received. The second control module 104 continuously controls the drive module to stop enabling based on the second overcurrent notification signal from the first moment to the second moment.

[0070] The first control module 102 is used to output a third overcurrent notification signal to the second control module 104 when it receives a first overcurrent notification signal. The second control module 104 continuously controls the drive module to stop enabling based on the third overcurrent notification signal from a third time point. The third time point is a certain time point between the first time point and the second time point.

[0071] In this embodiment, the current sampling module 101 is used to collect the current value of the input current of the drive object of the drive module 200. In one example, the drive module 200 is specifically a drive chip that serves as the drive object. The drive object can be a power module, which includes power transistors, such as IGBTs. Specifically, the power module can be a three-phase full-bridge inverter circuit. The current on the DC bus passes through the three-phase full-bridge inverter circuit to form a three-phase current. This three-phase current is input to the three-phase windings of the motor, which generate a three-phase magnetic field that drives the motor. Based on this, the input terminal of the current sampling module 101 is connected to the DC bus current output terminal to collect the current value on the DC bus. When the drive circuit 100 provided in this application determines that there is an overcurrent on the DC bus, it controls the drive chip to stop enabling, thereby stopping the drive of the three-phase full-bridge inverter circuit and preventing the overcurrent on the DC bus from entering the three-phase full-bridge inverter circuit and causing damage to it.

[0072] After acquiring the input current value, the current sampling module 101 compares the acquired current value with a pre-stored preset current value, where the preset current value is the maximum current value when the input current is not excessive. If the acquired current value is less than or equal to the preset current value, it is determined that the input current is not excessive. Conversely, if the acquired current value is greater than the preset current value, it is determined that the input current is excessive. In the case of determining that the input current is excessive, a first overcurrent notification signal is output through the first output terminal 101a of the current sampling module 101. Based on this, the delay module 103 and the first control module 102 receive the first overcurrent notification signal.

[0073] After receiving the first overcurrent notification signal, the delay module 103 responds by continuously outputting a second overcurrent notification signal to the second control module 104 from the first time to the second time. Based on this, the control module 104 continuously controls the drive module 200 to stop enabling based on the second overcurrent notification signal from the first time to the second time.

[0074] The time interval between the first moment and the second moment is the time delay that the delay module 103 can generate. The time interval between the moment the current sampling module 101 collects the input current and the first moment is less than the overcurrent duration that the driven object can tolerate. This ensures that the driven object is not damaged by prolonged overcurrent input current, such as preventing problems like transistor failure caused by prolonged overcurrent in power components within the driven object.

[0075] In one example, the moment when the current sampling module 101 acquires the input current is recorded as moment 0, and the first moment is 1.91. When the driven object includes IGBT power devices, the overcurrent duration that the driven object can tolerate can be, for example, 3 seconds.

[0076] Furthermore, after receiving the first overcurrent notification signal, the first control module 102 analyzes the signal to determine that the input current is overcurrent, and then continuously outputs a third overcurrent notification signal to the second control module 104 starting from the third time. Based on this, the second control module 104 continuously controls the drive module 200 to stop enabling based on the third overcurrent notification signal starting from the third time.

[0077] Since the third time point is sometime between the first and second times points, during the period between the first and third times points, the second control module controls the drive module 200 to deactivate based on the second overcurrent notification signal. During the period between the third and second times points (including both), the second control module controls the drive module 200 to deactivate based on both the second and third overcurrent notification signals. After the second time point, the second control module controls the drive module 200 to deactivate based on the third overcurrent notification signal. This achieves protection for the driven device of the drive module 200 in the event of input current overcurrent. For example, when the driven device is a power device that functions as a power module, protection can be achieved for the input current of the power device in the event of current overcurrent. Furthermore, if the current sampling module 101 is unable to continuously output the first overcurrent notification signal during an overcurrent event, the delay module 103 can extend the output time of the third overcurrent notification signal formed by the response of the current sampling module 101 to the first overcurrent notification signal, so as to wait until the first control module 102 outputs the third overcurrent notification signal to the second control module 104. This can avoid the problem of tube explosion caused by overheating of the driven object of the drive module 200, such as the power tube, due to the second control module 104 continuously switching between enabling and disabling the drive module 200.

[0078] In one example, the moment when the current sampling module 101 collects the input current is recorded as time 0, the second moment is 176, and the third moment is 6.

[0079] Furthermore, on the one hand, in the driving circuit 100 provided in this application, the current sampled by the current sampling module 101 is the input current of the driven object of the driving module 200, which is the actual current. This ensures that the driving circuit 100 provided in this application does not have problems such as false alarms or false triggers. On the other hand, after the second control module 104 merges the two signals output by the first control module 102 and the delay module 103, it is input to an enable pin of the driving module 200, thereby realizing dual control of the driving module.

[0080] In one embodiment of this application, the time interval between the second time and the first time is t1, and the time interval between the third time and the first time is t2, where t1 = N * t2, and N ≥ 1.5.

[0081] Furthermore, in one embodiment of this application, the value of N ranges from 10 to 100.

[0082] In this embodiment, by using N, the second control module 104 can be prevented from continuously controlling the drive module to stop enabling for a long time.

[0083] This application provides a driving circuit 100, including: a current sampling module 101, a first control module 102, a time delay module 103, and a second control module 104, wherein: the first output terminal of the current sampling module 101 is connected to the input terminal of the time delay module 103 and the first input terminal of the first control module 102 respectively; the first input terminal of the second control module 104 is connected to the output terminal of the time delay module 103, the second input terminal of the second control module 104 is connected to the first output terminal of the first control module 102, and the output terminal of the second control module 104 is connected to the enable terminal of the driving module 200; wherein, the current sampling module 101 is used to collect the current value of the input current of the driven object of the driving module 200, and determine the input... In the event of an overcurrent, a first overcurrent notification signal is output through the first output terminal of the current sampling module 101. The delay module 103, upon receiving the first overcurrent notification signal, outputs a second overcurrent notification signal to the second control module 104. Based on the second overcurrent notification signal, the second control module 104 continuously controls the drive module 200 to stop enabling from a first time point to a second time point. The first control module 102, upon receiving the first overcurrent notification signal, outputs a third overcurrent notification signal to the second control module 104. Based on the third overcurrent notification signal, the second control module 104 continuously controls the drive module 200 to stop enabling from a third time point onwards, where the third time point is a time between the first and second time points. This drive circuit 100 can protect the driven object of the drive module 200 from input current overcurrent. For example, when the driven object is a power device acting as a power module, it can protect the input current of the power device from current overcurrent. Furthermore, if the current sampling module 101 cannot continuously output the first overcurrent notification signal during an overcurrent event, the delay module 103 can extend the output time of the third overcurrent notification signal formed by the response of the current sampling module 101 to the first overcurrent notification signal, so as to wait until the first control module 102 outputs the third overcurrent notification signal to the second control module 104. This avoids the problem of overheating and tube bursting in the driven object of the drive module 200 caused by the second control module 104 continuously switching between enabling and disabling the drive module 200. In addition, in the drive circuit 100 provided by this application, the current sampled by the current sampling module 101 is the input current of the driven object of the drive module 200, that is, the actual current. This ensures that the drive circuit 100 provided by this application does not have problems such as false alarms or false triggers. On the other hand, the second control module 104 combines the two signals output by the first control module 102 and the delay module 103 and inputs them to an enable pin of the drive module 200 to achieve dual control of the drive module 200.

[0084] In one embodiment of this application, as shown in FIG1, the second output terminal 101b of the current sampling module 101 is connected to the second input terminal 102c of the first control module 102. The current sampling module 101 is also used to convert the input current into a voltage signal and transmit the voltage signal to the first control module 102 through the second output terminal 101b of the current sampling module 101.

[0085] The first control module 102 is used to output a second overcurrent notification signal to the second control module 104 when it is determined, at least based on the voltage signal, that the input current is overcurrent.

[0086] In this embodiment, the current sampling module 101 also has the function of converting the input current into a proportional voltage signal. After converting the input current into a proportional voltage signal, the current sampling module 101 transmits the signal to the first control module 102 via its own second output terminal and the second input terminal 102c of the first control module 102.

[0087] When the first control module 102 receives a voltage signal, it detects the voltage value of the signal and compares it with a pre-stored preset voltage value. The preset voltage value is the maximum voltage value of the voltage signal converted by the current sampling module 101 when the input current is not overcurrent. If the detected voltage value is less than or equal to the preset voltage value, it is determined that the input current is not overcurrent. In this case, the first control module 102 does not output a second overcurrent notification signal to the second control module 104.

[0088] Conversely, if the detected voltage value is greater than the preset voltage value, an input current overcurrent is determined. At this time, the first control module 102 outputs a second overcurrent notification signal to the second control module 104. That is, in this embodiment, whether the detected voltage value is greater than the preset voltage value is used to determine whether the input current is overcurrent. This is because the voltage signal detected by the first control signal is an analog quantity, which is less susceptible to interference. However, the signal output by the current sampling module 101 through its first output terminal, such as the first overcurrent notification signal, is a digital quantity, which is more susceptible to interference. Therefore, the input current overcurrent determination by the first control module 102 based on the voltage signal is more accurate.

[0089] In this embodiment, problems such as false alarms and false triggers in the drive circuit caused by interference can be avoided.

[0090] In one embodiment of this application, the current sampling module 101 is further configured to output a first no-overcurrent notification signal through the first output terminal 101a of the current sampling module 101 when it is determined that the input current is not overcurrent.

[0091] The delay module 103 is used to output a second no-overcurrent notification signal to the second control module 104 upon receiving the first no-overcurrent notification signal;

[0092] The first control module 102 is used to output a third no-overcurrent notification signal to the second control module 104 when it receives the first no-overcurrent notification signal, or to output a second no-overcurrent notification signal to the second control module 104 after the second time when it receives the first overcurrent notification signal and before the second time.

[0093] The second control module 104 is used to enable the drive module 200 upon receiving the second no-overcurrent notification signal and the third no-overcurrent notification signal.

[0094] In this embodiment, the current sampling module 101 determines that there are two scenarios where the input current is not overcurrent. Scenario one is that the input current itself is not overcurrent, and scenario two is that after the input current overcurrents, the input current returns to normal after clearing the obstruction.

[0095] When the current sampling module 101 determines that the input current is not overcurrent, it outputs a first no-overcurrent notification signal through its first output terminal 101a. Based on this, both the delay module 103 and the first control module 102 receive the first no-overcurrent notification signal.

[0096] When the delay module 103 receives the first no-overcurrent notification signal, it determines that the input current is not overcurrent. At this time, it outputs the second no-overcurrent notification signal to the second control module 104.

[0097] Alternatively, when the input current recovers from overcurrent to non-overcurrent before the second time moment, the delay module 103 receives the first overcurrent notification signal and the first non-overcurrent notification signal before the second time moment. In this case, due to the delay function of the delay module 103, the delay module 103 outputs the second non-overcurrent notification signal to the second control module 104 only after the second time moment.

[0098] Upon receiving the first no-overcurrent notification signal, the first control module 102 determines that the input current is not overcurrent, and then outputs the third no-overcurrent notification signal to the second control module 104.

[0099] When the second control module 104 receives the second no-overcurrent notification signal and the third no-overcurrent notification signal, it enables the control drive module 200.

[0100] In this embodiment, the driving circuit 100 provided in this application can also control the driving module 200 to be enabled when the input current is not overcurrent, or when it is overcurrent but is not overcurrent after clearing the fault.

[0101] In one embodiment of this application, as shown in FIG2, the second control module 104 is an AND gate circuit 1041. The first input terminal 1041a of the AND gate circuit 1041 is connected to the output terminal 103b of the delay module 103, and the second input terminal 1041b of the AND gate circuit 1041 is connected to the first output terminal 102b of the first control module 102.

[0102] In this embodiment, the second control module 104 is implemented using an AND gate circuit 1041, which can merge the two signals output by the first control module 102 and the delay module 103 and input them to an enable pin of the driver module 200. The second control module 104 has a simple structure and is easy to implement.

[0103] In one embodiment of this application, as shown in FIG2, the delay module 103 includes: a first resistor 1032, a second resistor 1031, a capacitor 1034, and a pull-up power supply 1033, wherein:

[0104] The power output terminal 1033a of the pull-up power supply 1033 is connected to the first terminal 1032a of the first resistor 1032;

[0105] The second terminal 1032b of the first resistor 1032 is grounded through the capacitor 1034, and the second terminal 1032b of the first resistor 1032 is connected to the first input terminal 104a of the second control module 104.

[0106] The current sampling module 101 is connected to the second terminal 1032b of the first resistor 1032 via the second resistor 1031.

[0107] In one embodiment of this application, the charging time of capacitor 1034 is greater than the time interval between the first moment and the third moment.

[0108] In this embodiment, the second resistor 1031 and capacitor 1034 form an RC filter circuit, and the first resistor 1032 acts as a pull-up resistor. The high-level threshold of the first input terminal 104a of the second control module 104 is V. t =V u (1-e -t / RC (Formula 1)

[0109] Wherein, R is the voltage value that the pull-up power supply 1033 can provide, R is the resistance value of the first resistor 1032, C is the capacitance value of the capacitor 1034, and t is the charging time of the capacitor 1034.

[0110] Based on Formula 1 above, the charging time t of capacitor 1034 is given by Formula 2 as follows:

[0111] In one example, Vt =3.5V, and the time interval from the first moment to the third moment is 6μs. For example, R = 100MΩ and C = 100pF can be set.

[0112] Based on this, t = -100000 * 100 * 10 -12 ln(1-3.5 / 5) = 120.39μs. It is understandable that 120.39μs is greater than the time interval between the third time point (6μs) and the first time point (1.91μs). This satisfies the requirement in this application that the delay module 103 extends the output time of the third overcurrent notification signal formed by its response to the first overcurrent notification signal output by the current sampling module 101, so as to wait at least until the first control module 102 outputs the third overcurrent notification signal to the second control module 104.

[0113] In this embodiment, the delay module 103 is implemented by the first resistor 1032 and the RC filter circuit, which is simple and easy to implement.

[0114] In one embodiment of this application, the first control module 102 includes a first kernel and a second kernel, wherein:

[0115] The first core is connected to both the first output terminal 101a and the second output terminal 101b of the current sampling module 101, and the first core is communicatively connected to the second core.

[0116] The first core is used to send an overcurrent feedback indication signal to the second core when it receives a first overcurrent notification signal and / or determines that the drive current is overcurrent based on the voltage signal.

[0117] The second core is connected to both the first output terminal 101a and the second output terminal 101b of the current sampling module 101, and the second core is connected to the first input terminal 104a of the second control module 104.

[0118] When the second kernel receives the return check indication signal, it determines whether the first overcurrent notification signal has been received, and determines whether the drive current is overcurrent based on the voltage signal. When the first overcurrent notification signal is received and the drive current is determined to be overcurrent based on the voltage signal, the second kernel sends the second overcurrent notification signal to the second control module 104.

[0119] In this embodiment, the first control module 102 is implemented using a dual-core architecture consisting of a first core and a second core. If the first core determines that the input current is overcurrent, it sends a feedback instruction to the second core. Upon receiving the feedback instruction, the second core re-detects whether the input current is overcurrent. This reduces the likelihood of processing errors in the first control module 102.

[0120] In one embodiment of this application, as shown in FIG1, the second output terminal 102d of the first control module 102 is connected to the drive signal input terminal 200b of the drive module 200, wherein:

[0121] When the first control module 102 outputs the third overcurrent notification signal, it stops outputting drive signals to the drive module 200.

[0122] In this embodiment, when the first control module 102 outputs a third overcurrent notification signal, it indicates that the input current is overcurrent. At this time, the first control module 102 stops outputting drive signals to the drive module 200, thereby protecting the devices in the drive module 200. The devices in the drive module 200 are typically power devices, and the drive signal is typically a PWM signal.

[0123] Taking the driving circuit 100 shown in Figure 2 as an example, the working principle of the driving circuit 100 provided in this application is explained below.

[0124] When the current sampling module 101 determines that the input current is not overcurrent, its first output terminal 101a outputs a high-level signal as a first no-overcurrent notification signal. Simultaneously, the current sampling module 101 converts the input current into a voltage signal and inputs it to the first control module 102. Based on this, the first input terminal 102a of the first control module 102 receives the high-level signal as the first no-overcurrent notification signal, and the second input terminal 102c of the first control module 102 receives the voltage signal. The first control module 102 determines that the input current is not overcurrent based on the voltage signal. At this time, the first control module 102 outputs a high-level signal as a third no-overcurrent notification signal to the second input terminal 1041b of the AND gate circuit 1041. Furthermore, when the delay module 103 receives the high-level signal as the first no-overcurrent notification signal, due to the presence of the pull-up power supply 1033 and the first resistor 1032, the delay module 103 outputs a high-level signal as a second no-overcurrent notification signal to the first input terminal 1041a of the AND gate circuit 1041. Upon receiving both a high-level third no-overcurrent notification signal and a high-level second no-overcurrent notification signal, the second control module 1041 outputs a high-level signal to the drive module 200. When the enable signal of the drive module 200 is high, the drive module 200 is allowed to operate normally.

[0125] In some embodiments, the first output terminal is the overcurrent protection pin of the current sampling module 101. The overcurrent protection pin can be an open-drain pin.

[0126] Correspondingly, when the current sampling module 101 determines that the input current is overcurrent, its first output terminal 101a outputs a low-level first overcurrent notification signal. Simultaneously, the current sampling module 101 converts the input current into a voltage signal and inputs it to the first control module 102. Based on this, the first input terminal 102a of the first control module 102 receives the low-level signal as the first overcurrent notification signal, and the second input terminal 102c of the first control module 102 receives the voltage signal. The first control module 102 determines that the input current is overcurrent based on the voltage signal. At a third time, the first control module 102 continuously outputs a low-level third overcurrent notification signal to the second input terminal 1041b of the AND gate circuit 1041. Furthermore, after receiving the low-level first overcurrent notification signal, the delay module 103 continuously outputs a low-level second overcurrent notification signal to the first input terminal 1041a of the AND gate circuit 1041 from the first time to the second time. Since the third time point falls between the second and third times, AND gate 1041 receives a low-level second overcurrent notification signal between the first and third times. AND gate 1041 also receives both a low-level second overcurrent notification signal and a low-level third overcurrent notification signal between the third and second times. After the third time point, AND gate 1041 receives a low-level third overcurrent notification signal. In other words, AND gate 1041 continuously outputs a low-level signal from the first time point onwards to continuously control the drive module 200 to stop being enabled.

[0127] Additionally, it should be noted that the low-level and high-level signals in the above examples are relative. That is, the terms "high-voltage signal" and "low-level signal" do not involve specific voltage ranges; the voltage value of the high-level signal simply needs to be higher than the voltage value of the low-level signal. For example, the voltage value of the high-level signal is greater than 50% of the pull-up power supply 1033, and the voltage value of the low-level signal is less than 50% of the pull-up power supply 1033.

[0128] This application also provides a controller, including: a current sensor, a first control chip, a second control chip, and a time delay, wherein:

[0129] The first output terminal of the current sensor is connected to the input terminal of the time delayer and the first input terminal of the first control chip, respectively.

[0130] The first input terminal of the second control chip is connected to the output terminal of the time delayer, the second input terminal of the second control chip is connected to the first output terminal of the first control chip, and the output terminal of the second control chip is connected to the enable terminal of the driver chip.

[0131] Among them, the current sensor is used to collect the current value of the input current of the driven object, and when it is determined that the input current is overcurrent, the first overcurrent notification signal is output through the first output terminal of the current sensor.

[0132] The delay unit is used to output a second overcurrent notification signal to the second control chip when a first overcurrent notification signal is received. The second control chip continuously controls the driver chip to stop enabling from a third time point based on the second overcurrent notification signal. The third time point is a time point between the first time point and the second time point.

[0133] It should be noted that the specific implementation of the current sensor in this embodiment is the same as the specific implementation of the current sampling module in any of the above driving circuit embodiments, the specific implementation of the first control chip in this embodiment is the same as the specific implementation of the first control module in any of the above driving circuit embodiments, the specific implementation of the second control chip in this embodiment is the same as the specific implementation of the second control module in any of the above driving circuit embodiments, and the specific implementation of the time delayer in this embodiment is the same as the specific implementation of the time delay module in any of the above driving circuit embodiments. These details will not be repeated here.

[0134] In one example, the controller can be specifically a motor controller, and the drive chip can be specifically a drive chip in the motor controller. The driven object is the power module in the motor controller, and the power module includes power transistors, which can be IGBTs.

[0135] In one embodiment of this application, the delay module 103 shown in FIG2 includes: a first resistor 1032, a second resistor 1031, a capacitor 1034, and a pull-up power supply 1033, wherein:

[0136] The power output terminal 1033a of the pull-up power supply 1033 is connected to the first terminal 1032a of the first resistor 1032.

[0137] The second terminal 1032b of the first resistor 1032 is grounded through the capacitor 1034, and the second terminal 1032b of the first resistor 1032 is connected to the first input terminal 104a of the second control module 104.

[0138] The current sensor is connected to the second terminal 1032b of the first resistor 1032 via the second resistor 1031;

[0139] The charging time of the capacitor 1034 is the time interval between the first moment and the second moment.

[0140] In one embodiment of this application, the first overcurrent notification signal, the second overcurrent notification signal, and the third overcurrent notification signal are all low-level signals.

[0141] In one embodiment of this application, the first output terminal of the current sensor is the overcurrent protection pin of the current sensor.

[0142] This application also provides a vehicle that includes any of the controllers provided in the above-described controller embodiments. Alternatively, the vehicle includes a drive circuit as provided in any of the above-described drive circuit embodiments.

[0143] The various embodiments of this application have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical applications, or technical improvements to the technology in the market, or to enable others skilled in the art to understand the embodiments disclosed herein. The scope of this application is defined by the appended claims.

Claims

1. A driving circuit (100), wherein, include: Current sampling module (101); The first control module (102) is connected to the first input terminal (102a) of the current sampling module (101). The delay module (103) is connected to the input terminal (103a) of the current sampling module (101). The second control module (104) has its first input terminal (104a) connected to the output terminal (103b) of the delay module (103), its second input terminal (104b) connected to the first output terminal (102b) of the first control module (102), and its output terminal (104c) connected to the enable terminal (200a) of the drive module (200). The current sampling module (101) is used to collect the current value of the input current of the driven object of the driving module (200). When it is determined that the input current is overcurrent, a first overcurrent notification signal is output through the first output terminal (101a) of the current sampling module (101). The delay module (103) is used to output a second overcurrent notification signal to the second control module (104) when the first overcurrent notification signal is received. The second control module (104) continuously controls the drive module (200) to stop enabling based on the second overcurrent notification signal from the first time to the second time. The first control module (102) is used to output a third overcurrent notification signal to the second control module (104) when it receives a first overcurrent notification signal. The second control module (104) continuously controls the drive module to stop enabling based on the third overcurrent notification signal from a third time point. The third time point is a time point between the first time point and the second time point.

2. The driving circuit according to claim 1, wherein, The time interval between the second time point and the first time point is t1, and the time interval between the third time point and the first time point is t2, where t1 = N * t2, and N ≥ 1.

5.

3. The driving circuit according to claim 1, wherein, The second output terminal (101b) of the current sampling module (101) is connected to the second input terminal (102c) of the first control module (102). The current sampling module (101) is also used to convert the input current into a voltage signal and transmit the voltage signal to the first control module (102) through the second output terminal (101b) of the current sampling module (101). The first control module (102) is used to output a second overcurrent notification signal to the second control module (104) when it is determined that the input current is overcurrent based at least on the voltage signal.

4. The driving circuit according to claim 1, wherein, The current sampling module (101) is also used to output a first no-overcurrent notification signal through the first output terminal (101a) of the current sampling module (101) when it is determined that the input current is not overcurrent; The delay module (103) is used to output a second no-overcurrent notification signal to the second control module (104) when the first no-overcurrent notification signal is received, or to output a second no-overcurrent notification signal to the second control module (104) after the second time when the first no-overcurrent notification signal is received after the first overcurrent notification signal and before the second time. The first control module (102) is used to output a third no-overcurrent notification signal to the second control module (104) when it receives a first no-overcurrent notification signal; The second control module (104) is used to enable the drive module (200) upon receiving the second no-overcurrent notification signal and the third no-overcurrent notification signal.

5. The driving circuit according to claim 1, wherein, The second control module (104) is an AND gate circuit (1041). The first input terminal (1041a) of the AND gate circuit (1041) is connected to the output terminal (103b) of the delay module (103), and the second input terminal (1041b) of the AND gate circuit (1041) is connected to the first output terminal (102b) of the first control module (102).

6. The driving circuit according to claim 2, wherein, The value of N ranges from 10 to 100.

7. The driving circuit according to claim 1, wherein, The delay module (103) includes: The first resistor (1032) has its second end (1032b) connected to the first input end (104a) of the second control module (104); Capacitor (1034), the second terminal (1032b) of the first resistor (1032) is grounded through the capacitor (1034). A pull-up power supply (1033) is provided, wherein the power output terminal (1033a) of the pull-up power supply (1033) is connected to the first terminal (1032a) of the first resistor (1032); And a second resistor (1031), the current sampling module (101) is connected to the second end (1032b) of the first resistor (1032) through the second resistor (1031).

8. The driving circuit according to claim 7, wherein, The charging time of the capacitor (1034) is greater than the time interval between the first moment and the third moment.

9. The driving circuit according to claim 3, wherein, The first control module (102) includes a first core, which is connected to both the first output terminal (101a) and the second output terminal (101b) of the current sampling module (101). And a second core, which is communicatively connected to the first core, and is connected to both the first output terminal (101a) and the second output terminal (101b) of the current sampling module (101), and is connected to the first input terminal (104a) of the second control module (104); The first kernel is configured to send an overcurrent feedback indication signal to the second kernel when it receives the first overcurrent notification signal and / or determines that the drive current is overcurrent based on the voltage signal. When the second kernel receives the return check indication signal, it determines whether the first overcurrent notification signal has been received, and determines whether the drive current is overcurrent based on the voltage signal. When the first overcurrent notification signal is received and the drive current is determined to be overcurrent based on the voltage signal, the second kernel sends a second overcurrent notification signal to the second control module (104).

10. The driving circuit according to claim 1, wherein, The second output terminal (102d) of the first control module (102) is connected to the drive signal input terminal (200b) of the drive module (200), wherein: When the first control module (102) outputs the third overcurrent notification signal, it stops outputting the drive signal to the drive module.

11. A controller, wherein, include: Current sensor; The first control chip, wherein the first output terminal of the current sensor is connected to the first input terminal of the first control chip; The time delay unit, wherein the first output terminal of the current sensor is connected to the input terminal of the time delay unit. And a second control chip, wherein the first input terminal of the second control chip is connected to the output terminal of the time delayer, the first input terminal of the second control chip is connected to the output terminal of the time delayer, and the output terminal of the second control chip is connected to the enable terminal of the driver chip; The current sensor is used to collect the current value of the input current of the driven object. When it is determined that the input current is overcurrent, a first overcurrent notification signal is output through the first output terminal of the current sensor. The delay device is used to output a second overcurrent notification signal to the second control chip when the first overcurrent notification signal is received. Based on the second overcurrent notification signal, the second control chip continuously controls the driver chip to stop enabling from the first time to the second time. The first control chip is used to output a third overcurrent notification signal to the second control chip when it receives a first overcurrent notification signal. The second control chip continuously controls the driver chip to stop enabling from a third time point based on the third overcurrent notification signal. The third time point is a time point between the first time point and the second time point.

12. The controller according to claim 11, wherein, The time delay includes: The first resistor (1032) has its second end (1032b) connected to the first input end (104a) of the second control module (104); Capacitor (1034), the second terminal (1032b) of the first resistor (1032) is grounded through the capacitor (1034); A pull-up power supply (1033) is provided, wherein the power output terminal (1033a) of the pull-up power supply (1033) is connected to the first terminal (1032a) of the first resistor (1032); And a second resistor (1031), the current sensor being connected to the second end (1032b) of the first resistor (1032) via the second resistor (1031); The charging time of the capacitor (1034) is the time interval between the first moment and the second moment.

13. The controller according to claim 12, wherein, The first overcurrent notification signal, the second overcurrent notification signal, and the third overcurrent notification signal are all low-level signals.

14. The controller according to claim 11, wherein, The first output terminal of the current sensor is the overcurrent protection pin of the current sensor.

15. A vehicle, wherein, The vehicle includes the drive circuit as described in any one of claims 1-10; Alternatively, it may include the controller as described in claims 11-14.

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