Circuit board and semiconductor package

Abstract

This circuit board includes: a build-up structure; a plurality of insulating members spaced apart from each other on the build-up structure; and a plurality of metal members disposed on each of the plurality of insulating members, wherein the plurality of metal members are each disposed to surround a side surface and an upper surface of each of the plurality of insulating members and electrically connected to the build-up structure.

Description

Circuit boards and semiconductor packages

[0001] This embodiment relates to a circuit board and a semiconductor package.

[0002]

[0003] Electronic components employed in electronic devices include various active and passive circuit elements, and these circuit elements may be integrated into semiconductor chips or dies. Furthermore, the semiconductor chips or dies may be provided in the form of electronic packages mounted on a substrate including circuit wiring, such as a printed circuit board (PCB).

[0004] Meanwhile, flip-chip connection structures, which utilize connection structures to mount and electrically connect semiconductor chips on printed circuit boards, are widely used in electronic packages. For example, flip-chip connection structures utilizing bumps are advantageous for implementing stacked structures of various semiconductor chips. Furthermore, flip-chip connection structures facilitate the use of multiple connection structures to secure a large number of input / output (I / O) terminals.

[0005] Among the methods for forming such connection structures, there is the Solder-On-Pad (SOP) method. The SOP method manufactures connection structures by printing metallic paste or mounting ball-shaped solder on the connection pads on the upper surface of a printed circuit board exposed by a solder mask pattern, and then reflowing to form a spherical solder portion through the surface tension effect. However, as the integration level of semiconductor chips increases and their size decreases, there is a problem that the SOP method has limitations in implementing connection members with fine pitches.

[0006] Recently, a method has been proposed that introduces post-shaped bumps as connecting elements. This method, compared to the conventional SOP method, can facilitate the implementation of fine pitches. However, the excessive consumption of plating solution and the processing time required during the post formation process lowers production efficiency. Furthermore, plating variations between multiple bumps make it difficult to control the flatness between the mating surfaces with the semiconductor chip.

[0007]

[0008] The present invention provides a circuit board and semiconductor package that can reduce the amount of plating and the process time required for forming a bonding portion, and that allows easy control of the shape of the bonding portion.

[0009]

[0010] A circuit board according to the present embodiment includes a build-up structure; a plurality of insulating members spaced apart from each other on the build-up structure; and a plurality of metal members arranged on each of the plurality of insulating members, wherein the plurality of metal members are arranged to surround each of the side surfaces and the upper surface of each of the plurality of insulating members and are electrically connected to the build-up structure.

[0011] The above build-up structure includes a plurality of insulating layers, and the insulating member may be provided with the same material as at least one of the plurality of insulating layers.

[0012] The above insulating material may be provided with an insulating resin containing at least one of an inorganic filler and glass fiber therein.

[0013] The above insulating material may be an insulating resin.

[0014] The horizontal width of the insulating member may be different from the horizontal width of the metal member arranged on one side of the insulating member.

[0015] The horizontal width of the insulating member may be greater than the horizontal width of the metal member arranged on one side of the insulating member.

[0016] It may include a protective layer disposed on the above build-up structure.

[0017] The above insulating member and the above metal member may overlap at least partly with the protective layer in a horizontal direction.

[0018] The above insulating material may be provided with at least one of PID (Photo Imageable Dielectric), ABF (Ajinomoto Build-up Film), Prepreg (PPG), and Photo resist (PR).

[0019] A semiconductor package according to the present embodiment includes a build-up structure; a plurality of insulating members spaced apart from each other on the build-up structure; a plurality of metal members arranged on each of the plurality of insulating members; and a semiconductor chip arranged on the plurality of metal members, wherein the plurality of metal members are arranged to surround each of the side surfaces and the upper surface of each of the plurality of insulating members and are electrically connected to the build-up structure.

[0020]

[0021] Since the shape of the bonding portion can be varied through an insulating material that is easy to process through this embodiment, there is an advantage in controlling flatness between multiple bonding portions and implementing a fine pitch.

[0022] In addition, since the plating area for electrical connection is reduced compared to the past, the amount of plating solution used can be reduced, and there is an advantage in that production efficiency is improved due to shortened process time.

[0023]

[0024] Figure 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention.

[0025] Figure 2 is a cross-sectional view showing a joint structure of a metal member and an insulating member according to an embodiment of the present invention.

[0026] FIG. 3 is an enlarged view of an interface where a metal member and an insulating member are joined according to an embodiment of the present invention.

[0027] Figures 4 to 6 are drawings showing various arrangement structures of metal members and insulating members according to embodiments of the present invention.

[0028] Figure 7 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention.

[0029]

[0030] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the attached drawings.

[0031] However, the technical idea of ​​the present invention is not limited to some of the embodiments described, but can be implemented in various different forms, and within the scope of the technical idea of ​​the present invention, one or more of the components between the embodiments can be selectively combined or substituted for use.

[0032] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by a person of ordinary skill in the technical field to which the present invention belongs, unless explicitly and specifically defined and described, and terms that are commonly used, such as terms defined in a dictionary, may be interpreted in consideration of the contextual meaning of the relevant technology.

[0033] In addition, the terms used in the embodiments of the present invention are for the purpose of describing the embodiments and are not intended to limit the present invention. In this specification, the singular may also include the plural unless specifically stated in the phrase, and when it is described as “A and / or at least one (or more) of B, C,” it may include one or more of all combinations that can be combined with A, B, and C.

[0034] Additionally, in describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used.

[0035] These terms are intended only to distinguish one component from another, and are not intended to limit the nature, order, or sequence of the component.

[0036] And, when a component is described as being 'connected', 'coupled' or 'connected' to another component, it may include not only cases where the component is directly connected, coupled or connected to the other component, but also cases where the component is 'connected', 'coupled' or 'connected' by another component between the component and the other component.

[0037] Furthermore, when a component is described as being "exposed," it should not only mean that it is exposed to the exterior of the invention as defined in the present invention, but also that it is exposed to another component other than that component. That is, when it is described that B contained in A is exposed from A, it should not only mean that B is exposed to the exterior of the invention as defined in the present invention, but also that it is covered by another component, C, unless there are special circumstances.

[0038] Additionally, when it is described as being formed or arranged "above or below" each component, "above" or "below" includes not only cases where the two components are in direct contact with each other, but also cases where one or more other components are formed or arranged between the two components. Also, when it is expressed as "above" or "below", it can include the meaning of the downward direction as well as the upward direction based on one component.

[0039] Additionally, the expression that configuration A is positioned between configurations B and C should also include the meaning that configuration A is positioned so that it overlaps configurations B and C at least partially in the horizontal and / or vertical directions.

[0040] Expressions referring to directions include horizontal directions, vertical directions, and include a first horizontal direction and a second horizontal direction perpendicular to the first horizontal direction. These are referred to as a first horizontal direction (X-axis), a second horizontal direction (Y-axis), and a vertical direction (Z-axis) according to the Cartesian coordinate system, and the meaning of overlapping along the horizontal direction should also include the meaning of overlapping along the first horizontal direction and / or overlapping along the second horizontal direction.

[0041] Additionally, with respect to one component, the first and second sides should mean the upper and lower sides, respectively, or should include the lower and upper sides.

[0042] FIG. 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention, FIG. 2 is a cross-sectional view showing a bonding structure of a metal member and an insulating member according to an embodiment of the present invention, and FIG. 3 is a drawing showing an enlarged view of an interface where a metal member and an insulating member are bonded according to an embodiment of the present invention.

[0043] Referring to FIGS. 1 to 3, a circuit board (10) according to an embodiment of the present invention may include a build-up structure (100), an insulating member (130), a metal member (140), and a protective layer.

[0044] The circuit board (10) may include a build-up structure (100). The build-up structure (100) may include a plurality of insulating layers stacked in a vertical direction. For example, the plurality of insulating layers may include a first insulating layer (101), a second insulating layer (102) disposed on a lower surface of the first insulating layer (101), a third insulating layer (103) disposed on a lower surface of the second insulating layer (102), a fourth insulating layer (104) disposed on a lower surface of the third insulating layer (103), and a fifth insulating layer (105) disposed on a lower surface of the fourth insulating layer (104). The first to fifth insulating layers (101, 102, 103, 104, 105) may be stacked along a vertical direction.

[0045] The first to fifth insulating layers (101, 102, 103, 104, 105) may each be any insulator, such as photocurable and / or thermosetting. As the thermosetting insulator, an insulator in which inorganic and / or organic fillers are dispersed in a resin, such as ABF (Ajinomoto Build-up Film), a product released by Ajinomoto Co., Ltd., may be used, and a prepreg (PPG) including glass fibers in a resin may be used. In addition, the resin described above may be, for example, an epoxy resin, a bismaleimide triazine resin (BT resin), a phenol resin, a photoresist (PR), etc., and the inorganic and / or organic filler may be provided with a material such as silica or plastic. When an insulating resin is used as a core, a reinforcing material provided with glass fibers or aramid fibers may be included. When the first to fifth insulating layers (101, 102, 103, 104, 105) are photocurable insulators, the first to fifth insulating layers (101, 102, 103, 104, 105) may each be a PID (Photo Imageable Dielectric). In addition, the materials of the plurality of insulating layers may be the same, but conversely, some of the insulating layers among the plurality of insulating layers may have different materials from other insulating layers.

[0046] The circuit board (10) may include a protective layer. The protective layer may include a first protective layer (191) disposed on the upper surface of the first insulating layer (101), and a second protective layer (196) disposed on the lower surface of the fifth insulating layer (105). When a semiconductor element is disposed on the surface of the circuit board (10) using a material such as solder, the first protective layer (191) and the second protective layer (196) may prevent a short circuit between solders due to low wettability with the solder, and may prevent external contaminants from penetrating into the build-up structure and lowering reliability. The first protective layer (191) and the second protective layer (196) may each use a photocurable insulating material. For example, the first protective layer (191) and the second protective layer (196) may be a solder resist or a PID (Photo Imageable Dielectric).

[0047] The first protective layer (191) may include a hole (192) for exposing the first pad portion (111) to be described later to the upper side of the circuit board (10). The second protective layer (196) may include a hole (197) for exposing the second pad portion (116) to be described later to the lower side of the circuit board (10).

[0048] A circuit board (10) may include a circuit pattern for transmitting electrical signals and / or power to electronic devices such as semiconductor chips. The circuit pattern may include a plurality of wiring portions and a plurality of via portions.

[0049] A plurality of wiring portions may be respectively arranged on the surfaces of the plurality of insulating layers. Here, being arranged on the surfaces may also mean that at least a portion of the plurality of wiring portions are embedded within the plurality of insulating layers or protective layers and exposed to the outside from the surfaces. The wiring portions may also be referred to as metal layers. In addition, the surfaces of the plurality of insulating layers each include one side, the other side, and a side surface between the one side and the other side. Here, one side of the insulating layer may be understood as the upper surface, and the other side of the insulating layer may be understood as the lower surface. The meaning of being arranged on the surfaces means that the wiring portions are arranged on at least one of the one side, the other side, and the side surface of the plurality of insulating layers. The wiring portions may be arranged on one side and the other side of some of the plurality of insulating layers, and the wiring portions may be arranged on only one side or the other side of other some of the plurality of insulating layers.

[0050] The plurality of wiring portions may include a first wiring portion (111) disposed on the upper surface of the first insulating layer (101), a second wiring portion (112) disposed on the upper surface of the second insulating layer (102), a third wiring portion (113) disposed on the upper surface of the third insulating layer (103), a fourth wiring portion (114) disposed on the lower surface of the third insulating layer (103), a fifth wiring portion (115) disposed on the lower surface of the fourth insulating layer (104), and a sixth wiring portion (116) disposed on the lower surface of the fifth insulating layer (105). Here, the first wiring portion (111) and the sixth wiring portion (116), which are at least partially covered by the protective layer (191, 196) and disposed on the surface of the build-up structure (100), may be referred to as a first pad portion and a second pad portion, respectively. Additionally, the wiring section may include a pad section for connection to the via section. The horizontal widths of the first wiring section (111) and the sixth wiring section (116) may be smaller than the horizontal widths of the second to fifth wiring sections (112, 113, 114, 115), respectively.

[0051] A via portion may be a metal material arranged in a via hole formed in each of a plurality of insulating layers to connect a plurality of wiring portions facing each other in a vertical direction. Here, the via hole may vertically penetrate at least a portion of each of the plurality of insulating layers, and a via portion may be arranged within the via hole.

[0052] The via portion may include a first via portion (121) penetrating at least a portion of the first insulating layer (101), a second via portion (122) penetrating at least a portion of the second insulating layer (102), a third via portion (123) penetrating at least a portion of the third insulating layer (103), a fourth via portion (124) penetrating at least a portion of the fourth insulating layer (104), and a fifth via portion (125) penetrating at least a portion of the fifth insulating layer (105).

[0053] The first via section (121) can electrically connect the first wiring section (111) and the second wiring section (112). The second via section (122) can electrically connect the second wiring section (112) and the third wiring section (113). The third via section (123) can electrically connect the third wiring section (113) and the fourth wiring section (114). The fourth via section (124) can electrically connect the fourth wiring section (114) and the fifth wiring section (115). The fifth via section (125) can electrically connect the fifth wiring section (115) and the sixth wiring section (116).

[0054] Although not shown, the plurality of vias may have shapes in which the width increases or decreases along the vertical direction. For example, the first via (121) and the second via (122) may have shapes in which the horizontal width decreases as they go downward, and the fourth via (124) and the fifth via (125) may have shapes in which the horizontal width increases as they go downward, respectively.

[0055] Below, the structure of the bonding portion placed on the build-up structure (100) will be described.

[0056] A bonding portion may be arranged on the build-up structure (100). The bonding portion may be electrically connected to a semiconductor chip, which will be described later.

[0057] In detail, as illustrated in FIGS. 1 to 3, the circuit board (100) may include a plurality of insulating members (130) spaced apart from each other on the build-up structure (100), and a plurality of metal members (140) arranged on each of the plurality of insulating members (130). Accordingly, a bonding portion of the circuit board (10) may be implemented by the insulating members (130) and the metal members (140).

[0058] The insulating member (130) may be an insulating material. The insulating member (130) may be a dielectric. For example, the insulating member (130) may be formed of an insulating resin containing at least one of an inorganic filler and glass fiber. As another example, the insulating member (130) may be formed solely of an insulating resin.

[0059] The insulating member (130) may be provided with the same material as at least one insulating layer among the plurality of insulating layers in the build-up structure (100). In this case, the insulating member (130) may be provided with at least one of PID (Photo Imageable Dielectric), ABF (Ajinomoto Build-up Film), Prepreg (PPG), and Photo resist (PR).

[0060] The insulating member (130) may be formed of a material similar to a protective layer. In this case, the insulating member (130) may be a solder resist or a PID (Photo Imageable Dielectric).

[0061] The insulating member (130) may be provided in multiple numbers and arranged in a horizontal direction on the build-up structure (100).

[0062] A plurality of metal members (140) may be arranged on each of the plurality of insulating members (130). The plurality of metal members (140) may be arranged to surround the side surfaces and upper surfaces of each of the plurality of insulating members (130). For example, the metal member (140) may include a side surface that horizontally overlaps the insulating member (130) and an upper surface that is arranged on the side surface and at least partially overlaps the insulating member (130) in the vertical direction. The upper surface and the side surfaces of the insulating member (130) may be surrounded by the metal member (140). The metal member (140) may be made of a metal material. For example, the material of the metal member (140) may include copper (Cu).

[0063] In the process of forming a bonding part using only metal parts, the amount of plating solution used and the process time required were excessive, resulting in a decrease in production efficiency, and there was difficulty in controlling flatness due to plating deviations between multiple bonding parts.

[0064] However, according to the present embodiment, the shape of the bonding portion can be adjusted in various ways through an insulating material (130) that is easy to process, so there is an advantage of adjusting the flatness between multiple bonding portions and implementing a fine pitch.

[0065] In addition, since the plating area for electrical connection is reduced compared to the past, the amount of plating solution used can be reduced, and there is an advantage in that production efficiency is improved due to shortened process time.

[0066] The metal member (140) can be electrically connected to the build-up structure (100). The metal member (140) can be electrically connected to the circuit pattern of the build-up structure (100). The metal member (140) can be electrically connected to the first pad portion (111) disposed on the first insulating layer (101). In this case, the lower surface of the metal member (140) can be connected to the upper surface of the first pad portion (111). At least a portion of the metal member (140) can be disposed within a hole (192), which is a placement area of ​​the first pad portion (111) within the first protective layer (191). At least a portion of the insulating member (130) and the metal member (140) can overlap with the protective layer (191) in a horizontal direction.

[0067] The horizontal width of the metal member (140) may be smaller than the horizontal width of the first pad portion (111) or the horizontal width of the hole (192) in the protective layer (191). The side surface of the metal member (140) may be horizontally spaced from the inner surface of the hole (192) in the protective layer (191). Accordingly, when a plurality of first pad portions (111) are arranged on the upper surface of the build-up structure (100), the occurrence of a short between the plurality of metal members (140) can be more reliably prevented.

[0068] As illustrated in FIGS. 1 and 2, the horizontal width (d1) of the insulating member (130) may be different from the horizontal width (d2) of the metal member (140) disposed on one surface of the insulating member (130). In this case, the horizontal width (d1) of the insulating member (130) may be greater than the horizontal width (d2) of the metal member (140) disposed on one surface of the insulating member (130). Accordingly, the amount of plating for forming the metal member (140) can be reduced, and the occurrence of a short circuit due to contact between the metal members (140) between a plurality of bonding portions can be prevented.

[0069] As illustrated in Fig. 3, due to the material properties of the insulating member (130), the metal member (140) may have a first groove (149) arranged on the inner surface facing the insulating member (130). In this case, the insulating member (130) may include a first protrusion (139) that protrudes from the surface more than other areas and protrudes toward the first groove (149).

[0070] In addition, the metal member (140) may include a second protrusion (148) on the inner surface facing the insulating member (130). In this case, the insulating member (130) may be formed to be concave from the surface compared to other areas, and a second groove (138) may be arranged in which at least a portion of the second protrusion (148) is coupled. Accordingly, the second protrusion (138) may be arranged to penetrate at least a portion of the insulating member (130) from one side toward the other side of the insulating member (130).

[0071] The bonding strength between the insulating member (130) and the metal member (140) can be increased through the first groove (149) and the first protrusion (139), and the second groove (138) and the second protrusion (138). In addition, the insulating member (130) can include a filler and / or glass fiber (135, see FIG. 3) in the resin, and in this case, the filler and / or glass fiber (135) in the insulating member (130) can be arranged such that at least a portion of the filler and / or glass fiber (135) penetrates at least a portion of the metal member (140) from the inner surface toward the outer surface of the metal member (140) through the first protrusion (139). Accordingly, the bonding strength between the insulating member (130) and the metal member (140) can be further increased.

[0072] As illustrated in FIG. 2, a seed layer (160) for forming a metal member (140) may be disposed on the outer surface of the insulating member (130). The seed layer (160) may be disposed between the outer surface of the insulating member (130) and the inner surface of the metal member (140). The seed layer (160) may be disposed on the upper surface and the side surface of the insulating member (130). In this case, due to the bonding structure between the metal member (140) and the insulating member (130) through the first groove (149) and the first protrusion (139), and the second groove (138) and the second protrusion (138), the seed layer (160) may also have a groove area having a concave shape toward the insulating member (130), or a groove area having a concave shape toward the metal member (140).

[0073] Figures 4 to 6 are drawings showing various arrangement structures of metal members and insulating members according to embodiments of the present invention.

[0074] Referring to Fig. 4, the first protective layer (191) in the circuit board (10) may be omitted. In this case, the first pad portion (111) may be placed on the build-up structure (100), and the insulating member (130) and the metal member (140) may be placed on the first pad portion (111).

[0075] Referring to FIGS. 5 and 6, a plurality of insulating members (130) and a plurality of metal members (140) may be connected to a single pad portion (111). The insulating members (130) may have a shape that protrudes upward from the upper surface of the first insulating layer (101). In this case, the insulating members (130) may be provided with the same material as the first insulating layer (101), and may be provided in multiple numbers on the upper surface of the first insulating layer (101) and arranged in a horizontal direction. Each of the plurality of insulating members (130) may have an area that overlaps the first pad portion (111) in the horizontal direction.

[0076] A plurality of metal members (140) may be arranged to surround the side surfaces and upper surfaces of each of the plurality of insulating members (130). Each of the plurality of metal members (140) may have a lower end joined to the upper surface of the build-up structure (100). Each of the plurality of metal members (140) may have a lower end connected to the side surface of the first pad portion (111). One of the plurality of metal members (140) may be connected to one side surface of the first pad portion (111), and the other may be connected to the other side surface of the first pad portion (111). Each of the plurality of metal members (140) may have an area that overlaps with the first pad portion (111) in a horizontal direction. Therefore, by connecting the plurality of insulating members (130) and the metal members (140) based on a single pad portion, the circuit board (10) has the advantage of being able to form a wider bonding area with the semiconductor chip.

[0077] The first protective layer (191) may include a cover portion (194) arranged on the upper surface of the first pad portion (111) between a plurality of metal members (140), in which case the entire upper surface of the first pad portion (111) may be covered by the first protective layer (191). Accordingly, since only holes through which the plurality of metal members (140) penetrate within the first protective layer (191) need to be formed, there is an advantage in that the protection area of ​​the surface of the circuit board (10) can be increased.

[0078] Figure 7 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention.

[0079] Referring to FIG. 7, a semiconductor package may include a semiconductor chip (1000) placed on a circuit board (10). The semiconductor chip (1000) may be bonded to a bonding portion. The semiconductor chip (1000) may be bonded to the upper surfaces of a plurality of metal members (140). An adhesive member (200) may be placed between the semiconductor chip (1000) and the metal member (140) to electrically and physically connect the pad of the semiconductor chip (1000) and the metal member (140), and the semiconductor chip (1000) may be bonded to the circuit board (10) through the adhesive member (200).

[0080] Although all components constituting the embodiments of the present invention have been described above as being combined or operating in combination, the present invention is not necessarily limited to these embodiments. That is, within the scope of the purpose of the present invention, all components may be selectively combined and operated one or more times. In addition, terms such as "include," "comprise," or "have" described above, unless specifically stated to the contrary, mean that the corresponding component may be inherent, and therefore should be interpreted as including other components rather than excluding other components. All terms, including technical or scientific terms, have the same meaning as generally understood by a person of ordinary skill in the art to which the present invention pertains, unless otherwise defined. Commonly used terms, such as terms defined in a dictionary, should be interpreted as being consistent with the contextual meaning of the related technology, and shall not be interpreted in an ideal or excessively formal sense, unless explicitly defined in the present invention.

[0081] The above description is merely an illustrative description of the technical idea of ​​the present invention, and those skilled in the art will appreciate that various modifications and variations may be made without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the technical idea of ​​the present invention, and the scope of the technical idea of ​​the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted by the following claims, and all technical ideas within a scope equivalent thereto should be interpreted as being included in the scope of the rights of the present invention.

[0082] Meanwhile, when a circuit board having the characteristics of the invention described above is used in IT devices such as smartphones, server computers, TVs, or home appliances, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the characteristics of the invention performs a semiconductor package function, it can safely protect semiconductor chips from external moisture or contaminants, and can solve problems such as leakage current or electrical shorts between terminals, or electrical open circuits in terminals supplying semiconductor chips. Furthermore, when it performs a signal transmission function, it can solve noise problems. Through this, the circuit board having the characteristics of the invention described above can maintain the stable function of IT devices or home appliances, thereby enabling the entire product and the circuit board to which the invention is applied to achieve functional integration or technical interoperability with each other.

[0083] When a circuit board having the characteristics of the invention described above is used in a transportation device such as a vehicle, it can solve the problem of signal distortion transmitted to the transportation device, safely protect the semiconductor chip controlling the transportation device from external sources, and solve the problem of leakage current or electrical short circuit between terminals, or electrical open of the terminal supplying the semiconductor chip, thereby further improving the stability of the transportation device. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional integration or technical interoperability with each other.

Claims

1. Build-up structure; A plurality of insulating members spaced apart from each other on the above build-up structure; and Including a plurality of metal members arranged on each of the plurality of insulating members, A circuit board in which the plurality of metal members are arranged to surround each side and upper surface of the plurality of insulating members, respectively, and are electrically connected to the build-up structure.

2. In paragraph 1, The above build-up structure comprises a plurality of insulating layers, A circuit board in which the above insulating member is made of the same material as at least one of the plurality of insulating layers.

3. In paragraph 1, A circuit board in which the above insulating material is provided with an insulating resin containing at least one of an inorganic filler and glass fiber therein.

4. In paragraph 1, The above insulating material is a circuit board made of insulating resin.

5. In paragraph 1, A circuit board in which the horizontal width of the insulating member is different from the horizontal width of the metal member arranged on one side of the insulating member.

6. In paragraph 5, A circuit board in which the horizontal width of the insulating member is greater than the horizontal width of the metal member arranged on one side of the insulating member.

7. In paragraph 1, A circuit board comprising a protective layer disposed on the above build-up structure.

8. In paragraph 7, A circuit board in which the insulating member and the metal member overlap at least partly with the protective layer in a horizontal direction.

9. In paragraph 1, A circuit board in which the above insulating material is provided with at least one of PID (Photo Imageable Dielectric), ABF (Ajinomoto Build-up Film), Prepreg (PPG), and Photo resist (PR).

10. Build-up structure; A plurality of insulating members spaced apart from each other on the above build-up structure; A plurality of metal members arranged on each of the plurality of insulating members; and It includes a semiconductor chip arranged on the plurality of metal members, A semiconductor package in which the plurality of metal members are arranged to surround each side and upper surface of the plurality of insulating members, respectively, and are electrically connected to the build-up structure.

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