Field-effect transistor

Abstract

This field-effect transistor comprises: a substrate (101) composed of diamond; a p-type channel region (102) formed on the surface of the substrate (101); and a gate insulating layer (103) formed on the p-type channel region (102) and composed of a ferroelectric nitride. The field-effect transistor comprises a source electrode (104) and a drain electrode (105) that are formed on the p-type channel region (102) so as to be apart from each other with the gate insulating layer (103) interposed therebetween. The gate insulating layer (103) is composed of boron nitride (BN) having a (0001) oriented rhombohedral structure (3R structure). The BN having the rhombohedral structure has a crystal structure in which layered structures each composed of six-membered rings consisting of B and N, are stacked.

Description

field-effect transistor

[0001] The present invention relates to a field effect transistor.

[0002] Diamond has excellent physical properties, including the highest thermal conductivity of any material, a high breakdown field, and high carrier velocity and mobility. For this reason, field-effect transistors using diamond are expected to be applied to power devices that cannot be realized in principle with materials such as Si or GaAs. Normally-on diamond field-effect transistors have already been reported to have high current densities and excellent high-frequency characteristics that surpass those of transistors made of other semiconductor materials.

[0003] On the other hand, for power device applications, normally-off operation is required from a fail-safe perspective. It has been reported that normally-off operation in diamond field-effect transistors can be achieved by thinning the doped channel layer, by oxygen-terminating or Si-terminating the hydrogen-terminated surface required for forming a two-dimensional hole gas channel, and by employing a ferroelectric gate insulating layer.

[0004] JP 2017-022240 A JP 2021-044460 A

[0005] However, at present, precise control of the threshold voltage is difficult, and even if normally-off operation is achieved, there are problems such as low current density. Furthermore, in order to fabricate power device circuits with various functions using diamond field-effect transistors, it is necessary to control the threshold voltage for each transistor, but as mentioned above, precise control of the threshold voltage is difficult, so multifunctional power device circuits have not been realized until now.

[0006] Patent Document 1 reports the normally-off operation of a diamond transistor using a ferroelectric copolymer thin film of vinylidene fluoride and ethylene trifluoride as a gate insulating layer. It is reported that the threshold voltage changes due to the polarization effect of the ferroelectric, but no technology has been reported to control the threshold voltage to an arbitrary value, and the current density is also limited.

[0007] Patent Document 2 reports a diamond transistor that uses boron nitride as a gate insulating layer and achieves both normally-off operation and high current density operation, but does not report any technology for controlling the threshold voltage to an arbitrary value.

[0008] The present invention has been made to solve the above problems, and aims to make it possible to control the threshold voltage to any value in a normally-off field effect transistor using diamond.

[0009] The field effect transistor according to the present invention comprises a substrate made of diamond, a p-type channel region formed on the surface of the substrate, a gate insulating layer made of ferroelectric nitride formed on the p-type channel region, a source electrode and a drain electrode formed on the p-type channel region at a distance from each other with the gate insulating layer therebetween and connected to the p-type channel region, and a gate electrode formed on the gate insulating layer.

[0010] As described above, according to the present invention, a gate electrode is provided on a p-type channel region formed on the surface of a substrate made of diamond, with a gate insulating layer made of a ferroelectric nitride interposed therebetween, so that the threshold voltage can be controlled to an arbitrary value in a normally-off field effect transistor using diamond.

[0011] FIG. 1 is a cross-sectional view showing the configuration of a field-effect transistor according to a first embodiment of the present invention. FIG. 2A is a cross-sectional view showing the state of a field-effect transistor in an intermediate process for explaining a method for manufacturing a field-effect transistor according to an embodiment of the present invention. FIG. 2B is a cross-sectional view showing the state of a field-effect transistor in an intermediate process for explaining a method for manufacturing a field-effect transistor according to an embodiment of the present invention. FIG. 3 is a cross-sectional view showing a threshold voltage change (ΔV th ) V DG 4A is a characteristic diagram showing the gate-source voltage dependency of a typical drain-source current (I DS -V GS4B is a characteristic diagram showing the gate-source voltage dependency (I DS -V GS Fig. 5 is a cross-sectional view showing the configuration of another field effect transistor according to the first embodiment of the present invention. Fig. 6 is a cross-sectional view showing the configuration of a field effect transistor according to a second embodiment of the present invention.

[0012] Hereinafter, a field effect transistor according to an embodiment of the present invention will be described.

[0013] First Embodiment First, a field effect transistor according to a first embodiment of the present invention will be described with reference to FIG.

[0014] This field effect transistor first comprises a substrate 101 made of diamond, a p-type channel region 102 formed on the surface of the substrate 101, and a gate insulating layer 103 made of ferroelectric nitride formed on the p-type channel region 102.

[0015] The gate insulating layer 103 can be made of boron nitride (BN) with a (0001)-oriented rhombohedral structure (3R structure). BN with a rhombohedral structure has a crystal structure in which layered structures made of six-membered rings consisting of B and N are stacked. The gate insulating layer 103 can be made of a ferroelectric nitride containing one or more of the elements Al, Sc, Si, Mg, Be, C, O, and F in addition to B and N.

[0016] In the first embodiment, the p-type channel region 102 is composed of a two-dimensional hole gas. By forming (by crystal growth) the gate insulating layer 103 having the above-described configuration on the surface of the hydrogen-terminated diamond substrate 101, the p-type channel region 102 composed of a two-dimensional hole gas can be formed in the substrate 101 due to the effect of spontaneous polarization of the gate insulating layer 103.

[0017] The field-effect transistor according to the first embodiment also includes a source electrode 104 and a drain electrode 105 formed on the p-type channel region 102, spaced apart from each other with a gate insulating layer 103 sandwiched therebetween. The source electrode 104 and the drain electrode 105 are in ohmic contact with the p-type channel region 102. The source electrode 104 and the drain electrode 105 may be made of, for example, Au. The field-effect transistor also includes a gate electrode 106 formed on the gate insulating layer 103. The gate electrode 106 may be made of, for example, Al.

[0018] In the first embodiment, a passivation layer 107 is provided on the gate insulating layer 103 between the source electrode 104 and the gate electrode 106, and between the drain electrode 105 and the gate electrode 106. The passivation layer 107 can be made of an insulating material such as AlO.

[0019] Next, a method for manufacturing the field-effect transistor according to Embodiment 1 will be described with reference to FIGS. 2A and 2B.

[0020] First, as shown in FIG. 2A, a gate insulating layer 103 is formed on a substrate 101 made of diamond, and by forming the gate insulating layer 103, a p-type channel region 102 is formed.

[0021] For example, the surface of the substrate 101 is hydrogen-terminated, and then a BN layer is formed by crystal growth of (111)-oriented cubic BN on the substrate 101. The formed BN layer is then exposed to hydrogen plasma to undergo a structural phase transition to BN with a rhombohedral structure, forming the gate insulating layer 103. Note that BN with a (0001)-oriented rhombohedral structure can also be deposited by utilizing other growth techniques used in thin film growth.

[0022] 2B , the source electrode 104 and the drain electrode 105 are formed. For example, a lift-off mask having openings in the regions where the source electrode 104 and the drain electrode 105 are to be formed is formed, and Au is evaporated from above the lift-off mask. After this, the lift-off mask is removed (lift-off), and the Au deposited in the openings of the lift-off mask remains, forming the source electrode 104 and the drain electrode 105.

[0023] Finally, a gate electrode 106 made of Al is formed, and a passivation layer 107 is also formed, thereby obtaining the field-effect transistor shown in Fig. 1. The gate electrode 106 can be formed in the same manner as the source electrode 104 and the drain electrode 105 described above. The passivation layer 107 can be formed by depositing Al2O3 by, for example, the well-known atomic layer deposition method.

[0024] Next, control of the threshold voltage of the field effect transistor according to the first embodiment will be described.

[0025] A voltage (V DG When a voltage of 2000 V is applied, the polarization charge density of the gate insulating layer 103 made of ferroelectric nitride exhibits hysteresis. For example, if the distance between the drain electrode 105 and the gate electrode 106 is 10 μm, a voltage of 2000 V DG By applying a voltage of about 23 μC / cm ２ From here, V DG As V decreases, polarization is maintained up to -500V. DG Then, polarization reversal occurs. DG When the voltage is reduced to -2000 V, the polarization charge is about -23 μC / cm 2 Also, from the above state, V DG As V increases, polarization is maintained up to +500V. DG Then the polarization reversal occurs again.

[0026] The hole density of the two-dimensional hole gas that constitutes the p-type channel region 102 is directly proportional to the polarization charge density of the polarization (spontaneous polarization) caused by the gate insulating layer 103. DG By controlling the polarization charge density by th ) can be controlled.

[0027] The threshold voltage change (ΔV th ) V DG The dependency is shown in Figure 3. For example, V DG By applying V th V in the absence of spontaneous polarization th For normally-on operation where V is +1 V, V is 2000 V. DG By applying V th becomes −4 V, and a normally-off operation is obtained.

[0028] Next, we consider the typical drain-source current dependence on gate-source voltage (I DS -V GS The spontaneous polarization of the gate insulating layer 103 is V less than −500 V. DG is applied to each electrode during normal transistor operation. th does not change, and stable normally-off operation is obtained. DG When V is applied, th V in the absence of spontaneous polarization th In normally-on operation, where V is +1 V, V is 2000 V. DG By applying V th becomes +6V (Fig. 4B).

[0029] As described above, in the field-effect transistor according to the first embodiment, the applied V DG Depending on the size of V th can be controlled.

[0030] 5, a passivation layer 108 made of an oxide may be formed on the gate insulating layer 103, and the gate electrode 106 may be formed on the passivation layer 108. The passivation layer 108 may be made of an oxide such as Al2O3. In this way, by forming the passivation layer 108 on the gate insulating layer 103 and providing the gate electrode 106 on the passivation layer 108, the V th It is possible to control the polarization charge of the gate insulating layer 103 by controlling V DG However, the source electrode 104 can be set to the same potential as the drain electrode 105 .

[0031] V th Control is achieved when the angle between the stacking direction of the layered structure of the gate insulating layer 103 and the normal direction to the surface of the substrate 101 is in the range of 0 to 60°. th The range in which it can be controlled (ΔV th ) was the widest under the 0° condition.

[0032] Second Embodiment Next, a field effect transistor according to a second embodiment of the present invention will be described with reference to FIG.

[0033] This field effect transistor first comprises a substrate 101 made of diamond, a p-type channel region 102' formed on the surface of the substrate 101, and a gate insulating layer 103 made of ferroelectric nitride formed on the p-type channel region 102'.

[0034] The gate insulating layer 103 can be made of boron nitride (BN) with a (0001)-oriented rhombohedral structure (3R structure). BN with a rhombohedral structure has a crystal structure in which layered structures made of six-membered rings consisting of B and N are stacked. The gate insulating layer 103 can be made of a ferroelectric nitride containing one or more of the elements Al, Sc, Si, Mg, Be, C, O, and F in addition to B and N.

[0035] In the second embodiment, the p-type channel region 102' is made of an impurity-introduced layer into which B is introduced as an impurity.

[0036] The field-effect transistor according to the second embodiment also includes a source electrode 104 and a drain electrode 105 formed on the p-type channel region 102′, spaced apart from each other with a gate insulating layer 103 sandwiched therebetween. The source electrode 104 and the drain electrode 105 are in ohmic contact with the p-type channel region 102′. The source electrode 104 and the drain electrode 105 may be made of, for example, Au. The field-effect transistor also includes a gate electrode 106 formed on the gate insulating layer 103. The gate electrode 106 may be made of, for example, Al.

[0037] In the second embodiment, a passivation layer 107 is provided on the gate insulating layer 103 between the source electrode 104 and the gate electrode 106 and between the drain electrode 105 and the gate electrode 106. The passivation layer 107 can be made of an insulating material such as AlO.

[0038] In the second embodiment, a voltage (V DG ) is applied, the polarization charge density of the gate insulating layer 103 made of ferroelectric nitride exhibits hysteresis. The hole density of the p-type channel region 102' formed by introducing B as an impurity is directly proportional to the polarization charge density of the polarization (spontaneous polarization) caused by the gate insulating layer 103 described above. Therefore, DG By controlling the polarization charge density by th ) can be controlled.

[0039] As described above, according to the embodiment of the present invention, a gate electrode is provided on a p-type channel region formed on the surface of a substrate made of diamond, with a gate insulating layer made of a ferroelectric nitride interposed therebetween, so that the threshold voltage of a normally-off field effect transistor using diamond can be controlled to an arbitrary value.

[0040] It should be noted that the present invention is not limited to the embodiments described above, and it is clear that many modifications and combinations can be made by a person having ordinary knowledge in the art within the technical concept of the present invention.

[0041] 101...substrate, 102...p-type channel region, 103...gate insulating layer, 104...source electrode, 105...drain electrode, 106...gate electrode, 107...passivation layer.

Claims

1. A field effect transistor comprising: a substrate made of diamond; a p-type channel region formed on a surface of the substrate; a gate insulating layer made of ferroelectric nitride formed on the p-type channel region; source and drain electrodes formed on the p-type channel region, spaced apart from each other with the gate insulating layer between them, and connected to the p-type channel region; and a gate electrode formed on the gate insulating layer.

2. A field effect transistor according to claim 1, wherein the p-type channel region is formed from an impurity-introduced layer into which B is introduced as an impurity or a two-dimensional hole gas.

3. A field effect transistor according to claim 1, further comprising a passivation layer made of oxide formed on said gate insulating layer, said gate electrode being formed on said passivation layer.

4. A field effect transistor according to claim 1, wherein the gate insulating layer is made of a ferroelectric nitride in which a layer structure made of six-membered rings consisting of B and N is stacked.

5. A field effect transistor according to claim 4, wherein the angle between the stacking direction of the layered structure and the normal direction of the substrate surface is 0 to 60 degrees.

6. A field effect transistor according to claim 4 or 5, wherein the gate insulating layer contains at least one of the elements Al, Sc, Si, Mg, Be, C, O, and F in addition to B and N.

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