Wiring circuit board

Abstract

This wiring circuit board comprises a transparent substrate and a metal layer formed in a mesh shape on the transparent substrate. The metal layer includes a plurality of intersecting portions and a plurality of wiring portions connecting the plurality of intersecting portions. Each wiring portion has a width of 1 μm or more and 10 μm or less. A plurality of intersection forming regions in which a plurality of the intersecting portions are to be formed and a plurality of wiring forming regions in which a plurality of the wiring portions are to be formed are defined on one surface of the transparent substrate. An intersection surrounding region surrounding each intersection forming region is divided into a plurality of small regions by means of a plurality of wiring forming regions that extend from the intersection forming region. In the metal layer, the area of a part formed so as to protrude from the intersecting portions formed in each intersection forming region onto each small region surrounding the intersection forming region is 4.00 μm2 or less.

Description

Wiring circuit board

[0001] The present invention relates to a wiring circuit board in which wiring is formed on a transparent substrate.

[0002] There are wiring circuit boards in which wiring is formed on a transparent substrate. Such wiring circuit boards are used in various devices such as touch panels and defroster devices, and it is required that the wiring circuit board be perceived as transparent by the user who sees it. For example, Patent Document 1 describes a conductive sheet containing a base material and a plurality of patterned conductors as an example of a wiring circuit board. The base material is a transparent electrically insulating film and corresponds to the transparent substrate described above. Each patterned conductor has a linear shape and is arranged on one surface of the base material and corresponds to the wiring described above. The conductive sheet is placed in a part of the side window of a passenger car and has a certain degree of transparency.

[0003] Japanese Patent Publication No. 2022-12773

[0004] The wiring formed on the transparent substrate mentioned above can reduce the transparency of the circuit board. Depending on the function required of the circuit board, a mesh-like wiring pattern may be formed on the transparent substrate. In this case, multiple intersections where multiple wires intersect will be formed on the transparent substrate. If the size of each intersection is large, it will be more easily visible to the user. In other words, the transparency of the circuit board will decrease.

[0005] The objective of the present invention is to provide a wiring circuit board that can achieve high transparency.

[0006] A wiring circuit board according to one aspect of the present invention comprises a transparent substrate having one surface and a metal layer formed in a mesh pattern on the one surface of the transparent substrate, wherein the metal layer includes a plurality of intersections and a plurality of wiring sections connecting the plurality of intersections, the plurality of wiring sections are formed such that three or more wiring sections extend from each intersection on the one surface of the transparent substrate, each wiring section has a width of 1 μm or more and 10 μm or less, and the plurality of intersections are to be formed on the one surface of the transparent substrate according to the design Multiple intersection-forming regions and multiple design wiring-forming regions where the multiple wiring portions are to be formed are defined, and on one surface of the transparent substrate, the region surrounding each intersection-forming region is divided into three or more sub-regions surrounding the intersection-forming region by the three or more wiring-forming regions extending from the intersection-forming region, and the area of ​​the portion of the metal layer that extends from the intersection portion formed on each intersection-forming region onto each sub-region surrounding the intersection-forming region is 4.00 μm². ２ The following applies:

[0007] According to the present invention, a wiring circuit board with high transparency can be realized.

[0008] Figure 1 is an external perspective view of a wiring circuit board according to one embodiment of the present invention. Figure 2 is a cross-sectional view taken along line A-A inside the outlet of the wiring circuit board of Figure 1. Figure 3 is a plan view showing an example of a region on one surface of a transparent substrate on which a metal layer is to be formed. Figure 4 is a plan view showing an example of a wiring circuit board made using the transparent substrate of Figure 3. Figure 5 is a partially enlarged plan view of the wiring circuit board of Figure 4. Figure 6 is a plan view showing multiple intersection-forming regions and multiple wiring-forming regions of a transparent substrate according to a first modified example. Figure 7 is a plan view showing a wiring circuit board according to the first modified example made using the transparent substrate of Figure 6. Figure 8 is a partially enlarged plan view of the wiring circuit board of Figure 7. Figure 9 is a plan view showing multiple intersection-forming regions and multiple wiring-forming regions of a transparent substrate according to a second modified example. Figure 10 is a plan view showing a wiring circuit board according to the second modified example made using the transparent substrate of Figure 9. Figure 11 is a partially enlarged plan view of the wiring circuit board of Figure 10. Figure 12 is a schematic cross-sectional view for explaining the manufacturing method of a wiring circuit board according to one embodiment of the present invention. Figure 13 is a schematic cross-sectional view illustrating a method for manufacturing a wiring circuit board according to one embodiment of the present invention. Figure 14 is a schematic cross-sectional view illustrating a method for manufacturing a wiring circuit board according to one embodiment of the present invention. Figure 15 is a schematic cross-sectional view illustrating a method for manufacturing a wiring circuit board according to one embodiment of the present invention. Figure 16 is a schematic cross-sectional view illustrating a method for manufacturing a wiring circuit board according to one embodiment of the present invention. Figure 17 is a schematic cross-sectional view illustrating a method for manufacturing a wiring circuit board according to one embodiment of the present invention. Figure 18 is an SEM image of sample A. Figure 19 is an SEM image of sample B. Figure 20 is an SEM image of sample C. Figure 21 is an SEM image of sample D. Figure 22 is a diagram showing the results of a transparency evaluation test. Figure 23 is a cross-sectional view of a wiring circuit board according to another embodiment.

[0009] Hereinafter, a wiring circuit board according to one embodiment of the present invention will be described with reference to the drawings. In the following description, the degree of agreement (degree of agreement) between the image of a predetermined space perceived by the user when the user looks at the predetermined space directly and the image of the predetermined space perceived by the user when the user looks at the predetermined space with the wiring circuit board in between will be referred to as the transparency of the wiring circuit board. The transparency of the wiring circuit board is considered to be higher the higher the degree of agreement between the two images. The degree of agreement between the two images includes the degree of agreement in brightness, the degree of agreement in contrast, and the degree of agreement in contours of the two images perceived by the user.

[0010] 1. Diagram 1 of the wiring circuit board configuration is an external perspective view of a wiring circuit board 1 according to one embodiment of the present invention. The wiring circuit board 1 according to this embodiment mainly has a configuration in which a metal layer 20 and a cover insulating layer 90 are formed in that order on a transparent substrate 10.

[0011] The transparent substrate 10 has a light transmittance of, for example, 80% or more in the visible light region (for example, 380 nm to 780 nm) and is electrically insulating. The transparent substrate 10 according to this embodiment is formed of a cycloolefin polymer resin. The transparent substrate 10 may also be formed of an organic insulating material such as polyester resin, acrylic resin, polycarbonate resin, or polyimide resin. Furthermore, a glass substrate and a transparent ceramic substrate may be used as the transparent substrate 10. The transparent substrate 10 has a thickness of, for example, 20 μm to 200 μm.

[0012] The metal layer 20 is formed in a mesh pattern on one surface of the transparent substrate 10. Details of the metal layer 20 will be described later. The cover insulating layer 90 is formed on one surface of the transparent substrate 10 so as to cover the metal layer 20. The cover insulating layer 90 according to this embodiment is made of a transparent synthetic resin such as epoxy resin, cycloolefin polymer resin, polycarbonate resin, polyethylene terephthalate resin, polystyrene resin, or polyethylene naphthalate resin. The cover insulating layer 90 has a thickness of, for example, 1 μm to 30 μm. Note that the cover insulating layer 90 is not necessarily required in the wiring circuit board 1.

[0013] The metal layer 20 consists of one or more metals. In Figure 1, an enlarged plan view of a portion of the external perspective view of the wiring circuit board 1 (the portion within the frame of the thick dashed line) is shown within the dashed-dotted line outlet.

[0014] As shown in the callout in Figure 1, the metal layer 20 is formed in a mesh pattern in plan view. More specifically, the metal layer 20 in this example includes a plurality of intersections 21 and a plurality of wiring sections 22 having a common length. The plurality of intersections 21 and the plurality of wiring sections 22 are formed such that, in plan view, four wiring sections 22 extend from each intersection 21 in four mutually orthogonal directions, and each wiring section 22 connects two intersections 21.

[0015] Figure 2 is a cross-sectional view taken along line A-A inside the outlet of the wiring circuit board 1 shown in Figure 1. As shown in Figure 2, the metal layer 20 includes a seed layer 20a and a plating layer 20b. In Figure 2, the cross-section of the wiring portion 22 of the metal layer 20 is shown, but the cross-section of the intersection portion 21 has basically the same configuration as the cross-section of the wiring portion 22.

[0016] The seed layer 20a according to this embodiment has a structure in which, for example, a copper thin film is further laminated on a base layer. The base layer is composed of one or more laminated thin films. The one or more thin films constituting the base layer include thin films made of a metal or alloy containing one or more elements from titanium, molybdenum, tungsten, nickel, aluminum, and chromium. In addition to the above example, the base layer may also include a thin film made of indium tin oxide (ITO). On the base layer of the seed layer 20a, instead of the copper thin film described above, a thin film made of a metal or alloy containing one or more elements from gold, silver, platinum, lead, tin, nickel, cobalt, indium, rhodium, chromium, tungsten, and ruthenium may be formed.

[0017] Each thin film constituting the seed layer 20a is formed, for example, by sputtering or electroless plating. The seed layer 20a has a thickness of 0.01 μm or more and 1 μm or less.

[0018] The plating layer 20b is formed by electroplating and is made of a metal or alloy containing one or more elements from among gold, silver, platinum, lead, tin, nickel, cobalt, indium, rhodium, chromium, tungsten, and ruthenium. In this embodiment, the plating layer 20b is made of copper.

[0019] In this embodiment, each wiring portion 22 of the metal layer 20 has a width W of 1 μm to 10 μm. Furthermore, each wiring portion 22 has a thickness T of 0.5 μm to 10 μm in a direction perpendicular to one surface of the transparent substrate 10.

[0020] 2. Before manufacturing the detailed wiring circuit board 1 for the metal layer 20, a design area is determined on one surface of the transparent substrate 10 in which the metal layer 20 should be formed. Figure 3 is a plan view showing an example of an area on one surface of the transparent substrate 10 in which the metal layer 20 should be formed.

[0021] As shown in Figure 3, on one surface of the transparent substrate 10 before the manufacture of the wiring circuit board 1, there are defined multiple intersection-forming regions 11 where multiple intersections 21 of the metal layer 20 are to be formed, and multiple wiring-forming regions 12 where multiple wiring portions 22 of the metal layer 20 are to be formed. These regions (11, 12) are formed such that, in a plan view, four wiring-forming regions 12 extend from each intersection-forming region 11 in four mutually orthogonal directions. Furthermore, these regions (11, 12) are formed such that each wiring-forming region 12 connects two intersection-forming regions 11 that are spaced apart from each other. In Figure 3, dot patterns of different densities are applied to the intersection-forming regions 11 and the wiring-forming regions 12 to make them easier to distinguish.

[0022] Furthermore, in the transparent substrate 10 according to this embodiment, an intersection surrounding region AR is defined to surround each intersection forming region 11, so as to be associated with the intersection forming region 11. More specifically, the intersection surrounding region AR is defined such that its outer edge forms a circle centered on the corresponding intersection forming region 11, as shown by the dashed line in Figure 3.

[0023] Furthermore, the intersection surrounding region AR is divided into multiple (four in this example) sub-regions SR by multiple (four in this example) wiring formation regions 12 extending from the intersection formation region 11 within the intersection surrounding region AR.

[0024] Incidentally, the metal layer 20 is opaque or has significantly lower transparency than the transparent substrate 10 and the cover insulating layer 90. Therefore, the transparency of the wiring circuit board 1 is determined mainly by the size and shape of the metal layer 20 formed on the transparent substrate 10. As described above, a plurality of intersection formation regions 11 and a plurality of wiring formation regions 12 are predetermined on the transparent substrate 10 before the manufacturing of the wiring circuit board 1. However, if these formation regions (11, 12) are excessively large, or if the metal layer 20 is formed so as to extend beyond the formation regions (11, 12), the transparency of the wiring circuit board 1 will decrease.

[0025] Figure 4 is a plan view showing an example of a wiring circuit board 1 made using the transparent substrate 10 of Figure 3. In Figure 4, the boundaries between multiple intersection-forming regions 11 and multiple wiring-forming regions 12 on one surface of the transparent substrate 10 and the regions other than those regions (11, 12) are shown by dotted lines, and one intersection-enclosing region AR is shown by a dashed line.

[0026] Here, if the width W of each wiring portion 22 formed on the wiring circuit board 1 is excessively large, the transparency of the wiring circuit board 1 will be greatly reduced. Also, each of the multiple wiring portions 22 is in close proximity to other wiring portions 22 near the intersection portion 21 to which the wiring portion 22 is connected. Therefore, when manufacturing the wiring circuit board 1, a portion of the metal layer 20 may protrude from the intersection portion 21 into multiple small regions SR. If a large amount of the metal layer 20 protrudes into at least one of the multiple small regions SR surrounding a single intersection portion 21, the transparency of the wiring circuit board 1 will be greatly reduced.

[0027] Therefore, the inventors conducted various experiments and simulations to find the dimensional conditions of each part of the wiring circuit board 1 that must be satisfied in order to obtain a wiring circuit board 1 with high transparency (hereinafter referred to as transparency conditions).

[0028] The transparency condition includes that each wiring portion 22 of the metal layer 20 has a width W of 1 μm or more and 10 μm or less. Furthermore, the transparency condition includes that the area of ​​the portion of the metal layer 20 that extends from the intersection portion 21 formed on each intersection-forming region 11 onto each small region SR surrounding the wiring-forming region 12 is 4.00 μm. ２ This includes the following:

[0029] Figure 5 is a partially enlarged plan view of the wiring circuit board 1 shown in Figure 4. Figure 5 shows an enlarged plan view of one intersection 21 and its vicinity in the plan view of Figure 4. The wiring circuit board 1 according to this embodiment satisfies the transparency conditions described above. In this case, each wiring portion 22 has a width W of 1 μm or more and 10 μm or less. By having a width W of 1 μm or more for each wiring portion 22, the occurrence of defects in the formation of the wiring portion 22 due to making the width W of the wiring portion 22 excessively small is prevented. This suppresses a decrease in the reliability of the wiring circuit board 1. Furthermore, by having a width W of 10 μm or less for each wiring portion 22, the area occupied by the metal layer 20 on one surface of the transparent substrate 10 is reduced compared to the case where wiring portions 22 with a width W greater than 10 μm are provided on one surface of the transparent substrate 10.

[0030] Preferably, each wiring section 22 has a width W of 1 μm to 5 μm. In this case, the area occupied by the metal layer 20 on one surface of the transparent substrate 10 is further reduced. Also, preferably, each wiring section 22 has a thickness T of 5 μm to 10 μm. In this case, since each wiring section 22 has a width W of 1 μm to 10 μm, the aspect ratio of the wiring section 22 (the ratio of thickness T to width W (T / W)) does not become excessively low. As a result, the area occupied by each wiring section 22 on one surface of the transparent substrate 10 can be reduced while ensuring a certain amount of cross-sectional area of ​​the wiring section 22 (the area of ​​the cross-section perpendicular to the direction in which the wiring section 22 extends). Therefore, it becomes possible to lower the resistance value of the wiring section 22.

[0031] In the partially enlarged plan view of Figure 5, the portion of the metal layer 20 that extends from one intersection 21 into each small region SR is shown as a dot pattern. As shown in Figure 5, the metal layer 20 does not necessarily extend uniformly into the multiple small regions SR surrounding one intersection 21.

[0032] As described above, the wiring circuit board 1 according to this embodiment satisfies the transparency requirement. Therefore, the area of ​​the portion of the metal layer 20 that extends from each intersection 21 into each small region SR of the transparent substrate 10 is 4.00 μm². ２ The following is achieved. This suppresses the enlargement of the metal layer 20 at each intersection 21. As a result, the wiring circuit board 1 has high transparency.

[0033] Here, it is preferable that the angle α between two adjacent wiring sections 22 (hereinafter referred to as the wiring angle) around each intersection 21 (four in this example) is 30° or more. In the wiring circuit board 1 shown in Figures 1 to 5, the wiring angle α between two adjacent wiring sections 22 is 90°.

[0034] When the wiring angle α is 30° or greater, a wider space is formed between each intersection 21 and between two adjacent wiring sections 22 around the intersection 21, compared to when the wiring angle α is less than 30°. In other words, it is less likely that a significantly narrow and long space will be formed between two adjacent wiring sections 22. Therefore, it becomes unnecessary to form extremely fine wiring sections 22 patterns. As a result, when manufacturing the wiring circuit board 1, the occurrence of large amounts of overhang from each intersection 21 into multiple small regions SR is suppressed.

[0035] 3. First Modified Example In the wiring circuit board 1 according to this embodiment, the metal layer 20 only needs to be formed on one surface of the transparent substrate 10 so as to satisfy the transparency conditions described above. Figure 6 is a plan view showing a plurality of intersection-forming regions 11 and a plurality of wiring-forming regions 12 of the transparent substrate 10 according to the first modified example. In the plurality of intersection-forming regions 11 and a plurality of wiring-forming regions 12 in Figure 6, the angular spacing of the four wiring-forming regions 12 extending from each intersection-forming region 11 is different from that of the transparent substrate 10 in Figure 3. In this example as well, an intersection-enclosing region AR is defined to surround each intersection-forming region 11. Furthermore, the intersection-enclosing region AR is divided into four small regions SR by the four wiring-forming regions 12 extending from the intersection-forming regions 11 within the intersection-enclosing region AR.

[0036] FIG. 7 is a plan view showing a wiring circuit board 1 according to a first modified example manufactured using the transparent substrate 10 of FIG. 6. In FIG. 7, the boundaries between the plurality of intersection formation regions 11 and the plurality of wiring formation regions 12 on one surface of the transparent substrate 10 and the regions other than those regions (11, 12) are indicated by dotted lines, and one intersection surrounding region AR is indicated by a dashed-dotted line. As shown in FIG. 7, the metal layer 20 according to the first modified example is basically formed so as to overlap the plurality of intersection formation regions 11 and the plurality of wiring formation regions 12 defined on the transparent substrate 10 of FIG. 6.

[0037] FIG. 8 is a partially enlarged plan view of the wiring circuit board 1 of FIG. 7. In FIG. 8, an enlarged plan view of one intersection portion 21 and its vicinity in the plan view of FIG. 7 is shown. Each wiring portion 22 in this example has a width W of 1 μm or more and 10 μm or less, similar to the example of the wiring circuit board 1 in FIGS. 1 to 5. Also, the area of the portion of the metal layer 20 protruding from each intersection portion 21 into each small region SR of the transparent substrate [ ２ is 4.00 μm or less. Thereby, the wiring circuit board 1 has high transparency. In the partially enlarged plan view of FIG. 8, similar to the example of FIG. 5, the portion of the metal layer 20 protruding from one intersection portion 21 into each small region SR is indicated by a dot pattern.

[0038] Here, as shown in FIG. 8, in this example, since four wiring portions 22 extend from each intersection portion 21, four wiring angles α are defined in the circumferential direction with respect to the intersection portion 21 as a reference. Specifically, in the wiring circuit board 1 according to the first modified example, around one intersection portion 21, the wiring angles α of 60°, 120°, 60°, and 120° are set in this order

[0039] In this example as well, the wiring angle α is 30° or more. Thereby, when manufacturing the wiring circuit board 1, the occurrence of a large amount of protrusion from each intersection portion 21 into the plurality of small regions SR is suppressed

[0040] 4. Second Modified Example FIG. 9 is a plan view showing a plurality of intersection formation regions 11 and a plurality of wiring formation regions 12 of the transparent substrate 10 according to the second modified example. The plurality of intersection formation regions 11 and the plurality of wiring formation regions 12 in FIG. 9 are formed such that three wiring formation regions 12 extend from each intersection formation region 11, which is different from the example of the transparent substrate 10 in FIG. 3. Also in this example, an intersection surrounding region AR that surrounds the intersection formation region 11 is defined so as to be associated with each intersection formation region 11. Further, the intersection surrounding region AR is divided into three small regions SR by three wiring formation regions 12 extending from the intersection formation region 11 within the intersection surrounding region AR.

[0041] FIG. 10 is a plan view showing a wiring circuit board 1 according to the second modified example manufactured using the transparent substrate of FIG. 9. In FIG. 10, the boundaries between the plurality of intersection formation regions 11 and the plurality of wiring formation regions 12 on one surface of the transparent substrate 10 and the regions other than those regions (11, 12) are shown by dotted lines, and one intersection surrounding region AR is shown by a dashed-dotted line. As shown in FIG. 10, the metal layer 20 according to the first modified example is basically formed so as to overlap the plurality of intersection formation regions 11 and the plurality of wiring formation regions 1 defined on the transparent substrate 10 in FIG. 9.

[0042] FIG., 11 is a partially enlarged plan view of the wiring circuit board 1 in FIG. 10. In FIG., 11, an enlarged plan view of one intersection portion 21 and its vicinity in the plan view of FIG., 10 is shown. Each wiring portion in this example has a width W of not less than 1 μm and not more than 10 μm, similar to the example of the wiring circuit board 1 in FIGS. 1 to 5. Also, the area of the portion of the metal layer 20 that protrudes from each intersection portion 21 of the transparent substrate 10 into each small region SR is 4.00 μm ２ or less. Thereby, the wiring circuit board 1 has high transparency. In the partially enlarged plan view of FIG. 11, similar to the example of FIG. 5, the portion of the metal layer 20 that protrudes from one intersection portion 21 into each small region SR is shown by a dot pattern.

[0043] Here, as shown in Figure 11, in this example, three wiring sections 22 extend from each intersection 21, so three wiring angles α are determined in the circumferential direction with respect to the intersection 21. Specifically, in the wiring circuit board 1 according to the second modified example, the wiring angle α between each pair of adjacent wiring sections 22 is 120°.

[0044] In this example as well, the wiring angle α is 30° or greater. This suppresses the occurrence of large amounts of overflow from each intersection 21 into multiple small regions SR during the manufacturing of the wiring circuit board 1.

[0045] 5. Method for Manufacturing the Wired Circuit Board 1 Figures 12 to 17 are schematic cross-sectional views illustrating a method for manufacturing the wired circuit board 1 according to one embodiment of the present invention. Note that the schematic cross-sectional views in Figures 12 to 17 correspond to the cross-sectional view along line A-A in Figure 1 (Figure 2). First, as shown in Figure 12, a transparent substrate 10 having a flat top surface (one surface) and a flat bottom surface is prepared. The transparent substrate 10 in this example is made of a cycloolefin polymer resin and is flexible.

[0046] Next, as shown in Figure 13, a seed layer 20a is formed so as to cover the entire surface of one side of the transparent substrate 10. In this example, the seed layer 20a has a structure in which a copper thin film is laminated on a base layer. In this case, for example, a base layer made of an indium tin oxide (ITO) thin film is formed on one side of the transparent substrate 10 by sputtering. Subsequently, a copper thin film is formed on the base layer by sputtering.

[0047] Next, after photoresist is applied to the surface of the seed layer 20a, exposure and development processes are performed. As a result, a plating resist layer 30 having a predetermined pattern of openings 31 is formed on the seed layer 20a, as shown in Figure 14. In this example, the openings 31 are a mesh pattern. Alternatively, the plating resist layer 30 may be formed by attaching a dry film resist to the surface of the seed layer 20a and then performing exposure and development processes, instead of applying photoresist to the surface of the seed layer 20a.

[0048] Next, as shown in Figure 15, a plating layer 20b is formed by electroplating in the area of ​​the seed layer 20a where the plating resist layer 30 is not formed, that is, the portion of the seed layer 20a exposed through the opening 31. After that, as shown in Figure 16, the plating resist layer 30 is removed.

[0049] Next, as shown in Figure 17, the unwanted portion of the exposed seed layer 20a is removed, for example, by wet etching or dry etching. When removing the unwanted portion of the seed layer 20a, an etching resist may be formed on the upper surface of the exposed plating layer 20b. In this way, the metal layer 20 consisting of the seed layer 20a and the plating layer 20b is formed, and the wiring circuit board 1 is completed.

[0050] As shown in the example in Figure 2, in the wiring circuit board 1, a cover insulating layer 90 covering the metal layer 20 may be formed on one surface of the transparent substrate 10.

[0051] In the wiring circuit board 1, the metal layer 20 has a pattern corresponding to the openings 31 of the plating resist layer 30 in Figure 14. As a result, the metal layer 20 is formed in a mesh-like manner on one surface of the transparent substrate 10. Consequently, the metal layer 20 has multiple intersections 21 and multiple wiring portions 22 in a plan view of the wiring circuit board 1.

[0052] As described above, the transparent substrate 10 in this example is made of a cycloolefin polymer resin and is flexible. In this case, the wiring circuit board 1 can be manufactured by a roll-to-roll method.

[0053] In the roll-to-roll method, for example, a roll (hereinafter referred to as the "feed-out roll") on which a long transparent substrate 10 is wound is prepared, and the transparent substrate 10 is fed out from the feed-out roll. The fed-out transparent substrate 10 is then wound onto another roll (hereinafter referred to as the "wind-up roll"). At this time, each part of the transparent substrate 10 being transported between the feed-out roll and the wind-up roll is sequentially subjected to the multiple processes described using Figures 12 to 17 and Figure 2 above. As a result, a large number of wiring circuit boards 1 can be manufactured with high efficiency.

[0054] The wiring circuit board 1 may be manufactured by a method other than the roll-to-roll method. For example, if the transparent substrate 10 is made of a material with poor flexibility such as glass, the wiring circuit board 1 may be manufactured by a single-wafer method in which processing is performed sequentially on a single sheet.

[0055] 6. Effects (a) In the wiring circuit board 1 according to this embodiment, each of the plurality of wiring portions 22 has a width W of 1 μm or more and 10 μm or less. Furthermore, the area of ​​the portion formed so as to extend from each of the plurality of intersection portions 21 of the metal layer 20 into each small region SR region surrounding the intersection portion 21 is 4.00 μm ２ The following is the result. As a result, the wiring circuit board 1 has high transparency.

[0056] (b) In addition, in the wiring circuit board 1, the wiring angle α between each pair of adjacent wiring sections 22 extending from each intersection 21 of the metal layer 20 is 30° or more. This suppresses the occurrence of large amounts of overflow from each intersection 21 into multiple small regions SR during the manufacturing of the wiring circuit board 1.

[0057] (c) The metal layer 20 of the wiring circuit board 1 shown in Figures 4, 8, and 9 is formed such that three or four wiring sections 22 extend from each intersection 21. In this case, the shape of the metal layer 20 is less likely to become complicated at each intersection 21 and its vicinity compared to the case where five or more wiring sections 22 extend from each intersection 21. As a result, the occurrence of the metal layer 20 overhanging at each intersection 21 is reduced.

[0058] 7. Transparency Evaluation Test The inventors created four wiring circuit boards 1 as Sample A, Sample B, Sample C, and Sample D to confirm the degree of difference in transparency between wiring circuit boards 1 that meet the transparency conditions and wiring circuit boards 1 that do not meet the transparency conditions. SEM (scanning electron microscope) images of these Samples A, B, C, and D are shown in Figures 18 to 21.

[0059] Figure 18 shows an SEM image of sample A. As shown in Figure 18, the wiring circuit board 1 of sample A has the same configuration as the wiring circuit board 1 in Figure 10. Note that sample A does not have the configuration corresponding to the cover insulating layer 90 in Figure 1. In sample A, the intersection surrounding region AR surrounding one intersection 21 is divided into three small regions SR by three wiring sections 22. To distinguish the three small regions SR in Figure 18 from each other, these small regions SR are called the first small region SR11, the second small region SR12, and the third small region SR13.

[0060] Figure 19 shows an SEM image of sample B. As shown in Figure 19, the wiring circuit board 1 of sample B has the same configuration as the wiring circuit board 1 in Figure 1. Note that sample B does not have the configuration corresponding to the cover insulating layer 90 in Figure 1. In sample B, the intersection surrounding region AR surrounding one intersection 21 is divided into four small regions SR by four wiring sections 22. To distinguish the four small regions SR in Figure 19 from each other, these small regions SR are called the first small region SR21, the second small region SR22, the third small region SR23, and the fourth small region SR24.

[0061] Figure 20 shows an SEM image of sample C. As shown in Figure 20, the wiring circuit board 1 of sample C has the same configuration as the wiring circuit board 1 in Figure 7. Note that sample C does not have the same configuration as the cover insulating layer 90 in Figure 1. In sample C, the intersection surrounding region AR surrounding one intersection 21 is divided into four small regions SR by four wiring sections 22. To distinguish the four small regions SR in Figure 20 from each other, these small regions SR are called the first small region SR31, the second small region SR32, the third small region SR33, and the fourth small region SR34.

[0062] Figure 21 shows an SEM image of sample D. As shown in Figure 21, the wiring circuit board 1 of sample D has the same configuration as the wiring circuit board 1 in Figure 7, as with sample C. However, the wiring angle α between each pair of adjacent wiring sections 22 is different between sample C and sample D. Sample D does not have a configuration corresponding to the cover insulating layer 90 in Figure 1. In sample D, the intersection surrounding region AR surrounding one intersection section 21 is divided into four small regions SR by four wiring sections 22. To distinguish the four small regions SR in Figure 21 from each other, these small regions SR are called the first small region SR41, the second small region SR42, the third small region SR43, and the fourth small region SR44.

[0063] As a transparency evaluation test, the inventors measured the width W of the wiring portion 22 of each sample A, B, C, and D, and also measured the area of ​​the metal layer 20 that extended into a plurality of sub-regions defined for each sample. Furthermore, they visually observed each sample A, B, C, and D and evaluated the transparency of each sample A, B, C, and D.

[0064] Figure 22 shows the results of the transparency evaluation test. In Figure 22, along with the transparency evaluation results, the measurement results of the width W of the wiring section 22 of samples A, B, C, and D (see Figures 18 to 20) are shown. In addition, the measurement results of the area of ​​the metal layer 20 that extends into multiple sub-regions defined for each sample A, B, C, and D are shown.

[0065] According to the measurement results in Figure 22, the width W of each wiring section 22 in samples A, B, C, and D is within the range of the transparency conditions (1 μm to 10 μm). Also, in samples A, B, and C, the area of ​​the portion of the metal layer 20 that extends from each intersection 21 into each small region SR of the transparent substrate 10 is 4.00 μm. ２ The following applies. Therefore, samples A, B, and C satisfy the transparency conditions described above. On the other hand, in sample D, the area of ​​the portion of the metal layer 20 that extends from each intersection 21 into a small area SR of the transparent substrate 10 is 4.00 μm. ２ It exceeds the limit. Therefore, sample D does not meet the transparency requirements mentioned above.

[0066] As shown in Figure 22, the inventors visually observed a single intersection 21 and its surrounding area in sample A and evaluated that sample A has extremely high transparency. The inventors also visually observed a single intersection 21 and its surrounding area in sample B and evaluated that sample B has high transparency. The inventors also visually observed a single intersection 21 and its surrounding area in sample C and evaluated that sample C has moderately high transparency. Furthermore, the inventors visually observed a single intersection 21 and its surrounding area in sample D and evaluated that sample D has significantly lower transparency compared to samples A, B, and C. These results confirm that the wiring circuit board 1 has sufficiently high transparency by satisfying the above transparency conditions, as seen in samples A, B, and C.

[0067] 8. Other Embodiments (a) In the wiring circuit board 1 according to the above embodiment, the metal layer 20 may include, in addition to the seed layer 20a and the plating layer 20b, a coating layer that covers the surface of the laminate consisting of the seed layer 20a and the plating layer 20b. That is, in the metal layer 20, a coating layer may be formed to cover the side portion of the seed layer 20a, the side portion of the plating layer 20b, and the upper surface portion of the plating layer 20b as shown in Figure 2. In this case, the coating layer may be formed of a black metal thin film, or it may be made of a black resin material such as polyimide resin or epoxy resin. Alternatively, the coating layer may be made of a black ceramic material.

[0068] (b) In the wiring circuit board 1 according to the above embodiment, the metal layer 20 is formed by a so-called semi-additive method, but the present invention is not limited thereto. The metal layer 20 may be formed by an additive method or by a subtractive method.

[0069] (c) In the wiring circuit board 1 according to the above embodiment, the metal layer 20 is formed such that a pattern of squares or hexagons having a common shape is arranged on one surface of the transparent substrate 10 by a plurality of intersections 21 and a plurality of wiring portions 22, but the present invention is not limited thereto. The metal layer 20 may be formed such that a pattern of other polygons, such as triangles or pentagons, is arranged on one surface of the transparent substrate 10. Alternatively, the metal layer 20 may be formed such that a pattern of multiple types of polygons of different sizes is randomly arranged on one surface of the transparent substrate 10.

[0070] (d) In the wiring circuit board 1 according to the above embodiment, the metal layer 20 includes a seed layer 20a and a plating layer 20b, but the present invention is not limited thereto. The metal layer 20 does not have to include a seed layer 20a. Figure 23 is a cross-sectional view of a wiring circuit board 1 according to another embodiment. The cross-sectional view of Figure 23 corresponds to the cross-sectional view of Figure 2. In the wiring circuit board 1 of Figure 23, the metal layer 20X is formed as a single layer. This metal layer 20X is formed of a metal or alloy containing one or more elements from among copper, gold, silver, platinum, lead, tin, nickel, cobalt, indium, rhodium, chromium, tungsten, and ruthenium, similar to the plating layer 20b according to the above embodiment.

[0071] 9. Correspondence between parts of the embodiment and components of the claims Below, examples of the correspondence between components of the claims and components of the embodiments will be described. Various other elements having the configuration or function described in the claims can also be used as components of the claims.

[0072] In the above embodiment, the transparent substrate 10 is an example of a transparent substrate, the metal layer 20 is an example of a metal layer, the plurality of intersections 21 is an example of a plurality of intersections, the plurality of wiring portions 22 is an example of a plurality of wiring portions, the plurality of intersection-forming regions 11 defined on the transparent substrate 10 is an example of a plurality of intersection-forming regions, and the plurality of wiring-forming regions 12 defined on the transparent substrate 10 is an example of a plurality of wiring-forming regions.

[0073] Further, each intersection surrounding region AR defined on one surface of the transparent substrate 10 is an example of a region surrounding each intersection formation region, the small region SR is an example of a small region, the wiring - to - wiring angle α is an example of an angle formed by two adjacent wiring portions around an intersection portion, and the wiring circuit board 1 is an example of a wiring circuit board.

[0074] Further, the seed layer 20a is an example of a seed layer, the plating layer 20b is an example of a plating layer, and the plating resist layer 30 is an example of a resist layer.

[0075] 10. Summary of the Embodiment (Paragraph 1) The wiring circuit board according to Paragraph 1 includes: a transparent substrate having one surface; and a metal layer formed in a mesh shape on the one surface of the transparent substrate. The metal layer includes: a plurality of intersection portions; and a plurality of wiring portions connecting the plurality of intersection portions. The plurality of wiring portions are formed on the one surface of the transparent substrate such that three or more wiring portions extend from each intersection portion. Each wiring portion has a width of 1 μm or more and 10 μm or less. On the one surface of the transparent substrate, a plurality of design - based intersection formation regions where the plurality of intersection portions are to be respectively formed and a plurality of design - based wiring formation regions where the plurality of wiring portions are to be respectively formed are defined; on the one surface of the transparent substrate, the region surrounding each intersection formation region is divided into three or more small regions surrounding the intersection formation region by the three or more wiring formation regions extending from the intersection formation region; the area of the portion of the metal layer formed on each intersection formation region and protruding onto each small region surrounding the intersection formation region is 4.00 μm ２ or less.

[0076] In this wiring circuit board, each of the multiple wiring sections of the mesh-like metal layer has a width of 1 μm to 10 μm. In this case, the fact that the width of the wiring section is 1 μm or more suppresses the decrease in reliability of the wiring circuit board caused by excessively reducing the cross-sectional area of ​​the wiring section. Furthermore, the fact that the width of the wiring section is 10 μm or less reduces the area occupied by the metal layer on one surface of the transparent substrate compared to the case where wiring sections with a width greater than 10 μm are provided on one surface of the transparent substrate. In addition, the area of ​​the portion formed to extend from each of the multiple intersections of the metal layer into each small region defined on one surface of the transparent substrate is 4.00 μm. ２ The following is achieved. This suppresses the enlargement of each intersection point of the metal layer. As a result, a wiring circuit board with high transparency is realized.

[0077] (Paragraph 2) In the wiring circuit board relating to Paragraph 1, on the surface of the transparent substrate, the angle between two adjacent wiring sections around each intersection, among the three or more wiring sections extending from each intersection, may be 30° or more.

[0078] When the angle between two adjacent wiring sections is 30° or more, a wider space is formed between the two wiring sections compared to when the angle between the two wiring sections is less than 30°. In other words, it becomes less likely for an extremely narrow and long space to form between the two wiring sections, eliminating the need to form an extremely fine wiring pattern. Therefore, the occurrence of a large amount of overhang from the intersection into the space between the two wiring sections is suppressed.

[0079] (3) In the wiring circuit board relating to paragraph 1 or 2, at least some of the wiring portions of the plurality of wiring portions may be formed such that three wiring portions extend from at least some of the intersections of the plurality of intersections on one surface of the transparent substrate.

[0080] In this case, the shape of the metal layer is less likely to become complex at each intersection and its vicinity. As a result, the occurrence of metal layer overhang at each intersection is reduced.

[0081] (Paragraph 4) In the wiring circuit board relating to Paragraph 1 or Paragraph 2, at least some of the wiring portions of the plurality of wiring portions may be formed such that four wiring portions extend from at least some of the intersections of the plurality of intersections on one surface of the transparent substrate.

[0082] In this case, the shape of the metal layer is less likely to become complex at each intersection and its vicinity. As a result, the occurrence of metal layer overhang at each intersection is reduced.

[0083] (Paragraph 5) In the wiring circuit board relating to Paragraph 4, the angle between one adjacent wiring section and another wiring section around each of the at least some intersections on one surface of the transparent substrate may be different from the angle between one adjacent wiring section and yet another wiring section around the intersection. In this case, the degree of freedom in designing the pattern formed on one surface of the transparent substrate by the metal layer is improved.

[0084] (Article 6) In a wiring circuit board relating to any one of Articles 1 to 5, each of the plurality of wiring formation regions may be defined to extend linearly with a predetermined width. In this case, a plurality of wiring portions extending linearly with a predetermined width are formed on one surface of the transparent substrate.

[0085] (Clause 7) A method for manufacturing a wiring circuit board according to Clause 7, comprising the steps of: preparing a transparent substrate having one surface; forming a mesh-like metal layer on the one surface of the transparent substrate, which includes a plurality of intersections and a plurality of wiring sections connecting the plurality of intersections; the step of forming the metal layer comprising: forming the plurality of wiring sections on the one surface of the transparent substrate such that three or more wiring sections extend from each intersection and each wiring section has a width of 1 μm or more and 10 μm or less; a plurality of design intersection-forming regions where the plurality of intersections are to be formed, and a plurality of design wiring-forming regions where the plurality of wiring sections are to be formed, on the one surface of the transparent substrate, the region surrounding each intersection-forming region is divided into three or more sub-regions surrounding the intersection-forming region by the three or more wiring-forming regions extending from the intersection-forming region; The area of ​​the portion of the metal layer that extends from the intersection formed on each intersection-forming region into each sub-region surrounding the said intersection-forming region is 4.00 μm². ２ The following applies:

[0086] In the manufacturing method of the wiring circuit board, the wiring circuit board is manufactured by forming a mesh-like metal layer on one surface of a transparent substrate. In the manufactured wiring circuit board, each of the multiple wiring portions of the mesh-like metal layer has a width of 1 μm to 10 μm. In this case, the fact that the width of the wiring portion is 1 μm or more suppresses the decrease in reliability of the wiring circuit board caused by excessively reducing the cross-sectional area of ​​the wiring portion. Furthermore, by having a wiring portion width of 10 μm or less, the area occupied by the metal layer on one surface of the transparent substrate is reduced compared to the case where wiring portions with a width greater than 10 μm are provided on one surface of the transparent substrate. In addition, the area of ​​the portion formed so as to extend from each of the multiple intersections of the metal layer into each small region defined on one surface of the transparent substrate is 4.00 μm. ２ The following is achieved. This suppresses the enlargement of each intersection point of the metal layer. As a result, a wiring circuit board with high transparency is realized.

[0087] (Clause 8) In the method for manufacturing a wiring circuit board according to Clause 7, the step of forming the metal layer may include: forming a seed layer on one surface of the prepared transparent substrate; forming a resist layer having openings of a predetermined pattern on the seed layer; forming a plating layer in the openings by electroplating; removing the resist layer after the formation of the plating layer; and removing the exposed portion of the seed layer after the removal of the resist layer, thereby forming a laminate of the seed layer and the plating layer as the metal layer.

[0088] In this case, compared to forming the metal layer using the subtractive method, the dimensional accuracy of each part of the metal layer of the manufactured wiring circuit board can be improved.

Claims

1. The material comprises a transparent substrate having one surface, and a metal layer formed in a mesh-like manner on the surface of the transparent substrate, wherein the metal layer includes a plurality of intersections and a plurality of wiring sections connecting the plurality of intersections, the plurality of wiring sections are formed such that three or more wiring sections extend from each intersection on the surface of the transparent substrate, each wiring section has a width of 1 μm or more and 10 μm or less, a plurality of design intersection-forming regions where the plurality of intersections are to be formed and a plurality of design wiring-forming regions where the plurality of wiring sections are to be formed are defined on the surface of the transparent substrate, the region surrounding each intersection-forming region on the surface of the transparent substrate is divided into three or more sub-regions surrounding the intersection-forming region by the three or more wiring-forming regions extending from the intersection-forming region, and the area of ​​the portion of the metal layer that extends from each intersection on each intersection-forming region onto each sub-region surrounding the intersection-forming region is 4.00 μm ２ The following is a wiring circuit board.

2. On the surface of the transparent substrate, the angle between two adjacent wiring sections around each intersection, among the three or more wiring sections extending from each intersection, is 30° or more, as described in claim 1.

3. The wiring circuit board according to claim 1 or 2, wherein at least some of the wiring portions of the plurality of wiring portions are formed on one surface of the transparent substrate such that three wiring portions extend from at least some of the intersections of the plurality of intersections.

4. The wiring circuit board according to claim 1 or 2, wherein at least some of the wiring portions of the plurality of wiring portions are formed on one surface of the transparent substrate such that four wiring portions extend from at least some of the intersections of the plurality of intersections.

5. The wiring circuit board according to claim 4, wherein on one surface of the transparent substrate, the angle formed by one adjacent wiring portion and another wiring portion around each of the at least some intersections is different from the angle formed by one adjacent wiring portion and yet another wiring portion around the said intersection.

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