Wiring board

Abstract

A wiring board 1 of an embodiment includes: a first conductor layer 41; a solder resist layer 6 formed above the first conductor layer 41; and a waveguide 101 formed above the solder resist layer 6. A metal layer M is formed below the solder resist layer 6 and disposed so as to overlap the formation region of the waveguide 101. The thickness Tm of the metal layer M and the thickness Ts of the solder resist layer 6 satisfy the relationship of formula 1. Formula 1: 1.2 ≤ Ts / Tm ≤ 2.0

Description

Wiring board

[0001] The present invention relates to a wiring board.

[0002] Patent Document 1 discloses a wiring board including an optical component and a waveguide. A metal layer is disposed on the substrate, and a waveguide is disposed on the metal layer.

[0003] International Publication No. 2023 / 095768

[0004] In the wiring board disclosed in Patent Document 1, since the waveguide is formed on the metal layer formed on the substrate, when the substrate has warping or the like, the waveguide is likely to be warped under the influence, which may adversely affect the optical characteristics. Also, when forming the waveguide, the thicknesses of the lower cladding layer, the core, etc. may vary.

[0005] The wiring board of the present invention includes a conductor layer, a solder resist layer formed on the conductor layer, and a waveguide formed on the solder resist layer. And a metal layer is formed under the solder resist layer and is arranged so as to overlap with the formation region of the waveguide, and the thickness Tm of the metal layer and the thickness Ts of the solder resist layer satisfy the relationship of Formula 1. 1.2 ≤ Ts / Tm ≤ 2.0 (Formula 1)

[0006] According to an embodiment of the present invention, even if a problem such as warping of the substrate occurs, the influence of the problem is appropriately mitigated by the solder resist layer and the metal layer. As a result, it is considered that the waveguide formed on the substrate has the influence of the problem reduced, and the variation in layer thickness is also suppressed in the formation of the lower cladding layer, the core, etc.

[0007] A plan view showing an example of a wiring board according to an embodiment of the present invention. A cross-sectional view of the wiring board shown in Figure 1, taken along line I-I. A cross-sectional view of the wiring board shown in Figure 1, taken along line II-II. A plan view showing a modified example of the waveguide of the wiring board according to an embodiment of the present invention. A cross-sectional view showing a modified example of the optical coupling method of the wiring board according to an embodiment of the present invention. A plan view showing a modified example of the arrangement of the metal layer in the wiring board according to an embodiment of the present invention. A plan view showing a modified example of the arrangement of the metal layer in the wiring board according to an embodiment of the present invention. A cross-sectional view of the wiring board shown in Figure 6A, taken along line III-III. A plan view showing a modified example of the arrangement of the metal layer in the wiring board according to an embodiment of the present invention. A cross-sectional view showing a modified example of the structure of the metal layer in the wiring board according to an embodiment of the present invention. A cross-sectional view showing an example of a modified wiring board according to an embodiment of the present invention. A cross-sectional view showing an example of a modified wiring board according to an embodiment of the present invention. A cross-sectional view showing an example of a modified wiring board according to an embodiment of the present invention.

[0008] <Structure of the Wiring Board of the Embodiment> The wiring board of the embodiment will be described with reference to the drawings. Figure 1 shows a plan view of wiring board 1, which is an example of the wiring board of the embodiment. Figure 2A shows a cross-sectional view taken along line I-I in Figure 1, and Figure 2B shows a cross-sectional view taken along line II-II in Figure 1. Note that wiring board 1 is merely an example of the wiring board of the embodiment. The wiring board 1 includes a substrate 10 formed by alternately laminating insulating layers and conductive layers, as will be described in detail later using Figures 10 and 11. Figures 2A and 2B show cross-sectional views of the upper part of the substrate 10, including the uppermost insulating layer 5 among the multiple insulating layers and conductive layers. The referenced drawings are drawn to make the features of the present invention easier to understand, and the size and proportions of each component may not be accurate.

[0009] As shown in Figures 1 to 2B, the wiring board 1 of the embodiment includes a substrate 10 and a waveguide 101. The upper surface of the substrate 10 is formed as a component mounting surface U on which the waveguide 101 and optical components E1 and electronic components are mounted. The waveguide 101 is formed on the component mounting surface U side of the substrate 10.

[0010] In the following explanation, the component mounting side U of the wiring board 1 will be referred to as "top," "upper side," "upward," or "upward direction," and the surface facing upward will be referred to as the "top surface." The side opposite to the component mounting side U will be referred to as "bottom," "lower side," "downward," or "downward direction," and the surface facing downward will be referred to as the "bottom surface."

[0011] Furthermore, the thickness direction of the wiring board 1 is also referred to as the "Z direction," with the upward direction being called the +Z direction and the downward direction being called the -Z direction. In addition, the waveguide 101 in the wiring board 1 is formed along the "X direction," and the optical signal propagating through the waveguide 101 propagates in the +X direction or the -X direction. The direction perpendicular to the X and Z directions is referred to as the "Y direction."

[0012] In Figures 2A and 2B, the substrate 10 is formed in the following order: second conductor layer 42, insulating layer 5, first conductor layer 41, and solder resist layer 6. An opening 6c is formed in the solder resist layer 6, and the upper surface of the conductor pad 4P formed below the opening 6c is exposed. Also, as shown in Figure 1, a metal layer M is formed on the same plane as the first conductor layer 41. The metal layer M is positioned below the solder resist layer 6 so as to overlap with the waveguide 101 formation region in a plan view, and as shown in Figures 2A and 2B. In the following, the first conductor layer 41 and the second conductor layer 42 are collectively referred to as the conductor layer 4.

[0013] Waveguide 101 includes a core 3 that transmits optical signals, and a lower cladding 21 and an upper cladding 22 surrounding the core 3. As shown in Figures 2A and 2B, waveguide 101 is formed from an upper cladding non-formation region 1a and an upper cladding formation region 1b. Specifically, the lower cladding 21 is formed on the upper surface 6a of the solder resist layer 6. Multiple cores 3 are formed on the upper surface 21a of the lower cladding 21. The upper cladding 22 is formed in the upper cladding formation region 1b and not in the upper cladding non-formation region 1a. Therefore, in the upper cladding formation region 1b, the core 3 is not exposed in a plan view, but in the upper cladding non-formation region 1a, the core 3 is exposed in a plan view. Waveguide 101 has two opposing ends in the X direction, one end 101e and the other end 101f. In the waveguide 101, an optical signal is incident on one end 101e or the other end 101f, and an optical signal is emitted from the other end 101f or the first end 101e. The waveguide may consist only of the upper cladding region. In that case, the core is exposed at one end and the other end of the waveguide. In the following, the lower cladding 21 and the upper cladding 22 are collectively referred to as cladding 2.

[0014] As shown in Figures 1 and 2A, the waveguide 101 has an upper cladding region 1b, which is the region where the upper cladding 22 is formed, and an upper cladding non-formation region 1a, which is the region where the upper cladding 22 is not formed. The upper cladding non-formation region 1a is provided on one end 101e side of the waveguide 101. In the upper cladding non-formation region 1a, the upper surface 31a of region 31, which is part of the core 3, and region 21ab, which is part of the upper surface 21a of the lower cladding 21, are exposed. The waveguide 101 is formed in the region where the lower cladding 21 is formed, and the core 3 is formed in the region where the core 3 is formed.

[0015] The core 3 and cladding 2 forming the waveguide 101 are made of any translucent material. The waveguide 101 can be made of, for example, an organic material or a hybrid material containing an organic material and an inorganic material, such as an inorganic polymer. Examples of organic materials include acrylic resins such as polymethyl methacrylate (PMMA), polyimide resins, polyamide resins, polyether resins, phenolic resins, fluororesins, silicone resins, and epoxy resins. A waveguide 101 made of an organic material can be lightweight, have high toughness, and be flexible.

[0016] The core 3 and cladding 2 may be composed of different materials or of the same type of material. In either case, the core 3 is made of a material with a higher refractive index than the material used for cladding 2. Alternatively, the core 3 and cladding 2 may be formed from materials with the same refractive index and then have their refractive indices differed using a method called photolithography or photobleaching.

[0017] The waveguide 101 can be manufactured, for example, by thermocompressing the constituent materials of the core 3 and cladding 2, which are formed into a film, onto the substrate 10, or by applying a resin composition by spin coating to form a film. Alternatively, the waveguide 101 may be formed on a separately prepared support plate, and then the support plate may be removed to form a standalone waveguide 101, which can then be mounted on the substrate 10.

[0018] When the wiring board 1 is in use, the core 3 is optically coupled at one end 101e and the other end 101f of the waveguide 101 to optical components such as photoelectric conversion components like light-emitting diodes (LEDs) and photodiodes (PDs), and / or connector members that connect to optical fibers. In other words, the positional relationship between each optical component and the core 3 is adjusted so that optical signals can be transmitted and received between the core 3 and these optical components.

[0019] Figures 1 to 2B show, by dashed lines, an optical component E1 with a photoelectric conversion function as an example of an optical component that is optically coupled with the core 3 at one end 101e of the waveguide 101. The optical component E1 includes an optical terminal E1a, which is the part into which an optical signal is incident or the part from which an optical signal is emitted. Examples of optical components E1 include photodetectors such as photodiodes (PDs), and light-emitting elements such as LEDs, organic light-emitting diodes (OLEDs), laser diodes (LDs), and vertical-resonant surface-emitting lasers (VCSELs).

[0020] In the upper cladding-free region 1a of the waveguide 101, the core 3 is superimposed with the optical terminal E1a of the optical component E1 to transmit optical signals. In the example shown in Figures 1 to 2B, the core 3 is positioned such that the upper surface 31a of region 31, which is part of the core 3, and the optical terminal E1a of the optical component E1 are facing each other and adibatially coupled. As a result, for example, an optical signal propagating through the core 3 toward one end 101e leaks out from the upper surface 31a of the core as evanescent light and is incident on the optical terminal E1a of the optical component E1. Since the upper surface 31a of the core faces the optical terminal E1a without passing through the upper cladding 22, highly efficient optical coupling is achieved. Furthermore, the upper surface 31a of the core in the upper cladding-free region 1a of the waveguide 101 leaks the optical signal diagonally upward, thereby transmitting the optical signal to the optical terminal E1a of the optical component E1. In this case, the absence of undulation on the upper surface 31a of the core allows for the transmission of optical signals at a predetermined angle diagonally upward. In the region where the waveguide 101 and the optical component E1 overlap in a plan view, the space between the waveguide 101 and the optical component E1 is preferably filled with any transparent resin TR that is optically transparent and has an appropriate refractive index. This stabilizes the optical coupling efficiency.

[0021] The wiring board 1 of this embodiment has two cores 3 arranged in parallel with the waveguide 101, but as shown in Figure 3, the number of cores 3 is not limited to two, but can be any number of one or more. For example, the number of cores 3 is in the range of 2 to 128. When multiple cores 3 are provided, the arrangement pitch of the cores 3 is not particularly limited, but is preferably 10 to 300 μm, and preferably 20 to 250 μm. Also, as shown in Figure 3, the multiple cores 3 do not necessarily have to be arranged in parallel or in a straight line. These shapes may be changed according to the shape and structure of optical components and the like that connected to the other end 101f of the waveguide 101.

[0022] The optical coupling method between the core 3 of the waveguide 101 and the optical component E1 is not limited to adiabatic coupling as shown in Figure 2A. For example, as shown in Figure 4, an upper cladding-free region may not be provided in the waveguide 101, and end-face coupling may be used, in which the end face 3e of the core 3 and the optical terminal E2a of the optical component E2 are aligned and optically coupled. Alternatively, upper cladding-free regions 1a may be provided at both ends 101e and 101f of the waveguide 101. That is, in the X direction, the regions may be arranged in the order of upper cladding-free region 1a, upper cladding region 1b, and upper cladding-free region 1a, and adiabatic coupling may be used at both ends 101e and 101f, or adiabatic coupling may be used at one end and end-face coupling at the other end.

[0023] In end-face coupling, an optical signal is transmitted between the exposed core surface provided on the end face 3e of the core 3 of the waveguide 101 and the optical terminal E1a surface provided on the end face of the optical component E1. At this time, it is also necessary to transmit the optical signal from the exposed core surface to the optical terminal E1a surface at a predetermined angle. It is thought that the absence of undulation in the core near the exposed core surface allows for the transmission of the optical signal at the predetermined angle. Here, the predetermined angle refers to the angle at which the optical signal can be transmitted between the waveguide core and the optical terminal E1a surface.

[0024] The insulating layer 5 of the wiring board 1 in the embodiment is formed using an insulating resin such as epoxy resin, polyimide resin, BT resin (bismaleimide-triazine resin), polyphenylene ether resin, or phenolic resin. The insulating layer 5 may also contain any of the following: fluororesin, liquid crystal polymer (LCP), fluoroethylene resin (PTFE), polyester resin (PE), or modified polyimide resin (MPI). The insulating layer 5 may also contain inorganic fillers such as fine particles made of silica (SiO2), alumina, or mullite. The insulating layer 5 may also contain a core material (reinforcement material) made of glass fiber or aramid fiber. Note that these resins are merely examples of materials capable of forming an insulating layer. Each insulating layer can be formed from any material capable of providing insulation between the conductor layers in the substrate 10.

[0025] The conductive layer 4 of the wiring board 1 in this embodiment is formed on the upper and lower surfaces of the insulating layer 5 using any material having appropriate conductivity. The conductive layer 4 has a two-layer structure, for example, a metal film layer and a plating layer formed on the metal film layer. The metal film layer is preferably a sputtered film layer. The plating layer is preferably an electroplated layer with the metal film layer as the power supply layer. The metal film layer is preferably formed using a conductive material containing titanium, titanium alloy, nickel, nickel alloy, copper, or copper alloy. The plating layer is preferably formed using a conductive material containing copper or copper alloy. The conductive layer 4 is not limited to a two-layer structure; it may also have a single-layer structure or a multilayer structure of three or more layers.

[0026] The solder resist layer 6 of the wiring board 1 in this embodiment is formed on the uppermost insulating layer 5 and the first conductor layer 41. The solder resist layer 6 is formed using, for example, a photosensitive polyimide resin or epoxy resin. An opening 6c is formed in the solder resist layer 6, and the upper surface of the conductor pad 4P, which is part of the first conductor layer 41, is exposed at the bottom of the opening 6c. An optical component E1 is placed on the solder resist layer 6, and the optical component E1 is electrically connected to the conductor pad 4P via an electrode E1b. If the optical component E1 is a light-emitting element, the optical component E1 generates an optical signal based on an electrical signal input to the electrode E1b and emits the optical signal from the optical terminal E1a, which functions as a light-emitting part, toward the core 3. If the optical component E1 is a light-receiving element, the optical component E1 receives an optical signal from the optical terminal E1a, which functions as a light-receiving part, generates an electrical signal based on that optical signal, and outputs it from the electrode E1b.

[0027] The metal layer M of the wiring board 1 in this embodiment is formed using an appropriate metal material so as to overlap the area where the waveguide 101 is formed in a plan view, and below the solder resist layer 6. The metal layer M does not have electrical connections with other conductor layers or electronic components. Therefore, it may have a so-called floating island structure that is not connected to other conductor layers, or it may have a connected structure where the metal layer M is connected to other metal layers M. In Figure 2A, the metal layer M and the first conductor layer 41 are formed on the same layer on the upper surface 5a of the insulating layer 5. The thickness of the metal layer M and the thickness of the first conductor layer 41 may be the same or different. The thickness of the first conductor layer 41 is the thickness of the conductor excluding the corrosion-resistant layer such as gold. The area where the waveguide 101 is formed is the area where the lower cladding 21 is arranged. Furthermore, the metal layer M of the wiring board 1 in this embodiment is formed so as to overlap the area where the core 3 is formed in a plan view, and below the solder resist layer 6. Furthermore, the core 3 formation region of the waveguide 101 is the area in which the core 3 is located.

[0028] The metal layer M may be formed using the same material and structure as the first conductor layer 41, or it may be formed with a different structure from the first conductor layer 41. For example, the metal layer M may be a single-layer structure of a thin film layer or a plating layer, or it may have a multilayer structure of two or more layers combining a thin film layer or a plating layer, or it may have a single-layer structure of a metal film or a multilayer structure of two or more layers of a metal film. The thin film layer is a thin film formed by sputtering, and is made using a metal material including titanium, titanium alloy, nickel, nickel alloy, copper, or copper alloy. The plating layer is an electroless plating film or an electroplating film, and is made using a metal material including nickel, copper, or copper alloy. Alternatively, the metal layer M may be formed by attaching a metal plate with an adhesive.

[0029] When a metal layer M is formed on the insulating layer 5, and a waveguide 101 is formed directly on the upper surface of the metal layer M, the waveguide 101 is likely to be susceptible to changes in the state of the substrate 10, and is prone to waviness, due to factors such as the high hardness of the metal layer M. Furthermore, the lower cladding 21 formed on the upper surface of the metal layer M may have different wettability due to the influence of oxide films, etc., which can result in variations in the thickness of the lower cladding 21. If the thickness of the lower cladding 21 varies, variations in the thickness of the core 3 formed on it may also occur, which could increase the optical transmission loss of the waveguide 101.

[0030] In the wiring substrate 1 shown in Figures 1 to 4, a metal layer M is formed below the solder resist layer 6, and a waveguide 101 is formed on top of the solder resist layer 6. In other words, a metal layer M is formed on the wiring substrate 1, and a waveguide 101 is formed on top of the solder resist layer 6. The metal layer M is formed such that the thickness Tm of the metal layer M satisfies the relationship given by Equation 1 with respect to the thickness Ts of the solder resist layer 6. 1.2 ≤ Ts / Tm ≤ 2.0 (Equation 1) Here, the thickness Ts of the solder resist layer 6 is defined by the distance from the interface between the solder resist layer 6 and the insulating layer 5 to the upper surface of the solder resist layer 6. By satisfying the relationship given by Equation 1 between the thickness Tm of the metal layer M and the thickness Ts of the solder resist layer 6, the waveguide formed on the solder resist layer 6 can appropriately mitigate state changes occurring in the substrate 10, and the wobbling of the waveguide 101 can be suppressed. For example, if the thickness Tm of the metal layer M and the thickness Ts of the solder resist layer 6 are 18 μm, then the thickness Tm of the metal layer M is 12 μm.

[0031] Furthermore, it is desirable that the upper surface of the metal layer M on the wiring board 1 be roughened. Preferably, the roughness of the upper surface of the metal layer M is 0.1 μm or more and 2.0 μm or less. By satisfying the range of 0.1 to 2.0 μm for the roughness of the upper surface of the metal layer M, the thickness of the lower cladding 21 film formed on the solder resist layer 6 is reduced, improving the overall flatness of the waveguide 101, and thus improving the optical coupling efficiency with the optical component E1 and the optical transmission loss. It is also desirable that the roughness of the upper surface of the metal layer M be about 0.3 to 1.0 μm. By satisfying the range of 0.3 to 1.0 μm for the roughness of the upper surface of the metal layer M, it is possible to reduce variations in the thickness of the lower cladding 21 film, and thus stabilize the optical coupling efficiency with the optical component E1 and the optical transmission loss.

[0032] It is preferable to provide the metal layer M near the end face of the core. By placing the metal layer M directly below the end face of the core, core wobble is suppressed. In the case of a waveguide used for adiabatic coupling, core wobble is suppressed by placing the metal layer M directly below the upper cladding-free region where the core is exposed. By suppressing core wobble, the optical signal can be transmitted at a predetermined angle diagonally upward from the exposed upper surface of the core. As a result, optical coupling between the waveguide core and the optical terminal E1a surface is ensured. In the case of a waveguide used for end-face coupling, core wobble is suppressed by placing the metal layer M directly below the end face, which is the exposed core surface. By suppressing core wobble, the optical signal can be transmitted at a predetermined angle from the exposed core. As a result, optical coupling between the waveguide core and the optical terminal E1a surface is ensured. Here, the end face, which is the exposed core surface, refers to the distance up to 3 cm inward from the end face of the core.

[0033] As shown in Figure 1, the metal layer M on the wiring board 1 is positioned below the waveguide 101 formation area in a plan view, overlapping with the waveguide 101 formation area. The metal layer M is formed such that the area Rm of the metal layer M formation area satisfies the relationship in Equation 2 with respect to the area Rw of the waveguide 101 formation area. 0.5 ≤ Rm / Rw ≤ 1.2 (Equation 2) It is believed that satisfying the relationship in Equation 2 suppresses the wobble of the waveguide 101 and improves the flatness of the waveguide 101. Furthermore, it is desirable that the metal layer M is formed so as to include the core 3 formation area in a plan view within the waveguide 101 formation area. This is believed to suppress the wobble of the waveguide core and ensure the flatness of the waveguide 101. Also, as shown in Figure 1, the metal layer M on the wiring board 1 is positioned below the core 3 formation area of ​​the waveguide 101 in a plan view, overlapping with the waveguide 101 formation area. This is thought to suppress the undulation of the core 3 of the waveguide 101 and ensure the flatness of the waveguide 101.

[0034] Figure 5 is a plan view showing a modified arrangement of the metal layer in the wiring board of the embodiment. When Rm / Rw, as expressed in Equation 2, is between 0.5 and less than 1.0, the metal layer M is formed such that at least the core 3 formation region is included in the formation region Rm of the metal layer M, as shown in Figure 5. This is thought to reliably suppress the undulation of the core 3 in the waveguide 101 and reduce optical transmission losses caused by changes in the state of the substrate 10.

[0035] Figure 6A is a plan view showing a second modified example of the arrangement of the metal layer in the wiring board of the embodiment. Figure 6B shows a cross-sectional view taken along line III-III in Figure 6A. As shown in Figures 6A and 6B, in the wiring board 1, the end Me of the metal layer M is positioned inward from the end 1e of the wiring board 1. More specifically, the end Me of the metal layer M is positioned at least 300 μm inward from the end 1e of the wiring board 1. This ensures that the cut surface is cleanly processed when the substrate 10 is cut to form the end 1e of the wiring board 1. Furthermore, no metal chips or metal powder are generated from the metal layer M during processing, which can suppress the occurrence of short-circuit defects.

[0036] In the wiring board 1, the end Me of the metal layer M is preferably positioned at least 300 μm inward from the end 1e of the wiring board 1, and when Rm / Rw represented by formula 2 is 1.0 or greater, the formation region of the metal layer M is formed to include at least the formation region of the core 3. This ensures that when the substrate 10 is cut to form the end 1e of the wiring board 1, the cut surface is processed cleanly, and the waviness of the core 3 in the waveguide 101 is reliably suppressed. As shown in Figure 6A, the metal layer M in the wiring board 1 is positioned below the formation region of the core 3 of the waveguide 101 in a plan view, overlapping the formation region of the waveguide 101. This is thought to suppress the waviness of the core 3 of the waveguide 101 and ensure the flatness of the waveguide 101.

[0037] Figure 7 is a plan view showing a third modified example of the arrangement of the metal layer in the wiring board of the embodiment. As shown in Figure 7, in the wiring board 1, the end Me of the metal layer M is located inside the end 1e of the wiring board 1. More specifically, the end Me of the metal layer M is located at least 300 μm inside the end 1e of the wiring board 1. This ensures that the cut surface is cleanly processed when the substrate 10 is cut to form the end 1e of the wiring board 1. Furthermore, no metal chips or metal powder are generated from the metal layer M during processing, thereby suppressing the occurrence of short-circuit defects. In the wiring board 1, preferably, the end Me of the metal layer M is located inside the end 1e of the wiring board 1, and when Rm / Rw represented by formula 2 is less than 1.0, the formation region Rm of the metal layer M includes at least the formation region of the core 3. As a result, when forming the end portion 1e of the wiring board 1, the cut surface is processed cleanly when cutting the substrate 10, and the wobbling of the core 3 in the waveguide 101 is reliably suppressed.

[0038] As shown in Figure 7, the metal layer M on the wiring board 1 is positioned below the core 3 formation area of ​​the waveguide 101 in a plan view, overlapping the waveguide 101 formation area. This is thought to suppress the wobbling of the core 3 of the waveguide 101 and ensure the flatness of the waveguide 101.

[0039] Figure 8 is a cross-sectional view showing a modified example of the structure of the metal layer in the wiring board of the embodiment. In the wiring board 1, the metal layer M is preferably formed on the same layer as the first conductor layer 41, as shown in Figure 8. For example, the metal layer M is formed using the process of forming the first conductor layer 41 on the upper surface of the insulating layer 5. By forming the metal layer M simultaneously with the first conductor layer 41, the work efficiency for forming the metal layer M in the manufacturing process of the wiring board 1 can be improved. Furthermore, by making the material and structure constituting the metal layer M the same as those of the first conductor layer 41, the metal layer M can be formed efficiently.

[0040] Figure 9 is a cross-sectional view showing a second modified example of the structure of the metal layer in the wiring substrate of the embodiment. For example, as shown in Figure 9, the metal layer M is formed in the wiring substrate 1 such that the entire metal layer M is surrounded by the solder resist layer 6. Specifically, the process of forming the solder resist layer 6 may be divided into two steps, with the metal layer M being formed between the first and second steps. The metal layer M may be formed using different materials or methods than the first conductor layer 41, or it may have a different structure than the first conductor layer 41. By using different materials or structures than the first conductor layer 41 in the formation of the metal layer M, the optimal material, formation method, and structure can be selected from the viewpoint of suppressing wavering of the waveguide 101. This is thought to more effectively mitigate the influence of changes in the state of the substrate 10 on the waveguide 101, thereby suppressing wavering of the waveguide 101.

[0041] <Detailed Structure of the Wiring Board of the Embodiment> Next, the wiring board of the embodiment will be described in detail with reference to the drawings. Figure 10 shows a cross-sectional view of wiring board 1α, which is an example of the wiring board of the embodiment. Note that wiring board 1α shown in Figure 10, and wiring board 1β shown in Figure 11, which will be referenced later, are merely examples of the wiring board of the embodiment. The lamination structure and number of layers of the wiring board of the embodiment are not limited to the lamination structure and number of layers of wiring board 1α or wiring board 1β shown in Figures 10 to 11.

[0042] The wiring board 1α shown in Figure 10 includes a substrate 10α instead of the substrate 10 of the wiring board 1 shown in Figures 1 to 9. That is, the wiring board 1α includes a substrate 10α and a waveguide 101 formed on the substrate 10α. The substrate 10α includes alternately stacked insulating layers and conductive layers, and a metal layer M. The substrate 10α includes conductive layers 41 to 43 as conductive layers and insulating layers 51 and 52 as insulating layers. The substrate 10α has a component mounting surface U for optical components E1. The substrate 10α has conductive pads 4P included in the conductive layer 41 on the component mounting surface U. The waveguide 101 is formed on the component mounting surface U of the substrate 10α.

[0043] The conductor layers 41 to 43 and the insulating layers 51 and 52 are laminated in the order of conductor layer 43, insulating layer 52, conductor layer 42, insulating layer 51, and conductor layer 41 from the lower side to the upper component mounting surface U side of the wiring board 1α. The conductor layer 41 and the conductor layer 42 are connected by a via conductor 7 penetrating the insulating layer 51. The conductor layer 42 and the conductor layer 43 are connected by a via conductor 7 penetrating the insulating layer 52. The substrate 10α includes a solder resist layer 62 covering the conductor layer 43 and the insulating layer 52, and a solder resist layer 61 covering the conductor layer 41 and the insulating layer 51. The substrate 10α includes a metal layer M in a region below the solder resist layer 61 and overlapping with the formation region of the waveguide 101. The substrate 10α also includes bumps 8 connected to the respective conductor pads of the conductor layer 43 and protruding from the solder resist layer 62. The bumps 8 are made of a conductor such as solder and are used for electrical and mechanical connection between the wiring board 1α and an external component (for example, the motherboard of an arbitrary electrical device). Note that the wiring board 1α may be used as a motherboard without the bumps 8 arranged thereon.

[0044] The insulating layers 51 and 52 are formed using an insulating resin such as, for example, epoxy resin, polyimide resin, BT resin, polyphenylene ether resin, or phenol resin. The insulating layers 51 and 52 may contain any one of fluororesin, LCP, PTFE, PE, or MPI. Further, the insulating layers 51 and 52 may contain an inorganic filler such as fine particles made of silica, alumina, or mullite. The insulating layers 51 and 52 may contain a core material made of glass fiber, aramid fiber, or the like.

[0045] As the conductor constituting the conductor layers 41 to 43 and the via conductor 7, it is preferable to use a conductive material containing titanium, titanium alloy, nickel, nickel alloy, copper, or copper alloy. Each of these conductor layers may have a single-layer structure or a multilayer structure including two or more film bodies. For example, the conductor layers 41 to 43 and the via conductor 7 have a two-layer structure including a sputter layer and an electrolytic plating layer or an electroless plating layer.

[0046] The solder resist layers 61 and 62 are formed using, for example, a photosensitive polyimide resin or epoxy resin, and form an insulating layer on the surface layer of the substrate 10α.

[0047] As shown in FIG. 10, in the wiring board 1α, the waveguide 101 is formed on the solder resist layer 61 that constitutes the surface layer of the substrate 10α. The waveguide 101 is a waveguide in an embodiment like the waveguide 101 shown in FIGS. 1 to 8. That is, the waveguide 101 in FIG. 10 includes a stacked lower cladding 21, a core 3, and an upper cladding 22, and has an upper cladding non-formation region 1a and an upper cladding formation region 1b.

[0048] A component E1 is mounted on the wiring board 1α. The component E1 is an optical component such as a photoelectric converter described in the description of the wiring board 1 in FIG. 1 and the like. The component E1 includes an optical terminal E1a and a ball-shaped electrode E1b. Examples of the component E1 include a light receiving element such as a PD, and a light emitting element such as an LED, an OLED, an LD, and a VCSEL.

[0049] The component E1 is mounted on the substrate 10α by connecting the electrode E1b to the component mounting pad 4P using, for example, solder. In FIG. 10, the component E1 is flip-chip mounted. The optical terminal E1a and a region 31 that is a part of the core 3 in the upper cladding non-formation region 1a of the waveguide 101 are positioned to face each other, and optical coupling is realized.

[0050] As described above, in the wiring board 1α, a metal layer M is formed in a region below the solder resist layer 61 and overlapping the formation region of the waveguide 101. The metal layer M is formed such that the thickness Tm of the metal layer M and the thickness Ts of the solder resist layer 6 satisfy the relationship of Equation 1. By satisfying the range of Equation 1, it is considered that the state change generated in the substrate 10α is appropriately relaxed by the solder resist layer 61, and the undulation of the waveguide 101 is suppressed.

[0051] Furthermore, in areas where the upper cladding-free region 1a is formed in the waveguide 101 and the core 3 is exposed, the thickness Tm of the metal layer M located below is formed such that it satisfies the relationship in Equation 1 with respect to the thickness Ts of the solder resist layer 6, thereby stabilizing the formation of the waveguide 101 and the core 3. Moreover, it is believed that the effects of heat generated when optical elements are mounted and used can be buffered, thereby ensuring the reliability of the wiring board 1α.

[0052] Furthermore, in the wiring substrate 1α, the roughness of the upper surface of the metal layer M is preferably 0.1 μm or more and 2.0 μm or less. By setting the roughness of the upper surface of the metal layer M within the above range, the layer thickness of the lower cladding 21 of the waveguide 101 formed on the solder resist layer 61 is stabilized, and the overall flatness of the waveguide 101 is improved.

[0053] In the wiring substrate 1α, the metal layer M is formed such that the area Rm of the region where the metal layer M is formed and the area Rw of the region where the waveguide 101 is formed satisfy the relationship in equation 2 above. As a result, it is thought that the undulation of the waveguide 101 is suppressed more efficiently, the flatness of the waveguide 101 is improved, and optical transmission loss and the like are reduced.

[0054] In the wiring board 1α, the metal layer M is formed on the same layer as the outermost conductor layer 41. For example, the metal layer M may be formed using the process of forming the conductor layer 41 on the upper surface of the insulating layer 51. By forming the metal layer M simultaneously with the conductor layer 41, the work efficiency of forming the metal layer M is improved.

[0055] The metal layer M may have a different material or structure from the uppermost conductor layer 41. For example, in the wiring board 1, the metal layer M may be formed such that the entire metal layer M is surrounded by the solder resist layer 6. By adopting the optimal material and structure of the metal layer M from the viewpoint of suppressing the wobble of the waveguide 101, it is believed that the wobble of the waveguide 101 can be effectively reduced.

[0056] Figure 11 shows a cross-sectional view of a wiring board 1β, which is an example of a wiring board according to a modified embodiment. The wiring board 1β includes a substrate 10β and a waveguide 101 formed on the substrate 10β. The waveguide 101 is a waveguide of an embodiment such as the waveguide 101 shown in Figures 1 to 9. In Figure 11, the waveguide 101 has a first upper cladding-free region 1a1 and a second upper cladding-free region 1a2 at both ends and an upper cladding-formed region 1b in the center. Each component of the wiring board 1β and substrate 10β in Figure 11 is denoted by the same reference numerals as those denoted for each component of the wiring board 1α and substrate 10α having similar functions in Figure 10, or they are omitted as appropriate, and repetitive explanations of each component are omitted.

[0057] Substrate 10β has the same structure as substrate 10α shown in Figure 10, except that the arrangement of the conductor patterns and via conductors 7 contained in each of the conductor layers 41 to 43 is different. Furthermore, the conductor patterns and via conductors 7 contained in each of the conductor layers 41 to 43 are provided at both ends of substrate 10β. In Figure 11, the conductor patterns and via conductors 7 contained in each of the conductor layers 41 to 43 are shown to have a symmetrical configuration, but the arrangement of the conductor patterns and via conductors 7 is not limited to symmetry.

[0058] When the wiring board 1β is used, components E11 and E12 are mounted on the component mounting surface U of the wiring board 1β. Component E11 is optically coupled to a region 31 which is part of the core 3 in the first upper cladding-free region 1a1, and component E12 is optically coupled to a region 31 which is part of the core 3 in the second upper cladding-free region 1a2. Component E11 and E12 are optical components including a photoelectric conversion element, similar to component E1 shown in Figure 10, and each is equipped with an optical terminal E1a and an electrode E1b.

[0059] If component E11 is a light-emitting element, component E11 generates an optical signal based on an electrical signal input to electrode E1b, and emits this optical signal from the optical terminal E1a, which functions as a light-emitting part, toward region 31, which is part of the core 3 in the first upper unclad region 1a1. The optical signal propagates through the core 3 from the first upper unclad region 1a1 toward the second upper unclad region 1a2. If component E12 is a photodetector, the optical signal is output from region 31, which is part of the core 3 in the second upper unclad region 1a2, and component E12 generates an electrical signal based on the optical signal incident on the optical terminal E1a, which functions as a photodetector, and outputs it from electrode E1b. The configuration in which the electrical signal input to component E11 is first converted into an optical signal and propagated, and then converted back into an electrical signal and extracted from component E12, is thought to allow the signal to be propagated with low noise and low loss, even in environments where there is a large distance between components E11 and E12, or where a large amount of electrical noise is generated between components E11 and E12.

[0060] The wiring substrate 1β shown in Figure 11 is constructed by forming a waveguide 101 on a solder resist layer 61 that constitutes the surface layer of the substrate 10β, similar to Figure 10. Furthermore, the wiring substrate 1β has a metal layer M below the solder resist layer 61 and in a region that overlaps with the area where the waveguide 101 is formed. As a result, similar to the case in Figure 10, the influence of changes in the state of the substrate 10β on the waveguide 101 is mitigated, and undulations in the waveguide 101 are suppressed. In addition, it is thought that the flatness of the waveguide 101 is improved, the optical coupling efficiency with components E11 and E12 is increased, and optical transmission loss is reduced.

[0061] Figure 12 shows a cross-sectional view of a wiring board 1γ, which is another example of a wiring board in a modified embodiment. The wiring board 1γ includes a substrate 10α and a waveguide 101 formed on the substrate 10α. The waveguide 101 is a waveguide of an embodiment such as the waveguide 101 shown in Figures 4 and 5. In Figure 12, the waveguide 101 does not have an upper cladding-free region and is optically coupled by end-face coupling, where the end face 3e of the core 3 and the optical terminal E2a of the optical component E2 are directly facing each other. In Figure 12, the same reference numerals are used for each component of the wiring board 1γ and substrate 10α that have similar functions in Figure 10, or they are omitted as appropriate, and repeated explanations of each component are omitted.

[0062] When the wiring board 1γ is used, component E2 is mounted on the component mounting surface U of the wiring board 1γ. Component E2 is end-face coupled to the end face 3e of the core 3. Component E2, like component E1 shown in Figure 10, is an optical component including a photoelectric conversion element, and is equipped with an optical terminal E2a and an electrode E2b, respectively.

[0063] If component E2 is a light-emitting element, component E2 generates an optical signal based on the electrical signal input to electrode E2b, and emits this optical signal from the optical terminal E2a, which functions as a light-emitting part, toward the end face 3e of the core 3. The optical signal propagates through the core 3 toward the other end face. If component E2 is a light-receiving element, the optical signal is output from the end face 3e of the core 3, and component E2 generates an electrical signal based on the optical signal incident on the optical terminal E2a, which functions as a light-receiving part, and outputs it from electrode E2b.

[0064] The wiring substrate 1γ shown in Figure 12 is constructed by forming a waveguide 101 on a solder resist layer 61 that constitutes the surface layer of the substrate 10α, similar to Figure 10. Furthermore, the wiring substrate 1γ includes a metal layer M below the solder resist layer 61 and in a region overlapping the waveguide 101 formation area. This, similar to Figure 10, mitigates the influence of changes in the substrate 10α on the waveguide 101, suppressing undulation of the waveguide 101. Additionally, the flatness of the waveguide 101 is improved, increasing the optical coupling efficiency with component E2 and reducing optical transmission loss. In particular, in end-face coupling, an optical signal is transmitted between the end face 3e of the core 3 of the waveguide 101 and the optical terminal E2a surface provided on the end face of the optical component E2. It is necessary to transmit the optical signal from the end face 3e of the core 3 to the optical terminal E2a surface at a predetermined angle. The absence of undulation in the core near the end face 3e allows for the transmission of the optical signal at the predetermined angle.

[0065] As described above, in the wiring substrate of this embodiment, a metal layer M is placed further below the resist layer formed beneath the waveguide 101, and the thickness Tm of the metal layer M is appropriately set in relation to the thickness Ts of the solder resist layer. As a result, even if there is a change in the state of the substrate, the influence on the waveguide 101 formed on the substrate is mitigated, and it is believed that the wobble of the waveguide 101 is reduced. Furthermore, it is believed that variations in film thickness are suppressed in the formation of the cladding 2 and core 3 of the waveguide 101, and the flatness of the waveguide 101 is ensured.

[0066] 1 Wiring board 10 Board 101 Waveguide 2 Cladding 21 Lower cladding 22 Upper cladding 3 Core 41 First conductor layer 42 Second conductor layer 4P Conductor pad 5 Insulating layer 6 Solder resist layer M Metal layer

Claims

1. A wiring substrate comprising a conductor layer, a solder resist layer formed on the conductor layer, and a waveguide formed on the solder resist layer, wherein a metal layer is formed beneath the solder resist layer and is arranged to overlap with the waveguide formation region, and the thickness Tm of the metal layer and the thickness Ts of the solder resist layer satisfy the relationship in Equation 1: 1.2 ≤ Ts / Tm ≤ 2.0 (Equation 1) 2. The wiring board according to claim 1, wherein the roughness of the upper surface of the metal layer is 0.1 to 2.0 μm.

3. The wiring board according to claim 1, wherein the area Rm of the metal layer and the area Rw of the waveguide formation region satisfy the relationship in Equation 2: 0.5 ≤ Rm / Rw ≤ 1.2 (Equation 2) 4. The wiring board according to claim 1, wherein the end of the metal layer is located at least 300 μm inward from the end of the wiring board.

5. The wiring board according to claim 1, wherein the metal layer is formed in the same layer as the outermost layer of the conductor layer.

6. The wiring board according to claim 1, wherein the metal layer is entirely surrounded by a solder resist layer.

Images