Systems and methods for measuring resistance and capacitance using voltage contrast

The method addresses the limitations of physical contact in measuring IC resistance and capacitance by using voltage contrast in a charged particle system, enhancing throughput and reducing damage, suitable for sub-100 nanometer features.

WO2026061714A1PCT designated stage Publication Date: 2026-03-26ASML NETHERLANDS BV
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-08-19
Publication Date
2026-03-26

AI Technical Summary

Technical Problem

Existing methods for measuring resistance and capacitance in integrated circuits (ICs) are limited by physical contact, which can damage the wafer and are time-consuming, and optical microscopes lack the resolution needed for sub-100 nanometer features.

Method used

Measuring resistance and capacitance using voltage contrast in a charged particle system without physical contact by analyzing the transient behavior of charge collection during electron beam scanning and fitting a model to the measured data.

Benefits of technology

This method reduces damage to the wafer and increases throughput by determining defects based on resistance and capacitance without physical contact, enabling efficient inspection of sub-100 nanometer IC features.

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Abstract

Systems and methods for determining presence of defects on a sample. Systems and methods may include obtaining a first plurality of images at a first plurality of pixel times of a portion of a wafer at a first beam current, wherein each of the first plurality of images corresponds to a pixel time of the first plurality of pixel times; obtaining a second plurality of images at a second plurality of pixel times of the portion of the wafer at a second beam current that is different from the first beam current, wherein each of the second plurality of images corresponds to a pixel time of the second plurality of pixel times; fitting, with a model, data obtained from the first plurality of images and the second plurality of images; and using the fitted data to analyze the portion of the wafer for determining the presence of any defects.
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Description

SYSTEMS AND METHODS FOR MEASURING RESISTANCE AND CAPACITANCE USING VOLTAGE CONTRASTCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority of US application 63 / 696,283 which was filed on September 18, 2024 and which is incorporated herein in its entirety by reference.FIELD

[0002] The description herein relates to the field of charged particle systems, and more particularly to methods for measuring resistance and capacitance using voltage contrast in a charged particle system.BACKGROUND

[0003] In manufacturing processes of integrated circuits (ICs), unfinished or finished circuit components are inspected to ensure that they are manufactured according to design and are free of defects. An inspection system utilizing an optical microscope typically has resolution down to a few hundred nanometers; and the resolution is limited by the wavelength of light. As the physical sizes of IC components continue to reduce down to sub- 100 or even sub- 10 nanometers, inspection systems capable of higher resolution than those utilizing optical microscopes are needed.

[0004] A charged particle (e.g., electron) beam microscope, such as a scanning electron microscope (SEM) or a transmission electron microscope (TEM), capable of resolution down to less than a nanometer, serves as a practicable tool for inspecting IC components having a feature size that is sub- 100 nanometers. With a SEM, electrons of a single primary electron beam, or electrons of a plurality of primary electron beams, can be focused on locations of interest of a wafer under inspection. The primary electrons interact with the wafer and may be backscattered or may cause the wafer to emit secondary electrons. The intensity of the electron beams comprising the backscattered electrons and the secondary electrons may vary based on the properties of the internal and external structures of the wafer, and thereby may indicate whether the wafer has defects.SUMMARY

[0005] Systems and methods for determining presence of defects on a sample may include obtaining a first plurality of images at a first plurality of pixel times of a portion of a wafer at a first beam current, wherein each of the first plurality of images corresponds to a pixel time of the first plurality of pixel times; obtaining a second plurality of images at a second plurality of pixel times of the portion of the wafer at a second beam current that is different from the first beam current, wherein each of the second plurality of images corresponds to a pixel time of the second plurality of pixel times; fitting, with a model, data obtained from the first plurality of images and the second plurality ofimages; and using the fitted data to analyze the portion of the wafer for determining the presence of any defects.

[0006] Embodiments may include generating a first plurality of images of a wafer at a first beam current; generating a second plurality of images of the wafer at a second beam current that is different from the first beam current; fitting, with a model, data obtained from the first plurality of images and the second plurality of images; and determining the presence of any defects on the wafer based on the fitted data.BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Fig. 1 is a schematic diagram illustrating an exemplary electron beam inspection (EBI) system, consistent with embodiments of the present disclosure.

[0008] Fig. 2A is a schematic diagram illustrating an exemplary multi-beam system that is part of the exemplary charged particle beam inspection system of Fig. 1, consistent with embodiments of the present disclosure.

[0009] Fig. 2B is a schematic diagram illustrating an exemplary single-beam system that is part of the exemplary charged particle beam inspection system of Fig. 1, consistent with embodiments of the present disclosure.

[0010] Fig. 3 shows an exemplary graph showing a yield rate of total electrons (secondary electrons and backscattered electrons) relative to landing energy of primary electron beamlets, consistent with embodiments of the present disclosure.

[0011] Fig. 4 shows a schematic diagram illustrating an exemplary voltage contrast response of a wafer, consistent with embodiments of the present disclosure.

[0012] Fig. 5 shows an exemplary process for measuring resistance and capacitance using voltage contrast and determining a presence of defects, consistent with embodiments of the present disclosure.

[0013] Fig. 6 shows a diagram of voltage contrast experimental results on a wafer, consistent with embodiments of the present disclosure.

[0014] Fig. 7 shows diagrams of fitted voltage contrast experimental results on a wafer, consistent with embodiments of the present disclosure.

[0015] Fig. 8 shows a diagram of fitted time constants from Fig. 7, consistent with embodiments of the present disclosure.DETAILED DESCRIPTION

[0016] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplary embodiments do not represent all implementations consistent with the disclosure. Instead, they aremerely examples of apparatuses and methods consistent with aspects related to the subject matter recited in the appended claims. For example, although some embodiments are described in the context of utilizing electron beams, the disclosure is not so limited. Other types of charged particle beams may be similarly applied. Furthermore, other imaging systems may be used, such as optical imaging, photodetection, x-ray detection, extreme ultraviolet inspection, deep ultraviolet inspection, or the like, in which they generate corresponding types of images.

[0017] Electronic devices are constructed of circuits formed on a piece of silicon (or other materials such as GaAs) called a substrate. Many circuits may be formed together on the same piece of silicon and are called integrated circuits or ICs. The size of these circuits has decreased dramatically so that many more of them can fit on the substrate. For example, an IC chip in a smart phone can be as small as a thumbnail and yet may include over 2 billion transistors, the size of each transistor being less than 1 / 1000th the size of a human hair.

[0018] Making these extremely small ICs is a complex, time-consuming, and expensive process, often involving hundreds of individual steps. Errors in even one step have the potential to result in defects in the finished IC rendering it useless. Thus, one goal of the manufacturing process is to avoid such defects to maximize the number of functional ICs made in the process, that is, to improve the overall yield of the process.

[0019] One component of improving yield is monitoring the chip making process to ensure that it is producing a sufficient number of functional ICs. One way to monitor the process is to inspect the chip circuit structures at various stages of their formation. Inspection may be carried out using a scanning electron microscope (SEM). A SEM can be used to image these extremely small structures, in effect, taking a “picture” of the structures of the wafer. The image can be used to determine if the structure was formed properly, and also if it was formed at the proper location. If the structure is defective, then the process can be adjusted so the defect is less likely to recur. Defects may be generated during various stages of semiconductor processing. For the reason stated above, it is important to find defects accurately and efficiently as early as possible.

[0020] The working principle of a SEM is similar to a camera. A camera takes a picture by receiving and recording brightness and colors of light reflected or emitted from people or objects. A SEM takes a “picture” by receiving and recording energies or quantities of electrons reflected or emitted from the structures. Before taking such a “picture,” an electron beam may be projected onto the structures, and when the electrons are reflected or emitted (“exiting”) from the structures, a detector of the SEM may receive and record the energies or quantities of those electrons to generate an image. To take such a “picture,” some SEMs use a single electron beam (referred to as a “single-beam SEM”), while some SEMs use multiple electron beams (referred to as a “multi-beam SEM”) to take multiple “pictures” of the wafer. By using multiple electron beams, the SEM may project more electron beams onto the structures for obtaining these multiple “pictures,” resulting in more electrons exiting from the structures. Accordingly, the detector may receive more exiting electrons simultaneously, and generateimages of the structures of the wafer with a higher efficiency and a faster speed. A SEM can be used to image ICs after they are manufactured.

[0021] One difference between a SEM and a camera is that in a camera, the whole region that is observed is illuminated with light and the sample is imaged with a lens on a sensor with many pixels. An image is obtained by reading out all the pixels. In a SEM, the detector need not have pixels, as the electron beam is focused onto a tiny (e.g., nanometer-sized) spot that is scanned over the sample. The “picture” made with a SEM is an xy plot of signal as a function of beam position. In a SEM, there are no lenses that focus signal from the sample onto the detector.

[0022] As stated above, ICs are made with a substantial number of transistors. In ideal systems, the electrical properties of the transistors (or other devices) are the same over the entire wafer. In practice, the electrical properties of wafer devices may have limited variations around an average value or large deviations that cause the device to fail (e.g., the wafer device may have an electrical defect). The resistance or capacitance of a device may be measured to quantify the amount deviation in the device.

[0023] Typical methods to measure resistance and capacitance values on a wafer may include positioning electric probes (e.g., macro-electric probes) on the wafer to provide electric contact with a specific wafer feature and reviewing the electrical response (e.g., when an applied voltage is changed). Typical methods may include using Conductive Atomic Force Microscopy (CAFM), where a small conducting tip is scanned over a small wafer area (e.g., the tip is usually operated in contact mode) to measure both the geometry and the electrical current flow over the area. Typical methods may include using pulsed electron beams.

[0024] Typical methods, however, suffer from constraints. Electrical probes and a CAFM tip make physical contact with the wafer, thereby risking damage to the wafer and to the electron beam source tip during the measurements. Typical systems are relatively slow techniques because they measure only a small fraction of the total wafer area in every measurement, which may be very time consuming when scanning a whole wafer for electrical defects and thereby increase throughput.

[0025] The disclosed embodiments provide systems and methods that address some or all of these disadvantages by measuring resistance and capacitance in devices on the wafer using voltage contrast in a charged particle system.

[0026] The disclosed embodiments may include methods to measure the transient behavior of the amount of charge collected on a certain wafer device (e.g., a defect in the wafer device) during the time an electron beam is scanning over the device and fit a model to the measured data to determine the resistance and capacitance of the device. The presence of a defect in the wafer device may be determined based on the measured resistance and capacitance without physically contacting the wafer, thereby reducing damage to the wafer and to the electron beam source tip and increasing throughput during inspection.

[0027] As used herein, components that are “coupled” may be “communicatively coupled.”

[0028] Relative dimensions of components in drawings may be exaggerated for clarity. Within the following description of drawings, the same or like reference numbers refer to the same or like components or entities, and only the differences with respect to the individual embodiments are described.

[0029] As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a component may include A or B, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or A and B. As a second example, if it is stated that a component may include A, B, or C, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0030] Without limiting the scope of the present disclosure, some embodiments may be described in the context of providing detectors and detection methods in systems utilizing electron beams. However, the disclosure is not so limited. Other types of charged particle beams may be similarly applied. Furthermore, systems and methods for detection may be used in other imaging systems, such as optical imaging, photon detection, x-ray detection, ion detection, etc.

[0031] Fig. 1 illustrates an exemplary electron beam inspection (EBI) system 100 consistent with embodiments of the present disclosure. EBI system 100 may be used for imaging. As shown in Fig. 1, EBI system 100 includes a main chamber 101, a load / lock chamber 102, an electron beam tool 104, and an equipment front end module (EFEM) 106. Electron beam tool 104 is located within main chamber 101. EFEM 106 includes a first loading port 106a and a second loading port 106b. EFEM 106 may include additional loading port(s). First loading port 106a and second loading port 106b receive wafer front opening unified pods (FOUPs) that contain wafers (e.g., semiconductor wafers or wafers made of other material(s)) or samples to be inspected (wafers and samples may be used interchangeably). A “lot” is a plurality of wafers that may be loaded for processing as a batch.

[0032] One or more robotic arms (not shown) in EFEM 106 may transport the wafers to load / lock chamber 102. Load / lock chamber 102 is connected to a load / lock vacuum pump system (not shown) which removes gas molecules in load / lock chamber 102 to reach a first pressure below the atmospheric pressure. After reaching the first pressure, one or more robotic arms (not shown) may transport the wafer from load / lock chamber 102 to main chamber 101. Main chamber 101 is connected to a main chamber vacuum pump system (not shown) which removes gas molecules in main chamber 101 to reach a second pressure below the first pressure. After reaching the second pressure, the wafer is subject to inspection by electron beam tool 104. Electron beam tool 104 may be a single-beam system or a multi-beam system.

[0033] A controller 109 is electronically connected to electron beam tool 104. Controller 109 may be a computer configured to execute various controls of EBI system 100. While controller 109 is shown in Fig. 1 as being outside of the structure that includes main chamber 101, load / lock chamber 102, and EFEM 106, it is appreciated that controller 109 may be a part of the structure.

[0034] In some embodiments, controller 109 may include one or more processors (not shown). A processor may be a generic or specific electronic device capable of manipulating or processing information. For example, the processor may include any combination of any number of a central processing unit (or “CPU”), a graphics processing unit (or “GPU”), an optical processor, a programmable logic controllers, a microcontroller, a microprocessor, a digital signal processor, an intellectual property (IP) core, a Programmable Uogic Array (PUA), a Programmable Array Uogic (PAU), a Generic Array Uogic (GAU), a Complex Programmable Uogic Device (CPUD), a Field- Programmable Gate Array (FPGA), a System On Chip (SoC), an Application-Specific Integrated Circuit (ASIC), and any type circuit capable of data processing. The processor may also be a virtual processor that includes one or more processors distributed across multiple machines or devices coupled via a network.

[0035] In some embodiments, controller 109 may further include one or more memories (not shown). A memory may be a generic or specific electronic device capable of storing codes and data accessible by the processor (e.g., via a bus). For example, the memory may include any combination of any number of a random-access memory (RAM), a read-only memory (ROM), an optical disc, a magnetic disk, a hard drive, a solid-state drive, a flash drive, a security digital (SD) card, a memory stick, a compact flash (CF) card, or any type of storage device. The codes may include an operating system (OS) and one or more application programs (or “apps”) for specific tasks. The memory may also be a virtual memory that includes one or more memories distributed across multiple machines or devices coupled via a network.

[0036] Embodiments of this disclosure may provide a single charged-particle beam imaging system (“single-beam system”). Compared with a single-beam system, a multiple charged-particle beam imaging system (“multi-beam system”) may be designed to optimize throughput for different scan modes. Embodiments of this disclosure provide a multi-beam system with the capability of optimizing throughput for different scan modes by using beam arrays with different geometries and adapting to different throughputs and resolution requirements.

[0037] Reference is now made to Fig. 2A, which is a schematic diagram illustrating an exemplary electron beam tool 104 including a multi -beam inspection tool that is part of the EBI system 100 of Fig. 1, consistent with embodiments of the present disclosure. In some embodiments, electron beam tool 104 may be operated as a single-beam inspection tool that is part of EBI system 100 of Fig. 1. Multi -beam electron beam tool 104 (also referred to herein as apparatus 104) comprises an electron source 201, a Coulomb aperture plate (or “gun aperture plate”) 271, a condenser lens 210, a source conversion unit 220, a primary projection system 230, a motorized stage 209, and a sample holder 207 supported by motorized stage 209 to hold a sample 208 (e.g., a wafer or a photomask) to be inspected. Multi -beam electron beam tool 104 may further comprise a secondary projection system 250 and an electron detection device 240. Primary projection system 230 may comprise an objective lens 231. Electron detection device 240 may comprise a plurality of detection elements 241, 242, and 243. Abeam separator 233 and a deflection scanning unit 232 may be positioned inside primary projection system 230.

[0038] Electron source 201, Coulomb aperture plate 271, condenser lens 210, source conversion unit 220, beam separator 233, deflection scanning unit 232, and primary projection system 230 may be aligned with a primary optical axis 204 of apparatus 104. Secondary projection system 250 and electron detection device 240 may be aligned with a secondary optical axis 251 of apparatus 104.

[0039] Electron source 201 may comprise a cathode (not shown) and an extractor or anode (not shown), in which, during operation, electron source 201 is configured to emit primary electrons from the cathode and the primary electrons are extracted or accelerated by the extractor and / or the anode to form a primary electron beam 202 that form a primary beam crossover (virtual or real) 203. Primary electron beam 202 may be visualized as being emitted from primary beam crossover 203.

[0040] Source conversion unit 220 may comprise an image-forming element array (not shown), an aberration compensator array (not shown), a beam-limit aperture array (not shown), and a pre-bending micro-deflector array (not shown). In some embodiments, the pre-bending micro-deflector array deflects a plurality of primary beamlets 211, 212, 213 of primary electron beam 202 to normally enter the beam-limit aperture array, the image-forming element array, and an aberration compensator array. In some embodiments, apparatus 104 may be operated as a single-beam system such that a single primary beamlet is generated. In some embodiments, condenser lens 210 is designed to focus primary electron beam 202 to become a parallel beam and be normally incident onto source conversion unit 220. The image-forming element array may comprise a plurality of micro-deflectors or micro-lenses to influence the plurality of primary beamlets 211, 212, 213 of primary electron beam 202 and to form a plurality of parallel images (virtual or real) of primary beam crossover 203, one for each of the primary beamlets 211, 212, and 213. In some embodiments, the aberration compensator array may comprise a field curvature compensator array (not shown) and an astigmatism compensator array (not shown). The field curvature compensator array may comprise a plurality of micro-lenses to compensate field curvature aberrations of the primary beamlets 211, 212, and 213. The astigmatism compensator array may comprise a plurality of micro-stigmators to compensate astigmatism aberrations of the primary beamlets 211, 212, and 213. The beam -limit aperture array may be configured to limit diameters of individual primary beamlets 211, 212, and 213. Fig. 2A shows three primary beamlets 211, 212, and 213 as an example, and it is appreciated that source conversion unit 220 may be configured to form any number of primary beamlets. Controller 109 may be connected to various parts of EBI system 100 of Fig. 1, such as source conversion unit 220, electron detection device 240, primary projection system 230, or motorized stage 209. In some embodiments, as explained in further details below, controller 109 may perform various image and signal processing functions. Controller 109 may also generate various control signals to govern operations of the charged particle beam inspection system.

[0041] Condenser lens 210 is configured to focus primary electron beam 202. Condenser lens 210 may further be configured to adjust electric currents of primary beamlets 211, 212, and 213 downstream of source conversion unit 220 by varying the focusing power of condenser lens 210. Alternatively, the electric currents may be changed by altering the radial sizes of beam -limit apertures within the beam-limit aperture array corresponding to the individual primary beamlets. The electric currents may be changed by both altering the radial sizes of beam-limit apertures and the focusing power of condenser lens 210. Condenser lens 210 may be an adjustable condenser lens that may be configured so that the position of its first principal plane is movable. The adjustable condenser lens may be configured to be magnetic, which may result in off-axis beamlets 212 and 213 illuminating source conversion unit 220 with rotation angles. The rotation angles change with the focusing power or the position of the first principal plane of the adjustable condenser lens. Condenser lens 210 may be an anti-rotation condenser lens that may be configured to keep the rotation angles unchanged while the focusing power of condenser lens 210 is changed. In some embodiments, condenser lens 210 may be an adjustable anti-rotation condenser lens, in which the rotation angles do not change when its focusing power and the position of its first principal plane are varied.

[0042] Objective lens 231 may be configured to focus beamlets 211, 212, and 213 onto a sample 208 for inspection and may form, in the current embodiments, three probe spots 221, 222, and 223 on the surface of sample 208. Coulomb aperture plate 271, in operation, is configured to block off peripheral electrons of primary electron beam 202 to reduce Coulomb effect. The Coulomb effect may enlarge the size of each of probe spots 221, 222, and 223 of primary beamlets 211, 212, 213, and therefore deteriorate inspection resolution.

[0043] Beam separator 233 may, for example, be a Wien filter comprising an electrostatic deflector generating an electrostatic dipole field and a magnetic dipole field (not shown in Fig. 2A). In operation, beam separator 233 may be configured to exert an electrostatic force by electrostatic dipole field on individual electrons of primary beamlets 211, 212, and 213. The electrostatic force is equal in magnitude but opposite in direction to the magnetic force exerted by magnetic dipole field of beam separator 233 on the individual electrons. Primary beamlets 211, 212, and 213 may therefore pass at least substantially straight through beam separator 233 with at least substantially zero deflection angles.

[0044] Deflection scanning unit 232, in operation, is configured to deflect primary beamlets 211, 212, and 213 to scan probe spots 221, 222, and 223 across individual scanning areas in a section of the surface of sample 208. In response to incidence of primary beamlets 211, 212, and 213 or probe spots 221, 222, and 223 on sample 208, electrons emerge from sample 208 and generate three secondary electron beams 261, 262, and 263. Each of secondary electron beams 261, 262, and 263 typically comprise secondary electrons (having electron energy < 50eV) and backscattered electrons (having electron energy between 50eV and the landing energy of primary beamlets 211, 212, and 213). Beam separator 233 is configured to deflect secondary electron beams 261, 262, and 263towards secondary projection system 250. Secondary projection system 250 subsequently focuses secondary electron beams 261, 262, and 263 onto detection elements 241, 242, and 243 of electron detection device 240. Detection elements 241, 242, and 243 are arranged to detect corresponding secondary electron beams 261, 262, and 263 and generate corresponding signals which are sent to controller 109 or a signal processing system (not shown), e.g., to construct images of the corresponding scanned areas of sample 208.

[0045] In some embodiments, detection elements 241, 242, and 243 detect corresponding secondary electron beams 261, 262, and 263, respectively, and generate corresponding intensity signal outputs (not shown) to an image processing system (e.g., controller 109). In some embodiments, each detection element 241, 242, and 243 may comprise one or more pixels. The intensity signal output of a detection element may be a sum of signals generated by all the pixels within the detection element.

[0046] In some embodiments, controller 109 may comprise image processing system that includes an image acquirer (not shown), a storage (not shown). The image acquirer may comprise one or more processors. For example, the image acquirer may comprise a computer, server, mainframe host, terminals, personal computer, any kind of mobile computing devices, and the like, or a combination thereof. The image acquirer may be communicatively coupled to electron detection device 240 of apparatus 104 through a medium such as an electrical conductor, optical fiber cable, portable storage media, IR, Bluetooth, internet, wireless network, wireless radio, among others, or a combination thereof. In some embodiments, the image acquirer may receive a signal from electron detection device 240 and may construct an image. The image acquirer may thus acquire images of sample 208. The image acquirer may also perform various post-processing functions, such as generating contours, superimposing indicators on an acquired image, and the like. The image acquirer may be configured to perform adjustments of brightness and contrast, etc. of acquired images. In some embodiments, the storage may be a storage medium such as a hard disk, flash drive, cloud storage, random access memory (RAM), other types of computer readable memory, and the like. The storage may be coupled with the image acquirer and may be used for saving scanned raw image data as original images, and post-processed images.

[0047] In some embodiments, the image acquirer may acquire one or more images of a sample based on an imaging signal received from electron detection device 240. An imaging signal may correspond to a scanning operation for conducting charged particle imaging. An acquired image may be a single image comprising a plurality of imaging areas. The single image may be stored in the storage. The single image may be an original image that may be divided into a plurality of regions. Each of the regions may comprise one imaging area containing a feature of sample 208. The acquired images may comprise multiple images of a single imaging area of sample 208 sampled multiple times over a time sequence. The multiple images may be stored in the storage. In some embodiments, controller 109 may be configured to perform image processing steps with the multiple images of the same location of sample 208.

[0048] In some embodiments, controller 109 may include measurement circuitries (e.g., analog-to- digital converters) to obtain a distribution of the detected secondary electrons. The electron distribution data collected during a detection time window, in combination with corresponding scan path data of each of primary beamlets 211, 212, and 213 incident on the wafer surface, can be used to reconstruct images of the wafer structures under inspection. The reconstructed images can be used to reveal various features of the internal or external structures of sample 208, and thereby can be used to reveal any defects that may exist in the wafer.

[0049] In some embodiments, controller 109 may control motorized stage 209 to move sample 208 during inspection of sample 208. In some embodiments, controller 109 may enable motorized stage 209 to move sample 208 in a direction continuously at a constant speed. In other embodiments, controller 109 may enable motorized stage 209 to change the speed of the movement of sample 208 over time depending on the steps of scanning process.

[0050] Although Fig. 2A shows that apparatus 104 uses three primary electron beams, it is appreciated that apparatus 104 may use one, two, or more number of primary electron beams. The present disclosure does not limit the number of primary electron beams used in apparatus 104. In some embodiments, apparatus 104 may be a SEM used for lithography. In some embodiments, electron beam tool 104 may be a single-beam system or a multi -beam system.

[0051] For example, as shown in Fig. 2B, an electron beam tool 100B (also referred to herein as apparatus 100B) may be a single-beam inspection tool that is used in EBI system 100, consistent with embodiments of the present disclosure. Apparatus 100B includes a wafer holder 136 supported by motorized stage 134 to hold a wafer 150 to be inspected. Electron beam tool 100B includes an electron emitter, which may comprise a cathode 103, an anode 121, and a gun aperture 122. Electron beam tool 100B further includes a beam limit aperture 125, a condenser lens 126, a column aperture 135, an objective lens assembly 132, and a detector 144. Objective lens assembly 132, in some embodiments, may be a modified SORIL lens, which includes a pole piece 132a, a control electrode 132b, a deflector 132c, and an exciting coil 132d. In an imaging process, an electron beam 161 emanating from the tip of cathode 103 may be accelerated by anode 121 voltage, pass through gun aperture 122, beam limit aperture 125, condenser lens 126, and be focused into a probe spot 170 by the modified SORIL lens and impinge onto the surface of wafer 150. Probe spot 170 may be scanned across the surface of wafer 150 by a deflector, such as deflector 132c or other deflectors in the SORIL lens. Secondary or scattered primary particles, such as secondary electrons or scattered primary electrons emanated from the wafer surface may be collected by detector 144 to determine intensity of the beam and so that an image of an area of interest on wafer 150 may be reconstructed.

[0052] There may also be provided an image processing system 199 that includes an image acquirer 120, a storage 130, and controller 109. Image acquirer 120 may comprise one or more processors. For example, image acquirer 120 may comprise a computer, server, mainframe host, terminals, personal computer, any kind of mobile computing devices, and the like, or a combination thereof.Image acquirer 120 may connect with detector 144 of electron beam tool 100B through a medium such as an electrical conductor, optical fiber cable, portable storage media, IR, Bluetooth, internet, wireless network, wireless radio, or a combination thereof. Image acquirer 120 may receive a signal from detector 144 and may construct an image. Image acquirer 120 may thus acquire images of wafer 150. Image acquirer 120 may also perform various post-processing functions, such as generating contours, superimposing indicators on an acquired image, and the like. Image acquirer 120 may be configured to perform adjustments of brightness and contrast, etc. of acquired images. Storage 130 may be a storage medium such as a hard disk, random access memory (RAM), cloud storage, other types of computer readable memory, and the like. Storage 130 may be coupled with image acquirer 120 and may be used for saving scanned raw image data as original images, and post-processed images. Image acquirer 120 and storage 130 may be connected to controller 109. In some embodiments, image acquirer 120, storage 130, and controller 109 may be integrated together as one electronic control unit.

[0053] In some embodiments, image acquirer 120 may acquire one or more images of a sample based on an imaging signal received from detector 144. An imaging signal may correspond to a scanning operation for conducting charged particle imaging. An acquired image may be a single image comprising a plurality of imaging areas that may contain various features of wafer 150. The single image may be stored in storage 130. Imaging may be performed on the basis of imaging frames.

[0054] The condenser and illumination optics of the electron beam tool may comprise or be supplemented by electromagnetic quadrupole electron lenses. For example, as shown in Fig. 2B, electron beam tool 100B may comprise a first quadrupole lens 148 and a second quadrupole lens 158. In some embodiments, the quadrupole lenses are used for controlling the electron beam. For example, first quadrupole lens 148 can be controlled to adjust the beam current and second quadrupole lens 158 can be controlled to adjust the beam spot size and beam shape.

[0055] Fig. 2B illustrates a charged particle beam apparatus in which an inspection system may use a single primary beam that may be configured to generate secondary electrons by interacting with wafer 150. Detector 144 may be placed along optical axis 105, as in the embodiment shown in Fig. 2B. The primary electron beam may be configured to travel along optical axis 105. Accordingly, detector 144 may include a hole at its center so that the primary electron beam may pass through to reach wafer 150.

[0056] Fig. 3 illustrates an exemplary graph showing a yield rate of total electrons (secondary electrons (SEs) and backscattered electrons) relative to landing energy of primary electron beamlets, consistent with embodiments of the present disclosure. The graph illustrates the relationship of the landing energy of a plurality of beamlets of a primary electron beam (e.g., plurality of beamlets 211, 212, or 213 of primary electron beam 202 of Fig. 2A) and the yield rate of secondary electron beams (e.g., secondary electron beams 261, 262, or 263 of Fig. 2A). The yield rate indicates the number ofsecondary electrons that are produced in response to the impact of the primary electrons. For example, a yield rate greater than 1.0 indicates that more secondary electrons may be produced than the number of primary electrons that have landed on the wafer. Similarly, a yield rate of less than 1.0 indicates that less secondary electrons may be produced in response to the impact of the primary electrons.

[0057] As shown in the graph of Fig. 3, when the landing energy of the primary electrons is within a range from Ei to E2, more electrons may leave the surface of the wafer than land onto the surface of the wafer, which may result in a positive electrical potential at the surface of the wafer. In some embodiments, defect inspection may be performed in the foregoing range of landing energies, which is called “positive mode.” An electron beam tool (e.g., electron beam tool 104 of Fig. 2) may generate a darker voltage contrast image of a device structure with a more positive surface potential since a detection device (e.g., detection device 240 of Fig. 2) may receive less secondary electrons (see Fig. 4).

[0058] In addition to secondary electrons, backscattered electrons (BSE) are also emitted upon impact of the primary beam. Positive charging can occur with SE yields lower than 1 when the sum of the SE yield and BSE exceeds 1. When Ei and E2 refer to the energies where the SE yield (rather than the total yield) is 1, the range of positive mode is larger.

[0059] When the landing energy is lower than Ei or higher than E2, less electrons may leave the surface of the wafer, thereby resulting in a negative electrical potential at the surface of the wafer. In some embodiments, defect inspection may be performed in this range of the landing energies, which is called “negative mode.” An electron beam tool (e.g., electron beam tool 104 of Fig. 2) may generate a brighter voltage contrast image of a device structure with a more negative surface potential a detection device (e.g., detection device 240 of Fig. 2) may receive more secondary electrons (see Fig. 4).

[0060] In some embodiments, the landing energy of the primary electron beams may be controlled by the total bias between the electron source and the wafer.

[0061] Fig. 4 illustrates a schematic diagram of a voltage contrast response of a wafer, consistent with embodiments of the present disclosure. In some embodiments, physical and electrical defects in a wafer (e.g., resistive shorts and opens, defects in deep trench capacitors, back end of line (BEOL) defects, etc.) can be detected using a voltage contrast method of a charged particle inspection system. Defect detection using voltage contrast images may use a pre-scanning process (i.e., a charging, flooding, neutralization, or prepping process), where charged particles are applied to an area of the wafer (e.g., sample 208 of Fig. 2) to be inspected before conducting the inspection.

[0062] In some embodiments, an electron beam tool (e.g., electron beam tool 104 of Fig. 2) may be used to detect defects in internal or external structures of a wafer by illuminating the wafer with a plurality of beamlets of a primary electron beam (e.g., plurality of beamlets 211, 212, or 213 of primary electron beam 202 of Fig. 2) and measuring a voltage contrast response of the wafer to the illumination. In some embodiments, the wafer may comprise a test device region 420 that isdeveloped on a substrate 410. In some embodiments, test device region 420 may include multiple device structures 430 and 440 separated by insulating material 450. For example, device structure 430 is connected to substrate 410. In contrast, device structure 440 is separated from substrate 410 by insulating material 450 such that a thin insulator structure 470 (e.g., thin oxide) exists between device structure 440 and substrate 410.

[0063] The electron beam tool may generate secondary electrons (e.g., secondary electron beams 261, 262, or 263 of Fig. 2) from the surface of test device region 420 by scanning the surface of test device region 420 with a plurality of beamlets of a primary electron beam. As explained above, when the landing energy of the primary electrons is between Ei and E2(i.e., the yield rate is greater than 1.0 in Fig. 3), more electrons may leave the surface of the wafer than land on the surface, thereby resulting in a positive electrical potential at the surface of the wafer.

[0064] As shown in Fig. 4, a positive electrical potential may build-up at the surface of a wafer. For example, after an electron beam tool scans test device region 420 (e.g., during a pre-scanning process), device structure 440 may retain more positive charges because device structure 440 is not connected to an electrical ground in substrate 410, thereby resulting in a positive electrical potential at the surface of device structure 440. In contrast, primary electrons with the same landing energy (i.e., the same yield rate) applied to device structure 430 may result in less positive charges retained in device structure 430 since positive charges may be neutralized by electrons supplied by the connection to substrate 410.

[0065] An image processing system (e.g., controller 109 of Fig. 2) of an electron beam tool may generate voltage contrast images 435 and 445 of corresponding device structures 430 and 440, respectively. For example, device structure 430 is shorted to the ground and may not retain built-up positive charges. Accordingly, when primary electron beamlets land on the surface of the wafer during inspection, device structure 430 may repel more secondary electrons thereby resulting in a brighter voltage contrast image. In contrast, because device structure 440 has no connection to substrate 410 or any other grounds, device structure 440 may retain a build-up of positive charges. This build-up of positive charges may cause device structure 440 to repel less secondary electrons during inspection, thereby resulting in a darker voltage contrast image.

[0066] An electron beam tool (e.g., multi-beam electron beam tool 104 of Fig. 2) may pre-scan the surface of a wafer by supplying electrons to build up the electrical potential on the surface of the wafer. After pre-scanning the wafer, the electron beam tool may obtain images of multiple dies within the wafer. In some embodiments, defects may be detected by comparing the differences in voltage contrast images from multiple dies. For example, if non-uniform charging is applied to the wafer and the voltage contrast level of one image associated with a first node is the same as the voltage contrast level of an image associated with a second node, the die corresponding to the two voltage contrast levels may have an electrical short circuit defect. Pre-scanning is applied to the wafer under the assumption that the electrical surface potential built-up on the surface of the wafer during pre-scanning will be retained during inspection and will remain above the detection threshold of the electron beam tool.

[0067] However, the built-up surface potential level may change during inspection due to the effects of electrical breakdown or tunneling, thereby resulting in failure to detect defects. For example, when a high voltage is applied to a high resistance thin device structure (e.g., thin oxide), such as an insulator structure 470, leakage current may flow through the high resistance structure, thereby preventing the structure from functioning as a perfect insulator. This may affect circuit functionality and result in a device defect. A similar effect of leakage current may also occur in a structure with improperly formed materials or a high resistance metal layer, for example a cobalt silicide (e.g., CoSi, CoSi2, Co2Si, CosSi, etc.) layer between a tungsten plug and a source or drain area of a field-effect transistor (FET).

[0068] A defective etching process may leave a thin oxide resulting in unwanted electrical blockage (e.g., open circuit) between two structures (e.g., device structure 440 and substrate 410) intended to be electrically connected. For example, device structures 430 and 440 may be designed to make contact with substrate 410 and function identically, but due to manufacturing errors, insulator structure 470 may exist in device structure 440. In this case, insulator structure 470 may represent a defect susceptible to a breakdown effect.

[0069] Fig. 5 shows an exemplary process 500 for measuring resistance and capacitance using voltage contrast and determining a presence of defects, consistent with embodiments of the present disclosure.

[0070] The amount of charge collected by a device is governed by the amount of charge deposited by the primary electron beam, the amount of charge escaping from the sample into the vacuum environment in the form of secondary electrons (SEs) and back scattered electrons (BSEs), and the amount of charge leaking away via the wafer. If the time dependence of the charge collection is different from the time dependence of the charge leakage, then the amount of charge collected over time may be varied by varying the charge collection (e.g., by varying beam parameters such as beam current and scan rate).

[0071] The amount of charge collected on the device determines the number of SEs that may escape from the device. For example, positive charging (achievable by tuning the landing energy of the e- beam, typically between a few 100 eV and 2 keV) may result in less SEs being able to escape from the device (the SEs are pulled back by the charging), thereby resulting in a smaller detector signal or a lower grey level value (dark spot) in the scanned e-beam image. As described above, this effect is used in voltage contrast e-beam applications to find defects on a wafer. Here, the effect may be used to quantitatively measure the amount of charge collected on the device as a function of time by means of the SE detector signal.

[0072] The amount of charge deposited on a device by the primary electron beam depends on the current and scanning speed of the e-beam, so by varying these parameters, the amount of chargedeposited on the device may be varied. As further described below, a model may be used to fit the measured data as a function of the varied parameters and obtain quantitative information about the device properties (e.g., resistance and capacitance). By using this method on different parts of the wafer, a finger print of the electrical properties of a wafer may be obtained at some stage of the wafer processing cycles, which may be used to control the lithography process or assess the electrical performance, and thus the performance of the different dies on a wafer.

[0073] At step 502, a system (e.g., controller 109 of Fig. 1, 2A, 2B) may obtain an image (e.g., SEM image) of a portion of a wafer at a beam current.

[0074] At step 504, for the same beam current, the system may obtain images of the same portion of the wafer at different pixel times. In some embodiments, a pixel time corresponds to an exposure time of a pixel to an electron beam. For example, the system may obtain a first plurality of images at a first plurality of pixel times of a portion of a wafer at a first beam current, where each of the first plurality of images corresponds to a pixel time of the first plurality of pixel times. The pixel time may be adjusted by varying the scan frequency or the amount of dot averaging. The system may adjust the amount of line or frame averaging (e.g., compensate less dot averaging with more line averaging) in addition to adjusting the pixel time to prevent or reduce noise in the image from a short pixel time or from a long image scanning time span.

[0075] The system may adjust the beam current and repeat steps 502 and 504 at the new beam current. For example, steps 502 and 504 may be repeated until there is sufficient data at different beam currents to obtain accurate fit results (e.g. such as the data provided in example Fig. 6). For example, the system may adjust the beam current and obtain a second plurality of images at a second plurality of pixel times of the portion of the wafer at a second beam current, where each of the second plurality of images corresponds to a pixel time of the second plurality of pixel times.

[0076] As stated above, Fig. 6 provides example data at different beam currents. Fig. 6 shows a diagram 600 of voltage contrast experimental results on a wafer, consistent with embodiments of the present disclosure.

[0077] Diagram 600 shows experimental results for the detected SE current (e.g., SE yield 602) with respect to pixel time 604 for different beam currents. In some embodiments, pixel time 604 corresponds to an exposure time of a pixel to an electron beam. The SE yields have been obtained from the grey level values (GLV) in the images by calibrating the GLV for different beam currents. This calibration is performed by measuring the primary beam current on the detector when making the wafer voltage more negative than the landing energy voltage (e.g., “mirror mode”) and connecting this beam current value to the GLV from the detector. The pixel time may be varied by using different scan frequencies (e.g., 100 and 400 MHz) and different dot averaging numbers (e.g., from 1 to 40).

[0078] Curves 611, 612, 613, and 614 represent data corresponding to nominally working plugs in the obtained images. Curves 621, 622, 623, and 624 represent data corresponding to defect plugs in the obtained images. For example, curves 611-614 may correspond to a functioning device on a waferwhile curves 621-624 may correspond to a device with a defect on a wafer. As shown in diagram 600, the decay rate in nominally working devices (curves 611-614) is less steep than the decay rate in devices with a defect (curves 621-624).

[0079] Each of curves 611-614 and 621-624 may correspond to a different image of the wafer. In some embodiments, curves 611-614 may correspond to images of the same portion of the wafer. In some embodiments, curves 621-624 may correspond to images of the same portion of the wafer.

[0080] Obtaining a single curve (e.g., curve 621) may correspond to step 504 of Fig. 5. Obtaining multiple curves (e.g., curves 621-624) may correspond to repeating steps 502 and 504 of Fig. 5 for different beam currents.

[0081] Turning back to Fig. 5, at step 506, the system may fit the results obtained from steps 502 and 504 with a model (e.g., the model may include Equation (1) and Equation (2), further described below) to determine electrical property values of the device, such as resistance and capacitance. The model may fit SE yield data for the different beam currents with respect to pixel time, which is further described with respect to Figs. 6-8.

[0082] Fig. 7 shows diagrams 710, 720, 730, and 740 of fitted voltage contrast experimental results on a wafer, consistent with embodiments of the present disclosure.

[0083] Fitting data from Fig. 6 may result in diagrams 710, 720, 730, and 740, corresponding to step 506 of Fig. 5. These diagrams can provide the exponential fits for the SE yields and fit result as a function of pixel time for the four beam currents of the defect curves of Fig. 6. For example, diagram 710 may show fitted results from curve 621 of Fig. 6, diagram 720 may show fitted results from curve 622 of Fig. 6, diagram 730 may show fitted results from curve 623 of Fig. 6, and diagram 740 may show fitted results from curve 624 of Fig. 6. While process 500 is described with respect to devices with a defect, it is understood that process 500 may be performed with respect to nominally working devices (e.g., curves 611-614).

[0084] A model may predict an exponential decay as a function of the pixel time with the decay rate determined by a time constant r that depends on the beam current. Fitting the SE yield of each of curves 711, 721, 731, and 741 with an exponential decay given by Equation (1) (e.g., fitting data obtained from images based on a determination of exponential decay as a function of pixel time and decay rate) results in a reasonable fitting of the data in curves 711, 721, 731, and 741, as shown in diagrams 710, 720, 730, and 740. Equation (1) may be represented as follows:YSE = YsE.backgr + ^SE ' e~t / T(Equation 1) where YSE backgris the saturation SE yield (e.g., the SE yield value at which the fitted curve remains constant), is the difference between the highest SE value on the fitted curve and the lowest SEvalue on the fitted curve (e.g., a delta secondary electron yield), and t is the pixel time. For example, range 742 shows YSEof curve 741 and value 743 shows the YSE backgrof curve 741.

[0085] The exponential decay rate, or time constant r, may be determined for each of curves 711, 721, 731, and 741 based on the corresponding fit of data using Equation (1).

[0086] Fig. 8 shows diagram 800 of fitted time constants from Fig. 7, consistent with embodiments of the present disclosure.

[0087] Fitting data the time constants from Fig. 7 may result in diagram 800, corresponding to step 506 of Fig. 5.

[0088] Assuming that the leakage current in the wafer may be described by an electric circuit of a resistance in parallel with a capacitor, the model may predict a relationship between the time constant r and the beam current Ipusing Equation (2) (e.g., an exponential decay as a function of electrical properties of a portion of a wafer) as follows: (Equation 2)where 5 is the SE emission coefficient of the plug material for the landing energy used, d> is the work function of the plug material, lpis the primary beam current, and R and C are the values of the resistance and the capacitance in the electrical circuit.

[0089] Diagram 800 shows the fitting of the obtained time constants r of Fig. 7 as a function of beam current Ip, which shows a reasonable fit for the resistance and the capacitance in the portion of the wafer.

[0090] In some embodiments, the model may account for the fact that when changing the beam current, the spot size will also change.

[0091] Obtaining images at different beam currents involves aligning and focusing the beam for each beam current, which may limit throughput. In some embodiments, it may be beneficial to limit the number of beam currents used or to start with several beam currents for the first part of the wafer, and then reduce the number of beam currents for other parts of the wafer after the most suited beam currents have been determined in order to compensate for throughput.

[0092] In some embodiments, the SE emission coefficient 5 may be used as an additional fitting parameter when sweeping the landing energy (e.g., at a fixed beam current and pixel time), which may result in more accurate fitting parameter values.

[0093] In some embodiments, the GLV (without converting the GLV to SE detector currents) may be used to obtain the plots described in Figs. 6-8 and to fit the parameters. In these embodiments, the brightness / contrast and gamma settings for the various images may be the same (which means that the settings to be used for all images may be determined beforehand) or a model for correcting the effect of brightness / contrast and gamma settings on GLV may be used.

[0094] Turning back to Fig. 5, at step 508, the system may use the fitted data to analyze the portion of the wafer for determining the presence of any defects. For example, the system may determine whether or not any defect exists in the portion of the wafer using the fitted data based on the determined electrical property values, such as resistance or capacitance values, of the device (e.g., the fitted resistance or capacitance values of the portion of the wafer).

[0095] In some embodiments, the system may perform the steps of process 500 using all results from the SE images. In some embodiments, the system may perform the steps of process 500 on a selected number of devices in the images (e.g., defects or nominally working devices that are selected by processing the images in software).

[0096] While process 500 is described with respect to beam current, process 500 may be extended to varying other parameters (e.g., the landing energy).

[0097] While the disclosed embodiments are described using an exemplary electron beam, it is understood that any charged particles (e.g., protons, photoelectrons, etc.) or non-charged particles (e.g., photons) may be used in the disclosed embodiments.

[0098] A non-transitory computer readable medium may be provided that stores instructions for a processor of a controller (e.g., controller 109 of Fig. 1, controller 109 of Fig. 2A, controller 109 of Fig. 2B, image processing system 199 of Fig. 2B) for controlling the electron beam tool or other systems of other systems and servers, or components thereof, consistent with embodiments in the present disclosure. These instructions may allow the one or more processors to carry out image processing, data processing, beamlet scanning, graphical display, operations of a charged particle beam apparatus, or another imaging device, or the like for providing operations consistent with those described above for Figs. 5-8. In some embodiments, the non-transitory computer readable medium may be provided that stores instructions for a processor to perform the steps of process 500. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, hard disk, solid state drive, magnetic tape, or any other magnetic data storage medium, a Compact Disc Read Only Memory (CD-ROM), any other optical data storage medium, any physical medium with patterns of holes, a Random Access Memory (RAM), a Programmable Read Only Memory (PROM), and Erasable Programmable Read Only Memory (EPROM), a FLASH-EPROM or any other flash memory, Non-Volatile Random Access Memory (NVRAM), a cache, a register, any other memory chip or cartridge, and networked versions of the same.

[0099] The embodiments may further be described using the following clauses:1. A method of determining presence of defects on a sample, comprising: obtaining a first plurality of images at a first plurality of pixel times of a portion of a wafer at a first beam current, wherein each of the first plurality of images corresponds to a pixel time of the first plurality of pixel times;obtaining a second plurality of images at a second plurality of pixel times of the portion of the wafer at a second beam current that is different from the first beam current, wherein each of the second plurality of images corresponds to a pixel time of the second plurality of pixel times; fitting, with a model, data obtained from the first plurality of images and the second plurality of images; and using the fitted data to analyze the portion of the wafer for determining the presence of any defects.2. The method of clause 1, wherein pixel time is varied by adjusting any one of a scanning frequency, an amount of dot averaging, an amount of line averaging, or an amount of frame averaging.3. The method of any one of clauses 1-2, wherein the data obtained from the first plurality of images and the second plurality of images comprise secondary electron yield data as a function of pixel time.4. The method of clause 3, wherein obtaining the secondary electron yield data comprises calibrating grey level values from the first plurality of images and the second plurality of images.5. The method of clause 4, wherein calibrating the grey level values is based on a primary beam current on a detector.6. The method of any one of clauses 1-5, wherein fitting the data obtained from the first plurality of images and the second plurality of images comprises: fitting data obtained from the first plurality of images based on a determination of exponential decay as a function of pixel time and decay rate; and fitting data obtained from the second plurality of images based on a determination of exponential decay as a function of pixel time and decay rate.7. The method of clause 6, wherein the determination of exponential decay is a function of a saturation secondary electron yield and a delta secondary electron yield.8. The method of clause 7, wherein the saturation secondary electron yield corresponds to a secondary electron yield value at which the fitting remains constant.9. The method of any one of clauses 7-8, wherein the delta secondary electron yield corresponds to a difference between a maximum secondary electron yield value of the fitting and a minimum secondary electron yield value of the fitting.10. The method of any one of clauses 7-9, wherein fitting the data comprises determining a fitted decay rate for the first plurality of images and a fitted decay rate for the second plurality of images based on the determination of exponential decay.11. The method of clause 10, wherein fitting the data comprises fitting the decay rates corresponding to the first and second plurality of images based on a determination of exponential decay as a function of electrical properties of the portion of the wafer.12. The method of clause 11, wherein the determination of exponential decay is a function of a secondary electron emission coefficient, a work function, and a primary beam current.13. The method of any one of clauses 11-12, wherein the electrical properties comprise a resistance of the portion of the wafer and a capacitance of the portion of the wafer.14. The method of clause 13, wherein fitting the data comprises determining a fitted resistance and a fitted capacitance of the portion of the wafer.15. The method of clause 14, wherein determining the presence of any defects in the portion of the wafer is based on any one of the determined resistance or the determined capacitance.16. A method of determining presence of defects on a sample, comprising: generating a first plurality of images of a wafer at a first beam current; generating a second plurality of images of the wafer at a second beam current that is different from the first beam current; fitting, with a model, data obtained from the first plurality of images and the second plurality of images; and determining the presence of any defects on the wafer based on the fitted data.17. The method of clause 16, wherein each of the first plurality of images corresponds to a pixel time of a first plurality of pixel times and each of the second plurality of images corresponds to a pixel time of a second plurality of pixel times.18. The method of any one of clauses 16-17, wherein pixel time is varied by adjusting any one of a scanning frequency, an amount of dot averaging, an amount of line averaging, or an amount of frame averaging.19. The method of any one of clauses 16-18, wherein the data obtained from the first plurality of images and the second plurality of images comprise secondary electron yield data as a function of pixel time.20. The method of clause 19, wherein obtaining the secondary electron yield data comprises calibrating grey level values from the first plurality of images and the second plurality of images.21. The method of clause 20, wherein calibrating the grey level values is based on a primary beam current on a detector.22. The method of any one of clauses 16-21, wherein fitting the data obtained from the first plurality of images and the second plurality of images comprises: fitting data obtained from the first plurality of images based on a determination of exponential decay as a function of pixel time and decay rate; and fitting data obtained from the second plurality of images based on a determination of exponential decay as a function of pixel time and decay rate.23. The method of clause 22, wherein the determination of exponential decay is a function of a saturation secondary electron yield and a delta secondary electron yield.24. The method of clause 23, wherein the saturation secondary electron yield corresponds to a secondary electron yield value at which the fitting remains constant.25. The method of any one of clauses 23-24, wherein the delta secondary electron yield corresponds to a difference between a maximum secondary electron yield value of the fitting and a minimum secondary electron yield value of the fitting.26. The method of any one of clauses 23-25, wherein fitting the data comprises determining a fitted decay rate for the first plurality of images and a fitted decay rate for the second plurality of images based on the determination of exponential decay.27. The method of clause 26, wherein fitting the data comprises fitting the decay rates corresponding to the first and second plurality of images based on a determination of exponential decay as a function of electrical properties of the portion of the wafer.28. The method of clause 27, wherein the determination of exponential decay is a function of a secondary electron emission coefficient, a work function, and a primary beam current.29. The method of any one of clauses 27-28, wherein the electrical properties comprise a resistance of the portion of the wafer and a capacitance of the portion of the wafer.30. The method of clause 29, wherein fitting the data comprises determining a fitted resistance and a fitted capacitance of the wafer.31. The method of clause 30, wherein determining the presence of any defects in the wafer is based on any one of the determined resistance or the determined capacitance.32. A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform operations for determining presence of defects on a sample, the operations comprising any one of clauses 1-15.33. A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform operations for determining presence of defects on a sample, the operations comprising any one of clauses 16-31.34. A system for determining presence of defects on a sample, the system comprising: a memory storing a set of instructions; and one or more processors configured to execute the set of instructions to cause the system to perform operations comprising any one of clauses 1-15.35. A system for determining presence of defects on a sample, the system comprising: a memory storing a set of instructions; and one or more processors configured to execute the set of instructions to cause the system to perform operations comprising any one of clauses 16-31.

[0100] It will be appreciated that the embodiments of the present disclosure are not limited to the exact construction that has been described above and illustrated in the accompanying drawings, and that various modifications and changes may be made without departing from the scope thereof.

Claims

CLAIMS1. A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform operations for determining presence of defects on a sample, the operations comprising: generating a first plurality of images of a wafer at a first beam current; generating a second plurality of images of the wafer at a second beam current that is different from the first beam current; fitting, with a model, data obtained from the first plurality of images and the second plurality of images; and determining the presence of any defects on the wafer based on the fitted data.

2. The non-transitory computer readable medium of claim 1, wherein each of the first plurality of images corresponds to a pixel time of a first plurality of pixel times and each of the second plurality of images corresponds to a pixel time of a second plurality of pixel times.

3. The non-transitory computer readable medium of claim 1, wherein the data obtained from the first plurality of images and the second plurality of images comprise secondary electron yield data as a function of pixel time.

4. The non-transitory computer readable medium of claim 3, wherein obtaining the secondary electron yield data comprises calibrating grey level values from the first plurality of images and the second plurality of images.

5. The non-transitory computer readable medium of claim 1, wherein fitting the data obtained from the first plurality of images and the second plurality of images comprises: fitting data obtained from the first plurality of images based on a determination of exponential decay as a function of pixel time and decay rate; and fitting data obtained from the second plurality of images based on a determination of exponential decay as a function of pixel time and decay rate.

6. The non-transitory computer readable medium of claim 5, wherein the determination of exponential decay is a function of a saturation secondary electron yield and a delta secondary electron yield.

7. The non-transitory computer readable medium of claim 6, wherein the saturation secondary electron yield corresponds to a secondary electron yield value at which the fitting remains constant.

8. The non -transitory computer readable medium of claim 6. wherein fitting the data comprises determining a fitted decay rate for the first plurality of images and a fitted decay rate for the second plurality of images based on the determination of exponential decay.

9. The non-transitory computer readable medium of claim 8, wherein fitting the data comprises fitting the decay rates corresponding to the first and second plurality of images based on a determination of exponential decay as a function of electrical properties of the portion of the wafer.

10. The non-transitory computer readable medium of claim 9, wherein the determination of exponential decay is a function of a secondary electron emission coefficient, a work function, and a primary beam current.

11. The non-transitory computer readable medium of claim 9, wherein the electrical properties comprise a resistance of the portion of the wafer and a capacitance of the portion of the wafer.

12. The non-transitory computer readable medium of claim 11, wherein fitting the data comprises determining a fitted resistance and a fitted capacitance of the wafer.

13. The non-transitory computer readable medium of claim 12, wherein determining the presence of any defects in the wafer is based on any one of the determined resistance or the determined capacitance.

14. A method of determining presence of defects on a sample, comprising: generating a first plurality of images of a wafer at a first beam current; generating a second plurality of images of the wafer at a second beam current that is different from the first beam current; fitting, with a model, data obtained from the first plurality of images and the second plurality of images; and determining the presence of any defects on the wafer based on the fitted data.

15. A system for determining presence of defects on a sample, the system comprising: a memory storing a set of instructions; and one or more processors configured to execute the set of instructions to cause the system to perform operations comprising: generating a first plurality of images of a wafer at a first beam current; generating a second plurality of images of the wafer at a second beam current that is different from the first beam current;fitting, with a model, data obtained from the first plurality of images and the second plurality of images; and determining the presence of any defects on the wafer based on the fitted data.

Citation Information

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