High-voltage electric power supply

Abstract

Provided is a high-voltage power supply (100) wherein: a double-wave rectification circuit unit (3) includes a capacitor (36) that is connected to one end of a first series circuit unit (4), and a charging circuit (37) that charges the capacitor (36) with an electric charge; a first half-wave rectification CW circuit unit (10) rectifies and boosts an AC voltage that is generated in a secondary winding (21b); a second half-wave rectification CW circuit unit (20) rectifies and boosts the AC voltage that is generated in the secondary winding (21b) in the opposite phase from that of the first half-wave rectification CW circuit unit (10); an output voltage from the first half-wave rectification CW circuit unit (10) and an output voltage from the second half-wave rectification CW circuit unit (20) are added to a first DC voltage VDC1 in the first series circuit unit (4) to generate a second DC voltage VDC2; and a control unit (8) instructs a timing at which the charging circuit (37) charges the capacitor (36) with the electric charge.

Description

High-voltage power supply

[0001] This disclosure relates to a high-voltage power supply. This application claims priority under Japanese application No. 2024-168732, filed on 27 September 2024, and incorporates all the provisions contained herein.

[0002] A boost-rectifier circuit is known that includes a Cockcroft-Walton circuit (hereinafter referred to as a CW circuit) which boosts and rectifies the input voltage by combining multiple stages of circuit parts including capacitors and diodes (see, for example, Patent Document 1). In a high-voltage power supply that includes a boost-rectifier circuit that generates high voltages of several hundred kilovolts, a functional unit for shortening the fall time of the high voltage may be included. For example, a wave tail reduction circuit and a drive circuit that drives the wave tail reduction circuit are known as examples of such functional units (see, for example, Patent Document 2). The wave tail reduction circuit of Patent Document 2 has a configuration in which multiple FETs are cascaded to each other between terminals to which high voltage is applied. The drive circuit controls the wave tail reduction circuit based on a high-voltage ON signal for driving the high-voltage power supply. As a result, the wave tail reduction circuit discharges the charge accumulated in the filter capacitors and capacitance of the high-voltage cables in the high-voltage power supply, shortening the fall time of the high voltage.

[0003] JP 2016-13015 A JP 8-212948 A

[0004] High-voltage power supplies, including boost rectifier circuits such as CW circuits, are represented by a transfer function that includes a delay, such as a first-order lag system, taking a setting signal to determine the magnitude of the high voltage as input and outputting the resulting high voltage. Such high-voltage power supplies are controlled by an extremely slow system to ensure steady-state stability. As a result, the time constant of the transfer function is extremely large, and when the load fluctuates instantaneously or when switching the setting value of the high voltage, the output control response may not be fast enough, causing a momentary voltage drop. In such cases, it is desirable to quickly stabilize the high voltage at the set value.

[0005] This disclosure aims to provide a high-voltage power supply capable of quickly stabilizing a high voltage at a set value.

[0006] A step-up rectifier circuit relating to one aspect of the present disclosure includes: [1] a transformer including a primary winding and a secondary winding, which inputs an AC voltage to the primary winding; a full-wave rectifier circuit section connected to the secondary winding and which generates a first DC voltage by rectifying the AC voltage generated in the secondary winding; a first series circuit section consisting of a plurality of first capacitors and a plurality of second capacitors connected alternately in series; a second series circuit section consisting of a plurality of third capacitors connected in series; a third series circuit section consisting of a plurality of fourth capacitors connected in series; and a control section, wherein the full-wave rectifier circuit section includes a fifth capacitor connected to one end of the first series circuit section and a charging circuit for charging the fifth capacitor, wherein one end of the second series circuit section is connected to one end of the secondary winding, and one end of the third series circuit section is connected to the other end of the secondary winding, and the second series The third capacitor in the circuit section and the first capacitor in the first series circuit section constitute a first half-wave rectifier type boost circuit section, the fourth capacitor in the third series circuit section and the second capacitor in the first series circuit section constitute a second half-wave rectifier type boost circuit section, the first half-wave rectifier type boost circuit section rectifies and boosts the AC voltage generated in the secondary winding, the second half-wave rectifier type boost circuit section rectifies and boosts the AC voltage generated in the secondary winding in the opposite phase to that of the first half-wave rectifier type boost circuit section, the output voltage from the first half-wave rectifier type boost circuit section and the output voltage from the second half-wave rectifier type boost circuit section are added to the first DC voltage in the first series circuit section to generate a second DC voltage, and the control unit instructs the charging circuit to charge the fifth capacitor.

[0007] In the high-voltage power supply described in [1] above, by placing the full-wave rectifier circuit immediately after the transformer, the first DC voltage can be generated while suppressing ripple by utilizing both half-waves of the AC voltage generated in the secondary winding of the transformer. Furthermore, since the phase of the output voltage from the first half-wave rectifier boost circuit and the phase of the output voltage from the second half-wave rectifier boost circuit are in opposite phases, the noise superimposed on the first series circuit cancels each other out. As a result, the second DC voltage can be generated while effectively suppressing ripple. In addition, in the full-wave rectifier circuit, a voltage is generated in the fifth capacitor by the charge accumulated in the fifth capacitor. The voltage generated in the fifth capacitor increases both the first DC voltage and the second DC voltage. When a voltage drop occurs in the second DC voltage, the charging circuit instructed by the control unit charges the fifth capacitor, compensating for at least a portion of the drop in the second DC voltage. As a result, the voltage drop is reduced, and the high voltage can be controlled quickly and stably.

[0008] A boost rectifier circuit relating to one aspect of the present disclosure may be [2] "a high-voltage power supply according to [1], further comprising a detection unit that generates an instruction voltage which is the difference between a detection voltage indicating the magnitude of the second DC voltage and a setting voltage for setting the magnitude of the second DC voltage, the control unit outputs a pulse-on signal to the charging circuit at the timing in which the instruction voltage is detected, and the charging circuit charges the fifth capacitor upon receiving the pulse-on signal." According to this, when a voltage drop occurs in the second DC voltage, the charging circuit can reliably charge the fifth capacitor. This makes it possible to more appropriately compensate for at least a portion of the voltage drop in the second DC voltage and to quickly stabilize the second DC voltage at a set value.

[0009] The boost rectifier circuit according to one aspect of the present disclosure may be the high-voltage power supply described in [3] "The control unit outputs a pulse drive wave including a duty ratio corresponding to the command voltage to the charging circuit, and the charging circuit adjusts the magnitude of the voltage generated in the fifth capacitor based on the magnitude of the duty ratio." According to this, by controlling the magnitude of the voltage generated in the fifth capacitor based on the magnitude of the duty ratio, the drop in the second DC voltage can be accurately compensated for.

[0010] The boost rectifier circuit according to one aspect of the present disclosure may be the high-voltage power supply described in [4] "The high-voltage power supply further includes an inverter circuit that generates the AC voltage input to the primary winding, and the control unit drives the inverter circuit with an inverter drive wave having a frequency lower than or the same as the frequency of the pulse drive wave." According to this, the amount of charge charged in the fifth capacitor is adjusted at a period faster than the period of driving the inverter circuit to adjust the magnitude of the high voltage. As a result, the drop in the second DC voltage can be compensated for earlier than the magnitude of the high voltage is changed, and the high voltage can be controlled more stably.

[0011] A step-up rectifier circuit relating to one aspect of the present disclosure further comprises: [5] "a first rectifier capacitor with the other electrode connected to the other end of the secondary winding; and a second rectifier capacitor with the other electrode connected to one end of the secondary winding, wherein the charging circuit includes a first switch element including a control terminal into which the pulse drive wave is input, a first current terminal connected to one electrode of the first rectifier capacitor, and a second current terminal; and a second switch element including a control terminal into which the pulse drive wave is input, a first current terminal connected to one electrode of the second rectifier capacitor, and a second current terminal; and the first switch The high-voltage power supply may be as described in [3] or [4], comprising: a first inductor including one end connected to the second current terminal of the switch element and the other end connected to one electrode of the fifth capacitor; a second inductor including one end connected to the second current terminal of the second switch element and the other end connected to one electrode of the fifth capacitor; and a third switch element including a control terminal to which the pulse-on signal is input, a first current terminal connected to one electrode of the fifth capacitor, and a second current terminal connected to the other electrode of the fifth capacitor. With this, the charging and discharging of the fifth capacitor can be performed with a simple configuration by turning the third switch element on and off with the pulse-on signal. Furthermore, a voltage is generated as the charging voltage of the fifth capacitor by adding the voltage obtained by smoothing the output wave of the first switch element with the first inductor and the fifth capacitor and the voltage obtained by smoothing the output wave of the second switch element with the second inductor and the fifth capacitor. This makes it possible to adjust the charging voltage according to the duty cycle of the pulse drive wave with a simple configuration.

[0012] The boost rectifier circuit according to one aspect of the present disclosure is the high-voltage power supply according to any one of [1] to [5], wherein "the two-wave rectifier circuit portion further includes a sixth capacitor including one electrode connected to an electrode of the fifth capacitor opposite to the electrode connected to the first series circuit portion and the other electrode connected to a reference potential, and when the state of the load connected to the other end of the first series circuit portion transitions from a heavy load state to a no-load state, the control unit connects the one electrode to the reference potential and switches the other electrode from the reference potential to an open state." According to this, the first DC voltage includes only the DC voltage generated in the fifth capacitor without including the DC voltage output from the sixth capacitor. Therefore, the first DC voltage and the second DC voltage are reduced by the amount of the DC voltage output from the sixth capacitor. As a result, the overshoot of the second DC voltage that occurs when the state of the load transitions from a heavy load state to a no-load state is suppressed.

[0013] The boost rectifier circuit according to one aspect of the present disclosure is a high-voltage power supply including "a transformer including a primary winding and a secondary winding, to which an AC voltage is input to the primary winding, a two-wave rectifier circuit portion connected to the secondary winding and configured to rectify the AC voltage generated in the secondary winding to generate a first DC voltage, a first series circuit portion formed by connecting a plurality of first capacitors in series, a second series circuit portion formed by connecting a plurality of second capacitors in series, a third series circuit portion formed by connecting a plurality of third capacitors in series, and a control unit, wherein the two-wave rectifier circuit portion includes a fourth capacitor connected to one end of the first series circuit portion and a charging circuit configured to charge the fourth capacitor with electric charge, one end of the second series circuit portion is connected to one end of the secondary winding, one end of the third series circuit portion is connected to the other end of the secondary winding, the plurality of first capacitors of the first series circuit portion, the plurality of second capacitors of the second series circuit portion, and the plurality of third capacitors of the third series circuit portion constitute a two-wave rectifier type boost circuit portion, and the control unit instructs the timing at which the charging circuit charges the fourth capacitor with electric charge."

[0014] According to the high-voltage power supply described in [7] above, in the full-wave rectifier circuit section, a voltage is generated in the fourth capacitor by the charge stored in the fourth capacitor. The voltage generated in the fourth capacitor increases the first DC voltage. Then, in the full-wave rectifier boost circuit section, the first DC voltage is added to the DC voltage obtained by rectifying and boosting the AC voltage using both half-waves of the AC voltage generated in the secondary winding of the transformer, thereby generating a high voltage. When a voltage drop occurs in the high voltage, the charging circuit instructed by the control unit charges the fourth capacitor, compensating for at least a portion of the voltage drop. This reduces the voltage drop and allows for high-speed and stable control of the high voltage.

[0015] A step-up rectifier circuit relating to one aspect of the present disclosure includes: [8] a transformer having a primary winding and a secondary winding, to which an AC voltage is input; a full-wave rectifier circuit section connected to the secondary winding and which generates a first DC voltage by rectifying the AC voltage generated in the secondary winding; a first series circuit section consisting of a plurality of first capacitors connected in series; a first diode connected between one end of the secondary winding of the transformer and one end of the first series circuit section; a second diode connected between the other end of the secondary winding and the one end of the first series circuit section; and a first step-up rectifier circuit connected to the secondary winding, which rectifies and steps up the AC voltage generated in the secondary winding by combining a plurality of circuit sections including the second capacitor and the third diode in multiple stages. The high-voltage power supply comprises a path section, a second boost rectifier circuit section connected to the secondary winding and composed of multiple stages of circuit sections including a third capacitor and a fourth diode, which rectify and boost the AC voltage generated in the secondary winding in the opposite phase to that of the first boost rectifier circuit section, a voltage combining section that combines the output voltage from the first boost rectifier circuit section, the output voltage from the second boost rectifier circuit section, and the first DC voltage to generate a second DC voltage, and a control section, wherein the full-wave rectifier circuit section includes a fourth capacitor connected to one end of the first series circuit section, and a charging circuit for charging the fourth capacitor, and the control section instructs the timing for the charging circuit to charge the fourth capacitor.

[0016] According to the high-voltage power supply described in [8] above, in the full-wave rectifier circuit, a voltage is generated in the fourth capacitor by the charge stored in the fourth capacitor. The voltage generated in the fourth capacitor increases the first DC voltage and also increases the second DC voltage. For example, when a voltage drop occurs in the second DC voltage, the charging circuit instructed by the control unit charges the fourth capacitor, thereby compensating for at least a portion of the drop in the second DC voltage. This reduces the voltage drop and enables high-voltage control at high speed and stably.

[0017] According to this disclosure, it is possible to provide a high-voltage power supply that can quickly stabilize a high voltage at a set value.

[0018] Figure 1 is a circuit diagram showing the configuration of a boost rectifier circuit included in a high-voltage power supply according to one embodiment of the present disclosure. Figure 2 is a circuit diagram showing the configuration of a boost rectifier circuit included in a high-voltage power supply according to one embodiment of the present disclosure. Figure 3 is a circuit diagram showing the configuration of a detection unit and a control unit included in a high-voltage power supply according to one embodiment of the present disclosure. Figure 4 is a graph showing an example of the operation of the charging circuit in the boost rectifier circuit shown in Figures 1 and 2. Figure 5 is a graph showing an example of the correspondence between the instruction voltage and the duty cycle of the pulse drive wave. Figure 6 is a graph showing an example of the operation of the boost rectifier circuit shown in Figures 1 and 2. Figure 7 is a graph showing an example of the behavior of the load current and the second DC voltage. Figure 8 is a circuit diagram showing the configuration of a high-voltage power supply according to a first modified example. Figure 9 is a circuit diagram showing the configuration of a high-voltage power supply according to a first modified example. Figure 10 is a circuit diagram showing the configuration of a high-voltage power supply according to a second modified example. Figure 11 is a circuit diagram showing the configuration of a high-voltage power supply according to a third modified example.

[0019] Hereinafter, preferred embodiments of a high-voltage power supply according to one embodiment of the present disclosure will be described in detail with reference to the drawings. In the description of the drawings, the same elements are denoted by the same reference numerals, and redundant descriptions are omitted. [Configuration of the high-voltage power supply]

[0020] A high-voltage power supply 100 according to one embodiment of the present disclosure, as shown in Figures 1 to 3, comprises a boost rectifier circuit 1, a detection unit 7, and a control unit 8. The high-voltage power supply 100 generates a high-voltage DC voltage in the boost rectifier circuit 1. The detection unit 7 detects fluctuations in the DC voltage, and the control unit 8 generates a drive signal based on the fluctuations in the DC voltage. The charging circuit included in the boost rectifier circuit 1 is driven by the drive signal to quickly stabilize the DC voltage at a set value. [Configuration and operation of the boost rectifier circuit]

[0021] Figures 1 and 2 are circuit diagrams showing the configuration of a boost rectifier circuit. As shown in Figures 1 and 2, the boost rectifier circuit 1 comprises an inverter circuit 12, a transformer 21, a capacitor 22 (first rectifier capacitor), a diode 23, a capacitor 24 (second rectifier capacitor), a diode 25, a full-wave rectifier circuit section 3, a first series circuit section 4, a second series circuit section 5, and a third series circuit section 6.

[0022] The inverter circuit 12 is a circuit composed of multiple switching elements. The inverter circuit 12 is, for example, a bridge circuit. The inverter circuit 12 uses the inverter voltage Viv input from the detection unit 7 as the power supply voltage. The inverter voltage Viv is input from connection point CN1A. Connection point CN1A is connected to the input terminal of the inverter circuit 12 via resistor R1. One output terminal 12a of the inverter circuit 12 is connected to one end of the primary winding 21a of the transformer 21 via resistor 13a, capacitor 14a, and inductor 15a. In addition, the other output terminal 12b of the inverter circuit 12 is connected to the other end of the primary winding 21a of the transformer 21. Both ends of the primary winding 21a are connected to each other via inductor 15b and capacitor 14b, which are provided in parallel with each other. Resistor 13a is provided as, for example, a damping resistor. Alternatively, resistor 13a may be an equivalent representation of the winding resistance of the primary winding 21a of the transformer 21 as a lumped constant. In this case, resistor 13a does not need to be provided as an external resistor.

[0023] In the inverter circuit 12, multiple switching elements are driven, for example, by an inverter drive wave (not shown) of a predetermined frequency input from the control unit 8. In the following description, a switching element is, for example, a transistor such as an FET. When the inverter voltage Viv is input from the detection unit 7, the inverter voltage Viv is periodically distributed by the inverter circuit 12 to two output terminals 12a and 12b. That is, two square waves with opposite phases, generated based on the inverter drive wave, are output from the two output terminals 12a and 12b. These square waves are converted into an AC voltage by the resistor, inductor, and capacitor described above, and this AC voltage is input to the primary winding 21a of the transformer 21. Note that other circuits (for example, a push-pull circuit) may be used instead of the bridge circuit, as long as they can apply an AC voltage to the primary winding 21a of the transformer 21.

[0024] The anode of diode 23 is connected to one end 21c of the secondary winding 21b via resistor R2. The cathode of diode 23 is connected to one electrode of capacitor 22. The other electrode of capacitor 22 is connected to the other end 21d of the secondary winding 21b via resistor R3. The anode of diode 25 is connected to the other end 21d of the secondary winding 21b via resistor R3. The cathode of diode 25 is connected to one electrode of capacitor 24. The other electrode of capacitor 24 is connected to one end 21c of the secondary winding 21b via resistor R2. In the following description, one electrode of the capacitor mainly refers to the electrode located on the output side, i.e., the side opposite to the secondary winding 21b. The other electrode of the capacitor mainly refers to the electrode located on the input side, i.e., the side opposite to the secondary winding 21b. Resistors R2 and R3 are provided, for example, as damping resistors. Alternatively, resistors R2 and R3 may be equivalently expressed as lumped-parameter values ​​of the winding resistance of the secondary winding 21b of the transformer 21. In this case, resistors R2 and R3 do not need to be provided as external resistors.

[0025] The full-wave rectifier circuit section 3 is connected to both ends of the secondary winding 21b via resistors R2 and R3. The full-wave rectifier circuit section 3 includes a capacitor 31 (sixth capacitor), a diode 32, a diode 33, a diode 34, a diode 35, a capacitor 36 (fifth capacitor), and a charging circuit 37. The cathode of diode 32 is connected to one electrode of capacitor 31, and the anode of diode 32 is connected to one end 21c of the secondary winding 21b via resistor R2. The cathode of diode 33 is connected to one end 21c of the secondary winding 21b via resistor R2, and the anode of diode 33 is connected to the other electrode of capacitor 31. The cathode of diode 34 is connected to one electrode of capacitor 31, and the anode of diode 34 is connected to the other end 21d of the secondary winding 21b via resistor R3. The cathode of diode 35 is connected to the other end 21d of the secondary winding 21b via resistor R3, and the anode of diode 35 is connected to the other electrode of capacitor 31. The other electrode of capacitor 31 is connected to the reference potential GND. The other electrode of capacitor 36 is connected to one electrode of capacitor 31. In other words, capacitor 36 and capacitor 31 are connected in series with each other. To put it another way, capacitor 31 is connected to the electrode of capacitor 36 that is opposite to the electrode connected to the first series circuit section 4 (the other electrode).

[0026] The charging circuit 37 includes a switch element T1 (first switch element), a switch element T2 (second switch element), a switch element T3 (third switch element), an inductor L1 (first inductor), an inductor L2 (second inductor), a diode 371, and a diode 372. Each of the switch elements T1, T2, and T3 includes a control terminal to which a drive signal is input, a first current terminal, and a second current terminal, and current flows from the first current terminal to the second current terminal. In the example in Figure 1, a body diode connected in parallel between the first current terminal and the second current terminal of each switch element is shown.

[0027] The control terminal T3a of the switch element T3 is connected to the connection point CN4A. The first current terminal T3b of the switch element T3 is connected to one electrode of the capacitor 36. The second current terminal T3c of the switch element T3 is connected to the other electrode of the capacitor 36. A pulse-on signal Spn1 is input to the connection point CN4A from the control unit 8. The charging circuit 37 receives the pulse-on signal Spn1 and charges the capacitor 36. As will be described in detail later, the pulse-on signal Spn1 indicates Low when there is a fluctuation of a certain amount or more in the second DC voltage VDC2 (hereinafter referred to as fluctuation), and indicates High when there is no fluctuation of a certain amount or more in the second DC voltage VDC2 (hereinafter referred to as normal). In the normal state, since the pulse-on signal Spn1 is High, the switch element T3 is turned ON. As a result, both ends of the capacitor 36 are short-circuited, and the capacitor 36 is not charged. During fluctuations, the pulse-on signal Spn1 is Low, which turns off the switch element T3. As a result, the capacitor 36 is charged. In the following explanation, Hi and Low levels for each signal indicate the potential state for each signal. Hi is a higher potential than Low. Hi may be the power supply voltage, and Low may be the reference potential GND.

[0028] The control terminal T1a of the switch element T1 is connected to connection point CN2A. The first current terminal T1b of the switch element T1 is connected to one electrode of the capacitor 22. The second current terminal T1c of the switch element T1 is connected to one end of the inductor L1 and the cathode of the diode 371. The other end of the inductor L1 is connected to one electrode of the capacitor 36, and the anode of the diode 371 is connected to the other electrode of the capacitor 36. The control terminal T2a of the switch element T2 is connected to connection point CN3A. The first current terminal T2b of the switch element T2 is connected to one electrode of the capacitor 24. The second current terminal T2c of the switch element T2 is connected to one end of the inductor L2 and the cathode of the diode 372. The other end of the inductor L2 is connected to one electrode of the capacitor 36, and the anode of the diode 372 is connected to the other electrode of the capacitor 36. A pulse drive wave Spw is input from the control unit 8 to connection points CN2A and CN3A. The pulse drive wave Spw is a PWM (Pulse Width Modulation) wave. As will be described in detail later, the duty cycle of the pulse drive wave Spw changes depending on the magnitude of the fluctuation of the second DC voltage VDC2 when it fluctuates. The control unit 8 outputs a pulse drive wave Spw to the charging circuit 37 that includes a duty cycle corresponding to the instruction voltage Vdrc for suppressing fluctuations in the second DC voltage VDC2, and the charging circuit 37 adjusts the magnitude of the voltage generated at the capacitor 36 based on the magnitude of the duty cycle.

[0029] Figure 4 is a graph showing an example of the operation of switch element T1, switch element T2, inductor L1, and inductor L2. As shown in Figures 4(a) and 4(b), the frequency of the inverter drive wave that drives the inverter circuit 12 is lower than the frequency of the pulse drive wave Spw. However, the frequency of the inverter drive wave does not necessarily have to be lower than the frequency of the pulse drive wave Spw; it may be the same as the frequency of the pulse drive wave Spw. The control unit 8 sets the frequency of the pulse drive wave Spw so that the frequency of the pulse drive wave Spw is higher than the frequency of the inverter drive wave. In the example in Figure 4, the frequency of the pulse drive wave Spw is twice the frequency of the inverter drive wave. The timing of when switch element T1 conducts and the timing of when switch element T2 conducts may be staggered. As shown in Figures 4(c) and 4(e), the phase of the voltage generated across the switch element T1 (voltage between the first current terminal T1b and the second current terminal T1c) may be 180° out of phase with the voltage generated across the switch element T2 (voltage between the first current terminal T2b and the second current terminal T2c). Accordingly, as shown in Figures 4(d) and 4(f), the phase of the current flowing through inductor L1 may be 180° out of phase with the current flowing through inductor L2. For example, during the period when the inverter drive wave is high, when the pulse drive wave Spw rises from low to high, the switch element T1 turns on and current flows through inductor L1. On the other hand, for example, during the period when the inverter drive wave is low, when the pulse drive wave Spw rises from low to high, the switch element T2 turns on and current flows through inductor L2. The current flowing through inductor L1 or inductor L2 then flows through capacitor 36, causing charge to accumulate in capacitor 36.

[0030] As charge accumulates in capacitor 36, a DC voltage is generated across it. For example, a DC voltage is generated in capacitor 36 by smoothing the output wave of switch element T1 using inductor L1 and capacitor 36. Similarly, a DC voltage is generated in capacitor 36 by smoothing the output wave of switch element T2 using inductor L2 and capacitor 36. The DC voltage generated in capacitor 36 changes depending on the duty cycle of the pulse drive wave Spw. For example, the larger the duty cycle of the pulse drive wave Spw, the larger the DC voltage generated in capacitor 36.

[0031] The full-wave rectifier circuit 3 generates a DC voltage by rectifying the AC voltage generated in the secondary winding 21b. In the full-wave rectifier circuit 3, the positive half-wave and negative half-wave of the AC voltage in the secondary winding 21b are rectified by diodes 32 to 35, and a DC voltage is output from one electrode of capacitor 31. For example, if the inverter voltage Viv is 50V and the number of turns in the secondary winding 21b of the transformer 21 is 100 times the number of turns in the primary winding 21a, the amplitude value of the AC voltage in the secondary winding 21b can be 5kVp-p. In this case, the full-wave rectifier circuit 3 generates a DC voltage with an absolute value of 5kV. Furthermore, since capacitor 36 is connected in series with capacitor 31, the DC voltage generated in capacitor 36 is added to the DC voltage output from one electrode of capacitor 31. This added DC voltage becomes the first DC voltage VDC1, which is the output voltage of the full-wave rectifier circuit 3. Therefore, the first DC voltage VDC1 changes depending on the duty cycle of the pulse drive wave Spw. For example, if the absolute value of the DC voltage generated at capacitor 36 changes between 0V and 5kV, the absolute value of the first DC voltage VDC1 changes between 5kV and 10kV.

[0032] The first series circuit section 4 is made up of multiple first capacitors and multiple second capacitors connected alternately in series. In the example in Figure 2, the first series circuit section 4 is made up of N first capacitors Cp(2), Cp(4), ..., Cp(2N) and N second capacitors Cq(2), Cq(4), ..., Cq(2N) connected alternately in series (N is an integer of 2 or more; the figure illustrates the case where N=3). One end of the first series circuit section 4 is connected to the output terminal of the full-wave rectifier circuit section 3. Specifically, one end of the first series circuit section 4 is connected to one electrode of capacitor 36. The second series circuit section 5 is made up of multiple third capacitors connected in series. In the example in Figure 2, the second series circuit section 5 consists of N+1 third capacitors Cp(1), Cp(3), ..., Cp(2N+1) connected in series (N is an integer greater than or equal to 2; the figure illustrates the case where N=3). One end of the second series circuit section 5 is connected to one end 21c of the secondary winding 21b via resistor R2. The third series circuit section 6 consists of a plurality of fourth capacitors connected in series. In the example in Figure 2, the third series circuit section 6 consists of N fourth capacitors Cq(1), Cq(3), ..., Cq(2N-1) connected in series. One end of the third series circuit section 6 is connected to the other end 21d of the secondary winding 21b via resistor R3.

[0033] In the example in Figure 2, 2N+1 diodes Dp(1), Dp(2), ..., Dp(2N+1) connect the first series circuit section 4 and the second series circuit section 5. The cathode of diode Dp(1) is connected to the other electrode of capacitor Cq(2), and the anode of diode Dp(1) is connected to one electrode of capacitor Cp(1). The cathode of diode Dp(2n) (where n=1, 2, 3, ...) is connected to one electrode of capacitor Cp(2n+1), and the anode of diode Dp(2n) is connected to the other electrode of capacitor Cp(2n). The cathode of diode Dp(2n+1) is connected to one electrode of capacitor Cp(2n), and the anode of diode Dp(2n+1) is connected to one electrode of capacitor Cp(2n+1). Similarly, 2N diodes Dq(1), Dq(2), ..., Dq(2N) connect the first series circuit section 4 and the third series circuit section 6. The anode of diode Dq(1) is connected to the other electrode of capacitor Cq(2), and the cathode of diode Dq(1) is connected to one electrode of capacitor Cq(1). The anode of diode Dq(2n) (where n = 1, 2, 3, ...) is connected to one electrode of capacitor Cq(2n-1), and the cathode of diode Dq(2n) is connected to one electrode of capacitor Cq(2n). The anode of diode Dq(2n+1) (where n = 1, 2) is connected to one electrode of capacitor Cp(2n), and the cathode of diode Dq(2n+1) is connected to one electrode of capacitor Cq(2n+1).

[0034] In this embodiment, the third capacitors Cp(1), Cp(3), ..., Cp(2N+1) of the second series circuit section 5 and the first capacitors Cp(2), Cp(4), ..., Cp(2N) of the first series circuit section 4 constitute the first half-wave rectified CW circuit section 10 (first half-wave rectified boost circuit section). The fourth capacitors Cq(1), Cq(3), ..., Cq(2N-1) of the third series circuit section 6 and the second capacitors Cq(2), Cq(4), ..., Cq(2N) of the first series circuit section 4 constitute the second half-wave rectified CW circuit section 20 (second half-wave rectified boost circuit section). The first series circuit section 4 is a common circuit section in the first half-wave rectified CW circuit section 10 and the second half-wave rectified CW circuit section 20.

[0035] The first half-wave rectifier CW circuit section 10 rectifies and boosts the AC voltage generated across the secondary winding 21b. The first half-wave rectifier CW circuit section 10 generates a DC output voltage from the AC voltage by repeatedly accumulating charge in the third capacitors Cp(1), Cp(3), ..., Cp(2N+1) and the first capacitors Cp(2), Cp(4), ..., Cp(2N), and rectifying with the diode Dp(n). The second half-wave rectifier CW circuit section 20 rectifies and boosts the AC voltage generated across the secondary winding 21b in the opposite phase (a phase difference of 180°) to that of the first half-wave rectifier CW circuit section 10. The second half-wave rectifier type CW circuit section 20 generates a DC output voltage from an AC voltage by repeatedly accumulating charge in the fourth capacitors Cq(1), Cq(3), ..., Cq(2N-1) and the second capacitors Cq(2), Cq(4), ..., Cq(2N), and rectifying the charge in the diode Dq(n).

[0036] The output voltage from the first half-wave rectifier CW circuit section 10 and the output voltage from the second half-wave rectifier CW circuit section 20 are added to the first DC voltage VDC1 in the first series circuit section 4 to generate the second DC voltage VDC2. More specifically, in the boost rectifier circuit 1, the voltages generated at the electrodes across each of the first capacitors Cp(2), Cp(4), ..., Cp(2N) and the second capacitors Cq(2), Cq(4), ..., Cq(2N) in the first series circuit section 4 are added to the first DC voltage VDC1 in sequence to finally generate the second DC voltage VDC2. For example, if the absolute value of the first DC voltage VDC1 is 10kV, a voltage of 5kV is generated at the electrodes across each of the first capacitors Cp(2), Cp(4), ..., Cp(2N) and the second capacitors Cq(2), Cq(4), ..., Cq(2N), resulting in a final absolute value of approximately 40kV for the second DC voltage VDC2.

[0037] The second DC voltage VDC2 is output as the output voltage of the boost rectifier circuit 1 from the other end of the first series circuit section 4 and supplied to the load resistors RL1 and RL2, which are connected in series with each other. In the example in Figure 2, one end of load resistor RL1 is connected to the other end of the first series circuit section 4, and the other end of load resistor RL2 is connected to the reference potential GND. A connection point CN5A is connected at the node between load resistors RL1 and RL2. As a result, the detection voltage Vdet, which is the second DC voltage VDC2 divided by load resistors RL1 and RL2, is output to the detection unit 7 via the connection point CN5A. The detection voltage Vdet indicates the magnitude of the second DC voltage VDC2. Furthermore, in the example in Figure 2, a constant current source CS is connected between the other end of the first series circuit section 4 and the reference potential GND. For example, in the constant current source CS, the load current I Ｌ This is set. In the boost rectifier circuit 1, the second DC voltage VDC2 is the positive terminal. If the second DC voltage VDC2 is to be the negative terminal, the orientation of diodes Dp(1), Dp(2), ..., Dp(2N+1) and diodes Dq(1), Dq(2), ..., Dq(2N) will be reversed from the configuration in Figure 2, and the orientation of the constant current source CS will also be reversed. [Configuration and operation of the detection unit and control unit]

[0038] Next, the configuration and operation of the detection unit 7 and the control unit 8 will be described with reference to Figure 3. The detection unit 7 includes a buffer 71, an error amplifier 72, a voltage source 73, an error amplifier 75, and a linear power converter 77. The input terminal of the buffer 71 is connected to connection point CN5B. Connection point CN5B is electrically connected to connection point CN5A. As a result, the detection voltage Vdet is input to the input terminal of the buffer 71 via connection point CN5B. The error amplifier 72 includes two input terminals and an output terminal. One input terminal of the error amplifier 72 is connected to the output terminal of the buffer 71 via resistor R4. The other input terminal of the error amplifier 72 is connected to the voltage source 73. The voltage source 73 generates a setting voltage Vset (setting signal) for setting the magnitude of the second DC voltage VDC2. The output terminal of the error amplifier 72 is connected to the input terminal of the linear power converter 77. The output terminal of the linear power converter 77 is connected to connection point CN1B. The output terminal of the error amplifier 72 is connected to one of its input terminals via resistor R5 and capacitor 74. Resistors R4, R5, and capacitor 74 determine, for example, the DC gain and frequency characteristics of the feedback system that controls the inverter voltage Viv. Connection point CN1B is electrically connected to connection point CN1A (see Figure 1), which is connected to the input terminal of the inverter circuit 12. The detection unit 7 generates the inverter voltage Viv based on the detected voltage Vdet. In the example of Figure 3, the detected voltage Vdet is output to the error amplifier 72 in a stable state, with attenuation of the output level suppressed in the buffer 71. The error amplifier 72 generates the inverter instruction voltage Vdhv based on the difference between the set voltage Vset and the detected voltage Vdet, and outputs it to the linear power converter 77. The linear power converter 77 generates the inverter voltage Viv proportional to the inverter instruction voltage Vdhv. The linear power converter 77 may be a series regulator or a switching regulator. The set voltage Vset is a fixed value unless, for example, the setting is changed by the user. If a voltage drop occurs in the second DC voltage VDC2, the detected voltage Vdet also decreases. The inverter voltage Viv increases in proportion to the difference between the set voltage Vset and the detected voltage Vdet.In other words, the greater the drop in the second DC voltage VDC2, the larger the difference and the larger the inverter voltage Viv.

[0039] The error amplifier 75 includes two input terminals and an output terminal. One input terminal of the error amplifier 75 is connected to the output terminal of the buffer 71 via resistor R6. The other input terminal of the error amplifier 75 is connected to the voltage source 73. The output terminal of the error amplifier 75 is connected to a control element 81 included in the control unit 8. The output terminal of the error amplifier 75 is connected to the other input terminal via resistor R7 and capacitor 76. Resistors R6, R7, and capacitor 76 determine the DC gain and frequency characteristics of the feedback system that controls, for example, the instruction voltage Vdrc, and consequently the pulse drive wave Spw, which will be described later. The error amplifier 75 generates the instruction voltage Vdrc based on the difference between the set voltage Vset and the detected voltage Vdet. The set voltage Vset is a fixed value unless, for example, the user changes the setting. The error amplifier 75 generates the instruction voltage Vdrc when, for example, the detected voltage Vdet is smaller than the set voltage Vset. If a voltage drop occurs in the second DC voltage VDC2, the detected voltage Vdet also decreases. In this case, an indicator voltage Vdrc may be generated when the detected voltage Vdet decreases and becomes smaller than the set voltage Vset. The indicator voltage Vdrc increases in proportion to the difference between the set voltage Vset and the detected voltage Vdet. In other words, the larger the drop in the second DC voltage VDC2, the larger the difference and the larger the indicator voltage Vdrc becomes.

[0040] Error amplifier 75 and its peripheral circuitry (resistors R6, R7, and capacitor 76) and error amplifier 72 and its peripheral circuitry (resistors R4, R5, and capacitor 74) may implement, for example, PI control. Here, the capacitance of capacitor 76 is significantly smaller than that of capacitor 74. For example, the capacitance of capacitor 76 is 10 nF, and the capacitance of capacitor 74 is 1 μF. The control target of error amplifier 72 and its peripheral circuitry is the inverter voltage Viv, and a second DC voltage VDC2 is ultimately generated based on the inverter voltage Viv. Therefore, the feedback system that controls the inverter voltage Viv, including error amplifier 72 and its peripheral circuitry, tends to have a large response delay, and in order to ensure stability such as oscillation prevention, the capacitance of capacitor 74 needs to be large. In contrast, the feedback system that controls the pulse drive wave Spw, including error amplifier 75 and its peripheral circuitry, can operate at a higher speed than the feedback system that controls the inverter voltage Viv, and in order to ensure stability, the capacitance of capacitor 76 may be small.

[0041] The control unit 8 instructs the charging circuit 37 to charge the capacitor 36. The control unit 8 causes the charging circuit 37 to charge when it detects the indicative voltage Vdrc. The control unit 8 includes a control element 81 and a signal generation unit 82. The control element 81 includes an input terminal 81a, an output terminal 81b, and an output terminal 81c. The timing at which the indicative voltage Vdrc is detected may be the timing at which the indicative voltage Vdrc is input to the control element 81. Alternatively, the control element 81 may compare the indicative voltage Vdrc input from the input terminal 81a with a threshold value. In this case, the timing at which the indicative voltage Vdrc is detected may be the timing at which the indicative voltage Vdrc exceeds the threshold value. The control element 81 may also output a prepulse-on signal Spn0 from the output terminal 81c when it detects the indicative voltage Vdrc.

[0042] The signal generation unit 82 includes a NOT element 825 and an insulating element 826. The input terminal of the NOT element 825 is connected to the output terminal 81c. The output terminal of the NOT element 825 is connected to connection point CN4B via the insulating element 826. Connection point CN4B is electrically connected to connection point CN4A, which is connected to the control terminal T3a of the switch element T3. The polarity of the prepulse-on signal Spn0 output from the output terminal 81c is inverted in the NOT element 825. The inverted prepulse-on signal Spn0 is then output from connection point CN4B as a pulse-on signal Spn1 via the insulating element 826. The insulating element 826 is, for example, an element for matching the level of the reference potential of the control unit 8 with the level of the reference potential GND of the boost rectifier circuit 1.

[0043] The control element 81 sets the duty cycle of the pulse drive wave Spw based on the instruction voltage Vdrc. The control element 81 may, for example, pre-store the correspondence between the instruction voltage Vdrc and the duty cycle of the pulse drive wave Spw. Figure 5 is a graph showing an example of the correspondence between the instruction voltage Vdrc and the duty cycle of the pulse drive wave Spw. The horizontal axis in Figure 5 represents the load current I Ｌ This shows the load current I Ｌ As the value increases, the drop in the second DC voltage VDC2 may increase. This increases the difference between the set voltage Vset and the detected voltage Vdet, causing the indicator voltage Vdrc to increase. As shown in Figure 5, the indicator voltage Vdrc is proportional to the duty cycle of the pulse drive wave Spw. For example, as the indicator voltage Vdrc increases in the range of 1V to 4V, the duty cycle of the pulse drive wave Spw increases in the range of 0.01 to 0.35. In the example in Figure 5, the indicator voltage Vdrc and the duty cycle of the pulse drive wave Spw change nonlinearly, but they may also change linearly. The control element 81 outputs the pulse drive wave Spw with the set duty cycle from the output terminal 81b.

[0044] The signal generation unit 82 further includes AND elements 821 and 822, and insulating elements 823 and 824. The AND element 821 includes two input terminals. One input terminal of the AND element 821 is connected to the output terminal 81b, and the other input terminal is connected to the output terminal 81c. The output terminal of the AND element 821 is connected to connection point CN2B via insulating element 823. Connection point CN2B is electrically connected to connection point CN2A, which is connected to the control terminal T1a of the switch element T1. If the prepulse-on signal Spn0 output from output terminal 81c is Low, the pulse drive wave Spw is not output from the output terminal of the AND element 821. If the prepulse-on signal Spn0 is High, the pulse drive wave Spw is output from the output terminal of the AND element 821. In other words, at the timing when the indicator voltage Vdrc is detected, a pulse drive wave Spw is output from the output terminal of the AND element 821.

[0045] The AND element 822 includes two input terminals. One input terminal of the AND element 822 is connected to output terminal 81b, and the other input terminal is connected to output terminal 81c. The output terminal of the AND element 822 is connected to connection point CN3B via isolation element 824. Connection point CN3B is electrically connected to connection point CN3A, which is connected to control terminal T2a of switch element T2. When the pre-pulse on signal Spn0 output from output terminal 81c is Low, the pulse drive wave Spw is not output from the output terminal of the AND element 822. When the pre-pulse on signal Spn0 is High, the pulse drive wave Spw is output from the output terminal of the AND element 822. That is, at the timing when the indicator voltage Vdrc is detected, the pulse drive wave Spw is output from the output terminal of the AND element 822. [High-voltage power supply operation]

[0046] Based on the configuration of the high-voltage power supply 100 described above, refer to Figure 6, and the load current I Ｌ The following describes the sequence of events from when the current flows until a voltage is generated across the capacitor 36. First, a second DC voltage VDC2 is generated in the first series circuit section 4. Then, as shown in Figure 6(a), the load current I set in the constant current source CS is generated. ＬA current flows. The error amplifier 75 generates an instruction voltage Vdrc based on the difference between the set voltage Vset and the detected voltage Vdet, as shown in Figure 6(b). The control element 81 outputs a pre-pulse-on signal Spn0 from its output terminal 81c at the timing when the instruction voltage Vdrc is input, as shown in Figure 6(c). This causes the pulse-on signal Spn1 to become Low, and charging of the capacitor 36 begins, causing the voltage of the capacitor 36 to start rising, as shown in Figure 6(d). The time TM1 from when the pre-pulse-on signal Spn0 is output until the voltage of the capacitor 36 starts to rise is, for example, 50 μsec to 80 μsec. After that, the control element 81 adjusts the duty cycle of the pulse drive wave Spw based on the instruction voltage Vdrc, and the voltage of the capacitor 36 stabilizes after time TM2 has elapsed since the pre-pulse-on signal Spn0 was output. Here, "stable" may refer to a state in which the rate of fluctuation of the voltage generated at capacitor 36 per predetermined time is within 10%. Time TM2 is, for example, 150 μsec to 250 μsec. [Operation and Effects]

[0047] Next, the effects of the high-voltage power supply 100 according to this embodiment will be explained in comparison with the high-voltage power supply according to the comparative example. The high-voltage power supply according to the comparative example differs from the high-voltage power supply 100 in that the boost rectifier circuit 1 does not have a capacitor 36 and a charging circuit 37, the detection unit 7 does not generate an instruction voltage Vdrc, and the control unit 8 does not generate a pulse drive wave Spw and a pulse-on signal Spn1. In the high-voltage power supply according to the comparative example, one electrode of the capacitor 31 is connected to one end of the first series circuit unit 4, and at the first DC voltage VDC1, a DC voltage is output from one electrode of the capacitor 31. Therefore, even when the second DC voltage VDC2 fluctuates, the high-voltage power supply according to the comparative example does not have the function to quickly stabilize the second DC voltage VDC2 at a set value.

[0048] Figure 7 shows the load current I Ｌ This is a graph showing an example of the behavior of the second DC voltage VDC2. As shown in Figure 7(a), in this example, the constant current source CS controls multiple pulsed load currents I Ｌ 1-I ＬLet 5 flow at a predetermined time interval. The load current I Ｌ 1 to I Ｌ 5 gradually increases in this order. For example, the load current I Ｌ 1 is 0.1 mA, and the load current I Ｌ 2 is 0.3 mA, and the load current I Ｌ 3 is 0.5 mA, and the load current I Ｌ 4 is 1 mA, and the load current I Ｌ 5 is 2 mA. As shown in (b) of FIG. 7, in the high-voltage power supply according to the comparative example, the fluctuation amount of the second DC voltage VDC2 from the value corresponding to the set voltage increases as the load current increases. The fluctuation amount is the largest at the timing when the supply of the load current I Ｌ 5 is stopped, and the maximum fluctuation amount ΔV at that time is, for example, 30 kV or more. On the other hand, as shown in (c) of FIG. 7, in the high-voltage power supply 100, the fluctuation of the second DC voltage VDC2 from the value corresponding to the set voltage is suppressed even when the load current changes. The maximum fluctuation amount ΔV is, for example, within 1.5 kV. Therefore, the high-voltage power supply 100 can significantly suppress the fluctuation of the second DC voltage VDC2 from the value corresponding to the set voltage compared with the high-voltage power supply according to the comparative example.

[0049] In the high-voltage power supply 100, by providing the full-wave rectifier circuit section 3 immediately after the transformer 21, it is possible to generate a first DC voltage VDC1 while suppressing ripple by utilizing both half-waves of the AC voltage generated by the secondary winding 21b of the transformer 21. Furthermore, since the phase of the output voltage from the first half-wave rectifier type CW circuit section 10 and the phase of the output voltage from the second half-wave rectifier type CW circuit section 20 are in opposite phases, the noise superimposed on the first series circuit section 4 cancels each other out. As a result, it is possible to generate a second DC voltage VDC2 while effectively suppressing ripple. In addition, in the full-wave rectifier circuit section 3, a voltage is generated across the capacitor 36 by the charge accumulated in the capacitor 36. The voltage generated across the capacitor 36 increases both the first DC voltage VDC1 and the second DC voltage VDC2. When a voltage drop occurs in the second DC voltage VDC2, the charging circuit 37, instructed by the control unit 8, charges the capacitor 36, thereby compensating for at least a portion of the voltage drop in the second DC voltage VDC2. This reduces the voltage drop and enables high-speed and stable control of the high voltage.

[0050] The high-voltage power supply 100 further includes a detection unit 7 that generates an instruction voltage Vdrc, which is the difference between a detection voltage Vdet indicating the magnitude of the second DC voltage VDC2 and a setting voltage Vset for setting the magnitude of the second DC voltage VDC2. The control unit 8 outputs a pulse-on signal Spn1 to the charging circuit 37 at the timing when it detects the instruction voltage Vdrc, and the charging circuit 37 charges the capacitor 36 upon receiving the pulse-on signal Spn1. This ensures that the charging circuit 37 reliably charges the capacitor 36 when a voltage drop occurs in the second DC voltage VDC2. This allows for more appropriate compensation of at least a portion of the voltage drop in the second DC voltage VDC2, and enables the second DC voltage VDC2 to be quickly stabilized at the set value.

[0051] The control unit 8 outputs a pulse drive wave Spw, which includes a duty cycle corresponding to the instruction voltage Vdrc, to the charging circuit 37. The charging circuit 37 adjusts the magnitude of the voltage generated across the capacitor 36 based on the magnitude of the duty cycle. By controlling the magnitude of the voltage generated across the capacitor 36 based on the magnitude of the duty cycle, the drop in the second DC voltage VDC2 can be accurately compensated for.

[0052] The high-voltage power supply 100 further includes an inverter circuit 12 that generates an AC voltage to be input to the primary winding 21a, and the control unit 8 drives the inverter circuit 12 with an inverter drive wave having a frequency lower than the frequency of the pulse drive wave Spw. This allows the amount of charge charged to the capacitor 36 to be adjusted at a faster rate than the period for driving the inverter circuit 12 to adjust the magnitude of the second DC voltage VDC2. As a result, the drop in the second DC voltage VDC2 can be compensated for faster than the magnitude of the second DC voltage VDC2 is changed, and the second DC voltage VDC2 can be controlled more stably.

[0053] The high-voltage power supply 100 further includes a capacitor 22 whose other electrode is connected to the other end 21d of the secondary winding 21b via a resistor R3, and a capacitor 24 whose other electrode is connected to the one end 21c of the secondary winding 21b via a resistor R2. The charging circuit 37 includes a switch element T1 including a control terminal T1a to which a pulse drive wave Spw is input, a first current terminal T1b connected to one electrode of the capacitor 22, and a second current terminal T1c; a switch element T2 including a control terminal T2a to which a pulse drive wave Spw is input, a first current terminal T2b connected to one electrode of the capacitor 24, and a second current terminal T2c; an inductor L1 including one end connected to the second current terminal T1c of the switch element T1 and the other end connected to one electrode of the capacitor 36; an inductor L2 including one end connected to the second current terminal T2c of the switch element T2 and the other end connected to one electrode of the capacitor 36; and a switch element T3 including a control terminal T3a to which a pulse-on signal Spn1 is input, a first current terminal T3b connected to one electrode of the capacitor 36, and a second current terminal T3c connected to the other electrode of the capacitor 36. According to this, the switching element T3 is turned on and off by the pulse-on signal Spn1, allowing the capacitor 36 to be charged and discharged with a simple configuration. Furthermore, the voltage obtained by smoothing the output wave of the switching element T1 by the inductor L1 and capacitor 36, and the voltage obtained by smoothing the output wave of the switching element T2 by the inductor L2 and capacitor 36, are added together to produce the charging voltage of the capacitor 36. This allows the charging voltage to be adjusted according to the duty cycle of the pulse drive wave Spw with a simple configuration. [Modified Version]

[0054] The high-voltage power supply 100 in this disclosure is not limited to the embodiments described above, and various other modifications are possible. For example, the full-wave rectifier circuit 3 may be directly connected to both ends of the secondary winding 21b without resistors R2 and R3. In the high-voltage power supply 100 according to the embodiment described above, the control element 81 sets the duty cycle of the pulse drive wave Spw based on the instruction voltage Vdrc. Alternatively, the control element 81 may output the pulse drive wave Spw fixed to a predetermined duty cycle. That is, the control element 81 does not have to change the duty cycle of the pulse drive wave Spw based on the instruction voltage Vdrc. For example, load current I Ｌ If you do not change the set load current I Ｌ The amount of fluctuation in the second DC voltage VDC2 is measured, and the duty cycle of the pulse drive wave Spw necessary to suppress the measured amount of fluctuation may be determined in advance. The control element 81 may then output the pulse drive wave Spw with the duty cycle fixed to the determined duty cycle. Through such control, the high-voltage power supply 100 can avoid fluctuations in the second DC voltage VDC2 in advance.

[0055] The high-voltage power supply may have a function to forcibly reduce the second DC voltage VDC2 (feedforward control function). As shown in Figure 7, the load current I Ｌ When the load changes abruptly in a pulsed manner, optimal control may become difficult with feedback control based on controlling the duty cycle of the pulse drive wave Spw. In particular, when a constant current source CS transitions the load state from a heavy load state to an unloaded state, for example, the load current I Ｌ When the load current I is large (heavy load state) ＬWhen transitioning to a state where no current flows (no-load state), there is a risk of overvoltage (overshoot) occurring in the second DC voltage VDC2. This may result in a voltage withstand failure of the connected load, or, if the high-voltage power supply 100 is used to drive an X-ray tube, a voltage higher than the specified voltage value may be generated. As a means of preventing these issues, a feedforward control function may be effective. Figure 8 is a circuit diagram showing an example of the full-wave rectifier circuit section 3A of the boost rectifier circuit 1A in the high-voltage power supply 100A according to the first modified example. The full-wave rectifier circuit section 3A differs from the full-wave rectifier circuit section 3 in the high-voltage power supply 100 in that the other electrode of the capacitor 31 is connected to connection point CN6A, and one electrode of the capacitor 31 is connected to connection point CN7A.

[0056] Figure 9 shows an example of a control unit 8A in a high-voltage power supply 100A. The control element 81A of the control unit 8A differs from the control element 81 in that it further includes an output terminal 81d. The signal generation unit 82A differs from the signal generation unit 82 in that it further includes insulating elements 827, 830, switching elements 828, 831, and a NOT element 829. The input terminal of the NOT element 829 is connected to the output terminal 81d. The control terminal of the switching element 828 is connected to the output terminal 81d via the insulating element 827. The first current terminal of the switching element 828 is connected to connection point CN6B, and the second current terminal of the switching element 828 is connected to the reference potential GND. Connection point CN6B is electrically connected to connection point CN6A. The input terminal of the NOT element 829 is connected to the output terminal 81d. The output terminal of the NOT element 829 is connected to the control terminal of the switch element 831 via the insulating element 830. The first current terminal of the switch element 831 is connected to connection point CN7B, and the second current terminal of the switch element 831 is connected to the reference potential GND. Connection point CN7B is electrically connected to connection point CN7A.

[0057] The control element 81A outputs an adjustment signal Scn from its output terminal 81d. The control element 81A then reverses the polarity of the adjustment signal Scn at any arbitrary timing. This arbitrary timing is, for example, the timing at which the user wants to forcibly reduce the second DC voltage VDC2. Specifically, the load current I Ｌ Examples of how the voltage can be changed in a pulsed manner include the timing of the transition from a heavy load state to an unloaded state. When the control element 81A does not forcibly reduce the second DC voltage VDC2, the adjustment signal Scan may be set to High. In this case, the switch element 828 is turned on, connecting the other electrode of the capacitor 31 to the reference potential GND. On the other hand, the NOT element 829 causes the adjustment signal Scan to become Low, so the switch element 831 is turned off. When the control element 81A forcibly reduces the second DC voltage VDC2, the adjustment signal Scan may be set to Low. In this case, the switch element 828 is turned off. On the other hand, the NOT element 829 causes the adjustment signal Scan to become High, so the switch element 831 is turned on, connecting one electrode of the capacitor 31 to the reference potential GND. In other words, when the load state transitions from a heavy load state to an unloaded state, the control element 81A connects one electrode of the capacitor 31 to the reference potential GND and switches the other electrode of the capacitor 31 from the reference potential GND to an open state. As a result, the first DC voltage VDC1 includes only the DC voltage generated at the capacitor 36, and does not include the DC voltage output from one electrode of the capacitor 31. Therefore, the first DC voltage VDC1 and the second DC voltage VDC2 decrease by the amount of the DC voltage output from one electrode of the capacitor 31. This suppresses the overshoot of the second DC voltage VDC2. Load current I Ｌ After a certain period of time has elapsed since the transition to the no-load state, the control element 81A, for example, changes the adjustment signal Scan from Low to High, thereby restoring the load current I Ｌ Prepare to change the load current I in a pulsed manner. Ｌ By repeating this process in sync with the timing of the pulse-like changes, stable operation with suppressed overshoot can be achieved.

[0058] Figure 10 is a circuit diagram showing an example of a boost rectifier circuit 1B in a high-voltage power supply 100B according to a second modified example. The boost rectifier circuit 1B differs from the boost rectifier circuit 1 in the configuration of the first series circuit section 4A, the second series circuit section 5A, and the third series circuit section 6A. The first series circuit section 4A is made up of a plurality of first capacitors connected in series. In the example of Figure 10, the first series circuit section 4A is made up of a plurality of first capacitors N １ pieces (N in the diagram) １ (Example of case = 3) Capacitor Ce(1) ~ Ce(N １ The second series circuit section 5A is made up of a plurality of second capacitors connected in series. In the example of Figure 10, the second series circuit section 5A is made up of a plurality of second capacitors N １ The number of capacitors Cf(1) to Cf(N) １ ) has. The third series circuit section 6A is made up of a plurality of third capacitors connected in series. In the example of Figure 10, the third series circuit section 6A is made up of a plurality of third capacitors N １ The number of capacitors Cg(1) to Cg(N) １ The capacitors Ce(n) are connected in series with each other, and one end of each is connected to one electrode of capacitor 36 (the fourth capacitor in the first series circuit section 4A). The capacitors Cf(n) are connected in series with each other, and one end of each is connected to one end 21c of the secondary winding 21b via resistor R2. The capacitors Cg(n) are connected in series with each other, and one end of each is connected to the other end 21d of the secondary winding 21b via resistor R3. The multiple first capacitors of the first series circuit section 4A, the multiple second capacitors of the second series circuit section 5A, and the multiple third capacitors of the third series circuit section 6A constitute the full-wave rectifier boost circuit section 30.

[0059] The boost rectifier circuit 1B is 2N １ Diodes De(1) to De(2N) １ ) and 2N １ The number of diodes Df(1) to Df(2N) １) further has the following: The cathode of the odd-numbered diode De(2m-1) is connected to one electrode of capacitor Cf(n), and the anode of diode De(2m-1) is connected to the other electrode of capacitor Ce(n). The cathode of the even-numbered diode De(2m) is connected to one electrode of capacitor Ce(n), and the anode of diode De(2m) is connected to the other electrode of capacitor Cf(n+1). However, the final stage diode De(2N １ The anode of ) is capacitor Cf(N １ It is connected to one of the electrodes of the device.

[0060] Furthermore, the cathodes of the odd-numbered diodes Df(2m-1) are connected to one electrode of capacitor Cg(n), and the anodes of diodes Df(2m-1) are connected to the other electrode of capacitor Ce(n). The cathodes of the even-numbered diodes Df(2m) are connected to one electrode of capacitor Ce(n), and the anodes of diodes Df(2m) are connected to the other electrode of capacitor Cg(n+1). However, the final stage diode Df(2N) １ The anode of ) is capacitor Cg(N １ It is connected to one of the electrodes of the device.

[0061] According to the high-voltage power supply 100B, in the full-wave rectifier circuit section 3, a voltage is generated across the capacitor 36 by the charge stored in the capacitor 36. The voltage generated across the capacitor 36 is added to the DC voltage output from one electrode of the capacitor 31 to form the first DC voltage VDC1. Then, in the full-wave rectifier boost circuit section 30, the first DC voltage VDC1 is added to the DC voltage obtained by rectifying and boosting the AC voltage using both half-waves of the AC voltage generated in the secondary winding 21b of the transformer 21 to generate the second DC voltage VDC2. At this time, for example, if a voltage drop occurs in the second DC voltage VDC2, the charging circuit 37 instructed by the control unit 8 charges the capacitor 36, thereby compensating for at least a portion of the voltage drop in the second DC voltage VDC2. This reduces the voltage drop and allows for high-speed and stable control of the second DC voltage VDC2.

[0062] Figure 11 is a circuit diagram showing an example of a boost rectifier circuit 1C in a high-voltage power supply 100C according to a third modified example. The boost rectifier circuit 1C differs from the boost rectifier circuit 1 in that it includes diode D1 (first diode) and diode D2 (second diode), has a configuration of the first series circuit section 4, has a first boost rectifier circuit section instead of the second series circuit section 5, and has a second boost rectifier circuit section instead of the third series circuit section 6.

[0063] The cathode of diode D1 is connected to one end 21c of the secondary winding 21b via resistor R2. The anode of diode D1 is connected to one electrode of capacitor 36 (the fourth capacitor in the boost rectifier circuit 1C). The cathode of diode D2 is connected to the other end 21d of the secondary winding 21b via resistor R3. The anode of diode D2 is connected to one electrode of capacitor 36.

[0064] The first boost rectifier circuit section 40 is connected to both ends of the secondary winding 21b via resistors R2 and R3. The first boost rectifier circuit section 40 performs first half-wave rectification and boosting of the AC voltage generated across the secondary winding 21b by combining multiple stages of circuit sections including a second capacitor and a third diode. The first boost rectifier circuit section 40 is configured as a half-wave rectifier type CW circuit.

[0065] Specifically, the first boost rectifier circuit section 40 is N ２ pieces (N in the diagram) ２ (Example of the case where = 5) Capacitors Cj(1) to Cj(N ２ ) (second capacitor) and diodes Dj(1) to Dj(N ２The capacitors Cj(2m) in the even-numbered stages are connected in series with one end connected to one end of the secondary winding 21b via resistor R2. The capacitors Cj(2m-1) in the odd-numbered stages are connected in series with one end connected to the other end of the secondary winding 21b via resistor R3. The cathode of diode Dj(n) is connected to one electrode of capacitor Cj(n), and the anode of diode Dj(n) is connected to the other electrode of capacitor Cj(n+1). However, the diode Dj(N) in the final stage is connected to one electrode of capacitor Cj(n+1). ２ The anode of ) is capacitor Cj(N ２ It is connected to one electrode of -1). The even-numbered diode Dj (2m) is composed of two diodes connected in forward series with respect to each other. Similar to the high-voltage power supply 100 according to this embodiment, resistors R2 and R3 are provided as damping resistors, for example. Alternatively, resistors R2 and R3 may be expressed as lumped-parameter equivalents of the winding resistance of the secondary winding 21b of the transformer 21. In this case, resistors R2 and R3 do not need to be provided as external resistors.

[0066] In other words, the first boost rectifier circuit section 40 includes capacitor Cj(n) and diode Dj(n), respectively. ２ It is composed of a series of circuit sections. This results in a capacitor Cj(N ２ A DC voltage VDC2a obtained by rectification and voltage boosting is output from one of the electrodes of the device.

[0067] The second boost rectifier circuit 50 is connected to both ends of the secondary winding 21b via resistors R2 and R3. The second boost rectifier circuit 50 is composed of multiple stages of circuit parts including a third capacitor and a fourth diode, thereby rectifying and boosting another half-wave of the AC voltage generated across the secondary winding 21b, i.e., a second half-wave that is in opposite phase (180° phase difference) to the first half-wave. The second boost rectifier circuit 50 in this embodiment is composed of a half-wave rectifier type CW circuit, similar to the first boost rectifier circuit 40.

[0068] Specifically, the second boost rectifier circuit section 50 is N ２ The number of capacitors Ck(1) to Ck(N) ２ ) (third capacitor) and multiple diodes Dk(1) to Dk(N ２ The capacitors Ck(2m) of the even-numbered stages are connected in series with one end connected to the other end 21d of the secondary winding 21b via resistor R3. The capacitors Ck(2m-1) of the odd-numbered stages are connected in series with one end connected to the other end 21c of the secondary winding 21b. The cathode of Dk(n) is connected to one electrode of capacitor Ck(n), and the anode of Dk(n) is connected to the other electrode of capacitor Ck(n+1). However, the diode Dk(N) of the final stage ２ The anode of ) is capacitor Ck(N ２ It is connected to one electrode of -1). The even-numbered diode Dk (2m) consists of two diodes connected in forward series with respect to each other.

[0069] In other words, the second boost rectifier circuit section 50 includes a capacitor Ck(n) and a diode Dk(n), respectively. ２ It is composed of a combination of stage circuit sections. This results in a capacitor Ck(N ２ A DC voltage VDC2b obtained by rectification and voltage boosting is output from one of the electrodes of the device.

[0070] The boost rectifier circuit 1C further includes a voltage combining unit 60. The voltage combining unit 60 combines the DC voltage VDC2a output from the first boost rectifier circuit unit 40 and the DC voltage VDC2b output from the second boost rectifier circuit unit 50. The voltage combining unit 60 is composed of two diodes 60a and 60b. The anode of diode 60a is connected to the output terminal (capacitor Cj(N)) of the first boost rectifier circuit unit 40. ２ The anode of diode 60b is connected to one electrode of the second boost rectifier circuit 50 (capacitor Ck(N). ２It is connected to one electrode of diode 60a. The cathode of diode 60a and the cathode of diode 60b are connected to each other at connection point 61. With this configuration, the DC voltage VDC2a and DC voltage VDC2b are combined and output from connection point 61 as a second DC voltage VDC2, which is the output voltage of the boost rectifier circuit 1C.

[0071] Furthermore, in the boost rectifier circuit 1C, the first series circuit section 4B is connected in series with N ３ pieces (N ３ is N ２ / 2 or more (N ２ Capacitors Cm(1) to Cm(N) (integers less than or equal to / 2 + 1) ３ It is equipped with (the first capacitor). Capacitors Cm(1) to Cm(N ３ One end of the series circuit consisting of the above is connected to one electrode of the capacitor 36, and the other end is connected to the connection point 61 of the voltage combining unit 60. Furthermore, between Cm(n) and Cm(n+1), the connection point between the two diodes constituting the even-numbered diode Dj(2m) of the first boost rectifier circuit unit 40 and the connection point between the two diodes constituting the even-numbered diode Dk(2m) of the second boost rectifier circuit unit 50 are connected.

[0072] According to the high-voltage power supply 100C, in the full-wave rectifier circuit 3, a voltage is generated across the capacitor 36 by the charge stored in the capacitor 36. The voltage generated across the capacitor 36 is added to the DC voltage output from one electrode of the capacitor 31 to form the first DC voltage VDC1, which in turn becomes the second DC voltage VDC2. When a voltage drop occurs in the second DC voltage VDC2, the charging circuit 37, instructed by the control unit 8, charges the capacitor 36, thereby compensating for at least a portion of the voltage drop in the second DC voltage VDC2. This reduces the voltage drop and allows for high-speed and stable control of the second DC voltage VDC2.

[0073] While the principles of the present invention have been illustrated and described in preferred embodiments, it will be recognized by those skilled in the art that the present invention can be modified in arrangement and detail without departing from such principles. The present invention is not limited to the specific configurations disclosed in these embodiments. Accordingly, all modifications and changes arising from the scope of the claims and their spirit are claimed.

[0074] 3, 3A...Full-wave rectifier circuit section, 4, 4A, 4B...First series circuit section, 5, 5A...Second series circuit section, 6, 6A...Third series circuit section, 7...Detection section, 8, 8A...Control section, 10...First half-wave rectifier type CW circuit section (first half-wave rectifier type boost circuit section), 20...Second half-wave rectifier type CW circuit section (second half-wave rectifier type boost circuit section), 12...Inverter circuit, 21...Transformer, 21b...Secondary winding, 21a...Primary winding, 21c...One end, 21d...Other end, 22...Capacitor (first rectifier capacitor) 24... Capacitor (second rectifier capacitor), 30... Full-wave rectifier boost circuit section, 31... Capacitor (sixth capacitor), 36... Capacitor (fifth capacitor or fourth capacitor in the first series circuit sections 4A, 4B), 37... Charging circuit, 40... First boost rectifier circuit section, 50... Second boost rectifier circuit section, 60... Voltage combining section, 100, 100A, 100B, 100C... High voltage power supply, Cp(2), Cp(4), Cp(2N), Ce(1) to Ce(N) １ ), Cm(1) to Cm(N ３ ) ... First capacitor, Cq(2), Cq(4), Cq(2N), Cf(1) ~ Cf(N) １ ), Cj (1) ~ Cj (N ２ )...Second capacitor, Cp(1), Cp(3), Cp(2N+1), Cg(1) ~ Cg(N １ ), Ck(1) to Ck(N ２ )...Third capacitor, Cq(1), Cq(3), Cq(2N-1)...(Fourth capacitor in the third series circuit section 6), GND...Reference potential, VDC1...First DC voltage, VDC2...Second DC voltage, D1...Diode (First diode), D2...Diode (Second diode), Dj(1)~Dj(N ２ ) ... Diode (third diode), Dk(1) to Dk(N) ２)...diode (fourth diode), L1...inductor (first inductor), L2...inductor (second inductor), Spw...pulse drive wave, Spn1...pulse-on signal, T1...switch element (first switch element), T2...switch element (second switch element), T3...switch element (third switch element), T1a, T2a, T3a...control terminals, T1b, T2b, T3b...first current terminals, T1c, T2c, T3c...second current terminals.

Claims

1. A transformer comprising a primary winding and a secondary winding, wherein an AC voltage is input to the primary winding; a full-wave rectifier circuit section connected to the secondary winding and generating a first DC voltage by rectifying the AC voltage generated in the secondary winding; a first series circuit section comprising a plurality of first capacitors and a plurality of second capacitors connected alternately in series; a second series circuit section comprising a plurality of third capacitors connected in series; a third series circuit section comprising a plurality of fourth capacitors connected in series; and a control section, wherein the full-wave rectifier circuit section comprises a fifth capacitor connected to one end of the first series circuit section and a charging circuit for charging the fifth capacitor, wherein one end of the second series circuit section is connected to one end of the secondary winding, and one end of the third series circuit section is connected to the other end of the secondary winding. The third capacitor of the second series circuit section and the first capacitor of the first series circuit section constitute a first half-wave rectifier type boost circuit section, the fourth capacitor of the third series circuit section and the second capacitor of the first series circuit section constitute a second half-wave rectifier type boost circuit section, the first half-wave rectifier type boost circuit section rectifies and boosts the AC voltage generated in the secondary winding, the second half-wave rectifier type boost circuit section rectifies and boosts the AC voltage generated in the secondary winding in the opposite phase to that of the first half-wave rectifier type boost circuit section, the output voltage from the first half-wave rectifier type boost circuit section and the output voltage from the second half-wave rectifier type boost circuit section are added to the first DC voltage in the first series circuit section to generate a second DC voltage, and the control unit instructs the charging circuit on the timing to charge the fifth capacitor, a high-voltage power supply.

2. The high-voltage power supply according to claim 1, further comprising a detection unit that generates an instruction voltage which is the difference between a detection voltage indicating the magnitude of the second DC voltage and a setting voltage for setting the magnitude of the second DC voltage, wherein the control unit outputs a pulse-on signal to the charging circuit at the timing in which the instruction voltage is detected, and the charging circuit charges the fifth capacitor upon receiving the pulse-on signal.

3. The high-voltage power supply according to claim 2, wherein the control unit outputs a pulse drive wave including a duty cycle corresponding to the instruction voltage to the charging circuit, and the charging circuit adjusts the magnitude of the voltage generated in the fifth capacitor based on the magnitude of the duty cycle.

4. The high-voltage power supply according to claim 3, further comprising an inverter circuit that generates the AC voltage to be input to the primary winding, wherein the control unit drives the inverter circuit with an inverter drive wave having a frequency lower than or the same as the frequency of the pulse drive wave.

5. The charging circuit further comprises a first rectifier capacitor with the other electrode connected to the other end of the secondary winding, and a second rectifier capacitor with the other electrode connected to one end of the secondary winding, the charging circuit comprising: a first switch element including a control terminal into which the pulse drive wave is input, a first current terminal connected to one electrode of the first rectifier capacitor, and a second current terminal; a second switch element including a control terminal into which the pulse drive wave is input, a first current terminal connected to one electrode of the second rectifier capacitor, and a second current terminal; a first inductor including one end of the first switch element connected to the second current terminal and the other end connected to one electrode of the fifth capacitor; and a second inductor including one end of the second switch element connected to the second current terminal and the other end connected to one electrode of the fifth capacitor. The high-voltage power supply according to claim 3 or 4, comprising a control terminal to which the pulse-on signal is input, a first current terminal connected to one electrode of the fifth capacitor, and a third switching element including a second current terminal connected to the other electrode of the fifth capacitor.

6. The high-voltage power supply according to any one of claims 1 to 5, wherein the full-wave rectifier circuit further includes a sixth capacitor which includes one electrode of the fifth capacitor connected to the electrode opposite to the electrode connected to the first series circuit, and the other electrode connected to a reference potential, and the control unit connects the one electrode to the reference potential and switches the other electrode from the reference potential to an open state when the state of the load connected to the other end of the first series circuit transitions from a heavy load state to an unloaded state.

7. A transformer comprising a primary winding and a secondary winding, wherein an AC voltage is input to the primary winding; a full-wave rectifier circuit section connected to the secondary winding and generating a first DC voltage by rectifying the AC voltage generated in the secondary winding; a first series circuit section consisting of a plurality of first capacitors connected in series; a second series circuit section consisting of a plurality of second capacitors connected in series; a third series circuit section consisting of a plurality of third capacitors connected in series; and a control section, wherein the full-wave rectifier circuit section includes a fourth capacitor connected to one end of the first series circuit section and a charging circuit for charging the fourth capacitor, wherein one end of the second series circuit section is connected to one end of the secondary winding, and one end of the third series circuit section is connected to the other end of the secondary winding. The plurality of first capacitors in the first series circuit section, the plurality of second capacitors in the second series circuit section, and the plurality of third capacitors in the third series circuit section constitute a full-wave rectifier boost circuit section, and the control unit instructs the charging circuit on the timing to charge the fourth capacitor, and is a high-voltage power supply.

8. A transformer comprising a primary winding and a secondary winding, wherein an AC voltage is input to the primary winding; a full-wave rectifier circuit section connected to the secondary winding and generating a first DC voltage by rectifying the AC voltage generated in the secondary winding; a first series circuit section comprising a plurality of first capacitors connected in series; a first diode connected between one end of the secondary winding of the transformer and one end of the first series circuit section; a second diode connected between the other end of the secondary winding and the one end of the first series circuit section; and a first boost rectifier circuit section connected to the secondary winding, wherein a plurality of stages of circuit sections including the second capacitor and the third diode are combined to rectify and boost the AC voltage generated in the secondary winding. A high-voltage power supply comprising: a second boost rectifier circuit connected to the secondary winding and having multiple stages of circuit sections including a third capacitor and a fourth diode, which rectifies and boosts the AC voltage generated in the secondary winding in opposite phase to the first boost rectifier circuit; a voltage combining unit that combines the output voltage from the first boost rectifier circuit, the output voltage from the second boost rectifier circuit, and the first DC voltage to generate a second DC voltage; and a control unit, wherein the full-wave rectifier circuit includes a fourth capacitor connected to one end of the first series circuit, and a charging circuit for charging the fourth capacitor, and the control unit instructs the timing for the charging circuit to charge the fourth capacitor.

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