Graphics memory pool with dynamic resizing

Abstract

A method for allocating memory includes receiving, from a guest operating system, a memory allocation request for a virtual machine. The memory allocation request requests a first quantity of memory from a type of memory in a shared memory. The method also includes determining whether a difference between available memory in the type of memory in the shared memory and the first quantity of memory is less than a first predefined threshold. The first predefined threshold is smaller than the available memory. The method further includes dynamically allocating a new memory pool to the type of memory in the shared memory in response to the difference being less than the first predefined threshold.

Description

Qualcomm Ref. No. 2407115WO 1GRAPHICS MEMORY POOL WITH DYNAMIC RESIZINGCROSS-REFERENCE TO RELATED APPLICATION

[0001] The present application claims the benefit of India Patent Application No. 202421074227, filed on October 1, 2024, and titled ‘GRAPHICS MEMORY POOL WITH DYNAMIC RESIZING,” the disclosure of which is expressly incorporated by reference in its entirety.BACKGROUNDField

[0002] Aspects of the present disclosure relate to computing devices, and more specifically to dynamic resizing of memory allocation, for example, graphics memory allocation.Background

[0003] An operating system runs on computer hardware. In cases where multiple operating systems are present, one of the operating systems is designated as a host operating system and any other operating systems are designated as guest operating systems. For example, a vehicle may run a host operating system that is native to the vehicle computer hardware. The vehicle may also run one or more different operating systems for infotainment purposes, which may be referred to as guest operating system(s) for the vehicle computer hardware. To facilitate operation of the guest operating system(s), virtual machine software is deployed to behave as ‘dedicated hardware’ for the guest operating system(s) to enable the guest operating system(s) to run on the ‘dedicated hardware.’

[0004] Memory allocation requests from a guest operating system are processed by the virtual machine. For example, memoiy requested by the guest operating system to a graphics driver may be processed by a system memory management unit (SMMU) to map the allocated memory to shared memory. However, latency may be high when many7memory allocation requests arrive in a short period of time, e.g., within a few frames. Memory deallocation may also cause latency issues. The latency may causeSeyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 2 performance issues in the application requesting the memory. Improved memory allocation and deallocation techniques are desired.SUMMARY

[0005] In aspects of the present disclosure, a method for allocating memory includes receiving, from a guest operating system, a memory allocation request for a virtual machine. The memory allocation request requests a first quantity of memory from a ty pe of memory in a shared memory. The method also includes determining whether a difference between available memory in the ty pe of memory in the shared memory7and the first quantity of memory is less than a first predefined threshold. The first predefined threshold is smaller than the available memory. The method further includes dynamically allocating a new memory pool to the type of memory' in the shared memory in response to the difference being less than the first predefined threshold.

[0006] Other aspects of the present disclosure are directed to an apparatus. The apparatus has one or more memories and one or more processors coupled to the one or more memories. The processor(s) is configured to receive, from a guest operating system, a memory7allocation request for a virtual machine. The memory allocation request requests a first quantity7of memory7from a ty pe of memory in a shared memory. The processor(s) is also configured to determine whether a difference between available memory in the type of memory7in the shared memory and the first quantity of memory is less than a first predefined threshold. The first predefined threshold is smaller than the available memory7. The processor(s) is further configured to dynamically allocate a new memory pool to the type of memory7in the shared memory in response to the difference being less than the first predefined threshold.

[0007] In other aspects of the present disclosure, a non-transitory computer-readable medium with program code recorded thereon is disclosed. The program code is executed by a processor and includes program code to receive, from a guest operating system, a memory allocation request for a virtual machine. The memory allocation request requests a first quantity7of memory7from a ty pe of memory7in a shared memory7. The program code also includes program code to determine whether a difference between available memory in the type of memory in the shared memory and the first quantity of memory is less than a first predefined threshold. The first predefinedSeyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 3 threshold is smaller than the available memory. The program code further includes program code to dynamically allocate a new memory pool to the type of memory7in the shared memory' in response to the difference being less than the first predefined threshold.

[0008] This has outlined, rather broadly, the features and technical advantages of the present disclosure in order that the detailed description that follows may be better understood. Additional features and advantages of the present disclosure will be described below. It should be appreciated by those skilled in the art that this present disclosure may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present disclosure. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the teachings of the present disclosure as set forth in the appended claims. The novel features, which are believed to be characteristic of the present disclosure, both as to its organization and method of operation, together with further objects and advantages, will be better understood from the following description when considered in connection with the accompanying figures. It is to be expressly understood, however, that each of the figures is provided for the purpose of illustration and description only and is not intended as a definition of the limits of the present disclosure.BRIEF DESCRIPTION OF THE DRAWINGS

[0009] For a more complete understanding of the present disclosure, reference is now made to the following description taken in conjunction with the accompanying drawings.

[0010] FIGURE 1 illustrates an example implementation of a host system-on-a-chip (SoC), including a dynamic memory allocator / deallocator, in accordance with certain aspects of the present disclosure.

[0011] FIGURE 2 is a block diagram illustrating a host operating system, a guest operating system, a virtual machine, a graphics processor, and shared memory7, in accordance with various aspects of the present disclosure.

[0012] FIGURE 3 is a block diagram illustrating dynamically7increasing a memory7pool, in accordance with various aspects of the present disclosure.Seyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 4

[0013] FIGURE 4 is a flow diagram illustrating a process for dynamically changing a memory pool, in accordance with various aspects of the present disclosure.

[0014] FIGURE 5 is a flow diagram illustrating a first continuation of the process for dynamically changing the memory pool, in accordance with various aspects of the present disclosure.

[0015] FIGURE 6 is a flow diagram illustrating a second continuation of the process for dynamically changing the memory pool, in accordance with various aspects of the present disclosure.

[0016] FIGURE 7 is a flow diagram illustrating an example process performed, for example, by a computing device, in accordance with various aspects of the present disclosure.

[0017] FIGURE 8 is a block diagram showing an exemplary' yvireless communications system in which a configuration of the present disclosure may be advantageously employed.

[0018] FIGURE 9 is a block diagram illustrating a design workstation used for circuit, layout, and logic design of components, in accordance with various aspects of the present disclosure.DETAILED DESCRIPTION

[0019] The detailed description set forth below, in connection with the appended drawings, is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of the various concepts. It will be apparent, however, to those skilled in the art that these concepts may be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form in order to avoid obscuring such concepts.

[0020] As described, the use of the term “and / or” is intended to represent an “inclusive OR,” and the use of the term “or” is intended to represent an “exclusive OR.” As described, the term “exemplary” used throughout this description means “serving asSeyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 5 an example, instance, or illustration.7’ and should not necessarily be construed as preferred or advantageous over other exemplary configurations. As described, the term “coupled’’ used throughout this description means “connected, whether directly or indirectly through intervening connections (e.g., a switch), electrical, mechanical, or otherwise,” and is not necessarily limited to physical connections. Additionally, the connections can be such that the objects are permanently connected or releasably connected. The connections can be through switches. As described, the term “proximate” used throughout this description means “adjacent, very near, next to, or close to.” As described, the term “on” used throughout this description means “directly on” in some configurations, and “indirectly on” in other configurations.

[0021] Aspects of the present disclosure dynamically allocate large chunks of memory in response to a memory allocation request. The dynamic allocation occurs before a memory pool is depleted. With this approach, an amount of allocated memory may be greater than an amount of memory requested by an application. In response to the allocation, the application receives a memory offset, enabling access to the allocated memory'. Further aspects relate to dynamically deallocating memory in response to a memory deallocation request.

[0022] Particular aspects of the subject matter described in this disclosure can be implemented to realize one or more of the following potential advantages. In some examples, the described techniques, such as memory allocation and deallocation, improve application performance, such as for guest applications operating via a virtual machine.

[0023] FIGURE 1 illustrates an example implementation of a host system-on-a-chip (SoC) 100, which includes a dynamic memory allocator / deallocator, in accordance with aspects of the present disclosure. The host SoC 100 includes processing blocks tailored to specific functions, such as a connectivity' block 110. The connectivity block 110 may include fifth generation (5G) connectivity, fourth generation long term evolution (4G LTE) connectivity. Wi-Fi connectivity, universal serial bus (USB) connectivity, Bluetooth* connectivity, Secure Digital (SD) connectivity', and the like.

[0024] In this configuration, the host SoC 100 includes various processing units that support multi-threaded operation. For the configuration shown in FIGURE 1, the hostSeyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 6SoC 100 includes a multi-core central processing unit (CPU) 102. a graphics processor unit (GPU) 104, a digital signal processor (DSP) 106, and a neural processor unit (NPU) 108. The host SoC 100 may also include a sensor processor 114, image signal processors (ISPs) 116, a navigation module 120, which may include a global positioning system (GPS), and a memory 118. The multi -core CPU 102, the GPU 104. the DSP 106, the NPU 108, and the multi-media engine 112 support various functions such as video, audio, graphics, gaming, artificial networks, and the like. Each processor core of the multi-core CPU 102 may be a reduced instruction set computing (RISC) machine, an advanced RISC machine (ARM), a microprocessor, or some other type of processor. The NPU 108 may be based on an ARM instruction set.

[0025] According to aspects of the present disclosure, a computing device includes means for receiving, means for determining, means for dynamically allocating, means for dynamically deallocating, means for marking, and means for combining. In one configuration, the receiving means, determining means, dynamically allocating means, dynamically deallocating means, marking means, and combining means may be the driver 201, layer 226, virtual machine 230, system memory management unit (SMMU) 206, and / or double data rate (DDR) memory 210, the GPU 104. CPU 102, and / or memory 118 as shown in FIGURES 1 and 2. In other aspects, the aforementioned means may be any structure or any material configured to perform the functions recited by the aforementioned means.

[0026] An operating system runs on computer hardware. In cases where multiple operating systems are present, one of the operating systems is designated as a host operating system and any other operating systems are designated as guest operating systems. For example, an automobile may run a host operating system that is native to the vehicle computer hardware. The vehicle may also run one or more different operating systems for infotainment purposes, which may be referred to as guest operating system(s) for the vehicle computer hardware. To facilitate operation of the guest operating system(s), virtual machine software is deployed to behave as ‘dedicated hardware' for the guest operating system(s) to enable the guest operating system(s) to run on the ‘dedicated hardware.’

[0027] Memory' requests are allocated for a guest operating system for the applications running in the guest operating system and the memory is mapped to aSeyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 7 graphics processing unit (GPU) by the virtual machine. For example, memory requested by the guest operating system to a graphics driver may be processed by a system memory management unit (SMMU) to map the allocated memory' to a GPU address space. However, latency may be high when many memory allocation requests arrive in a short period of time, e.g., within a few frames because of the round trip time involved in guest operating system operations with the virtual machine The latency may cause performance issues in the application requesting the memory'.

[0028] FIGURE 2 is a block diagram illustrating a host operating system, a guest operating system, a virtual machine, a graphics processor, and shared memory, in accordance with various aspects of the present disclosure. As seen in the example of FIGURE 2, a host operating system (OS) 202 (also referred to as a primary virtual machine (PVM)) processes a graphics memory’ request for a display application 204 (e.g.. a cluster application) via a system memory management unit (SMMU) 206, which allocates a host memory region 208 in a shared memory' space (e.g., double data rate (DDR) memory') 210. A guest operating system 220 (also referred to as a guest virtual machine (GVM)) processes a graphics memory request for a guest display application 224 (e.g.. a mapping application). The memory is allocated or deallocated / freed via a driver 201 (e.g., HGSL) that communicates with a guest memory region 228 in the shared memory' space 210.

[0029] The path designated as ‘ U in FIGURE 2 corresponds to when the guest operating system allocates memory for an application and the memory has to be accessed by the GPU. The SMMU maps this memory'. This control flows from App- >GSL(Graphics User Mode Driver or UMD)->HGSL(Hypevisor GSL) 201-> Virtual Machine 230-> Host OS GSL->KGSL(Kemel GSL)->SMMU 206. If this memory is accessed by the GPU then the SMMU 206 does not map the memory. The path designated as ‘2’ is taken by the application running on the host operating system (e.g., QNX which runs the cluster application 204 in the example of FIGURE 2.)

[0030] Graphics memory’ is allocated via a layer 226 (e.g., kernel mode hypervisor abstraction (KHAB)) and a virtual machine 230 (e.g., hypervisor). The virtual machine 230 allocates the guest memory' region 228 in the shared memory’ space 210 via a back end 203 and the SMMU 206 of the host operating system 202, resulting in a latency that may affect performance of the guest display application 224.Seyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 8

[0031] A memory pool in the shared memory 210 is allocated on a per application basis and mapped in the back end 203, during initialization. The current design satisfies most memory requirements for most native applications, such as human machine interface (HMI) or cluster applications. However, some guest applications experience latency during memory allocation that affects performance of the guest application, for example, the speed of map rendering.

[0032] Whenever there is memory allocation request, aspects of present disclosure monitor the memory pool for the free available memory. If the memory is depleted below a certain water mark, an event is triggered to allocate one more chunk of memory (pool). Current allocation requests are serviced from the available chunk of memory (pool). In case a current allocation request ca not be satisfied by the existing memory pools, the system falls back to legacy mechanisms of allocating and mapping memory (e.g.. allocate at the guest and SMMU map at the host). Similarly, during a deallocation request the system monitors the watermark level, and if a number of available free memory pools are more than the watermark level free, half of the number of pools are deallocated. For the current deallocation request, the memory is returned back to the pool so further allocation requests can reuse the pool.

[0033] FIGURE 3 is a block diagram illustrating dynamically increasing a memory' pool, in accordance with various aspects of the present disclosure. Graphics memory 302 may be categorized in multiple types. For example, memory pool types may be categorized as texture memory, command memory, protected memory, etc. Each memory type may be initialized with a pool of a predefined size. The pool size or node size for each list is predefined and may vary for different types of memory7. For example, texture memory7may have a higher pool size compared to other categories.

[0034] The number of pools that can be allocated is limited by available memory7. In FIGURE 3 diagram ‘n’ is the value until which a pool size gets increased. After this point, the size of the new pools added will not increase. For example for pool type TEXTURE, the initial pool size is 4MB on app launch, and n=2. The pool size will be as follows: 4MB->4*2A0(4MB)->4*2Al(8MB)->4*2A2(16MB)->4*2A2(16MB)->4*2A2(16MB)- >. . . . So on. This logic predicts the application behavior. By constantly increasing the size of new pools being allocated, accommodation is possible for an application thatSeyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 9 requests a large amount of memory in one single allocation request. For example, if an application is requesting 8MB memory, the initial pool which is of size 4MB is too small. The request can be serviced with a new pool being allocated which has size 8MB.

[0035] In the example of FIGURE 3, the texture memory type(POOL TYPE TEXTURE) is initially assigned a number of memory pools (Pool 1.0. . . Pool l.(n+2)). A pool size for new allocations increases with each new allocation up to a point. In the example of FIGURE 3. the pool size for Pool 1.1 is Yl*2A0 (e.g.. 4 MB), where Y1 is the initial size of one pool type and XI is an initial size of another pool type. The next pool size to be allocated by a thread is larger. For example, the pool size for Pool 1.2 is Y1*2A1 or 8 MB in this example. The pool size for pool 1.3 is Y1*2A2 or 16 MB in this example. Eventually, the pool size becomes Yl*2An and continues at that size, for example, as seen on Pool 1. (n+1 ) and Pool l.(n+2). Before a pool for any thread is fully exhausted, a new- pool is dynamically allocated.

[0036] Once a pool with a default size is exhausted, pools are dynamically added according to a maximum number of nodes up to which the pool size can be increased until the system runs out of memory. Memory grows in terms of new- pools (nodes). The pool size may be predefined based on memory specifications for typical use cases. These values can be improved by collecting statistics from additional use cases.

[0037] Initially, a pool is considered as one logical slot. After allocating some of the memory within a pool, the pool may be divided into a number of slots. If a first portion of the pool is allocated, that portion may be designated as slot 1 and the remaining portion of the pool may be designated as slot 2. If another chunk of memory is allocated from this same memory pool, the newly allocated portion of slot 2 is designated as slot 2, while the remaining portion of the former slot is now designated as slot 3.

[0038] In the example of FIGURE 3, Pool 1.0 is divided into slot 1, slot 2, ... slot n (see 330) based on prior memory allocations. Each slot includes a number of pages based on how- much memory- w as allocated at each time. In the example of FIGURE 3, slot 1 includes tw o pages (page 1 and page 2), each page corresponding to 4 KB.Seyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 10Similarly, slot 2 includes two pages. Slot n includes a single page (page m) in the example of FIGURE 3.

[0039] Aspects of the present disclosure address how a slot may be freed. When an application frees memory, the logic will not free the memory immediately. Instead, slots in the pool are marked as free. Adjacent slots within a pool, which are marked as free, are combined to avoid fragmentation. For example, assume slot 1 and slot 2 are initially full. Then, the application frees page 2 of slot 1 in a first iteration. In the next iteration, the application frees page 1 of slot 2. As a result, the free memory becomes non-contiguous or fragmented across slots. Aspects of the present disclosure combine the freed pages into a single slot. Thus, slot 2 will be redefined to include page 2 from previous slot 1 and page 1 of slot 2. If an application requests 8 KB in the next iteration, a new slot 2 may be assigned to the application. If the application only requests 4 KB. the new slot 2 is split into slot 2 and slot 3, and the application is assigned slot 2, while slot 3 is marked as free.

[0040] Aspects of the present disclosure improve search time when searching slots for memory allocation. As seen in FIGURE 3, metadata 350 may reduce search latency when searching for free slots. Assume slot n is free and slots 1 to n-1 are occupied. Conventionally, when searching for free slot n, the thread first examines all prior slots (slot 1 .. . slot n-1), which takes time. If slot n is 4 KB and the request is for 8 KB, the search time for that pool is unproductive, and the thread searches the next pool (Pool 1.1). The search process continues across pools until a sufficient amount of free memory is located within one of the pools.

[0041] According to aspects of the present disclosure, a data structure stores metadata 350 indicating a number and a size of free slots in each pool. In the example of FIGURE 3, the metadata 350 is attached to Pool 1.0. Other metadata (not shown) is attached to each of the other pools. The metadata 350 may indicate a number of available slots for each size range enabling a quicker search for the specified amount of memory to be allocated. The size ranges, for example, may include slots having a size in the range between 0 KB and 4 KB, between 4 KB and 8 KB, between 8 KB and 16 KB, etc. According to these aspects of the present disclosure, the thread reduces search latency by checking the metadata 350 rather than searching through each memory' pool for the requested memory allocation. That is, latency for pool traversal needed to searchSeyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 11 for a free slot is reduced. The need for traversal can be decided based on the availability of free slots that fit the required size using the metadata 350.

[0042] FIGURE 4 is a flow diagram illustrating a process for dynamically changing a memory pool, in accordance with various aspects of the present disclosure. At block 402, an application needs a memory change (e.g., allocation / deallocation), and at block 404, memory allocation or deallocation occurs with a graphics driver (GFX driver) that processes the memory allocation / deallocation at block 406. An allocation process and a deallocation process will now be discussed.

[0043] Dynamic allocation will be discussed first. At blocks 408 and 410, the logic checks whether the memory level will be below a watermark level (or predefined threshold) after allocating the requested memory’. The watermark is a percentage of available memory in the list for the requested memory type, under which a new memory pool is added to the list. For example, if the watermark is 4 MB and the total amount of free memory’ will fall below 4 MB after the requested memory’ allocation, then the process triggers an allocation event and continues to the allocator thread, discussed with respect to FIGURE 5. Triggering the allocation event prevents the executing thread from waiting on a memory allocation and, therefore, prevents an additional latency increase. After triggering the allocator thread event, the process flows to block 412.

[0044] If the amount of free memory’ will not be below the watermark level at block 410, sufficient memory is present, so at block 412, the logic checks whether enough memory is available in the current pool. If enough memory’ is available, at block 414, the logic returns to the application the offset value from the pool. If sufficient memory is not available in the pool at block 412, at block 416, legacy memory allocation occurs at blocks 416 and 418 with allocation in the guest virtual machine (GVM) (e.g., the guest operating system 220 of FIGURE 2) where the SMMU maps the memory’ through the hypervisor abstraction ( HAB) (e.g., the layer 226 and the virtual machine 230 of FIGURE 2). After blocks 414 and 416, the process returns to block 406.

[0045] Pseudo code for blocks 408, 410, 412, and 414 is as follows: allocate(size){ if(free_mem < watermark)Seyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 12{ / / trigger an event to the allocator thread to add new pool to the list} if (memory available in the pool){ / / return the offset from the pool} else { / / fallback to legacy way of allocating at GVM and SMMU mapping at PVM }}A similar flow applies to freeing memory.

[0046] FIGURE 5 is a flow diagram illustrating a first continuation of the process for dynamically changing the memory pool, in accordance with various aspects of the present disclosure. In FIGURE 5, the allocator thread waits on the allocation event triggered when the memory is below the watermark value at block 410. An allocation event is triggered from the allocation call to the allocator thread to allocate a new pool if free memory in the list is below a watermark level, a requested size is not able to fit in the existing pools, or if there is a property flag mismatch with the existing pools. A property flag mismatch is based on each memory request, which has properties, such as cached, uncached, etc. If pool allocation fails for any reason, the driver will fall back to servicing individual requests and mapping the memory in the back end.

[0047] More details will now be described. A single allocator thread is assigned for each process. In response to the event, the allocator thread confirms whether the available pool memory' is below the watermark at block 502. If not, the process returns to waiting for a new allocation event. If the available pool memory is below the watermark, at block 504. a new pool is allocated to the list by the GVM, and at block 506, the SMMU maps the memory' through the HAB (e.g., the layer 226 and the virtual machine 230 of FIGURE 2).Seyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 13

[0048] Dynamic deallocation will now be described, returning to FIGURE 4. If the graphics driver receives a deallocation request at block 406, then at block 420, a second watermark is checked. The second watermark is a predefined value corresponding to a number of free nodes in the list when a node free operation is triggered. For example, assume three pools are free from five pools allocated in a list of memory pools for the type of memory being deallocated. If the watermark value is two pools, then the system permits deallocation, but if the watermark value is four pools, then the system prevents deallocation. Deallocation is prevented to ensure enough memory is present for a future allocation request. At block 422, the logic checks if the free memory is above a second watermark value. If the free memory is above the second watermark value, at block 424, a percentage (e.g., half) of the memory requested for deallocation is added to a free list (separate from a memory' list) and a deallocation thread event is triggered, as described with respect to FIGURE 6. Subsequently, the process flows to block 426.

[0049] The free list may be a linked list of free nodes and prevents any latency associated with locking the memory' to prevent contention on a memory' list, for example, contention with the allocation thread discussed with respect to FIGURE 5, which operates on the memory list. The latency may result from, for example, operations to free the memory.

[0050] FIGURE 6 is a flow' diagram illustrating a second continuation of the process for dynamically changing the memory pool, in accordance with various aspects of the present disclosure. In response to the deallocation event triggered at block 424, at block 602 a deallocator thread determines if any' pools are available in the free list. A single thread perform deallocation. If no pools are available, the logic returns to w ait for a deallocation event. If pools are available, at block 604, the deallocator thread deallocates pool memory in the GVM. At block 606, the SMMU unmaps the deallocated memory through the HAB. That is, the deallocator thread performs the actual freeing and unmapping of the pools. Pools under use are freed and unmapped only when the application is closed.

[0051] Regardless of the w atermark condition, logic to free the memory back to the pool proceeds. Returning to FIGURE 4, at block 422, if the free memory' is not above the second watermark value, at block 426, the logic checks whether memory is allocated from the memory pool (e.g., the Pool 1.0 of FIGURE 3). If so, at block 428, the logicSeyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 14 releases the memory back to the pool and the process returns to block 406. Releasing the memory may include marking a slot as free (e.g., slot 2 of FIGURE 3). If the memory is not allocated to the pool, at block 430, the deallocator thread deallocates pool memory in the GVM, and at block 432, the SMMU unmaps the deallocated memory through the HAB. and then the logic returns to block 406.

[0052] Example pseudo code corresponding to blocks 420, 422, 424, 426, and 428 is as follows: free(size){ if(free nodes > watermark){ / / Add 50% of free pools to the free list and trigger an event} / / Below code will execute irrespective of above condition becomes true or false if (memory allocated from the pool){ / / give the memory' back to the pool} else{ / / fallback to legacy way of freeing at GVM and SMMU unmapping at PVM }}

[0053] FIGURE 7 is a flow diagram illustrating an example process 700 performed, for example, by a computing device, in accordance with various aspects of the present disclosure. The example process 700 is an example of dynamic resizing of memory allocation, for example, graphics memory allocation.

[0054] As shown in FIGURE 7, in some aspects, the process 700 may include receiving, from a guest operating system, a memory allocation request for a virtual machine, the memory allocation request requesting a first quantity of memory from aSeyfarth Ref. No. 72178-006934 320486936v.1Qualcomm Ref. No. 2407115WO 15 type of memory in a shared memory (block 702). The memory type may be a type of graphics memory.

[0055] In some aspects, the process 700 may include determining whether a difference between available memory in the type of memory in the shared memory and the first quantity of memory is less than a first predefined threshold, the first predefined threshold being smaller than the available memory' (block 704). In some aspects, the first predefined threshold comprises a percentage of total allocated memory for the ty pe of memory in the shared memory.

[0056] In some aspects, the process 700 may include dynamically allocating a new memory' pool to the type of memory in the shared memory' in response to the difference being less than the first predefined threshold (block 706).

[0057] FIGURE 8 is a block diagram showing an exemplary wireless communications system 800, in which an aspect of the present disclosure may be advantageously employed. For purposes of illustration, FIGURE 8 shows three remote units 820, 830, and 850, and two base stations 840. It will be recognized that wireless communications systems may have many more remote units and base stations. Remote units 820, 830, and 850 include integrated circuit (IC) devices 825 A, 825B, and 825C that include the disclosed dynamic memory allocator / deallocator. It will be recognized that other devices may also include the disclosed dynamic memory allocator / deallocator, such as the base stations, switching devices, and network equipment. FIGURE 8 shows forward link signals 880 from the base stations 540 to the remote units 820, 830, and 850, and reverse link signals 890 from the remote units 820, 830, and 850 to the base stations 840.

[0058] In FIGURE 8, remote unit 820 is shown as a mobile telephone, remote unit 830 is shown as a portable computer, and remote unit 850 is shown as a fixed location remote unit in a wireless local loop system. For example, the remote units may be a mobile phone, a hand-held personal communication systems (PCS) unit, a portable data unit, such as a personal data assistant, a GPS enabled device, a navigation device, a set top box, a music player, a video play er, an entertainment unit, a fixed location data unit, such as meter reading equipment, or other device that stores or retrieves data or computer instructions, or combinations thereof. Although FIGURE 8 illustrates remoteSeyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 16 units according to the aspects of the present disclosure, the disclosure is not limited to these exemplary illustrated units. Aspects of the present disclosure may be suitably employed in many devices, which include the disclosed dynamic memory' allocator / deallocator.

[0059] FIGURE 9 is a block diagram illustrating a design workstation 900 used for circuit, layout, and logic design of a semiconductor component, such as the dynamic memory' allocator / deallocator disclosed above. The design workstation 900 includes a hard disk 901 containing operating system software, support files, and design software such as Cadence or OrCAD. The design workstation 900 also includes a display 902 to facilitate design of a circuit 910 or a semiconductor component 912, such as the dynamic memory allocator / deallocator. A storage medium 904 is provided for tangibly storing the design of the circuit 910 or the semiconductor component 912 (e.g., the PLD). The design of the circuit 910 or the semiconductor component 912 may be stored on the storage medium 904 in a file format such as GDSII or GERBER. The storage medium 904 may be a CD-ROM, DVD, hard disk, flash memory', or other appropriate device. Furthermore, the design workstation 900 includes a drive apparatus 903 for accepting input from or writing output to the storage medium 904.

[0060] Data recorded on the storage medium 904 may specify logic circuit configurations, pattern data for photolithography masks, or mask pattern data for serial write tools such as electron beam lithography. The data may further include logic verification data such as timing diagrams or net circuits associated with logic simulations. Providing data on the storage medium 904 facilitates the design of the circuit 910 or the semiconductor component 912 by decreasing the number of processes for designing semiconductor wafers.Example Aspects

[0061] Aspect 1 : A method allocating memory, comprising: receiving, from a guest operating system, a memory allocation request for a virtual machine, the memory' allocation request requesting a first quantity of memory from a type of memory in a shared memory; determining whether a difference between available memory in the type of memory in the shared memory and the first quantity of memory is less than a first predefined threshold, the first predefined threshold being smaller than the available memory'; and dynamically allocating a new memory' pool to the ty pe of memory' in the Seyfarth Ref. No. 72178-006934 320486936v.1Qualcomm Ref. No. 2407115WO 17 shared memory in response to the difference being less than the first predefined threshold.

[0062] Aspect 2: The method of Aspect 1, further comprising: receiving, from the guest operating system, a memory deallocation request for the virtual machine, the memory deallocation request requesting a release of a second quantity of memory from the type of memory in the shared memory; determining whether a sum of a quantity7of free memory nodes for the type of memory' in the shared memory and the second quantity exceeds a second predefined threshold; and dynamically deallocating a percentage of memory pools from the type of memory7in the shared memory in response to a sum of the available memory in the type of memory in the shared memory and the second quantity' of memoiy' being greater than the second predefined threshold, the percentage corresponding to the memory’ deallocation request.

[0063] Aspect 3 : The method of Aspect 1 or 2, in which the second predefined threshold comprises the quantity of free memoiy7nodes for the type of memory' in the shared memory.

[0064] Aspect 4: The method of any of the preceding Aspects, further comprising marking as free at least one memory' slot in an application memory' pool corresponding to the deallocation request, prior to dynamically deallocating the portion of memorypools.

[0065] Aspect 5: The method of any of the preceding Aspects, further comprising combining adjacent slots marked as free.

[0066] Aspect 6: The method of any of the preceding Aspects, in which the first predefined threshold comprises a percentage of total allocated memory for the type of memory- in the shared memory.

[0067] Aspect 7: The shared memory of any of the preceding Aspects, in yvhich the ty pe of memory in the shared memory7comprises a type of graphics memory.

[0068] Aspect 8: The method of any of the preceding Aspects, further comprising dynamically allocating memory from a previously allocated memory pool for the type of memory7in the shared memory in response to the difference being greater than the first predefined threshold.Seyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 18

[0069] Aspect 9: An apparatus for allocating memory, comprising: at least one memory; and at least one processor coupled to the at least one memory, the at least one processor configured: to receive, from a guest operating system, a memory allocation request for a virtual machine, the memory allocation request requesting a first quantity of memory from a type of memory in a shared memory; to determine whether a difference between available memory in the type of memory in the shared memory and the first quantity of memory is less than a first predefined threshold, the first predefined threshold being smaller than the available memory: and to dynamically allocate a new memory pool to the type of memory in the shared memory’ in response to the difference being less than the first predefined threshold.

[0070] Aspect 10: The apparatus of Aspect 9, in which the at least one processor is further configured: to receive, from the guest operating system, a memory’ deallocation request for the virtual machine, the memory deallocation request requesting a release of a second quantity’ of memory’ from the ty pe of memory in the shared memory; to determine whether a sum of a quantity’ of free memory' nodes for the type of memory in the shared memory and the second quantity exceeds a second predefined threshold; and to dynamically deallocate a percentage of memory pools from the type of memory in the shared memory' in response to a sum of the available memory in the type of memory in the shared memory and the second quantity of memory being greater than the second predefined threshold, the percentage corresponding to the memory' deallocation request.

[0071] Aspect 11 : The apparatus of Aspect 9 or 10, in which the second predefined threshold comprises the quantity' of free memory' nodes for the type of memory' in the shared memory.

[0072] Aspect 12: The apparatus of any of the Aspects 9-11, in which the at least one processor is further configured to mark as free at least one memory' slot in an application memory’ pool corresponding to the deallocation request, prior to dynamically deallocating the portion of memory pools.

[0073] Aspect 13: The apparatus of any' of the Aspects 9-12, in which the at least one processor is further configured to combining adjacent slots marked as free.Seyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 19

[0074] Aspect 14: The apparatus of any of the Aspects 9-13, in which the first predefined threshold comprises a percentage of total allocated memory for the type of memory^ in the shared memory'.

[0075] Aspect 15: The apparatus of any of the Aspects 9-14, in which the type of memory in the shared memory comprises a type of graphics memory.

[0076] Aspect 16: The apparatus of any of the Aspects 9-15, in which the at least one processor is further configured to dynamically allocate memory from a previously allocated memory pool for the type of memory in the shared memory in response to the difference being greater than the first predefined threshold.

[0077] Aspect 17: A non-transitory computer-readable medium having program code recorded thereon, the program code executed by a processor and comprising: program code to receive, from a guest operating system, a memory allocation request for a virtual machine, the memory allocation request requesting a first quantity of memory from a type of memory in a shared memory’; program code to determine whether a difference between available memory in the type of memory in the shared memory and the first quantity of memory is less than a first predefined threshold, the first predefined threshold being smaller than the available memory; and program code to dynamically allocate a new memory pool to the type of memory' in the shared memory in response to the difference being less than the first predefined threshold.

[0078] Aspect 18: The non-transitory computer-readable medium of Aspect 17, in which the program code comprises: program code to receive, from the guest operating system, a memory deallocation request for the virtual machine, the memory deallocation request requesting a release of a second quantity of memory from the type of memory in the shared memory7; program code to determine yvhether a sum of a quantity of free memory7nodes for the type of memory in the shared memory7and the second quantity exceeds a second predefined threshold; and program code to dynamically deallocate a percentage of memory pools from the type of memory7in the shared memory in response to a sum of the available memory in the type of memory in the shared memory and the second quantity of memory7being greater than the second predefined threshold, the percentage corresponding to the memory7deallocation request.Seyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 20

[0079] Aspect 19: The non-transitory computer-readable medium of Aspect 17 or 18, in which the second predefined threshold comprises the quantity of free memory nodes for the type of memory in the shared memory .

[0080] Aspect 20: The non-transitory computer-readable medium of any of the Aspects 17-19, in which the program code comprises program code to mark as free at least one memory slot in an application memory’ pool corresponding to the deallocation request, prior to dynamically deallocating the portion of memory' pools.

[0081] For a firmware and / or software implementation, the methodologies may be implemented with modules (e.g., procedures, functions, and so on) that perform the functions described. A machine-readable medium tangibly embody ing instructions may be used in implementing the methodologies described. For example, software codes may be stored in a memory and executed by a processor unit. Memory may be implemented within the processor unit or external to the processor unit. As used, the term “memory'” refers to types of long term, short term, volatile, nonvolatile, or other memory and is not limited to a particular type of memory or number of memories, or type of media upon which memory’ is stored.

[0082] If implemented in firmware and / or software, the functions may be stored as one or more instructions or code on a computer-readable medium. Examples include computer-readable media encoded with a data structure and computer-readable media encoded with a computer program. Computer-readable media includes physical computer storage media. A storage medium may be an available medium that can be accessed by a computer. By way of example, and not limitation, such computer- readable media can include random access memory (RAM), read-only memory' (ROM), electrically erasable read-only memory' (EEPROM), compact disc read-only memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, or other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Disk and disc, as used, include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, and Blu-ray® disc, where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.Seyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 21

[0083] In addition to storage on computer-readable medium, instructions and / or data may be provided as signals on transmission media included in a communications apparatus. For example, a communications apparatus may include a transceiver having signals indicative of instructions and data. The instructions and data are configured to cause one or more processors to implement the functions outlined in the claims.

[0084] Although the present disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions, and alterations can be made without departing from the technology of the disclosure as defined by the appended claims. For example, relational terms, such as ‘’above” and “below” are used with respect to a substrate or electronic device. Of course, if the substrate or electronic device is inverted, above becomes below, and vice versa. Additionally, if oriented sideways, above and below may refer to sides of a substrate or electronic device. Moreover, the scope of the present disclosure is not intended to be limited to the particular configurations of the process, machine, manufacture, composition of matter, means, methods, and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the present disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding configurations described may be utilized according to the present disclosure. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.

[0085] Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the present disclosure may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but suchSeyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 22 implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

[0086] The various illustrative logical blocks, modules, and circuits described in connection with the disclosure may be implemented or performed with a general- purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described. A general-purpose processor may be a microprocessor, but, in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

[0087] The steps of a method or algorithm described in connection with the present disclosure may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM. flash memory, ROM, erasable programmable read-only memory (EPROM), EEPROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.

[0088] The previous description of the present disclosure is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined may be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the examples and designs described, but is to be accorded the widest scope consistent with the principles and novel features disclosed.Seyfarth Ref. No. 72178-006934320486936v.1

Claims

Qualcomm Ref. No. 2407115WO 23CLAIMSWHAT IS CLAIMED IS:

1. A method allocating memory, comprising: receiving, from a guest operating system, a memory allocation request for a virtual machine, the memory' allocation request requesting a first quantity' of memory' from a type of memory in a shared memory; determining whether a difference between available memory in the type of memory in the shared memory and the first quantity of memory is less than a first predefined threshold, the first predefined threshold being smaller than the available memory'; and dynamically allocating a new memory pool to the type of memory in the shared memory in response to the difference being less than the first predefined threshold.

2. The method of claim 1, further comprising: receiving, from the guest operating system, a memory' deallocation request for the virtual machine, the memory deallocation request requesting a release of a second quantity of memory from the type of memory in the shared memory; determining whether a sum of a quantity of free memory' nodes for the type of memory in the shared memory' and the second quantity exceeds a second predefined threshold; and dynamically deallocating a percentage of memory pools from the type of memory in the shared memory in response to a sum of the available memory in the type of memory in the shared memory and the second quantity' of memory' being greater than the second predefined threshold, the percentage corresponding to the memory' deallocation request.

3. The method of claim 2, in which the second predefined threshold comprises the quantity of free memory nodes for the type of memory in the shared memory.

4. The method of claim 2, further comprising marking as free at least one memory slot in an application memory' pool corresponding to the deallocation request, prior to dynamically deallocating the portion of memory pools.Seyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 245. The method of claim 4. further comprising combining adjacent slots marked as free.

6. The method of claim 1, in which the first predefined threshold comprises a percentage of total allocated memory for the type of memory in the shared memory.

7. The method of claim 1, in which the ty pe of memory in the shared memory7comprises a type of graphics memory.

8. The method of claim 1, further comprising dynamically allocating memory from a previously allocated memory7pool for the type of memory' in the shared memory in response to the difference being greater than the first predefined threshold.

9. An apparatus for allocating memory7, comprising: at least one memory; and at least one processor coupled to the at least one memory, the at least one processor configured: to receive, from a guest operating system, a memory7allocation request for a virtual machine, the memory allocation request requesting a first quantity of memory from a type of memory in a shared memory; to determine whether a difference between available memory in the type of memory in the shared memory7and the first quantity' of memory is less than a first predefined threshold, the first predefined threshold being smaller than the available memory7; and to dynamically allocate a new memory pool to the type of memory' in the shared memory' in response to the difference being less than the first predefined threshold.

10. The apparatus of claim 9, in which the at least one processor is further configured: to receive, from the guest operating system, a memory deallocation request for the virtual machine, the memory deallocation request requesting a release of a second quantity of memory from the type of memory in the shared memory; to determine whether a sum of a quantity of free memory7nodes for the type of memory in the shared memory and the second quantity exceeds a second predefined threshold; andSeyfarth Ref. No. 72178-006934320486936v.1Qualcomm Ref. No. 2407115WO 25 to dynamically deallocate a percentage of memory pools from the type of memory in the shared memory in response to a sum of the available memory in the type of memory' in the shared memory' and the second quantity' of memory' being greater than the second predefined threshold, the percentage corresponding to the memory' deallocation request.

11. The apparatus of claim 10, in which the second predefined threshold comprises the quantity of free memory nodes for the ty pe of memory in the shared memory'.

12. The apparatus of claim 10, in which the at least one processor is further configured to mark as free at least one memory slot in an application memory' pool corresponding to the deallocation request, prior to dynamically deallocating the portion of memory pools.

13. The apparatus of claim 12, in which the at least one processor is further configured to combining adjacent slots marked as free.

14. The apparatus of claim 9, in which the first predefined threshold comprises a percentage of total allocated memory for the type of memory in the shared memory.

15. The apparatus of claim 9, in which the type of memory in the shared memory comprises a type of graphics memory.

16. The apparatus of claim 9, in which the at least one processor is further configured to dynamically allocate memory from a previously allocated memory pool for the type of memory in the shared memory in response to the difference being greater than the first predefined threshold.

17. A non-transitory computer-readable medium having program code recorded thereon, the program code executed by a processor and comprising: program code to receive, from a guest operating system, a memory allocation request for a virtual machine, the memory allocation request requesting a first quantity of memory from a type of memory in a shared memory; program code to determine whether a difference between available memory' in the type of memory' in the shared memory and the first quantity of memory is less than a Seyfarth Ref. No. 72178-006934 320486936v.1Qualcomm Ref. No. 2407115WO 26 first predefined threshold, the first predefined threshold being smaller than the available memory; and program code to dynamically allocate a new memory pool to the type of memory' in the shared memory in response to the difference being less than the first predefined threshold.

18. The non-transitory computer-readable medium of claim 17, in which the program code comprises: program code to receive, from the guest operating system, a memory' deallocation request for the virtual machine, the memory deallocation request requesting a release of a second quantity of memory from the type of memory in the shared memory; program code to determine whether a sum of a quantity of free memory' nodes for the type of memory in the shared memory and the second quantity exceeds a second predefined threshold; and program code to dynamically deallocate a percentage of memory pools from the ty pe of memory in the shared memoty in response to a sum of the available memory in the type of memory' in the shared memory and the second quantity of memory' being greater than the second predefined threshold, the percentage corresponding to the memory deallocation request.

19. The non-transitory computer-readable medium of claim 18, in which the second predefined threshold comprises the quantity of free memory' nodes for the type of memory' in the shared memory.

20. The non-transitory computer-readable medium of claim 18. in which the program code comprises program code to mark as free at least one memory slot in an application memory pool corresponding to the deallocation request, prior to dynamically deallocating the portion of memory pools.Seyfarth Ref. No. 72178-006934320486936v.1

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