Printed circuit board capacitor model correction method and related device

Abstract

A printed circuit board capacitor model correction method and a related device. The printed circuit board capacitor model correction method comprises: acquiring an actual test result of a first capacitor (S1), the actual test result being obtained by testing the first capacitor using a preset capacitor measurement device; acquiring a simulated test result of the first capacitor (S2), the simulated test result being obtained by performing a simulation test on the first capacitor using a pre-established capacitor model, and each of the actual test result and the simulated test result at least comprising a return loss and / or an insertion loss; and, on the basis of the actual test result and the simulated test result of the first capacitor, adjusting parameters of the capacitor model (S3). The accuracy of the capacitor model can be improved by means of cross-verification of the capacitor model and an actual capacitor, thereby improving the accuracy of various types of data obtained using the capacitor model.

Description

Printed Circuit Board Capacitor Model Correction Methods and Related Equipment Technical Field

[0001] This application relates to the fields of printed circuit board capacitor models and automatic wiring of printed circuit boards, and in particular to a method and related equipment for correcting printed circuit board capacitor models. Background Technology

[0002] As the signal transmission rate of high-speed digital circuits continues to increase, the requirements for signal integrity in transmission channels are becoming increasingly stringent. To accurately assess issues such as losses and impedance mismatches caused by capacitors in the circuit, accurate capacitor models are needed for simulation testing. However, simulation test results obtained using models provided by capacitor manufacturers differ significantly from actual test results. Furthermore, simulation test results using models provided by capacitor manufacturers are also inaccurate.

[0003] Summary of the Invention

[0004] To address the problems in the prior art, this application provides a printed circuit board capacitor model calibration method and related equipment to improve the accuracy of the capacitor model.

[0005] This application provides a method for correcting a printed circuit board capacitor model, the method comprising:

[0006] Obtain the actual test result of the first capacitor, which is obtained based on the test of the first capacitor by a preset capacitance measuring device;

[0007] The simulation test results of the first capacitor are obtained, and the simulation test results are obtained by simulating the first capacitor based on a pre-established capacitor model; both the actual test results and the simulation test results include at least return loss and / or insertion loss.

[0008] The parameters of the capacitor model are adjusted based on the actual test results and simulation test results of the first capacitor.

[0009] In one embodiment, before obtaining the simulation test results of the first capacitor, the method further includes:

[0010] The parameters of the capacitor model are set based on the parameters of the actual capacitor; the actual capacitor includes the first capacitor and a substrate for carrying the first capacitor.

[0011] In one embodiment, adjusting the parameters of the capacitor model based on the actual test results and simulation test results of the first capacitor includes:

[0012] If the difference between the insertion loss in the actual test results and the insertion loss in the simulation test results at a preset frequency point is greater than a first threshold, or the difference between the return loss in the actual test results and the return loss in the simulation test results at a preset frequency point is greater than a second threshold, the parameters of the capacitor model are adjusted.

[0013] In one embodiment, the preset frequency points include 4GHz, 8GHz, and 16GHz, and the adjustment of the parameters of the capacitance model includes:

[0014] Obtain the simulation test results of the adjusted capacitance model;

[0015] Based on the actual test results of the first capacitor and the adjusted simulation test results, adjust the parameters of the capacitor model until the difference between the insertion loss of the actual capacitor and the insertion loss of the capacitor model at the preset frequency point is not greater than a first threshold, and / or the difference between the return loss of the actual capacitor and the return loss of the capacitor model at the preset frequency point is not greater than a second threshold.

[0016] In one embodiment, the capacitor model includes a simulated capacitor, a simulated transmission line, and a simulated substrate, wherein the simulated capacitor and the simulated transmission line are disposed on the simulated substrate;

[0017] The adjustment of the parameters of the capacitance model includes:

[0018] Adjust at least one of the following: the length of the simulated capacitor, the width of the simulated capacitor, the height of the simulated capacitor, the length of the simulated transmission line, the de-embedding length of the simulated transmission line, the height between the internal electrode of the simulated capacitor and the pad of the simulated capacitor, and the dielectric constant of the simulated capacitor.

[0019] In one embodiment, the model for adjusting the capacitance parameters includes:

[0020] Decrease the length of the simulated transmission line, decrease the de-embedding length of the simulated transmission line, increase / decrease the length of the simulated capacitor, increase / decrease the width of the simulated capacitor, increase / decrease the height of the simulated capacitor, increase / decrease the height between the internal electrode of the simulated capacitor and the pad of the simulated capacitor, and increase / decrease the dielectric constant of the simulated capacitor.

[0021] In one embodiment, adjusting the parameters of the capacitance model further includes:

[0022] Adjust at least one of the following: the width of the outer electrode of the simulated capacitor, the length of the inner electrode of the simulated capacitor, the width of the inner electrode of the simulated capacitor, the spacing of the inner electrodes of the simulated capacitor, and the number of inner electrodes of the simulated capacitor.

[0023] In one embodiment, obtaining the simulation test results of the first capacitor includes:

[0024] The simulation test signal is input to the capacitor model; the frequency of the simulation test signal is greater than 1 GHz.

[0025] Obtain the simulation test results of the capacitor model for the simulation test signal.

[0026] This application also proposes a capacitance model calibration device, including a processor and a memory, wherein the memory is used to store instructions, and the processor is used to call the instructions in the memory to cause the processor to execute the above-described printed circuit board capacitance model calibration method.

[0027] This application also proposes a computer-readable storage medium that stores computer instructions that, when executed on a processor, cause the processor to perform the above-described printed circuit board capacitor model correction method.

[0028] This application involves simulating and testing a capacitor model, then adjusting the parameters of the capacitor model based on the simulation results and the test results of the actual capacitor, until the simulation results of the capacitor model are approximately the same as the test results of the actual capacitor. In this way, cross-validation between the capacitor model and the actual capacitor improves the accuracy of the capacitor model, which in turn improves the accuracy of various data obtained using the capacitor model. Therefore, the capacitor model can be used instead of the actual capacitor to obtain various data, improving the efficiency of data acquisition. Attached Figure Description

[0029] Figure 1 is a flowchart of an embodiment of the printed circuit board capacitor model correction method of this application.

[0030] Figure 2 is a flowchart of an embodiment of obtaining simulation test results according to this application.

[0031] Figure 3 is a flowchart of another embodiment of the printed circuit board capacitor model correction method of this application.

[0032] Figure 4 is a flowchart of an embodiment of adjusting the parameters of the capacitor model in this application.

[0033] Figure 5 is a flowchart of another embodiment of the adjustment of capacitor model parameters in this application.

[0034] Figure 6 is a flowchart of yet another embodiment of the adjusted capacitor model parameters of this application.

[0035] Figure 7 is a flowchart of yet another embodiment of the adjusted capacitor model parameters of this application.

[0036] Figure 8 is a flowchart of yet another embodiment of the adjusted capacitor model parameters of this application.

[0037] Figure 9 is a three-dimensional structural diagram of an embodiment of the capacitor model of this application.

[0038] Figure 10 is a side view of an embodiment of the capacitor model of this application.

[0039] Figure 11 is a side view of another embodiment of the capacitor model of this application.

[0040] Figure 12 is a top view of an embodiment of the capacitor model of this application.

[0041] Figure 13 is a waveform diagram of an embodiment of the physical capacitor insertion loss and the capacitor model insertion loss of this application.

[0042] Figure 14 is a waveform diagram of another embodiment of the physical return loss of the capacitor and the return loss of the capacitor model in this application.

[0043] Key component symbols: Capacitor model - 100; Simulated capacitor - 110; Simulated transmission line - 120; Simulated substrate - 130; First transmission line - 121; Second transmission line - 122; Length of simulated capacitor - L_cap; Width of simulated capacitor - W_cap; Height of simulated capacitor - H_cap; Length of simulated transmission line - L_trace; De-embed length of simulated transmission line - L_deembed; Height between the bottom inner electrode and the pad of simulated capacitor - H2; Dielectric constant of dielectric - DK1; Width of outer electrode of simulated capacitor - W_term; Length of inner electrode of simulated capacitor - L_electrode; Width of inner electrode of simulated capacitor - W_electrode; Spacing between inner electrodes of simulated capacitor - H-electrode.

[0044] The following detailed description, in conjunction with the accompanying drawings, will further illustrate this application. Detailed Implementation

[0045] The following description will refer to the accompanying drawings to provide a more complete picture of the present application. The drawings illustrate exemplary embodiments of the present application. However, the present application may be implemented in many different forms and should not be construed as limited to the exemplary embodiments set forth herein. These exemplary embodiments are provided to make the present application thorough and complete, and to fully convey the scope of the present application to those skilled in the art. Similar reference numerals denote the same or similar components.

[0046] The terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to limit the application. As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to also include the plural forms. Furthermore, when used herein, “comprising” and / or “including” and / or “having,” integers, steps, operations, components, and / or components, but does not exclude the presence or addition of one or more other features, regions, integers, steps, operations, components, and / or groups thereof.

[0047] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. Furthermore, unless expressly defined herein, terms such as those defined in a general dictionary should be interpreted as having the same meaning as they have in the relevant art and in the content of this application, and will not be interpreted as having an idealized or overly formal meaning.

[0048] The following description, in conjunction with the accompanying drawings, illustrates exemplary embodiments. It should be noted that components depicted in the drawings are not necessarily shown to scale; and identical or similar components will be designated with the same or similar reference numerals or similar technical terms.

[0049] Referring to Figures 1 and 9-12, this application proposes a method for correcting a capacitor model 100, the method comprising:

[0050] S1: Obtain the actual test result of the first capacitor, which is obtained based on the test of the first capacitor by a preset capacitance measurement device.

[0051] In this embodiment, a capacitance meter (VNA) can be used as the capacitance measuring device. The first capacitor is soldered onto the substrate, and the capacitance measuring device outputs a test signal of a first preset frequency to the first capacitor to obtain the actual test result of the first capacitor.

[0052] S2: Obtain the simulation test results of the first capacitor. The simulation test results are obtained by simulating the first capacitor based on a pre-established capacitor model 100. Both the actual test results and the simulation test results include at least return loss and / or insertion loss.

[0053] In this embodiment, the capacitor model 100 can be established based on the parameters of the first capacitor, for example, based on the parameter table of the first capacitor or a model provided by the capacitor manufacturer. The capacitor model 100 is then tested using a simulation test signal of a first preset frequency to obtain simulation test results.

[0054] In this embodiment, return loss or insertion loss can be used to correct the parameters of the capacitor model 100, thereby improving the correction efficiency. Alternatively, both return loss and insertion loss can be used to correct the parameters of the capacitor model 100, thereby improving the correction accuracy.

[0055] Referring to Figure 2, in one embodiment, step S2 includes:

[0056] S21: Input the simulation test signal to the capacitor model 100; the frequency of the simulation test signal is greater than 1 GHz.

[0057] S22: Obtain the simulation test results of the capacitor model 100 for the simulation test signal.

[0058] The frequency of the test signal can be set according to actual needs in order to obtain more accurate test results.

[0059] S3: Adjust the parameters of the capacitor model 100 based on the actual test results and simulation test results of the first capacitor.

[0060] To accurately assess the impact of capacitors on circuits, an accurate capacitor model 100 is needed for relevant tests, and the resulting test data is analyzed. For example, in microwave circuits and high-speed signal design, S-parameters (scattering parameters) are crucial parameters describing network characteristics. They define the relationship between reflected and incident waves and are essential for analyzing and designing microwave devices, amplifiers, and filters. By extracting S-parameters from the capacitor model 100 and obtaining the transmission characteristics of the capacitor at different frequencies, it is possible to evaluate issues such as losses and impedance mismatches caused by AC coupling capacitors, providing a foundation for subsequent circuit design and analysis.

[0061] In this embodiment, the accuracy of the capacitor model 100 can be determined by comparing the test results of the actual capacitor with the simulation test results of the capacitor model 100. If the two are inconsistent, it indicates that the capacitor model 100 is not accurate and needs to be adjusted.

[0062] This embodiment obtains both the actual test results and the simulation test results of the first capacitor, and adjusts the parameters of the capacitor model based on these results to reduce the difference between the simulation test results of the capacitor model 100 and the actual test results of the first capacitor. Thus, the difference between the test data obtained using the capacitor model 100 (e.g., extracting S-parameters) and the actual test data of the first capacitor is small, meaning the accuracy of the capacitor model 100 is high.

[0063] Referring to Figure 3, in one embodiment, before obtaining the simulation test results of the first capacitor, the capacitor model 100 calibration method further includes:

[0064] S4: Set the parameters of the capacitor model 100 based on the parameters of the actual capacitor; the actual capacitor includes the first capacitor and a substrate for carrying the first capacitor.

[0065] In this embodiment, the parameters of the capacitor model 100 can be set according to the actual capacitor product. For example, they can be set to be consistent with the parameters of the actual capacitor, or slightly larger / smaller than the parameters of the actual capacitor. The first capacitor is disposed on the substrate, and the substrate will also have a certain influence on the transmission characteristics of the first capacitor. Therefore, when setting the parameters of the capacitor model 100, the parameters of both the capacitor and the substrate need to be considered simultaneously.

[0066] Referring to Figure 4, in one embodiment, step S3 includes:

[0067] S31: If the difference between the insertion loss in the actual test results and the insertion loss in the simulation test results at a preset frequency point is greater than a first threshold, or the difference between the return loss in the actual test results and the return loss in the simulation test results at a preset frequency point is greater than a second threshold, adjust the parameters of the capacitor model 100.

[0068] In this embodiment, if the difference between the insertion loss of the actual capacitor and the insertion loss of the capacitor model 100 at a preset frequency point is greater than a first threshold, or the difference between the return loss of the actual capacitor and the return loss of the capacitor model 100 at a preset frequency point is greater than a second threshold, it indicates that the accuracy of the capacitor model 100 is low, and the test results obtained using the capacitor model 100 are inaccurate. The parameters of the capacitor model 100 need to be adjusted until the difference between the insertion loss of the actual capacitor and the insertion loss of the capacitor model 100 at the preset frequency point is less than or equal to the first threshold, and / or the difference between the return loss of the actual capacitor and the return loss of the capacitor model 100 at the preset frequency point is less than or equal to the second threshold. The preset frequency point can be set according to the actual application. For example, the base frequency distribution range of mainstream signals such as USB, PCIe (peripheral component interconnect express), and SATA (Serial ATA Working Group) is currently within 0–20 GHz, so the preset frequency point can be set to 4 GHz, 8 GHz, 16 GHz, etc. The first and second thresholds can be set according to the required accuracy of the capacitance model 100. For example, the first threshold can be set to 8%, 10%, 12%, etc., and the second threshold can be set to 18%, 20%, 22%, etc.

[0069] Referring to Figure 5, in one embodiment, step S3 further includes:

[0070] S32: Obtain the simulation test results of the adjusted capacitor model 100.

[0071] S33: Adjust the parameters of the capacitor model 100 based on the actual test results of the first capacitor and the adjusted simulation test results until the difference between the insertion loss of the actual capacitor and the insertion loss of the capacitor model 100 at the preset frequency point is not greater than a first threshold, and / or the difference between the return loss of the actual capacitor and the return loss of the capacitor model 100 at the preset frequency point is not greater than a second threshold.

[0072] In this embodiment, the parameters of the capacitor model 100 are adjusted multiple times by cross-validating the test results of the capacitor model 100 and the actual capacitor until the insertion loss and / or return loss of both are within the set range. This yields a more accurate capacitor model 100, resulting in higher accuracy in extracting S-parameters or obtaining other data using this model.

[0073] Referring to Figures 6, 9, 10, and 11, in one embodiment, the capacitor model 100 may include a simulated capacitor 110, a simulated transmission line 120, and a simulated substrate 130, wherein the simulated capacitor 110 and the simulated transmission line 120 are disposed on the simulated substrate 130. The simulated capacitor 110, simulated transmission line 120, and simulated substrate 130 may be capacitors, transmission lines, and substrates constructed in preset simulation software. The simulated transmission line 120 may include a first transmission line 121 and a second transmission line 122, wherein the first transmission line 121 is electrically connected to a first terminal of the simulated capacitor, and the second transmission line 122 is electrically connected to a second terminal of the simulated capacitor 110. The number of simulated capacitors 110 may be set to one or more depending on the actual application.

[0074] Step S3 also includes:

[0075] S34: Adjust at least one of the following: the length L_cap of the simulated capacitor 110, the width W_cap of the simulated capacitor 110, the height H_cap of the simulated capacitor 110, the length of the simulated transmission line 120, the deembed length L_deembed of the simulated transmission line 120, the height H2 between the bottom inner electrode of the simulated capacitor 110 and the pad, and the dielectric constant DK1 of the simulated capacitor 110.

[0076] Referring to Figure 7, in one embodiment, the model for adjusting the capacitance parameters includes:

[0077] S35: Decrease the length L_trace of the simulated transmission line 120, decrease the deembed length L_deembed of the simulated transmission line 120, increase / decrease the length L_cap of the simulated capacitor 110, increase / decrease the width W_cap of the simulated capacitor 110, increase / decrease the height H_cap of the simulated capacitor 110, increase / decrease the height H2 between the bottom inner electrode of the simulated capacitor 110 and the pad, and increase / decrease the dielectric constant DK1 of the simulated capacitor 110.

[0078] Referring to Figure 8, in one embodiment, the parameters of the capacitor model 100 further include:

[0079] S36: Adjust at least one of the following: the width W_term of the outer electrode of the simulated capacitor 110, the length L_electrode of the inner electrode of the simulated capacitor 110, the width W_electrode of the inner electrode of the simulated capacitor 110, the spacing H-electrode of the inner electrodes of the simulated capacitor 110, and the number of inner electrodes of the simulated capacitor 110.

[0080] In one embodiment, the parameters of capacitor model 100 can be set according to the actual capacitor parameters shown in Table 1, as shown in Figures 9-12. Then, capacitor model 100 and the actual capacitor are tested under the same frequency test signal, and the parameters of capacitor model 100 are adjusted according to the test results. The final parameters of capacitor model 100 are shown in Table 1. The insertion loss of capacitor model 100 and the actual capacitor is shown in Figure 13, and the return loss of capacitor model 100 and the actual capacitor is shown in Figure 14. It can be seen that the insertion loss and return loss of both are highly consistent within the 0-20 GHz range. In the insertion loss curves of capacitor model 100 and the actual capacitor, the consistency reaches over 98% at 4 GHz, 8 GHz, and 16 GHz. In the return loss curves of capacitor model 100 and the actual capacitor, the resonant frequencies of capacitor model 100 and the actual capacitor are also well consistent, both around 11 GHz.

[0081] Table 1

[0082] This application involves simulating and testing a capacitor model 100, then adjusting the parameters of the capacitor model 100 based on the simulation results and the test results of the actual capacitor, until the simulation results of the capacitor model 100 are approximately the same as the test results of the actual capacitor. In this way, through cross-validation between the capacitor model 100 and the actual capacitor, the accuracy of the capacitor model 100 can be improved, thereby improving the accuracy of various data obtained using the capacitor model 100. This allows the capacitor model 100 to be used instead of the actual capacitor to obtain various data, improving data acquisition efficiency.

[0083] This application also proposes a capacitance model 100 calibration device, including a processor and a memory, wherein the memory is used to store instructions, and the processor is used to call the instructions in the memory to cause the processor to execute the above-described capacitance model 100 calibration method.

[0084] In this embodiment, the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor, a single-chip microcomputer, or any conventional processor.

[0085] Memory can be used to store computer programs and / or modules / units. The processor implements various functions of the computer device by running or executing the computer programs and / or modules / units stored in the memory, and by accessing data stored in the memory. Memory may include a program storage area and a data storage area. The program storage area may store the operating system, application programs required for at least one function (such as sound playback, image playback, etc.), etc.; the data storage area may store data created based on the use of the computer device (such as audio data), etc. Furthermore, memory may include high-speed random access memory, and may also include non-volatile memory, such as hard disks, RAM, plug-in hard disks, smart media cards (SMC), secure digital cards (SD cards), flash cards, at least one disk storage device, flash memory device, or other non-volatile solid-state storage devices.

[0086] When a module / unit integrated into a computer device is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium can be appropriately added or removed according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.

[0087] In the several embodiments provided in this application, it should be understood that the disclosed computer devices and methods can be implemented in other ways. For example, the computer device embodiments described above are merely illustrative; the division of units is only a logical functional division, and other division methods may be used in actual implementation.

[0088] Furthermore, the functional units in the various embodiments of this application can be integrated into the same processing unit, or each unit can exist physically separately, or two or more units can be integrated into the same unit. The integrated units described above can be implemented in hardware or in the form of hardware plus software functional modules.

[0089] The specific embodiments of this application have been described above with reference to the accompanying drawings. However, those skilled in the art will understand that various changes and substitutions can be made to the specific embodiments of this application without departing from the spirit and scope of this application. All such changes and substitutions fall within the scope defined by this application.

Claims

1. A method for correcting a capacitor model on a printed circuit board, characterized in that, The printed circuit board capacitance model correction method includes: Obtain the actual test result of the first capacitor, which is obtained based on the test of the first capacitor by a preset capacitance measuring device; The simulation test results of the first capacitor are obtained, and the simulation test results are obtained by simulating the first capacitor based on a pre-established capacitor model; both the actual test results and the simulation test results include at least return loss and / or insertion loss. The parameters of the capacitor model are adjusted based on the actual test results and simulation test results of the first capacitor.

2. The printed circuit board capacitor model calibration method as described in claim 1, characterized in that, Before obtaining the simulation test results of the first capacitor, the method further includes: The parameters of the capacitor model are set based on the parameters of the actual capacitor; the actual capacitor includes the first capacitor and a substrate for carrying the first capacitor.

3. The printed circuit board capacitor model calibration method as described in claim 1, characterized in that, The adjustment of the parameters of the capacitor model based on the actual test results and simulation test results of the first capacitor includes: If the difference between the insertion loss in the actual test results and the insertion loss in the simulation test results at a preset frequency point is greater than a first threshold, or the difference between the return loss in the actual test results and the return loss in the simulation test results at a preset frequency point is greater than a second threshold, the parameters of the capacitor model are adjusted.

4. The printed circuit board capacitor model correction method as described in claim 3, characterized in that, The preset frequency points include 4GHz, 8GHz, and 16GHz, and the parameters of the capacitor model being adjusted include: Obtain the simulation test results of the adjusted capacitance model; Based on the actual test results of the first capacitor and the adjusted simulation test results, adjust the parameters of the capacitor model until the difference between the insertion loss of the actual capacitor and the insertion loss of the capacitor model at the preset frequency point is not greater than a first threshold, and / or the difference between the return loss of the actual capacitor and the return loss of the capacitor model at the preset frequency point is not greater than a second threshold.

5. The printed circuit board capacitor model correction method as described in claim 3, characterized in that, The capacitor model includes a simulated capacitor, a simulated transmission line, and a simulated substrate, with the simulated capacitor and simulated transmission line disposed on the simulated substrate. The adjustment of the parameters of the capacitance model includes: Adjust at least one of the following: the length of the simulated capacitor, the width of the simulated capacitor, the height of the simulated capacitor, the length of the simulated transmission line, the de-embedding length of the simulated transmission line, the height between the internal electrode of the simulated capacitor and the pad of the simulated capacitor, and the dielectric constant of the simulated capacitor.

6. The printed circuit board capacitor model correction method as described in claim 5, characterized in that, The model for adjusting the capacitance parameters includes: Decrease the length of the simulated transmission line, decrease the de-embedding length of the simulated transmission line, increase / decrease the length of the simulated capacitor, increase / decrease the width of the simulated capacitor, increase / decrease the height of the simulated capacitor, increase / decrease the height between the internal electrode of the simulated capacitor and the pad of the simulated capacitor, and increase / decrease the dielectric constant of the simulated capacitor.

7. The printed circuit board capacitor model correction method as described in claim 5, characterized in that, The adjustment of the parameters of the capacitance model also includes: Adjust at least one of the following: the width of the outer electrode of the simulated capacitor, the length of the inner electrode of the simulated capacitor, the width of the inner electrode of the simulated capacitor, the spacing of the inner electrodes of the simulated capacitor, and the number of inner electrodes of the simulated capacitor.

8. The printed circuit board capacitor model calibration method as described in claim 1, characterized in that, The process of obtaining the simulation test results of the first capacitor includes: The simulation test signal is input to the capacitor model; the frequency of the simulation test signal is greater than 1 GHz. Obtain the simulation test results of the capacitor model for the simulation test signal.

9. A capacitance model calibration device, comprising a processor and a memory, characterized in that, The memory is used to store instructions, and the processor is used to call the instructions in the memory, causing the processor to execute the printed circuit board capacitor model correction method as described in any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed on a processor, cause the processor to perform the printed circuit board capacitor model correction method as described in any one of claims 1 to 8.

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