Power measurement circuit, chip, and electronic device

Abstract

Provided in the embodiments of the present application are a power measurement circuit, a chip, and an electronic device. The power measurement circuit comprises: a current measurement module, wherein the current measurement module is configured to measure a first differential voltage between a first input end and a second input end, so as to determine an input current flowing through a standard resistor; a voltage measurement module, wherein the voltage measurement module is configured to measure a second differential voltage between the first input end and a reference ground end, so as to determine an input voltage of the standard resistor; and an error voltage compensation module, wherein the error voltage compensation module is configured to compensate for an error voltage generated at the first input end in the process of the voltage measurement module measuring the second differential voltage. In the present application, corresponding voltage drops are generated at both the first input end and the second input end, which is equivalent to reducing the effect of a current consumed by the voltage measurement module on the voltage difference (i.e., the first differential voltage) between the first input end and the second input end, thereby finally improving the measurement accuracy of the current measurement module.

Description

Power measurement circuits, chips and electronic devices

[0001] This application claims priority to Chinese Patent Application No. 202411461728.4, filed on October 18, 2024, entitled "Power Measurement Circuit, Chip and Electronic Device", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of integrated circuit technology, specifically to a power measurement circuit, chip, and electronic device. Background Technology

[0003] Currently, electronic devices can typically track the power consumption of a system / module to display the device's performance and identify abnormal power consumption. Obviously, power consumption tracking requires measuring current and voltage, which are then converted into digital signals by an analog-to-digital converter (ADC), and finally calculated by digital circuitry to obtain the system power. However, when measuring voltage, the ADC draws a portion of the current from one end of a resistor. Combined with the finite input impedance of the voltage ADC, this causes an error voltage to be generated in the differential voltage signal input to the current ADC, ultimately leading to a decrease in the measurement accuracy of the current ADC. Technical solutions

[0004] In view of the above problems, embodiments of this application provide a power measurement circuit, chip, and electronic device to solve the above technical problems.

[0005] In a first aspect, embodiments of this application provide a power measurement circuit for measuring the power consumed by a target circuit, the target circuit including a standard resistor. The power measurement circuit has a first input terminal and a second input terminal, the first input terminal and the second input terminal being respectively used to connect to the two ends of the standard resistor. The power measurement circuit includes:

[0006] The current measurement module is used to measure the first differential voltage between the first input terminal and the second input terminal to determine the input current flowing through the standard resistor;

[0007] The voltage measurement module is used to measure the second differential voltage between the first input terminal and the reference ground terminal to determine the input voltage of the standard resistor.

[0008] An error voltage compensation module is connected between the second input terminal and the reference ground terminal. The error voltage compensation module is used to compensate for the error voltage generated at the first input terminal during the measurement of the second differential voltage by the voltage measurement module.

[0009] Secondly, embodiments of this application also provide a chip including the power measurement circuit described above.

[0010] Thirdly, embodiments of this application also provide an electronic device, including the aforementioned chip or power measurement circuit. Attached Figure Description

[0011] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0012] Figure 1 shows a circuit diagram of power measurement in related technologies.

[0013] Figure 2 shows a schematic diagram of a power measurement circuit in an embodiment of this application.

[0014] Figure 3 shows another schematic diagram of the power measurement circuit in an embodiment of this application.

[0015] Figure 4 shows another schematic diagram of the power measurement circuit in an embodiment of this application.

[0016] Figure 5 shows another schematic diagram of the power measurement circuit in an embodiment of this application.

[0017] Figure 6 shows another schematic diagram of the power measurement circuit in an embodiment of this application.

[0018] Figure 7 shows another schematic diagram of the power measurement circuit in an embodiment of this application.

[0019] Among them, 100 power measurement circuit, 101 first input terminal, 102 second input terminal, standard resistor R0, input current I0, reference ground terminal GND, 200 target circuit;

[0020] 10 Current measurement module, 20 Voltage measurement module, 21 Second sampling unit, 30 Error voltage compensation module, 31 First sampling unit;

[0021] First current I1, second current I2, second capacitor C2, fourth switch S4, fifth switch S5, sixth switch S6, first capacitor C1, first switch S1, second switch S2, third switch S3, fourth capacitor C4, ninth switch S9, tenth switch S10, eleventh switch S11, second common mode switch S02, third capacitor C3, seventh switch S7, eighth switch S8, first common mode switch S01.

[0022] Implementation methods of this application

[0023] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0024] To enable those skilled in the art to better understand the solutions of this application, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0025] In the embodiments of this application, it should be noted that, in this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0026] Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0027] In the description of the embodiments in this application, the words "example" or "for example" are used to indicate exemplification, illustration, or description. Any embodiment or design described as "example" or "for example" in the embodiments of this application is not to be construed as being more preferred or having more advantages than another embodiment or design. The use of the words "example" or "for example" is intended to present relative concepts in a clear manner.

[0028] Furthermore, in the embodiments of this application, "multiple" refers to two or more. Therefore, in the embodiments of this application, "multiple" can also be understood as "at least two". "At least one" can be understood as one or more, such as one, two, or more. For example, including at least one means including one, two, or more, and is not limited to which ones are included. For example, including at least one of A, B, and C, then it could include A, B, C, A and B, A and C, B and C, or A and B and C.

[0029] It should be noted that in the embodiments of this application, "connection" can be understood as electrical connection. The connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be a direct connection between A and B, or an indirect connection between A and B through one or more other electrical components.

[0030] Currently, electronic devices can typically calculate the power consumption of a system / module. Referring to Figure 1, which shows a circuit diagram of power measurement in related technologies, a standard resistor R0 is connected in series with the load between the power supply terminal AVDD and the ground terminal. A microcontroller MCU with a current measurement analog-to-digital converter (IADC) and a voltage measurement analog-to-digital converter (VADC) is connected to the two ends of the standard resistor R0 through two pins (interfaces). The current measurement analog-to-digital converter (IADC) can measure the voltage difference between the two pins to obtain the current flowing through the standard resistor R0; while the voltage measurement analog-to-digital converter (VADC) can measure the voltage difference between one pin and the ground terminal to obtain the power supply voltage AVDD. Therefore, by combining the digital signals output by the current measurement analog-to-digital converter (IADC) and the voltage measurement analog-to-digital converter (VADC), the power consumed by the load can be calculated.

[0031] Generally, a resistor RX is connected in series between one end of the standard resistor and the pin, and a resistor RY is connected in series between the other end of the standard resistor and the other pin. These resistors RX and RY can be line resistors, filter resistors corresponding to the filter capacitor C0, or surge protection resistors. Due to the presence of these resistors RX and RY, and the fact that the voltage measurement analog-to-digital converter VADC consumes current Ivadc during measurement, the voltage V0 across the standard resistor and the voltage V0' between the two pins satisfy the following relationship: V0 - V0' = Ivadc * RX

[0032] It can be seen that because the voltage measurement analog-to-digital converter (VADC) draws current Ivadc during the measurement process, the differential voltage signal V0' connected to the current measurement analog-to-digital converter (IADC) generates a corresponding error voltage, ultimately causing a decrease in the measurement accuracy of the input current.

[0033] Therefore, this application provides a power measurement circuit 100, a chip, and an electronic device, which will be described in detail below.

[0034] First, referring to Figure 2, Figure 2 shows a schematic diagram of a power measurement circuit 100 in an embodiment of this application. The power measurement circuit 100 is used to measure the power consumed by the target circuit 200. The power measurement circuit 100 includes a current measurement module 10, a voltage measurement module 20, and an error voltage compensation module 30.

[0035] Specifically, the power measurement circuit 100 has a first input terminal 101 and a second input terminal 102. The target circuit 200 includes a standard resistor R0 with a known resistance value. The standard resistor R0 is connected in series with the load between the power supply terminal AVDD and the reference ground terminal GND. The first input terminal 101 and the second input terminal 102 are respectively used to connect the two ends of the standard resistor R0. Therefore, the current measurement module 10 measures the voltage across the standard resistor R0 to determine the current flowing through the standard resistor R0 and the load.

[0036] It should be noted that one end of the standard resistor R0 is connected in series with the first input terminal 101, and the other end of the standard resistor R0 is connected in series with the second input terminal 102, and the resistors RX and RY can be the equivalent resistance corresponding to the line resistance, or the filter resistor corresponding to the filter capacitor C0, or the surge protection resistor, or any combination of the above. This application does not make any specific limitations.

[0037] The current measurement module 10 is used to measure the first differential voltage V1 between the first input terminal 101 and the second input terminal 102, so as to determine the input current I0 flowing through the standard resistor R0. In some embodiments of this application, the current measurement module 10 may include an analog-to-digital converter (ADC) to directly convert the first differential voltage V1 into a digital signal DI, thereby realizing the measurement of the first differential voltage V1. In some embodiments of this application, the current measurement module 10 may include an amplifier circuit (e.g., a PGA programmable operational amplifier) ​​and an ADC. The amplifier circuit amplifies the first differential voltage V1, and then the ADC performs analog-to-digital conversion to obtain the digital signal DI corresponding to the first differential voltage V1.

[0038] The voltage measurement module 20 is used to measure the second differential voltage V2 between the first input terminal 101 and the reference ground terminal GND, so as to determine the input voltage (i.e., the power supply voltage AVDD) of the standard resistor R0. In some embodiments of this application, the voltage measurement module 20 may include an analog-to-digital converter (ADC) to directly convert the second differential voltage V2 into a digital signal DV, thereby realizing the measurement of the second differential voltage V2. In some embodiments of this application, the voltage measurement module 20 may include a voltage conversion circuit and an ADC, wherein the voltage conversion circuit (e.g., an amplifier circuit) amplifies or reduces the second differential voltage V2, and then the ADC performs analog-to-digital conversion to obtain the digital signal DV corresponding to the second differential voltage V2.

[0039] For example, the analog-to-digital converters included in the current measurement module 10 and the voltage measurement module 20 may be, but are not limited to, hybrid analog-to-digital converters composed of one or more of the following: successive approximation ADC (SAR ADC), Sigma-delta ADC (SD ADC), pipeline ADC, or ramp-compare ADC.

[0040] The error voltage compensation module 30 is connected between the second input terminal 102 and the reference ground terminal GND. The error voltage compensation module 30 can compensate the error voltage generated at the first input terminal 101 during the measurement of the second differential voltage V2 by the voltage measurement module 20 at the second input terminal 102, so as to reduce the influence of the voltage measurement module 20 on the magnitude of the first differential voltage V1 during the measurement of the second differential voltage V2.

[0041] In some embodiments of this application, the error voltage compensation module 30 may include a switching resistor circuit, which can cause the second input terminal 102 to output current to the reference ground terminal GND through the resistor when the switch is closed. Thus, the error voltage compensation module 30 can form a voltage drop at the second input terminal 102 that is equivalent to the magnitude of the error voltage, thereby keeping the magnitude of the first differential voltage V1 basically unchanged.

[0042] In some embodiments of this application, the error voltage compensation module 30 may include a switched capacitor circuit. A switch controls the second input terminal 102 to charge the capacitor, and another switch controls the capacitor to discharge to the reference ground terminal. Thus, the switched capacitor circuit indirectly enables the second input terminal 102 to output current to the reference ground terminal GND. As a result, the error voltage compensation module 30 can form a voltage drop at the second input terminal 102 that is equivalent to the magnitude of the error voltage, thereby keeping the magnitude of the first differential voltage V1 essentially unchanged.

[0043] In this embodiment, since the error voltage compensation module 30 can compensate the error voltage generated at the first input terminal 101 during the measurement of the second differential voltage V2 by the voltage measurement module 20 at the second input terminal 102, the magnitude of the first differential voltage V1 will be closer to the actual voltage across the standard resistor R0. For example, in Figure 2, the voltages across the standard resistor R0 are VX and VY, respectively, and the voltages at the first input terminal 101 and the second input terminal 102 are VA and VB, respectively. The error voltage ΔVerror generated at the first input terminal 101 during the measurement of the second differential voltage V2 by the voltage measurement module 20 is: ΔVerror=VA-VX

[0044] Due to the presence of the error voltage compensation module 30, the voltage at the second input terminal 102 can satisfy the following relationship: VB - VY = △Verror

[0045] We know that: VA - VB = (VX + △Verror) - (VY + △Verror)

[0046] Therefore, the voltage difference V0 between the first differential voltage V1 and the standard resistor R0 satisfies the following relationship: V1 = VA - VB = VX - VY

[0047] It can be seen that, since the error voltage compensation module 30 can compensate the error voltage generated at the first input terminal 101 during the measurement of the second differential voltage V2 by the voltage measurement module 20 at the second input terminal 102, the magnitude of the first differential voltage V1 is closer to the actual voltage across the standard resistor R0, thereby improving the measurement accuracy of the input current I0 by the current measurement module 10.

[0048] Therefore, in this embodiment, the current measurement module 10 measures the first differential voltage V1 between the first input terminal 101 and the second input terminal 102, and the voltage measurement module 20 measures the second differential voltage V2 between the first input terminal 101 and the reference ground terminal GND. Thus, the input current I0 of the target circuit 200 can be determined based on the first differential voltage V1 and the resistance value of the standard resistor R0, and the input voltage of the target circuit 200 can be determined based on the second differential voltage V2. Finally, the power of the target circuit 200 can be determined by the input voltage and the input current I0. Meanwhile, since the voltage measurement module 20 consumes the current of the first input terminal 101 during the measurement of the second differential voltage V2, thus generating an error voltage at the first input terminal, and the error voltage compensation module 30 can compensate the error voltage generated at the first input terminal 101 during the measurement of the second differential voltage V2 by the voltage measurement module 20 at the second input terminal 102, both the first input terminal 101 and the second input terminal 102 generate corresponding voltage drops. This is equivalent to reducing the influence of the current consumed by the voltage measurement module 20 on the voltage difference between the first input terminal 101 and the second input terminal 102 (i.e., the first differential voltage V1), which ultimately helps to improve the measurement accuracy of power.

[0049] In some embodiments of this application, referring to FIG3, FIG3 shows another schematic diagram of the power measurement circuit 100 in an embodiment of this application. The error voltage compensation module 30 controls the second input terminal 102 to output the first current I1 to the reference ground terminal GND; the voltage measurement module 20 outputs the second current I2 to the reference ground terminal during the measurement of the second differential voltage V2, and the average magnitude of the second current I2 is equal to the average magnitude of the first current I1.

[0050] It should be noted that, under normal circumstances, the resistances RX and RY are equal in magnitude. Therefore, when the average magnitude of the second current I2 is equal to the average magnitude of the first current I1, the voltage difference V0 between the first differential voltage V1 and the standard resistor R0 satisfies the following relationship: V0 - V1 = I2 * RX - I1 * RY = 0

[0051] In other words, when the resistors RX and RY are equal in magnitude, and the average magnitude of the second current I2 is equal to the average magnitude of the first current I1, the first differential voltage V1 is basically equal to the voltage difference V0 across the standard resistor R0. At this time, the current measurement module 10 measures the actual voltage difference V0 across the standard resistor R0, which helps to further reduce the measurement error of the current measurement module 10 on the input current I0.

[0052] Understandably, when the resistors RX and RY are not equal, the ratio of the second current I2 to the first current I1 can be adjusted to ensure that the first differential voltage V1 between the first input terminal 101 and the second input terminal 102 remains constant relative to the actual voltage difference V0 across the standard resistor R0.

[0053] In some embodiments of this application, referring to FIG4, FIG4 shows another schematic diagram of the power measurement circuit 100 in an embodiment of this application, wherein the error voltage compensation module 30 includes a first sampling unit 31, which is used to sample the third differential voltage V3 between the second input terminal 102 and the reference ground terminal GND; the voltage measurement module 20 includes a second sampling unit 21, which is used to sample the second differential voltage V2; wherein the first sampling unit 31 consumes a first current I1 when sampling the third differential voltage V3, and the second sampling unit 21 consumes a second current I2 when sampling the second differential voltage V2.

[0054] It should be noted that when the voltage measurement module 20 directly uses an analog-to-digital converter to measure the second differential voltage V2, the second sampling unit 21 of the analog-to-digital converter will first sample the second differential voltage V2 and consume the second current I2, and then the integrator 22 and quantizer 23 will convert it and output the corresponding digital signal DV. Therefore, the error voltage compensation module 30 is set to consume the first current I1 by the first sampling unit 31, which can ultimately generate corresponding voltage drops at both the first input terminal 101 and the second input terminal 102, and ensure that the voltage difference V0 between the first differential voltage V1 and the standard resistor R0 is basically equal.

[0055] Understandably, in the embodiment where the voltage measurement module 20 uses an amplifier circuit to amplify the second differential voltage V2 before measurement, the amplifier circuit will also consume the corresponding first current I1. Therefore, if the error voltage compensation module 30 is also equipped with a corresponding amplifier circuit that consumes the corresponding second current I2, it can be ensured that the voltage difference V0 between the first differential voltage V1 and the standard resistor R0 is basically equal.

[0056] As an example, taking the voltage measurement module 20 including a Sigma-Delta analog-to-digital converter as an example, referring to FIG5, FIG5 shows another schematic diagram of the power measurement circuit 100 in the embodiment of this application, wherein the second sampling unit 21 includes a second capacitor C2, a fourth switch S4, a fifth switch S5 and a sixth switch S6; the first end of the fourth switch S4 is connected to the first input terminal 101, and the second end of the fourth switch S4 is connected to the first plate of the second capacitor C2; the first end of the fifth switch S5 is connected to the reference ground terminal GND, and the second end of the fifth switch S5 is connected to the first plate of the second capacitor C2; the first end of the sixth switch S6 is connected to the second plate of the second capacitor C2, and the second end of the sixth switch S6 is used to connect to the common mode voltage VCM.

[0057] The integrator 22 includes an operational amplifier OP, an integrating switch SI, and an integrating capacitor CI. The first terminal of the integrating switch SI is connected to the second plate of the second capacitor C2, and the second terminal of the integrating switch SI is connected to the inverting input terminal of the operational amplifier OP. The non-inverting input terminal of the operational amplifier OP is connected to the reference ground terminal GND. The first terminal of the integrating capacitor CI is connected to the inverting input terminal of the operational amplifier OP, and the second terminal of the integrating capacitor CI is connected to the output terminal of the operational amplifier OP.

[0058] When the second sampling unit 21 samples the second differential voltage V2, the fourth switch S4 and the sixth switch S6 are in the closed state, and the fifth switch S5 and the integral switch SI are in the open state. The charge accumulated in the second capacitor C2 is: Q2=C2*(V2-VCM)

[0059] When integrator 22 performs integration, the fourth switch S4 and the sixth switch S6 are in the open state, while the fifth switch S5 and the integrating switch SI are in the closed state. The charge accumulated in the second capacitor C2 is 0, so the charge accumulated in the integrating capacitor CI of integrator 22 is C2*(V2-VCM). Therefore, the second current I2 consumed when the second sampling unit 21 samples is: I2=Q2 / t2=C2*(V2-VCM) / t2

[0060] Where t2 is the sampling period of the second sampling unit 21.

[0061] In some embodiments of this application, referring to FIG5, the first sampling unit 31 includes a first capacitor C1, a first switch S1, a second switch S2, and a third switch S3; the first end of the first switch S1 is connected to the second input terminal 102, and the second end of the first switch S1 is connected to the first plate of the first capacitor C1; the first end of the second switch S2 is connected to the reference ground terminal GND, and the second end of the second switch S2 is connected to the first plate of the first capacitor C1; the first end of the third switch S3 is connected to the second plate of the first capacitor C1, and the second end of the third switch S3 is used to connect to the common-mode voltage VCM.

[0062] Specifically, when the first switch S1 and the third switch S3 are closed and the second switch S2 is open, the amount of charge accumulated in the first capacitor C1 is: Q1=C1*(V2-V1-VCM)

[0063] When the first switch S1 and the third switch S3 are open, and the second switch S2 is closed, the charge accumulated in the first capacitor C1 is 0. Since the resistance of the standard resistor R0 decreases under normal circumstances and the first differential voltage V1 is small, the first current I1 consumed during sampling by the first sampling unit 31 is approximately: I1 = Q1 / t1 = C1*(V2-VCM) / t1

[0064] Where t1 is the sampling period of the first sampling unit 31.

[0065] Based on the calculation formula of the second current I2 of the second sampling unit 21, it can be seen that by controlling the size of the first capacitor C1 and the second capacitor C2, as well as the sampling period of the first sampling unit 31 and the second sampling unit 21, the first current I1 output by the error voltage compensation module 30 can be made equal to the average size of the second current I2 consumed by the voltage measurement module 20.

[0066] In some embodiments of this application, in Figure 5, the capacitance value of the first capacitor C1 is equal to the capacitance value of the second capacitor C2; the first switch S1 and the fourth switch S4 are controlled based on the same clock signal, the second switch S2 and the fifth switch S5 are controlled based on the same clock signal, and the third switch S3 and the sixth switch S6 are controlled based on the same clock signal. That is, the sampling periods of the first sampling unit 31 and the second sampling unit 21 are equal, and the capacitance values ​​of the first capacitor C1 and the second capacitor C2 are also equal. Therefore, the average magnitudes of the first current I1 and the second current I2 can be made equal, and ultimately, the first differential voltage V1 measured by the current measurement module 10 is basically equal to the actual voltage difference V0 across the standard resistor R0.

[0067] As another example, taking the voltage measurement module 20 including a successive approximation analog-to-digital converter as an example, referring to FIG6, FIG6 shows another schematic diagram of the power measurement circuit 100 in an embodiment of this application, wherein the second sampling unit 21 includes a plurality of fourth capacitors C4, a plurality of ninth switches S9, a plurality of tenth switches S10, a plurality of eleventh switches S11, and a second common-mode switch S02, the second plates of each fourth capacitor C4 are interconnected; the ninth switch S9 corresponds one-to-one with the fourth capacitor C4, the first end of the ninth switch S9 is connected to the first input terminal 101, and the second end of the ninth switch S9 is connected to the corresponding fourth capacitor C4. The first plate of capacitor C4 is connected; the tenth switch S10 corresponds to the fourth capacitor C4 one-to-one, the first end of the tenth switch S10 is connected to the reference ground terminal GND, and the second end of the tenth switch S10 is connected to the first plate of the corresponding fourth capacitor C4; the eleventh switch S11 corresponds to the fourth capacitor C4 one-to-one, the first end of the eleventh switch S11 is used to connect to the reference voltage, and the second end of the eleventh switch S11 is connected to the first plate of the corresponding fourth capacitor C4; the first end of the second common mode switch S02 is connected to the common mode voltage VCM, and the second end of the second common mode switch S02 is connected to the second plate of each fourth capacitor C4.

[0068] Specifically, during sampling by the successive approximation analog-to-digital converter, each ninth switch S9 is closed, each tenth switch S10 and eleventh switch S11 is open, and the second common-mode switch S02 is closed. Therefore, each fourth capacitor C4 is charged, and the total charge accumulated by all fourth capacitors C4 is: Q4 = C4 * (V2 - VCM) * N1

[0069] Where N1 represents the number of fourth capacitors C4.

[0070] During the conversion phase of the successive approximation analog-to-digital converter, each ninth switch S9 is in the open state. The comparator COMP and the successive approximation logic module control the state of each tenth switch S10 and eleventh switch S11, thereby realizing the analog-to-digital conversion of the second differential voltage V2. After the conversion is completed, the charge accumulated in each fourth capacitor C4 is reset. Therefore, the second current I2 consumed by the second sampling unit 21 during sampling is: I2=Q4 / t4=C4*N1*(V2-VCM) / t4

[0071] Where t4 is the analog-to-digital conversion period of the successive approximation analog-to-digital converter.

[0072] In some embodiments of this application, referring to FIG6, the first sampling unit 31 includes at least one third capacitor C3, a seventh switch S7, an eighth switch S8, and a first common-mode switch S01. The second plates of each third capacitor C3 are interconnected. The first end of the seventh switch S7 is connected to the second input terminal 102, and the second end of the seventh switch S7 is connected to the first plate of each third capacitor C3. The first end of the eighth switch S8 is connected to the reference ground terminal GND, and the second end of the eighth switch S8 is connected to the first plate of each third capacitor C3. The first end of the first common-mode switch S01 is connected to the common-mode voltage, and the second end of the first common-mode switch S01 is connected to the second plate of each third capacitor C3.

[0073] When the successive approximation analog-to-digital converter is sampling, with the seventh switch S7 and the first common-mode switch S01 closed and the eighth switch S8 open, the charge accumulated in the third capacitor C3 is: Q3=C3*(V2-V1-VCM)*N2

[0074] Where N2 represents the number of third capacitors C3.

[0075] During the conversion phase of the successive approximation analog-to-digital converter, the seventh switch S7 and the first common-mode switch S01 are in the open state, the eighth switch S8 is in the closed state, and the charge accumulated in the third capacitor C3 is 0. Since the resistance value of the standard resistor R0 is usually large and the first differential voltage V1 is small, the first current I1 consumed when the first sampling unit 31 samples is approximately: I1=Q3 / t4=C3*N2*(V2-VCM) / t4

[0076] Based on the calculation formula of the second current I2 of the second sampling unit 21, it can be seen that by controlling the total capacitance value of the third capacitor C3 and the fourth capacitor C4, as well as the sampling period of the first sampling unit 31 and the second sampling unit 21, the first current I1 output by the error voltage compensation module 30 can be made equal to the average value of the second current I2 consumed by the voltage measurement module 20.

[0077] In some embodiments of this application, the total capacitance value of at least one third capacitor C3 is equal to the total capacitance value of multiple fourth capacitors C4. Combined with the embodiment where the seventh switch S7 and the first common-mode switch S01 are closed during sampling by the successive approximation analog-to-digital converter, and the seventh switch S7 and the first common-mode switch S01 are open and the eighth switch S8 is closed during the conversion phase of the successive approximation analog-to-digital converter, the sampling periods of the first sampling unit 31 and the second sampling unit 21 are equal, and the total capacitance value of the third capacitor C3 is equal to the total capacitance value of the multiple fourth capacitors C4. Therefore, the average magnitude of the first current I1 and the second current I2 can be made equal, and ultimately ensure that the first differential voltage V1 measured by the current measurement module 10 is basically equal to the actual voltage difference V0 across the standard resistor R0.

[0078] It is worth noting that the above description of the power measurement circuit 100 is intended to clearly illustrate the implementation and verification process of this application. Those skilled in the art can also make equivalent modifications under the guidance of this application. For example, Figure 5 shows a Sigma-Delta analog-to-digital converter with a common differential circuit structure. Those skilled in the art can equivalently modify it to a Sigma-Delta analog-to-digital converter with a fully differential circuit structure as shown in Figure 7. In this case, both the second sampling unit 21 and the first sampling unit 31 are fully differential sampling circuits.

[0079] This application also provides a chip that includes the power measurement circuit 100 described above. A chip (Integrated Circuit, IC) is also called a chip, and this chip can be, but is not limited to, a System on Chip (SOC) chip or a System in Package (SIP) chip. Since the chip of this application possesses the power measurement circuit 100 described in the above embodiments, it has all the beneficial effects of the power measurement circuit 100 in the above embodiments, which will not be repeated here.

[0080] This application also provides an electronic device, which includes a device body and a chip as described above disposed within the device body. The electronic device may be, but is not limited to, a weight scale, body fat scale, nutrition scale, infrared electronic thermometer, pulse oximeter, body composition analyzer, power bank, wireless charger, fast charger, car charger, adapter, display, USB (Universal Serial Bus) docking station, stylus, true wireless earphones, car center console screen, automobile, smart wearable device, mobile terminal, and smart home device. Smart wearable devices include, but are not limited to, smartwatches, smart bracelets, and neck massagers. Mobile terminals include, but are not limited to, smartphones, laptops, tablets, and POS (point of sales terminal) machines. Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart robot vacuums, and smart lights.

[0081] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Although this application has disclosed preferred embodiments as above, it is not intended to limit this application. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this application. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A power measurement circuit, characterized by, The power measurement circuit has a first input terminal and a second input terminal, the first input terminal and the second input terminal being respectively used to connect to the two ends of a standard resistor. The power measurement circuit includes: A current measurement module is used to measure the first differential voltage between the first input terminal and the second input terminal to determine the input current of the standard resistor; A voltage measurement module is used to measure the second differential voltage between the first input terminal and the reference ground terminal to determine the input voltage of the standard resistor; An error voltage compensation module is provided, which is connected between the second input terminal and the reference ground terminal. The error voltage compensation module is used to compensate for the error voltage generated at the first input terminal during the measurement of the second differential voltage by the voltage measurement module.

2. The power measurement circuit of claim 1, wherein, The error voltage compensation module controls the second input terminal to output a first current to the reference ground terminal; During the measurement of the second differential voltage, the voltage measurement module outputs a second current to the reference ground terminal, and the average magnitude of the second current is equal to the average magnitude of the first current.

3. The power measurement circuit of claim 2, wherein, The error voltage compensation module includes a first sampling unit, which is used to sample the third differential voltage between the second input terminal and the reference ground terminal; The voltage measurement module includes a second sampling unit, which is used to sample the second differential voltage; The first sampling unit consumes the first current when sampling the third differential voltage, and the second sampling unit consumes the second current when sampling the second differential voltage.

4. The power measurement circuit of claim 3, wherein, The second sampling unit includes a second capacitor, a fourth switch, a fifth switch, and a sixth switch; The first end of the fourth switch is connected to the first input end, and the second end of the fourth switch is connected to the first plate of the second capacitor. The first terminal of the fifth switch is connected to the reference ground terminal, and the second terminal of the fifth switch is connected to the first plate of the second capacitor; The first terminal of the sixth switch is connected to the second plate of the second capacitor, and the second terminal of the sixth switch is used to connect to the common-mode voltage.

5. The power measurement circuit of claim 4, wherein, The first sampling unit includes a first capacitor, a first switch, a second switch, and a third switch; The first end of the first switch is connected to the second input end, and the second end of the first switch is connected to the first plate of the first capacitor. The first end of the second switch is connected to the reference ground terminal, and the second end of the second switch is connected to the first plate of the first capacitor; The first terminal of the third switch is connected to the second plate of the first capacitor, and the second terminal of the third switch is used to connect to the common-mode voltage.

6. The power measurement circuit of claim 5, wherein, The capacitance value of the first capacitor is equal to the capacitance value of the second capacitor; The first switch and the fourth switch are controlled based on the same clock signal, the second switch and the fifth switch are controlled based on the same clock signal, and the third switch and the sixth switch are controlled based on the same clock signal.

7. The power measurement circuit of claim 3, wherein, The second sampling unit includes multiple fourth capacitors, multiple ninth switches, multiple tenth switches, multiple eleventh switches, and a second common-mode switch, with the second plates of each of the fourth capacitors interconnected. The ninth switch corresponds to the fourth capacitor one-to-one. The first end of the ninth switch is connected to the first input terminal, and the second end of the ninth switch is connected to the first plate of the corresponding fourth capacitor. The tenth switch corresponds one-to-one with the fourth capacitor. The first end of the tenth switch is connected to the reference ground terminal, and the second end of the tenth switch is connected to the first plate of the corresponding fourth capacitor. The eleventh switch corresponds one-to-one with the fourth capacitor. The first end of the eleventh switch is used to connect to the reference voltage, and the second end of the eleventh switch is connected to the first plate of the corresponding fourth capacitor. The first terminal of the second common-mode switch is connected to the common-mode voltage, and the second terminal of the second common-mode switch is connected to the second plate of each of the fourth capacitors.

8. The power measurement circuit of claim 7, wherein, The first sampling unit includes at least one third capacitor, a seventh switch, an eighth switch, and a first common-mode switch, wherein the second plates of each third capacitor are connected to each other; The first end of the seventh switch is connected to the second input end, and the second end of the seventh switch is connected to the first plate of each of the third capacitors; The first terminal of the eighth switch is connected to the reference ground terminal, and the second terminal of the eighth switch is connected to the first plate of each of the third capacitors; The first terminal of the first common-mode switch is connected to the common-mode voltage, and the second terminal of the first common-mode switch is connected to the second plate of each of the third capacitors.

9. The power measurement circuit of claim 8, wherein, The total capacitance value of at least one of the third capacitors is equal to the total capacitance value of the plurality of fourth capacitors.

10. A chip, characterized by Includes the power measurement circuit as described in any one of claims 1 to 9.

11. An electronic device, comprising: Includes the chip as described in claim 10.

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