Power module

Abstract

The purpose of the present invention is to provide a power module having a feature capable of suppressing oscillation without a sacrifice of loss. This power module is provided with a first insulation substrate and a second insulation substrate, a first switching element mounted on the first insulation substrate, a second switching element mounted on the second insulation substrate and connected in parallel to the first switching element, and an inductance for magnetically coupling a first gate wiring connected to a gate electrode of the first switching element, with a second gate wiring connected to a gate electrode of the second switching element.

Description

Power module

[0001] The present disclosure relates to a power module.

[0002] Conventionally, a power module equipped with a plurality of switching elements connected in parallel to each other has been proposed.

[0003] For example, in Patent Document 1, a power module is disclosed that includes two groups of switching elements connected in parallel, and has a compensation structure for increasing the inductance of one connection path between one branch point branched into two from the main wiring and the gate electrode of one group of switching elements.

[0004] Japanese Patent Publication No. 2024-521420

[0005] However, in the technology described in Patent Document 1, since it only acts on the increase in the amount of gate voltage change per unit time (dv / dt) during on / off, it is necessary to increase the gate resistance in order to suppress gate oscillation. When the gate resistance is increased, there is a drawback that the switching of the group connected to the connection path having a large inductance becomes slow and the loss increases.

[0006] Therefore, an object of the present disclosure is to provide a technology capable of suppressing oscillation in a power module without sacrificing loss.

[0007] The power module according to the present disclosure includes a first insulating substrate and a second insulating substrate, a first switching element mounted on the first insulating substrate, a second switching element mounted on the second insulating substrate and connected in parallel with the first switching element, and an inductance that magnetically couples a first gate wiring connected to the gate electrode of the first switching element and a second gate wiring connected to the gate electrode of the second switching element.

[0008] According to the present disclosure, since the inductance that magnetically couples the first gate wiring and the second gate wiring functions as a mutual inductance, oscillation between the first insulating substrate and the second insulating substrate can be suppressed without sacrificing loss.

[0009] The purpose, features, aspects, and benefits of this disclosure will become clearer from the following detailed description and accompanying drawings.

[0010] This is a top view of the power module according to Embodiment 1. This is an equivalent circuit diagram of the power module according to Embodiment 1. This is a perspective view showing the inductance and its surrounding structure of a modified power module according to Embodiment 1. This is a top view of the power module according to Embodiment 2. This is a top view of the power module according to Embodiment 3. This is a top view of the power module according to Embodiment 4. This is a top view of the power module according to Embodiment 5. This is a top view of the power module according to Embodiment 6.

[0011] <Embodiment 1> Embodiment 1 will be described below with reference to the drawings. Figure 1 is a top view of the power module according to Embodiment 1.

[0012] As shown in Figure 1, the power module comprises a base plate 8, an insulating substrate 7a as a first insulating substrate, an insulating substrate 7b as a second insulating substrate, insulating substrates 7c and 7d, an IGBT (Insulated Gate Bipolar Transistor) 5a as a first switching element, an IGBT 5b as a second switching element, diodes 3a and 3b, and an inductor 10.

[0013] Insulating substrates 7a, 7b, 7c, and 7d are arranged on the base plate 8. Three IGBTs 5a and three diodes 3a are mounted on insulating substrate 7a. The three IGBTs 5a are connected in parallel, and each is connected in antiparallel to three diodes 3a. Substrate patterns 1a, 2a, 6a, and 9a are provided on insulating substrate 7a. Note that the number of IGBTs 5a and diodes 3a is not limited to three; one or more are acceptable.

[0014] The gate electrode of IGBT 5a is located on the surface of IGBT 5a and is connected to the substrate pattern 9a via wiring wire 15a. The emitter electrode of IGBT 5a is located on the surface of IGBT 5a and is connected to the substrate pattern 6a via wiring wire 4a. The collector electrode of IGBT 5a is located on the back surface of IGBT 5a and is connected to the substrate pattern 1a via a bonding material such as solder (not shown). The emitter sense electrode of IGBT 5a is located on the surface of IGBT 5a and is connected to the substrate pattern 2a via wiring wire 16a.

[0015] Three IGBTs 5b and three diodes 3b are mounted on the insulating substrate 7b. The three IGBTs 5b are connected in parallel, and each is connected in antiparallel to one of the three diodes 3b. Board patterns 1b, 2b, 6b, and 9b are provided on the insulating substrate 7b. Note that the number of IGBTs 5b and diodes 3b is not limited to three; one or more are sufficient.

[0016] The gate electrode of IGBT 5b is located on the surface of IGBT 5b and is connected to the substrate pattern 9b via wiring wire 15b. The emitter electrode of IGBT 5b is located on the surface of IGBT 5b and is connected to the substrate pattern 6b via wiring wire 4b. The collector electrode of IGBT 5b is located on the back surface of IGBT 5b and is connected to the substrate pattern 1b via a bonding material such as solder (not shown). The emitter sense electrode of IGBT 5b is located on the surface of IGBT 5b and is connected to the substrate pattern 2b via wiring wire 16b.

[0017] Here, substrate pattern 9a corresponds to the first gate wiring, and substrate pattern 9b corresponds to the second gate wiring.

[0018] Furthermore, the first and second switching elements are not limited to IGBTs, but may be other bipolar elements or MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). Also, the semiconductor material of the first and second switching elements may be Si, or a wide-bandgap semiconductor such as SiC or GaN.

[0019] A substrate pattern 12 is provided on the insulating substrate 7d. An inductor 10 and a signal pad 11 are provided on the substrate pattern 12 of the insulating substrate 7a.

[0020] A signal pad 13 is provided on the insulating substrate 7c. The signal pad 13 is connected to the substrate pattern 2a via wiring wires 13a. The substrate pattern 2a is connected to the substrate pattern 2b via wiring wires 14.

[0021] Next, the connection between the inductor 10 and the IGBTs 5a and 5b will be described. Figure 2 is an equivalent circuit diagram of the power module according to Embodiment 1. The three IGBTs 5a correspond to IGBT 51a, and the three IGBTs 5b correspond to IGBT 51b. However, diodes 3a and 3b are omitted.

[0022] As shown in Figures 1 and 2, the inductance 10 magnetically couples the substrate pattern 9a and the substrate pattern 9b. More specifically, the inductance 10 includes a primary inductance L1 and a secondary inductance L2, with one end of the primary inductance L1 connected to the other end of the secondary inductance L2 via a wiring wire 52a. The other end of the primary inductance L1 is connected to the gate electrode of the IGBT 51a via a wiring wire 52b. Here, the wiring wire 52a in Figure 2 corresponds to the substrate pattern 12 in Figure 1, and the wiring wire 52b in Figure 2 corresponds to the substrate pattern 12, signal pad 11, wiring wire 11a, substrate pattern 9a, and wiring wire 15a in Figure 1. Also, one end of the secondary inductance L2 is connected to the gate electrode of the IGBT 51b via the wiring wire 52b. Here, the wiring wire 52b in Figure 2 corresponds to the substrate pattern 12, wiring wire 11b, substrate pattern 9b, and wiring wire 15b in Figure 1.

[0023] Next, the effects of Embodiment 1 will be described. As shown in Figures 1 and 2, the substrate pattern 9a, which serves as the first gate wiring provided on the insulating substrate 7a, and the substrate pattern 9b, which serves as the second gate wiring provided on the insulating substrate 7b, are magnetically coupled by an inductance 10. When the phases of the gate signals between IGBT 51a and IGBT 51b are in opposite phases, the inductance 10 functions as mutual inductance, thereby suppressing oscillation between the insulating substrate 7a and the insulating substrate 7b. At this time, it is not necessary to make the gate resistance unnecessarily large, so it is possible to suppress large losses.

[0024] Furthermore, oscillation does not occur when the phases of the gate signals between IGBT51a and IGBT51b are in phase, thus not affecting losses.

[0025] As described above, in Embodiment 1, the power module includes an insulating substrate 7a and an insulating substrate 7b, an IGBT 5a mounted on the insulating substrate 7a, an IGBT 5b mounted on the insulating substrate 7b and connected in parallel with the IGBT 5a, and an inductance 10 that magnetically couples a substrate pattern 9a connected to the gate electrode of the IGBT 5a and a substrate pattern 9b connected to the gate electrode of the IGBT 5b. Furthermore, both the first switching element and the second switching element include a plurality of parallel-connected switching elements.

[0026] Therefore, since the inductance 10 that magnetically couples the substrate pattern 9a as the first gate wiring and the substrate pattern 9b as the second gate wiring functions as mutual inductance, oscillation between the IGBT 5a mounted on the insulating substrate 7a and the IGBT 5b mounted on the insulating substrate 7b can be suppressed without sacrificing losses.

[0027] <Modification of Embodiment 1> Next, a modification of Embodiment 1 will be described. Figure 3 is a perspective view showing the inductance 10 and its surrounding structure in the power module according to the modification of Embodiment 1.

[0028] As shown in Figure 3, the inductance 10 is wound around the ferromagnetic material 20. More specifically, the ferromagnetic material 20 is placed on a base 21, and the primary inductance L1 and secondary inductance L2 of the inductance 10 are wound around the ferromagnetic material 20. The base 21 is connected to the substrate pattern 12. This structure makes it possible to further suppress high-frequency oscillations that occur between the IGBT 5a mounted on the insulating substrate 7a and the IGBT 5b mounted on the insulating substrate 7b.

[0029] Alternatively, in Figure 3, a ferromagnetic coating may be formed on the inductor 10 instead of the ferromagnetic material 20. For example, a ferromagnetic coating may be applied to the entire inductor 10. This will provide the same effect as in Figure 3. Furthermore, since the number of components is reduced compared to Figure 3, it is possible to reduce the cost and improve the reliability of the power module.

[0030] <Embodiment 2> Next, Embodiment 2 will be described. Figure 4 is a top view of the power module according to Embodiment 2. In Embodiment 2, the same reference numerals are used for components that are the same as those described in Embodiment 1, and their descriptions are omitted.

[0031] Embodiment 1 was configured to suppress oscillation between switching elements mounted on an insulating substrate 7a and switching elements mounted on an insulating substrate 7b, whereas Embodiment 2 is configured to suppress oscillation between adjacent switching elements mounted on the same insulating substrate 7a.

[0032] As shown in Figure 4, the power module comprises a base plate 8, an insulating substrate 7a, an insulating substrate 7d, three IGBTs 5a, three diodes 3a, and an inductor 10.

[0033] Insulating substrates 7a and 7d are arranged on the base plate 8. The arrangement on insulating substrates 7a and 7d is the same as in Embodiment 1, except that substrate patterns 9a, 9b, and 9c corresponding to three IGBTs 5a are provided, so a description is omitted. Here, substrate pattern 9a corresponds to the first gate wiring, substrate pattern 9b corresponds to the second gate wiring, and substrate pattern 9c corresponds to the third gate wiring.

[0034] Furthermore, the three IGBTs 5a correspond to the first switching element, the second switching element, and the third switching element, respectively, and they are arranged in this order from left to right in Figure 4. The number of IGBTs 5a and diodes 3a is not limited to three, but may be two.

[0035] Furthermore, the first switching element, the second switching element, and the third switching element are not limited to IGBTs, but may be other bipolar elements or MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). Also, the semiconductor material of the first switching element, the second switching element, and the third switching element may be Si, or a wide-bandgap semiconductor such as SiC or GaN.

[0036] Next, the connection between the inductor 10 and the three IGBTs 5a will be explained. The inductor 10 magnetically couples a substrate pattern 9a, which serves as the first gate wiring connected to the gate electrode of the left IGBT 5a, which serves as the first switching element, with a substrate pattern 9b, which serves as the second gate wiring connected to the gate electrode of the central IGBT 5a, which serves as the second switching element. The inductor 10 further magnetically couples a substrate pattern 9b, which serves as the second gate wiring connected to the gate electrode of the central IGBT 5a, which serves as the second switching element, with a substrate pattern 9c, which serves as the third gate wiring connected to the gate electrode of the right IGBT 5a, which serves as the third switching element. In other words, the inductor 10 magnetically couples substrate patterns connected to the gate electrodes of adjacent IGBTs 5a mounted on the same insulating substrate 7a.

[0037] Next, the effects of Embodiment 2 will be described. In Embodiment 2, as described above, the inductance 10 magnetically couples substrate patterns connected to the gate electrodes of adjacent IGBTs 5a mounted on the same insulating substrate 7a. Therefore, the effects will be explained using Figure 2, similar to Embodiment 1.

[0038] As shown in Figure 2, when the gate signals between IGBT 51a and IGBT 51b are out of phase, the inductance 10 functions as mutual inductance, thereby suppressing oscillation between adjacent IGBTs 5a mounted on the insulating substrate 7a. In this case, there is no need to increase the gate resistance unnecessarily, thus suppressing increased losses.

[0039] Furthermore, oscillation does not occur when the phases of the gate signals between IGBT51a and IGBT51b are in phase, thus not affecting losses.

[0040] As described above, in Embodiment 2, the power module includes an insulating substrate 7a, a left IGBT 5a as a first switching element and a central IGBT 5a as a second switching element mounted on the insulating substrate 7a and connected in parallel to each other, a substrate pattern 9a as a first gate wiring connected to the gate electrode of the left IGBT 5a as the first switching element, and a substrate pattern 9b as a second gate wiring connected to the gate electrode of the central IGBT 5a as the second switching element, and an inductance 10 that magnetically couples these two.

[0041] Furthermore, the power module is mounted on an insulating substrate 7a and further includes a left IGBT 5a as a first switching element, a central IGBT 5a as a second switching element, and a right IGBT 5a as a third switching element connected in parallel with the left IGBT 5a as a first switching element and the central IGBT 5a as a second switching element. The left IGBT 5a as the first switching element, the central IGBT 5a as the second switching element, and the right IGBT 5a as the third switching element are arranged in this order. The inductance 10 further magnetically couples a substrate pattern 9b as a second gate wiring connected to the gate electrode of the central IGBT 5a as the second switching element, and a substrate pattern 9c as a third gate wiring connected to the gate electrode of the right IGBT 5a as the third switching element.

[0042] Therefore, similar to Embodiment 1, since the inductance 10 functions as mutual inductance, oscillation between adjacent IGBTs 5a mounted on the same insulating substrate 7a can be suppressed without sacrificing losses.

[0043] Furthermore, in Embodiment 2, a modified configuration of Embodiment 1 can also be adopted, in which case high-frequency oscillation can be further suppressed.

[0044] <Embodiment 3>Next, Embodiment 3 will be described. FIG. 5 is a top view of the power module according to Embodiment 3. In Embodiment 3, the same components as those described in Embodiments 1 and 2 are denoted by the same reference numerals, and the description thereof will be omitted.

[0045] In Embodiment 1, the inductance 10 magnetically couples the substrate pattern 9a as the first gate wiring connected to the gate electrode of the IGBT 5a and the substrate pattern 9b as the second gate wiring connected to the gate electrode of the IGBT 5b. On the other hand, as shown in FIG. 5, in Embodiment 3, the inductance 10 magnetically couples the substrate pattern 2a as the first emitter sense wiring connected to the emitter sense electrode of the IGBT 5a and the substrate pattern 2b as the second emitter sense wiring connected to the emitter sense electrode of the IGBT 5b.

[0046] A signal pad 13 is provided on the insulating substrate 7c. The signal pad 13 is connected to the substrate pattern 9b via a wiring wire 13a.

[0047] A substrate pattern 12 is provided on the insulating substrate 7d. An inductance 10 and a signal pad 11 are provided on the substrate pattern 12 of the insulating substrate 7d.

[0048] In Embodiment 1, the inductance 10 is connected to the substrate patterns 9a and 9b connected to the gate electrodes of the IGBTs 5a and 5b via wiring wires 11a and 11b, respectively. In Embodiment 2, the inductance 10 is connected to the substrate patterns 2a and 2b connected to the emitter sense electrodes of the IGBTs 5a and 5b via wiring wires 14a and 14b, respectively. Since the other connections are the same as those in Embodiment 1, the description thereof will be omitted.

[0049] As described above, in Embodiment 3, the power module includes an insulating substrate 7a and an insulating substrate 7b, an IGBT 5a mounted on the insulating substrate 7a, an IGBT 5b mounted on the insulating substrate 7b and connected in parallel with the IGBT 5a, and an inductance 10 that magnetically couples a substrate pattern 2a connected to the emitter sense electrode of the IGBT 5a and a substrate pattern 2b connected to the emitter sense electrode of the IGBT 5b. Furthermore, both the first switching element and the second switching element include a plurality of parallel-connected switching elements.

[0050] Therefore, since the inductance 10 that magnetically couples the substrate pattern 2a as the first emitter sense wiring and the substrate pattern 2b as the second emitter sense wiring functions as mutual inductance, oscillation between the IGBT 5a mounted on the insulating substrate 7a and the IGBT 5b mounted on the insulating substrate 7b can be suppressed without sacrificing losses.

[0051] Furthermore, in Embodiment 3, a modified configuration of Embodiment 1 can also be adopted, in which case high-frequency oscillation can be further suppressed.

[0052] <Embodiment 4> Next, Embodiment 4 will be described. Figure 6 is a top view of the power module according to Embodiment 4. In Embodiment 4, the same reference numerals are used for components that are the same as those described in Embodiments 1 to 3, and their descriptions are omitted.

[0053] In Embodiment 3, the configuration suppressed oscillation between a switching element mounted on an insulating substrate 7a and a switching element mounted on an insulating substrate 7b, whereas in Embodiment 4, the configuration suppresses oscillation between adjacent switching elements mounted on the same insulating substrate 7a.

[0054] As shown in Figure 6, the inductance 10 magnetically couples a substrate pattern 2a, which serves as a first emitter sense wiring connected to the emitter sense electrode of the left IGBT 5a, which serves as a first switching element, with a substrate pattern 2b, which serves as a second emitter sense wiring connected to the emitter sense electrode of the central IGBT 5a, which serves as a second switching element. The inductance 10 further magnetically couples a substrate pattern 2b, which serves as a second emitter sense wiring connected to the emitter sense electrode of the central IGBT 5a, which serves as a second switching element, with a substrate pattern 2c, which serves as a third emitter sense wiring connected to the emitter sense electrode of the right IGBT 5a, which serves as a third switching element. In other words, the inductance 10 magnetically couples substrate patterns connected to the emitter sense electrodes of adjacent IGBTs 5a mounted on the same insulating substrate 7a.

[0055] In Embodiment 2, the inductor 10 is connected to substrate patterns 9a, 9b, and 9c connected to the gate electrode of the IGBT 5a via wiring wires 11a, 11b, and 11c, respectively. In contrast, in Embodiment 2, the inductor 10 is connected to substrate patterns 2a, 2b, and 2c connected to the emitter sense electrode of the IGBT 5a via wiring wires 14a, 14b, and 14c, respectively. The other connections are the same as in Embodiment 2, so their explanation is omitted.

[0056] As described above, in Embodiment 4, the power module comprises an insulating substrate 7a, a left IGBT 5a and a central IGBT 5a mounted on the insulating substrate 7a and connected in parallel to each other, a substrate pattern 2a connected to the emitter sense electrode of the left IGBT 5a, and an inductance 10 that magnetically couples the substrate pattern 2b connected to the emitter sense electrode of the central IGBT 5a.

[0057] Furthermore, the power module is mounted on an insulating substrate 7a and includes a right IGBT 5a connected in parallel with the left IGBT 5a and the central IGBT 5a. The left IGBT 5a, central IGBT 5a, and right IGBT 5a are arranged in this order. The inductance 10 further magnetically couples a substrate pattern 2b connected to the emitter sense electrode of the central IGBT 5a with a substrate pattern 2c connected to the emitter sense electrode of the right IGBT 5a.

[0058] Therefore, similar to Embodiment 3, since the inductance 10 functions as mutual inductance, oscillation between adjacent IGBTs 5a mounted on the same insulating substrate 7a can be suppressed without sacrificing losses.

[0059] Furthermore, in Embodiment 4, a modified configuration of Embodiment 1 can also be adopted, in which case high-frequency oscillation can be further suppressed.

[0060] <Embodiment 5> Next, Embodiment 5 will be described. Figure 7 is a top view of the power module according to Embodiment 5. In Embodiment 5, the same reference numerals are used for components that are the same as those described in Embodiments 1 to 4, and their descriptions are omitted.

[0061] Embodiment 5 is an embodiment in which Embodiment 3 is added to Embodiment 1. Specifically, as shown in Figure 7, two inductances 10 are provided on the base plate 8, one on the left and one on the right, with the right inductance 10 corresponding to the first inductance and the left inductance corresponding to the second inductance.

[0062] The inductor 10 on the right magnetically couples the substrate pattern 9a connected to the gate electrode of IGBT 5a and the substrate pattern 9b connected to the gate electrode of IGBT 5b via wiring wires 11a and 11b, respectively. The inductor 10 on the left magnetically couples the substrate pattern 2a connected to the emitter sense electrode of IGBT 5a and the substrate pattern 2b connected to the emitter sense electrode of IGBT 5b via wiring wires 14a and 14b, respectively.

[0063] As described above, in Embodiment 5, the power module further includes, in addition to the right-side inductance 10 as the first inductance, a left-side inductance 10 as a second inductance that magnetically couples the substrate pattern 9a connected to the emitter sense electrode of IGBT 5a with the substrate pattern 9b connected to the emitter sense electrode of IGBT 5b. Furthermore, both the first switching element and the second switching element include a plurality of parallel-connected switching elements.

[0064] Therefore, the inductance 10 on the right side that magnetically couples the substrate pattern 9a as the first gate wiring and the substrate pattern 9b as the second gate wiring functions as mutual inductance, and the inductance 10 on the left side that magnetically couples the substrate pattern 2a as the first emitter sense wiring and the substrate pattern 2b as the second emitter sense wiring functions as mutual inductance. As a result, oscillation between the IGBT 5a mounted on the insulating substrate 7a and the IGBT 5b mounted on the insulating substrate 7b can be suppressed without sacrificing losses.

[0065] Furthermore, in Embodiment 5, a modified configuration of Embodiment 1 can also be adopted, in which case high-frequency oscillation can be further suppressed.

[0066] <Embodiment 6> Next, Embodiment 6 will be described. Figure 8 is a top view of the power module according to Embodiment 6. In Embodiment 6, the same reference numerals are used for components that are the same as those described in Embodiments 1 to 5, and their descriptions are omitted.

[0067] Embodiment 6 is an embodiment in which Embodiment 4 is added to Embodiment 2. Specifically, as shown in Figure 8, two inductances 10 are provided on the base plate 8, one on the left and one on the right, with the right inductance 10 corresponding to the first inductance and the left inductance corresponding to the second inductance.

[0068] The right-side inductance 10 magnetically couples a substrate pattern 9a, which serves as the first gate wiring connected to the gate electrode of the left-side IGBT 5a (a first switching element), with a substrate pattern 9b, which serves as the second gate wiring connected to the gate electrode of the central IGBT 5a (a second switching element), via wiring wires 11a and 11b, respectively. The right-side inductance 10 further magnetically couples a substrate pattern 9b, which serves as the second gate wiring connected to the gate electrode of the central IGBT 5a (a second switching element), with a substrate pattern 9c, which serves as the third gate wiring connected to the gate electrode of the right-side IGBT 5a (a third switching element), via wiring wires 11b and 11c, respectively. In other words, the right-side inductance 10 magnetically couples substrate patterns connected to the gate electrodes of adjacent IGBTs 5a mounted on the same insulating substrate 7a.

[0069] Furthermore, the left inductance 10 magnetically couples the substrate pattern 2a, which serves as the first emitter sense wiring connected to the emitter sense electrode of the left IGBT 5a, which serves as the first switching element, with the substrate pattern 2b, which serves as the second emitter sense wiring connected to the emitter sense electrode of the central IGBT 5a, which serves as the second switching element, via wiring wires 14a and 14b. The left inductance 10 further magnetically couples the substrate pattern 2b, which serves as the second emitter sense wiring connected to the emitter sense electrode of the central IGBT 5a, which serves as the second switching element, with the substrate pattern 2c, which serves as the third emitter sense wiring connected to the emitter sense electrode of the right IGBT 5a, which serves as the third switching element, via wiring wires 14b and 14c. In other words, the left inductance 10 magnetically couples the substrate patterns connected to the emitter sense electrodes of adjacent IGBTs 5a mounted on the same insulating substrate 7a.

[0070] As described above, in Embodiment 6, the power module further includes, in addition to the right-side inductance 10 as the first inductance, a left-side inductance 10 as a second inductance that magnetically couples the substrate pattern 9a connected to the emitter sense electrode of IGBT 5a with the substrate pattern 9b connected to the emitter sense electrode of IGBT 5b.

[0071] Furthermore, the power module is mounted on an insulating substrate 7a and further includes a right IGBT 5a connected in parallel with the left IGBT 5a and the central IGBT 5a. The left IGBT 5a, the central IGBT 5a, and the right IGBT 5a are arranged in this order. The right inductance 10 further magnetically couples a substrate pattern 9b connected to the gate electrode of the central IGBT 5a with a substrate pattern 9c connected to the gate electrode of the right IGBT 5a. The left inductance 10, acting as a second inductance, further magnetically couples a substrate pattern 2b connected to the emitter sense electrode of the central IGBT 5a with a substrate pattern 2c connected to the emitter sense electrode of the right IGBT 5a.

[0072] Therefore, similar to Embodiment 5, the inductances 10 on the right and left sides function as mutual inductances, making it possible to suppress oscillation between adjacent IGBTs 5a mounted on the same insulating substrate 7a without sacrificing losses.

[0073] Furthermore, in Embodiment 6, a modified configuration of Embodiment 1 can also be adopted, in which case high-frequency oscillation can be further suppressed.

[0074] Although this disclosure has been described in detail, the above description is illustrative and not limiting in all respects. It is understood that countless variations not illustrated are conceivable.

[0075] Furthermore, it is possible to freely combine each embodiment, or to modify or omit each embodiment as appropriate.

[0076] 2a, 2b, 2c Substrate patterns, 5a, 5b IGBTs, 7a, 7b Insulating substrates, 9a, 9b, 9c Substrate patterns, 10 Inductance, 20 Ferromagnetic material.

Claims

1. A power module comprising: a first insulating substrate and a second insulating substrate; a first switching element mounted on the first insulating substrate; a second switching element mounted on the second insulating substrate and connected in parallel with the first switching element; and an inductance that magnetically couples a first gate wiring connected to the gate electrode of the first switching element and a second gate wiring connected to the gate electrode of the second switching element.

2. A power module comprising: an insulating substrate; a first switching element and a second switching element mounted on the insulating substrate and connected in parallel to each other; and an inductance that magnetically couples a first gate wiring connected to the gate electrode of the first switching element and a second gate wiring connected to the gate electrode of the second switching element.

3. A power module comprising: a first insulating substrate and a second insulating substrate; a first switching element mounted on the first insulating substrate; a second switching element mounted on the second insulating substrate and connected in parallel with the first switching element; and an inductance that magnetically couples a first emitter sense wiring connected to the emitter sense electrode of the first switching element and a second emitter sense wiring connected to the emitter sense electrode of the second switching element.

4. A power module comprising: an insulating substrate; a first switching element and a second switching element mounted on the insulating substrate and connected in parallel to each other; and an inductance that magnetically couples a first emitter sense wiring connected to the emitter sense electrode of the first switching element and a second emitter sense wiring connected to the emitter sense electrode of the second switching element.

5. The power module according to claim 1, wherein the inductance is a first inductance, and further comprises a second inductance that magnetically couples a first emitter sense wiring connected to the emitter sense electrode of the first switching element and a second emitter sense wiring connected to the emitter sense electrode of the second switching element.

6. The power module according to claim 2, wherein the inductance is a first inductance, and further comprises a second inductance that magnetically couples a first emitter sense wiring connected to the emitter sense electrode of the first switching element and a second emitter sense wiring connected to the emitter sense electrode of the second switching element.

7. The power module according to any one of claims 1 to 4, wherein the inductance is wound around a ferromagnetic material.

8. The power module according to any one of claims 1 to 4, wherein a ferromagnetic coating is formed on the inductance.

9. The power module according to claim 5 or 6, wherein the first inductance and the second inductance are wound around a ferromagnetic material.

10. The power module according to claim 5 or 6, wherein a ferromagnetic coating is formed on the first inductance and the second inductance.

11. The power module according to any one of claims 1, 3, or 5, wherein both the first switching element and the second switching element include a plurality of parallel-connected switching elements.

12. The power module according to claim 2, further comprising a third switching element mounted on the insulating substrate and connected in parallel with the first switching element and the second switching element, wherein the first switching element, the second switching element, and the third switching element are arranged in this order, and the inductance further magnetically couples the second gate wiring connected to the gate electrode of the second switching element and the third gate wiring connected to the gate electrode of the third switching element.

13. The power module according to claim 4, further comprising a third switching element mounted on the insulating substrate and connected in parallel with the first switching element and the second switching element, wherein the first switching element, the second switching element, and the third switching element are arranged in this order, and the inductance further magnetically couples the second emitter sense wiring connected to the emitter sense electrode of the second switching element and the third emitter sense wiring connected to the emitter sense electrode of the third switching element.

14. The power module according to claim 6, further comprising a third switching element mounted on the insulating substrate and connected in parallel with the first switching element and the second switching element, wherein the first switching element, the second switching element, and the third switching element are arranged in this order, the first inductance further magnetically couples the second gate wiring connected to the gate electrode of the second switching element with the third gate wiring connected to the gate electrode of the third switching element, and the second inductance further magnetically couples the second emitter sense wiring connected to the emitter sense electrode of the second switching element with the third emitter sense wiring connected to the emitter sense electrode of the third switching element.

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