Level conversion circuit and electronic device
By introducing a combination design of pull-up module, conversion module, first control unit and second control unit into the level conversion circuit, the unreliable level conversion problem caused by simultaneous conduction of MOSFETs is solved, and high-reliability voltage conversion is achieved.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- GREE ELECTRIC APPLIANCE INC OF ZHUHAI
- Filing Date
- 2025-10-27
- Publication Date
- 2026-05-15
AI Technical Summary
In the existing technology, the level conversion circuit for converting low-voltage domain signals to high-voltage domain signals cannot switch the output signal from low voltage to high voltage because the MOSFETs are simultaneously turned on, resulting in unreliable level conversion.
The design employs a combination of a pull-up module, a conversion module, a first control unit, and a second control unit. By reducing the pull-up capability of the pull-up module, it ensures that branches are not simultaneously turned on when the control signal switches between high and low levels. This includes setting up a first control unit and a second control unit to control the on and off states of the pull-up module.
This improves the reliability of level conversion, avoids the problems of increased power consumption and inability to flip the output signal due to simultaneous conduction of branches, and achieves reliable voltage conversion.
Smart Images
Figure CN2025130096_15052026_PF_FP_ABST
Abstract
Description
Level conversion circuits and electronic devices
[0001] This disclosure claims priority to Chinese Patent Application No. 202411576345.1, filed on November 6, 2024, entitled "Level Conversion Circuit and Electronic Device", the entire contents of which are incorporated herein by reference. Technical Field
[0002] This disclosure relates to the field of electronic circuit technology, and more specifically, to a level conversion circuit and an electronic device. Background Technology
[0003] Various electronic devices have rapidly become ubiquitous in households, and many of these devices are equipped with corresponding microcontroller units (MCUs). These MCUs typically operate in different power domains, thus requiring corresponding level conversion circuits in these electronic devices.
[0004] In related technologies, some level conversion circuits that convert low-voltage domain signals to high-voltage domain signals use multiple metal-oxide-semiconductor field-effect transistors (MOS transistors). By inputting high-voltage or low-voltage control signals to the gates of the corresponding MOS transistors in different branches, the conduction or cutoff of each MOS transistor in each branch is controlled, thereby converting the low-voltage domain to the high-voltage domain for output.
[0005] However, in the process of the control signal transitioning from low voltage to high voltage, the related technical solutions may fail to transition the output signal from low voltage to high voltage due to the simultaneous conduction of multiple MOSFETs on the same branch. Therefore, the related technical solutions suffer from unreliable level conversion. Summary of the Invention
[0006] The purpose of this disclosure is to provide a level conversion circuit and electronic device that can improve the reliability of level conversion.
[0007] The embodiments of this disclosure are implemented as follows:
[0008] A first aspect of this disclosure provides a level conversion circuit, the level conversion circuit comprising: a pull-up module, a conversion module, a first control unit, and a second control unit;
[0009] The first and second ends of the pull-up module are respectively set to input a first working voltage, the third end of the pull-up module is connected to the first end of the first control unit, and the fourth end of the pull-up module is connected to the first end of the second control unit.
[0010] The first and second terminals of the conversion module are respectively configured to input a second operating voltage, the third terminal of the conversion module is configured to input a first control signal, and the fourth terminal of the conversion module is configured to input a second control signal; the conversion module is configured to control the pull-up module to output the first operating voltage to the first control unit or the second control unit;
[0011] The second terminal of the first control unit is connected to the fifth terminal of the conversion module, and the third terminal of the first control unit is configured to input the second control signal; the first control unit is configured to be turned on under the action of the second control signal and the first operating voltage.
[0012] The second terminal of the second control unit is connected to the sixth terminal of the conversion module, and the third terminal of the second control unit is configured to input the first control signal; the second terminal of the second control unit is also configured to serve as the output node of the level conversion circuit.
[0013] The second control unit is configured to turn on under the action of the first control signal and the first operating voltage, and to output a target level through the output node when turned on; the first control unit and the second control unit are specifically configured to reduce the pull-up capability of the pull-up module.
[0014] In some implementations, the first control unit is a first switching transistor, and the second control unit is a second switching transistor;
[0015] The source of the first switching transistor is connected to the third terminal of the pull-up module, the drain of the first switching transistor is connected to the fifth terminal of the conversion module, and the gate of the first switching transistor is configured to input the second control signal.
[0016] The source of the second switch is connected to the fourth terminal of the pull-up module, the drain of the second switch is connected to the sixth terminal of the conversion module, and the gate of the second switch is configured to input the first control signal.
[0017] In some embodiments, the conversion module includes a third switch and a fourth switch;
[0018] The gate of the third switch is configured to receive the second operating voltage, the source of the third switch is configured to receive the first control signal, and the drain of the third switch is connected to the second terminal of the first control unit; the third switch is configured to be turned on when the first control signal meets the first preset voltage and turned off when the first control signal meets the second preset voltage.
[0019] The gate of the fourth switch is configured to receive the second operating voltage, the source of the fourth switch is configured to receive the second control signal, and the drain of the fourth switch is connected to the second terminal of the second control unit; the fourth switch is configured to be turned on when the second control signal satisfies the first preset voltage and turned off when the first control signal satisfies the second preset voltage.
[0020] The first preset voltage is less than the second preset voltage.
[0021] In some implementations, the pull-up module includes a fifth switch and a sixth switch;
[0022] The source of the fifth switch is configured to receive the first operating voltage, the drain of the fifth switch is connected to the first terminal of the first control unit, and the gate of the fifth switch is connected to the second terminal of the second control unit and the drain of the fourth switch, respectively. The fifth switch is configured to be turned off when the fourth switch is turned off and turned on when the fourth switch is turned on to output the first operating voltage to the first control unit.
[0023] The source of the sixth switch is configured to receive the first operating voltage, the drain of the sixth switch is connected to the first terminal of the second control unit, and the gate of the sixth switch is connected to the second terminal of the first control unit and the drain of the third switch, respectively. The sixth switch is configured to be turned off when the third switch is turned off and turned on when the third switch is turned on to output the first operating voltage to the first control unit.
[0024] In some embodiments, the level conversion circuit further includes: a level adjustment module;
[0025] The first terminal of the level adjustment module is set to input an initial level signal, the second terminal of the level adjustment module is connected to the third terminal of the conversion module, and the third terminal of the level adjustment module is connected to the fourth terminal of the conversion module.
[0026] The level adjustment module is configured to convert the initial level signal into the second control signal and the first control signal, and output the second control signal and the first control signal to the conversion module respectively.
[0027] In some embodiments, the level adjustment module includes: a first inverter and a second inverter; the input terminal of the first inverter is configured to input the initial level signal, the first power supply terminal of the first inverter is configured to input the second operating voltage, the second power supply terminal of the first inverter is grounded, and the output terminal of the first inverter is connected to the conversion module and the input terminal of the second inverter respectively; the first inverter is configured to convert the initial level signal into the first control signal.
[0028] The first power supply terminal of the second inverter is set to input the second operating voltage, the second power supply terminal of the second inverter is grounded, and the output terminal of the second inverter is connected to the conversion module; the second inverter is configured to convert the first control signal into the second control signal.
[0029] In some embodiments, the level adjustment module includes: a third inverter;
[0030] The input terminal of the third inverter is set to input the initial level signal, the first power supply terminal of the third inverter is set to input the second operating voltage, the second power supply terminal of the third inverter is grounded, and the output terminal of the third inverter is connected to the third or fourth terminal of the conversion module.
[0031] The third inverter is configured to adjust the potential of the initial level signal and output the adjusted level signal to the conversion module.
[0032] In some embodiments, the circuit further includes a buffer;
[0033] The input terminal of the buffer is connected to the output node, the first output terminal of the buffer is configured to output a first voltage, and the second output terminal of the buffer is configured to output a second voltage;
[0034] The first voltage and the second voltage have opposite potentials.
[0035] In some implementations, the voltage level of the first operating voltage is greater than the voltage level of the second operating voltage;
[0036] The first control signal has an opposite potential to the second control signal.
[0037] A second aspect of this disclosure provides an electronic device including any of the level conversion circuits described in the first aspect above.
[0038] The beneficial effects of the embodiments disclosed herein include:
[0039] This disclosure provides a level conversion circuit comprising a pull-up module, a first control unit, a second control unit, and a conversion module. The first and second terminals of the pull-up module are respectively configured to input a first operating voltage. The third terminal of the pull-up module is connected to the first terminal of the first control unit, and the fourth terminal of the pull-up module is connected to the first terminal of the second control unit. The first and second terminals of the conversion module are respectively configured to input a second operating voltage. The third terminal of the conversion module is configured to input a first control signal, and the fourth terminal of the conversion module is configured to input a second control signal. The second terminal of the first control unit is connected to the fifth terminal of the conversion module, and the third terminal of the first control unit is configured to input the second control signal. The second terminal of the second control unit is connected to the sixth terminal of the conversion module, and the third terminal of the second control unit is configured to input the first control signal.
[0040] Because the first and second control units can reduce the pull-up capability of the pull-up module, the pull-up module can have a faster turn-off speed. That is, when the first control signal toggles from high to low and the second control signal toggles from low to high, the branch in the pull-up module connected in series with the first control unit has already been quickly turned off before the branch in the conversion module connected in series with the first control unit has started. Therefore, this avoids the problem of the branch in the pull-up module and the conversion module simultaneously conducting when the first control signal and / or the second control signal switch between high and low levels, thus preventing the output signal from transitioning from low to high voltage.
[0041] This can improve the reliability of level conversion. Attached Figure Description
[0042] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of this disclosure and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0043] Figure 1 is a schematic diagram of a level conversion circuit provided by related technologies;
[0044] Figure 2 is a schematic diagram of the structure of a first level conversion circuit provided in an embodiment of this disclosure;
[0045] Figure 3 is a schematic diagram of the structure of a second level conversion circuit provided in an embodiment of this disclosure;
[0046] Figure 4 is a schematic diagram of the third level conversion circuit provided in the embodiment of this disclosure;
[0047] Figure 5 is a schematic diagram of the fourth level conversion circuit provided in the embodiments of this disclosure;
[0048] Figure 6 is a schematic diagram of a signal timing provided in an embodiment of this disclosure;
[0049] Figure 7 is a schematic diagram of the fifth level conversion circuit provided in the embodiments of this disclosure;
[0050] Figure 8 is a schematic diagram of the sixth level conversion circuit provided in the embodiments of this disclosure. Detailed Implementation
[0051] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. The components of the embodiments of this disclosure described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0052] Therefore, the following detailed description of the embodiments of this disclosure provided in the accompanying drawings is not intended to limit the scope of the claimed disclosure, but merely to illustrate selected embodiments of the disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure.
[0053] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.
[0054] In the description of this disclosure, it should be noted that the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0055] In the description of this disclosure, it should also be noted that, unless otherwise expressly specified and limited, the terms "set up," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this disclosure based on the specific circumstances.
[0056] In related technologies, some level conversion circuits that convert low-voltage domain signals to high-voltage domain signals use MOSFETs. By inputting high-voltage or low-voltage control signals to the gates of the corresponding MOSFETs in different branches, the conduction or cutoff of each MOSFET in each branch is controlled, thereby converting the low-voltage domain to the high-voltage domain for output.
[0057] However, in the process of the control signal transitioning from low voltage to high voltage, the related technical solutions may fail to transition the output signal from low voltage to high voltage due to the simultaneous conduction of multiple MOSFETs on the same branch. Therefore, the related technical solutions suffer from unreliable level conversion.
[0058] For example, referring to Figure 1, Figure 1 provides a level conversion circuit in the related art. This scheme can specifically set up switching transistors M01, M02, M03, M04 and inverter INV0. The specific connection relationship is shown in Figure 1. The embodiments disclosed herein will not be described in detail here.
[0059] Since the control signal input from the IN port in Figure 1 is generally a periodic signal with high and low levels, an intermediate voltage may occur during the high-low level switching process. This intermediate voltage is between the high and low levels. Therefore, this intermediate voltage may simultaneously turn on switching transistors M01 and M03, or simultaneously turn on switching transistors M02 and M04.
[0060] Specifically, if this intermediate voltage occurs during the transition of the control signal from low to high, it may cause both switching transistors M01 and M02 to remain on. Simultaneously, because switching transistor M01 is on, switching transistor M04 will also remain on, resulting in switching transistors M02 and M04 being simultaneously on. In this situation, this approach may lead to increased power consumption or even prevent the output signal level from transitioning.
[0061] To address this, this disclosure provides a level conversion circuit. It comprises a pull-up module, a conversion module, a first control unit, and a second control unit. The first and second terminals of the pull-up module are respectively configured to input a first operating voltage. The third terminal of the pull-up module is connected to the first terminal of the first control unit, and the fourth terminal of the pull-up module is connected to the first terminal of the second control unit. The first and second terminals of the conversion module are respectively configured to input a second operating voltage. The third terminal of the conversion module is configured to input a first control signal, and the fourth terminal of the conversion module is configured to input the second control signal. The second terminal of the first control unit is connected to the fifth terminal of the conversion module, and the third terminal of the first control unit is configured to input the second control signal. The second terminal of the second control unit is connected to the sixth terminal of the conversion module, and the third terminal of the second control unit is configured to input the first control signal. The second control unit is configured to conduct under the influence of the first control signal and the first operating voltage, and to output a target level through its output node when conducting. This improves the reliability of the level conversion.
[0062] This disclosure uses a level conversion circuit applied in an electronic device as an example for illustration. Specifically, it can be configured to perform level conversion for an MCU in an electronic device. However, it does not imply that this disclosure can only be applied to level conversion in electronic devices.
[0063] The level conversion circuit provided in the embodiments of this disclosure will be explained in detail below.
[0064] Figure 2 is a schematic diagram of a level conversion circuit provided in this disclosure. The level conversion circuit 100 can be applied to any electronic device that needs to convert low voltage to high voltage, and this disclosure does not limit this application. Referring to Figure 2, this disclosure provides a level conversion circuit 100, which includes: a pull-up module 101, a first control unit 102, a second control unit 103, and a conversion module 104.
[0065] The first and second terminals of the pull-up module 101 are respectively set to input the first working voltage. The third terminal of the pull-up module 101 is connected to the first terminal of the first control unit 102, and the fourth terminal of the pull-up module 101 is connected to the first terminal of the second control unit 103.
[0066] The first and second terminals of the conversion module 104 are respectively set to input a second working voltage, the third terminal of the conversion module 104 is set to input a first control signal, and the fourth terminal of the conversion module 104 is set to input a second control signal.
[0067] The second terminal of the first control unit 102 is connected to the fifth terminal of the conversion module 104, and the third terminal of the first control unit 102 is set to input the second control signal.
[0068] The second terminal of the second control unit 103 is connected to the sixth terminal of the conversion module 104, and the third terminal of the second control unit 103 is set to input the first control signal.
[0069] The conversion module 104 is configured to control the pull-up module 101 to output the first working voltage to the first control unit 102 or the second control unit 103.
[0070] The first control unit 102 is configured to be turned on under the action of the second control signal and the first operating voltage.
[0071] In some embodiments, the second terminal of the second control unit 103 is also configured as an output node of the level conversion circuit 100, such as the output node OUT shown in FIG1. This output node is configured to be connected to any possible external electrical load, which is not limited in this embodiment of the present disclosure.
[0072] In this configuration, the second control unit 103 can be configured to turn on under the influence of the first control signal and the first operating voltage, and to output a target level through the output node when on. That is, the voltage level of the target level ultimately output by the level conversion circuit 100 is the same as the voltage level of the first operating voltage.
[0073] In some embodiments, the voltage level of the first operating voltage (VDDH as shown in FIG2) is greater than the voltage level of the second operating voltage (VDDL as shown in FIG2). For example, the voltage level of the first operating voltage can be 5V, and the voltage level of the second operating voltage can be any possible voltage level such as 1.8V or 3V, and this disclosure does not limit this.
[0074] In other words, when the second control unit 103 is turned on, the circuit 100 can output a higher voltage to the outside.
[0075] In some embodiments, different branches can be provided in the pull-up module 101 to input the first operating voltage. In addition, different branches can also be provided in the conversion module 104. Generally, the number of branches in the conversion module 104 is the same as the number in the pull-up module 101, and each branch in the pull-up module 101 corresponds to the first control unit 102 and the second control unit 103, respectively.
[0076] For example, since the circuit 100 includes a first control unit 102 and a second control unit 103, two branches can be provided in the pull-up module 101 and the conversion module 104, and each branch can include a switching transistor. This disclosure does not limit the scope of the invention.
[0077] In some embodiments, the first control unit 102 and the second control unit 103 may be specifically configured to reduce the pull-up capability of the pull-up module 101. Specifically, the first control unit 102 and the second control unit 103 may reduce the pull-up capability of the pull-up module 101 by changing the impedance of each branch in the pull-up module 101 and / or the width-to-length ratio of each switching transistor in the pull-up module 101. This disclosure does not limit this aspect.
[0078] Specifically, at any given time, the first operating voltage will only be input to one of the branches of the pull-up module 101.
[0079] In some embodiments, the first control signal and the second control signal have opposite potentials; specifically, the first control signal and the second control signal have opposite potentials at the same time. Furthermore, generally, the first control signal can be input to the second control unit at the same time as the second control signal is input to the first control unit 102.
[0080] In this embodiment, the second control signal and the first control signal can specifically be rectangular wave signals that are out of phase but have the same period and frequency. That is, when the second control signal is high, the first control signal is low; and when the second control signal is low, the first control signal is high. Moreover, because the first control signal and the second control signal have opposite potentials, they can be regarded as two signals with a phase difference of 180°.
[0081] The high level corresponding to the first control signal and the second control signal can be 1.8V, and the low level corresponding to the second control signal can be 0V. This embodiment of the present disclosure does not limit this.
[0082] In this embodiment, the first control unit 102 can be turned on when the second control signal is low and the first operating voltage is input. The second control unit 103 can be turned on when the first control signal is low and the first operating voltage is input.
[0083] In one possible embodiment, continuing to refer to Figure 2, the third terminal of the pull-up module 101 can also serve as the control node OUTN of the circuit 100. The branch in the second control unit 103 connected in series with the pull-up module 101 can specifically operate based on the voltage of the control node OUTN. This embodiment does not limit this aspect.
[0084] It should be noted that the specific working principle of the circuit 100 provided in this embodiment is described as follows:
[0085] This embodiment of the disclosure uses an example where the high level of the first control signal and the second control signal is 1.8V and the low level is 0V, and the first operating voltage is 5V and the second operating voltage is 1.8V.
[0086] In the power-off or sleep state, the pull-up module 101 has no first operating voltage input, the conversion module 104 has no second operating voltage input, the conversion module 104 and the second control unit 103 have no first control signal input, and the conversion module 104 and the first control unit 102 also have no second control signal input. At this time, the pull-up module 101, the conversion module 104, the first control unit 102 and the second control unit 103 all remain in a sleep state, and under these circumstances, the output node has no power output.
[0087] When the first control signal is high and the second control signal is low, the branch in the conversion module 104 connected in series with the first control unit 102 is turned off, and the branch connected in series with the second control unit 103 is turned on. Therefore, the voltage of the output node is pulled down to 0V. Simultaneously, under the current action of the conversion module 104, the first control unit 102 is activated, and the branch in the pull-up module 101 connected in series with the first control unit 102 is turned on, while the branch connected in series with the second control unit 103 is turned off. This, in turn, turns off the second control unit 103 and the branch in the pull-up module 101 connected in series with the second control unit 103. Specifically, the first operating voltage can be applied to the third terminal of the pull-up module 101 (i.e., the control node OUTN) via the pull-up module 101 and the first control unit 102. That is, the voltage of the control node OUTN is 5V, and the branch in the pull-up module 101 connected in series with the second control unit 103 is turned off when the voltage of the control node OUTN is 5V.
[0088] In this situation, the first operating voltage cannot be applied to the output node through the pull-up module 101 and the second control unit 103, so the voltage of the output node is continuously pulled down to 0V. That is, the voltage output by circuit 100 is 0V at this time.
[0089] When the first control signal is low and the second control signal is high, the branch in the conversion module 104 connected in series with the first control unit 102 is turned on, and the branch connected in series with the second control unit 103 is turned off. Therefore, the voltage at the third terminal (i.e., the control node OUTN) of the pull-up module 101 is pulled down to 0V. Simultaneously, under the current action of the conversion module 104, the second control unit 103 is activated, and the branch in the pull-up module 101 connected in series with the second control unit 103 is turned on, while the branch connected in series with the first control unit 102 is turned off. This, in turn, turns off the first control unit 102 and the branch in the pull-up module 101 connected in series with the first control unit 102. Specifically, the first operating voltage can be applied to the output node via the pull-up module 101 and the second control unit 103, meaning the voltage of the output node is 5V. The branch in the pull-up module 101 connected in series with the first control unit 102 is turned off when the voltage of the output node is 5V.
[0090] In this configuration, the first operating voltage can be applied to the output node via the pull-up module 101 and the second control unit 103, thus pulling the voltage of the output node up to 5V. In other words, the voltage output by circuit 100 is 5V. This allows circuit 100 to achieve the purpose of converting a low voltage to a high voltage output.
[0091] It is worth noting that, because the circuit 100 provided in this embodiment adds a first control unit 102 and a second control unit 103 to reduce the pull-up capability of the pull-up module 101, the turn-off speed of the pull-up module 101 can be made faster. This avoids, as much as possible, situations where the branch in the pull-up module 101 connected in series with the first control unit 102 and the branch in the conversion module 101 connected in series with the first control unit 102 are simultaneously turned on, and / or the branch in the pull-up module 101 connected in series with the second control unit 103 and the branch in the conversion module 101 connected in series with the second control unit 103 are simultaneously turned on. Therefore, the problem of the output signal failing to transition from low voltage to high voltage when the first control signal and / or the second control signal switch between high and low levels can be avoided.
[0092] In this embodiment, a pull-up module 101, a first control unit 102, a second control unit 103, and a conversion module 104 are configured. The first and second terminals of the pull-up module 101 are respectively configured to input a first operating voltage. The third terminal of the pull-up module 101 is connected to the first terminal of the first control unit 102, and the fourth terminal of the pull-up module 101 is connected to the first terminal of the second control unit 103. The first and second terminals of the conversion module 104 are respectively configured to input a second operating voltage. The third terminal of the conversion module 104 is configured to input a first control signal, and the fourth terminal of the conversion module 104 is configured to input a second control signal. The second terminal of the first control unit 102 is connected to the fifth terminal of the conversion module 104, and the third terminal of the first control unit 102 is configured to input the second control signal. The second terminal of the second control unit 103 is connected to the sixth terminal of the conversion module 104, and the third terminal of the second control unit 103 is configured to input the first control signal.
[0093] Because the first control unit 101 and the second control unit 102 can reduce the pull-up capability of the pull-up module 101, the pull-up module 101 can have a faster turn-off speed. That is, when the first control signal flips from high to low and the second control signal flips from low to high, the branch in the pull-up module 101 connected in series with the first control unit 102 has already been quickly turned off before the branch in the conversion module 101 connected in series with the first control unit 102 has been activated. Therefore, the problem of the branch in the pull-up module 101 and the conversion module 104 being simultaneously turned on when the first control signal and / or the second control signal are switching between high and low levels, thus preventing the output signal from flipping from low voltage to high voltage, can be avoided.
[0094] This can improve the reliability of level conversion.
[0095] In addition, since the circuit 100 provided in this embodiment can avoid the problem of simultaneous conduction of the branches connected in series in the pull-up module 101 and the conversion module 104, the problem of increased power consumption due to common conduction is also avoided.
[0096] In one possible implementation, referring to Figure 3, the first control unit 102 is the first switch M1, and the second control unit 103 is the second switch M2.
[0097] The source of the first switching transistor M1 is connected to the third terminal of the pull-up module 101, the drain of the first switching transistor M1 is connected to the fifth terminal of the conversion module 104, and the gate of the first switching transistor M1 is set to input the second control signal.
[0098] The source of the second switch M2 is connected to the fourth terminal of the pull-up module 101, the drain of the second switch M2 is connected to the sixth terminal of the conversion module 104, and the gate of the second switch M2 is set to input the first control signal.
[0099] In some embodiments, both the first switch M1 and the second switch M2 can be P-channel switches, such as PMOS transistors or any other possible switches. Furthermore, considering cost reduction, PMOS transistors may be preferred. This disclosure does not limit this choice.
[0100] In some implementations, the dimensions and other possible parameters of the first switch M1 and the second switch M2 can be the same. This ensures that the switching speed and other performance characteristics of the first switch M1 and the second switch M2 are the same or similar, thereby improving the symmetry and stability of the circuit 100. At the same time, it can also reduce the design complexity of the circuit 100.
[0101] It is worth noting that since both the first switch M1 and the second switch M2 are P-channel switches, the first switch M1 is turned on when the second control signal input to the gate of the first switch M1 is low and the branch in the conversion module 104 connected in series with the first switch M1 is turned on to output the first operating voltage to the source of the first switch M1. Similarly, the second switch M2 is turned on when the first control signal input to the gate of the second switch M2 is low and the branch in the conversion module 104 connected in series with the second switch M2 is turned on to output the first operating voltage to the source of the second switch M2.
[0102] It is worth noting that since each branch in the pull-up module 101 connected in series with the first control unit 102 and / or the second control unit 103 can include a switching transistor, connecting the branch in series with the first switching transistor M1 and the first control unit 102 in the pull-up module 101, and connecting the branch in series with the second switching transistor M2 and the second control unit 103 in the pull-up module 101, can increase the width-to-length ratio of the switching transistors in each branch of the pull-up module 101, thereby reducing the pull-up capability of the pull-up module 101.
[0103] This allows the pull-up module 101 to turn off more quickly, thereby avoiding the problem that the output signal cannot switch from low voltage to high voltage when the first control signal and / or the second control signal are switching between high and low levels.
[0104] In one possible implementation, referring to Figure 4, the conversion module 104 includes a third switch M3 and a fourth switch M4.
[0105] The gate of the third switch M3 is set to receive the second operating voltage, the source of the third switch M3 is set to receive the first control signal, and the drain of the third switch M3 is connected to the second terminal of the first control unit 102.
[0106] The gate of the fourth switch M4 is set to receive the second operating voltage, the source of the fourth switch M4 is set to receive the second control signal, and the drain of the fourth switch M4 is connected to the second terminal of the second control unit 103.
[0107] The third switch M3 is configured to turn on when the first control signal meets the first preset voltage and turn off when the first control signal meets the second preset voltage.
[0108] The fourth switch M4 is configured to turn on when the second control signal satisfies the first preset voltage and turn off when the first control signal satisfies the second preset voltage.
[0109] In some embodiments, both the third switch M3 and the fourth switch M4 can be N-channel switches, such as NMOS transistors or any other possible switches. Furthermore, considering cost reduction, NMOS transistors may be preferred. This disclosure does not limit this choice.
[0110] In some implementations, the dimensions and other possible parameters of the third switch M3 and the fourth switch M4 can be the same. This ensures that the switching speed and other performance of the third switch M3 and the fourth switch M4 are the same or similar, thereby improving the symmetry and stability of the circuit 100.
[0111] In some embodiments, the first preset voltage is less than the second preset voltage. Specifically, the first preset voltage may refer to a voltage whose difference from the second operating voltage satisfies the turn-on threshold of the third switch M3 and the fourth switch M4. Furthermore, the second preset voltage may refer to a voltage whose difference from the second operating voltage does not satisfy the turn-on threshold of the third switch M3 and the fourth switch M4. This is specifically determined by the parameters of each device in circuit 100 and / or the voltage level of each signal, and this disclosure does not limit this aspect.
[0112] It is worth noting that since both the third switch M3 and the fourth switch M4 are N-channel switches, and the second operating voltage (1.8V) is applied to the gate of both the third switch M3 and the gate of the fourth switch M4, when the first control signal is high (1.8V) and the second control signal is low (0V), the voltage difference between the source and gate of the fourth switch M4 can meet the turn-on threshold of the fourth switch M4, while the voltage difference between the source and gate of the third switch M3 does not meet the turn-on threshold of the third switch M3. At this time, the fourth switch M4 is turned on and the third switch M3 is turned off, and the voltage of the output node is pulled down to 0.
[0113] Similarly, when the second control signal is high (1.8V) and the first control signal is low (0V), the voltage difference between the source and gate of the third switch M3 can meet the turn-on threshold of the third switch M3, while the voltage difference between the source and gate of the fourth switch M4 does not meet the turn-on threshold of the fourth switch M4. At this time, the third switch M3 is turned on and the fourth switch M4 is turned off, and the voltage of the aforementioned control node OUTN is pulled down to 0.
[0114] In this way, the conduction or cutoff of each branch in the conversion module 104 can be reliably and accurately controlled based on the first control signal and the second control signal, thereby facilitating the operation of other devices in the control circuit 100.
[0115] It is worth noting that in the circuit 100 provided in this embodiment, since the sources of the third switch M3 and the fourth switch M4 are respectively set to input the first control signal and the second control signal, and are not directly grounded, the third switch M3 and the fourth switch M4 in this embodiment have a certain clamping capability. That is, during the process of the first control signal and the second control signal changing from high level to low level, the third switch M3 and the fourth switch M4 will start slowly instead of being directly turned on.
[0116] Furthermore, because the first control unit 102 and the second control unit 103 reduce the pull-up capability of the pull-up module 101, resulting in a faster turn-off speed, when the first control signal and / or the second control signal toggle between high and low levels, the third switch M3 and the fourth switch M4 start up more slowly, and the pull-up module 101 turns off more quickly. This further reduces the likelihood of the third switch M3 and the branch in the pull-up module 101 connected in series with the first control unit 102 simultaneously being turned on, as well as the fourth switch M4 and the branch in the pull-up module 101 connected in series with the second control unit 103 simultaneously being turned on.
[0117] This can further improve the reliability of level conversion.
[0118] In one possible implementation, referring to Figure 4, the pull-up module 101 includes a fifth switch M5 and a sixth switch M6.
[0119] The source of the fifth switch M5 is set to receive the first operating voltage, the drain of the fifth switch M5 is connected to the first terminal of the first control unit 102, and the gate of the fifth switch M5 is connected to the second terminal of the second control unit 103 and the drain of the fourth switch M4, respectively.
[0120] The source of the sixth switch M6 is set to receive the first operating voltage, the drain of the sixth switch M6 is connected to the first terminal of the second control unit 103, and the gate of the sixth switch M6 is connected to the second terminal of the first control unit 102 and the drain of the third switch M3, respectively.
[0121] The fifth switch M5 is configured to be turned off when the fourth switch M4 is turned off and turned on when the fourth switch M4 is turned on, so as to output the first operating voltage to the first control unit 102.
[0122] The sixth switch M6 is configured to be turned off when the third switch M3 is turned off and turned on when the third switch M3 is turned on, so as to output the first operating voltage to the first control unit 102.
[0123] In some embodiments, both the fifth switch M5 and the sixth switch M6 can be P-channel switches, such as PMOS transistors or any other possible switches. Furthermore, considering cost reduction, PMOS transistors may be preferred. This disclosure does not limit this choice.
[0124] In some implementations, the dimensions and other possible parameters of the fifth switch M5 and the sixth switch M6 can be the same. This ensures that the switching speed and other performance of the fifth switch M5 and the sixth switch M6 are the same or similar, thereby improving the symmetry and stability of the circuit 100.
[0125] It is worth noting that since both the fifth switch M5 and the sixth switch M6 are P-channel switches, and the gate of the fifth switch M5 is connected to the second terminal of the second control unit 103 (i.e., the aforementioned output node), when the fourth switch M4 is turned on and the voltage of the output node is pulled low, the gate voltage of the fifth switch M5 is low and the source voltage is high. This satisfies the turn-on threshold of the fifth switch M5, and the fifth switch M5 turns on. When the fourth switch M4 is turned off and the voltage of the output node is not pulled low, the voltage difference between the gate and source of the fifth switch M5 does not meet the turn-on threshold of the fifth switch M5, and the fifth switch M5 turns off.
[0126] Similarly, the gate of the sixth switch M6 is connected to the second terminal of the first control unit 102 (i.e., the aforementioned control node). Therefore, when the third switch M3 is turned on and the voltage of the control node is pulled low, the gate voltage of the sixth switch M6 is low and the source voltage is high, which satisfies the turn-on threshold of the sixth switch M6, and the sixth switch M6 is turned on. When the third switch M3 is turned off and the voltage of the control node is not pulled low, the voltage difference between the gate and source of the sixth switch M6 does not satisfy the turn-on threshold of the sixth switch M6, and the sixth switch M6 is turned off.
[0127] It should be understood that when the fifth switch M5 is turned on, the first operating voltage can be output to the first switch M1 through the fifth switch M5, and at this time the second control signal should be at a low level. Therefore, the first switch M1 is turned on.
[0128] Similarly, when the sixth switch M6 is turned on, the first operating voltage can be output to the second switch M2 through the sixth switch M6, and at this time the first control signal should be at a low level, so the second switch M2 is turned on.
[0129] It is worth noting that since the fifth switch M5, the sixth switch M6, the first switch M1, and the second switch M2 are all P-channel switches, and the fifth switch M5 and the first switch M1 are connected in series, and the sixth switch M2 and the second switch M2 are connected in series, the width-to-length ratio of the fifth switch M5, the sixth switch M6, the first switch M1, and the second switch M2 will all be increased, resulting in a faster turn-off speed. In other words, when the first control signal flips from high to low and the second control signal flips from low to high, the fifth switch M5 and / or the first switch M1 have already been quickly turned off before the fourth switch M4 has been turned on.
[0130] This avoids the problem of the fifth switch M5, the first switch M1, and the fourth switch M4 being turned on simultaneously, which would prevent the output signal from switching from low voltage to high voltage.
[0131] In one possible implementation, referring to Figure 5, the level conversion circuit 100 further includes a level adjustment module 105.
[0132] The first terminal of the level adjustment module 105 is set to input an initial level signal, the second terminal of the level adjustment module 105 is connected to the third terminal of the conversion module 104, and the third terminal of the level adjustment module 105 is connected to the fourth terminal of the conversion module 104.
[0133] The level adjustment module 105 is configured to convert the initial level signal into the second control signal and the first control signal, and output the second control signal and the first control signal to the conversion module 104 respectively.
[0134] In some implementations, the initial level signal can be a digital logic level signal output by any possible device or apparatus, and the initial level signal can also be a rectangular wave signal. Specifically, the level adjustment module 105 can be input from the IN port shown in FIG5, but this disclosure does not limit this embodiment.
[0135] It is understood that the purpose of converting the initial level signal into the first control signal and the second control signal can be achieved in various ways, therefore the level adjustment module 105 can also have different interfaces. The following are several possible implementation methods provided by embodiments of this disclosure:
[0136] In the first possible configuration, referring to Figure 5, the level adjustment module 105 includes a first inverter INV1 and a second inverter INV2. The input terminal of the first inverter INV1 is set to receive the initial level signal, the first power supply terminal of the first inverter INV1 is set to receive the second operating voltage, the second power supply terminal of the first inverter INV1 is grounded, and the output terminal of the first inverter INV1 is connected to the input terminals of the conversion module 104 and the second inverter INV2, respectively.
[0137] The first power supply terminal of the second inverter INV2 is set to input the second operating voltage, the second power supply terminal of the second inverter INV2 is grounded, and the output terminal of the second inverter INV2 is connected to the conversion module 104.
[0138] In some embodiments, the first inverter INV1 is configured to convert the initial level signal into the first control signal and output the first control signal to the input of the second inverter INV2 and the conversion module 104. The second inverter INV2 is configured to convert the first control signal into the second control signal and output the second control signal to the conversion module 104.
[0139] In this case, the initial level signal and the second control signal can have the same phase and period, while the initial level signal and the first control signal have opposite phase and the same period.
[0140] Specifically, the first inverter INV1 and the second inverter INV2 can output control signals to different branches in the conversion module 104, but this embodiment does not limit this.
[0141] It should be understood that, referring to Figure 5, although the output of the first inverter INV1 is connected to the third terminal (source of the third switch) of the conversion module 104 and the output of the second inverter INV2 is connected to the fourth terminal (source of the fourth switch M4) of the conversion module 104, the structure shown in Figure 5 is merely an example. In practical applications, the output of the first inverter INV1 can also be connected to the fourth terminal (source of the fourth switch M4) of the conversion module 104 and the output of the second inverter INV2 can be connected to the third terminal (source of the third switch M3) of the conversion module 104. It is only necessary to ensure that the control signals output to the third switch M3 and the fourth switch M4 are inverted and have the same period; this embodiment does not limit this.
[0142] In addition, since the first switch M1 also needs to input the second control signal and the second switch M2 also needs to input the first control signal, the output terminal of the first inverter INV1 can be connected to the gate of the second switch M2 and the output terminal of the second inverter INV2 can be connected to the gate of the first switch M1 simultaneously, as shown in Figure 5, so as to synchronously output the corresponding control signals to the first switch M1 and the second switch M2.
[0143] To more clearly and understandably describe the working principle of the circuit 100 in the embodiments of this disclosure, the following explanation is based on the specific connection relationship of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the fifth switch M5, and the sixth switch M6 shown in Figures 4 and 5.
[0144] For example, continuing to refer to Figure 5, when the input initial level signal is low (0V), the first inverter INV1 outputs a high level (1.8V), and the second inverter INV2 outputs a low level (0V). At this time, since the third switch M3 and the fourth switch M4 are N-channel switches, the third switch M3 is turned off and the fourth switch M4 is turned on, causing the voltage of the output node to be pulled down to 0V. Because the fifth switch M5 and the first switch M1 are P-channel switches, the gate voltage of the fifth switch M5 is 0V and the source voltage is the first operating voltage (5V). Therefore, the fifth switch M5 is turned on, outputting the first operating voltage to the source of the first switch M1. Since the gate of the first switch M1 is the second control signal (0V), the first switch M1 is turned on, causing the voltage of the control node OUTN to be 5V. Since the sixth switch M6 and the second switch M2 are P-channel switches, the gate voltage of the sixth switch M6 is 5V. When the sixth switch M6 is turned off, the second switch M2 is also turned off, and the voltage of the output node remains at 0V.
[0145] When the initial input signal is high (1.8V), the first inverter INV1 outputs low (0V), and the second inverter INV2 outputs high (1.8V). At this time, since the third switch M3 and the fourth switch M4 are N-channel switches, the third switch M3 is turned on and the fourth switch M4 is turned off, causing the voltage of the control node OUTN to be pulled down to 0V. Because the sixth switch M6 and the second switch M2 are P-channel switches, the gate voltage of the sixth switch M6 is 0V, and the source voltage is the first operating voltage (5V). Therefore, the sixth switch M6 is turned on, outputting the first operating voltage to the source of the second switch M2. Since the gate of the second switch M2 is the first control signal (0V), the second switch M2 is turned on, making the voltage of the output node 5V. Since the fifth switch M5 and the first switch M1 are P-channel switches, the gate voltage of the fifth switch M5 is 5V. When the fifth switch M5 is turned off, the first switch M1 is also turned off, and the voltage of the control node remains at 0V.
[0146] Based on the above working principle, this embodiment also provides a possible signal timing diagram, as shown in Figure 6. It can be seen that when the initial level signal input from the IN port is low (0V), the target level output from the output node is also low (0V). When the initial level signal input from the IN port is high (1.8V), the target level output from the output node is high (5V).
[0147] In this way, the purpose of converting the low-pressure domain into the high-pressure domain can be achieved.
[0148] In the second possible approach, referring to Figure 7, the level adjustment module 105 includes: a third inverter INV3.
[0149] The input terminal of the third inverter INV3 is set to receive the initial level signal, the first power supply terminal of the third inverter INV3 is set to receive the second operating voltage, the second power supply terminal of the third inverter INV3 is grounded, and the output terminal of the third inverter INV3 is connected to the third or fourth terminal of the conversion module 104.
[0150] The third inverter INV3 is set to adjust the potential of the initial level signal and output the adjusted level signal to the conversion module 104.
[0151] In some implementations, the third inverter INV3 specifically reverses the potential of the initial level signal. At any given moment, if the initial level signal is high, then the adjusted level signal is low; if the initial level signal is low, then the adjusted level signal is high. That is, the adjusted level signal is inverted compared to the initial level signal.
[0152] It should be understood that if the output of the third inverter INV3 is connected to the third terminal of the conversion module 104, then the initial level signal can also be directly input to the fourth terminal of the conversion module 104. In this case, the initial level signal can be the second control signal, and the adjusted level signal can be the first control signal.
[0153] If the output of the third inverter INV3 is connected to the fourth terminal of the conversion module 104, then the initial level signal can also be directly input to the third terminal of the conversion module 104. In this case, the initial level signal can be the first control signal, and the adjusted level signal can be the second control signal.
[0154] In other words, the third inverter INV3 can output the adjusted level signal to the third terminal of the conversion module 104, or it can output the adjusted level signal to the fourth terminal of the conversion module 104. It is only necessary to ensure that the control signals output to the third switch M3 and the fourth switch M4 are inverted level signals with the same period; this embodiment does not impose any limitations on this.
[0155] Furthermore, since the first switch M1 also requires the second control signal and the second switch M2 also requires the first control signal, the output terminal of the third inverter INV3 can be connected to the gate of one of the first and second switch M1, as shown in the figure above. Additionally, it can be directly connected to the gate of the other switch between the first and second switch M2, depending on the actual situation, to synchronously output corresponding control signals to both the first and second switch M1 and M2. This disclosure does not limit the scope of the embodiments described herein.
[0156] As can be seen from the above, the embodiments of this disclosure provide multiple methods to output the first control signal and the second control signal to the circuit 100, so as to stably and reliably control the conduction or cutoff of each switching transistor in the circuit 100. In this way, the flexibility and practicality of the circuit 100 can be improved.
[0157] In one possible implementation, referring to Figure 8, circuit 100 also includes a buffer 106.
[0158] The input terminal of buffer 106 is connected to the output node, the first output terminal of buffer 106 is set to output a first voltage, and the second output terminal of buffer 106 is set to output a second voltage.
[0159] In some implementations, the first voltage and the second voltage are at opposite potentials.
[0160] For example, continuing to refer to Figure 8, the buffer 106 may include a fourth inverter INV4 and a fifth inverter INV5.
[0161] Specifically, the input terminal of the fourth inverter INV4 is connected to the output node, and the output terminal of the fourth inverter INV4 is connected to the input terminal of the fifth inverter INV5. The first power supply terminals of the fourth inverter INV4 and the fifth inverter INV5 are respectively set to input the aforementioned first operating voltage, and the second power supply terminals of the fourth inverter INV4 and the fifth inverter INV5 are respectively grounded.
[0162] In addition, the output of the fourth inverter INV4 can also be connected to each of the first power-consuming units, and the output of the fifth inverter INV5 can also be connected to each of the second power-consuming units.
[0163] In some implementations, the first power-consuming unit and the second power-consuming unit require opposite potentials at the same time.
[0164] Understandably, since some electronic devices may have multiple different power loads or power units that require the target level, but each power unit may require different phases or different potentials at the same time, setting the fourth inverter INV4 and the fifth inverter INV5 can obtain two signals with different phases based on the target level. Then, the signals output from the fourth inverter INV4 and the fifth inverter INV5 can be output to different power units respectively to meet the different needs of each power unit in the electronic device. In addition, the buffer 106 also has a certain amplification capability, thus the buffer 106 can also enhance the driving capability of the target level.
[0165] This improves the practicality and flexibility of circuit 100.
[0166] The following describes the electronic device provided in this disclosure used for execution. This electronic device belongs to the same concept as the level conversion circuit described above. For its specific implementation process and technical effects, please refer to the relevant description in the corresponding embodiment of the level conversion circuit described above. It will not be repeated in detail below.
[0167] This disclosure also provides an electronic device that includes at least the level conversion circuit 100 provided in any of the above embodiments.
[0168] In some embodiments, the electronic device may further include a power supply module, which may be configured to output the first operating voltage and / or the second operating voltage to the level conversion circuit 100.
[0169] In some embodiments, the electronic device may also include any possible power-consuming units, and the target level output by the level conversion circuit 100 may be output to these power-consuming units in order to power each power-consuming unit.
[0170] In addition, the electronic device may also include any other possible devices or apparatus, which are not limited in this disclosure.
[0171] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.
[0172] The above description is merely a preferred embodiment of this disclosure and is not intended to limit this disclosure. Various modifications and variations can be made to this disclosure by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.
Claims
1. A level conversion circuit, the level conversion circuit comprising: Pull-up module, conversion module, first control unit and second control unit; The first and second ends of the pull-up module are respectively set to input a first working voltage, the third end of the pull-up module is connected to the first end of the first control unit, and the fourth end of the pull-up module is connected to the first end of the second control unit. The first and second terminals of the conversion module are respectively configured to input a second operating voltage, the third terminal of the conversion module is configured to input a first control signal, and the fourth terminal of the conversion module is configured to input a second control signal; the conversion module is configured to control the pull-up module to output the first operating voltage to the first control unit or the second control unit; The second terminal of the first control unit is connected to the fifth terminal of the conversion module, and the third terminal of the first control unit is configured to input the second control signal; the first control unit is configured to be turned on under the action of the second control signal and the first operating voltage. The second terminal of the second control unit is connected to the sixth terminal of the conversion module, and the third terminal of the second control unit is configured to input the first control signal; the second terminal of the second control unit is also configured to serve as the output node of the level conversion circuit. The second control unit is configured to be turned on under the action of the first control signal and the first operating voltage, and to output a target level through the output node when turned on; The first control unit and the second control unit are specifically configured to reduce the pull-up capability of the pull-up module.
2. The level conversion circuit as described in claim 1, wherein, The first control unit is a first switching transistor, and the second control unit is a second switching transistor; The source of the first switching transistor is connected to the third terminal of the pull-up module, the drain of the first switching transistor is connected to the fifth terminal of the conversion module, and the gate of the first switching transistor is configured to input the second control signal. The source of the second switch is connected to the fourth terminal of the pull-up module, the drain of the second switch is connected to the sixth terminal of the conversion module, and the gate of the second switch is configured to input the first control signal.
3. The level conversion circuit as described in claim 1, wherein, The conversion module includes a third switch and a fourth switch; The gate of the third switch is configured to receive the second operating voltage, the source of the third switch is configured to receive the first control signal, and the drain of the third switch is connected to the second terminal of the first control unit; the third switch is configured to be turned on when the first control signal meets the first preset voltage and turned off when the first control signal meets the second preset voltage. The gate of the fourth switch is configured to receive the second operating voltage, the source of the fourth switch is configured to receive the second control signal, and the drain of the fourth switch is connected to the second terminal of the second control unit; the fourth switch is configured to be turned on when the second control signal satisfies the first preset voltage and turned off when the first control signal satisfies the second preset voltage. The first preset voltage is less than the second preset voltage.
4. The level conversion circuit as described in claim 3, wherein, The pull-up module includes a fifth switch and a sixth switch; The source of the fifth switch is configured to receive the first operating voltage, the drain of the fifth switch is connected to the first terminal of the first control unit, and the gate of the fifth switch is connected to the second terminal of the second control unit and the drain of the fourth switch, respectively. The fifth switch is configured to be turned off when the fourth switch is turned off and turned on when the fourth switch is turned on to output the first operating voltage to the first control unit. The source of the sixth switch is configured to receive the first operating voltage, the drain of the sixth switch is connected to the first terminal of the second control unit, and the gate of the sixth switch is connected to the second terminal of the first control unit and the drain of the third switch, respectively. The sixth switch is configured to be turned off when the third switch is turned off and turned on when the third switch is turned on to output the first operating voltage to the first control unit.
5. The level conversion circuit as described in claim 1, wherein, The level conversion circuit further includes: a level adjustment module; The first terminal of the level adjustment module is set to input an initial level signal, the second terminal of the level adjustment module is connected to the third terminal of the conversion module, and the third terminal of the level adjustment module is connected to the fourth terminal of the conversion module. The level adjustment module is configured to convert the initial level signal into the second control signal and the first control signal, and output the second control signal and the first control signal to the conversion module respectively.
6. The level conversion circuit as described in claim 5, wherein, The level adjustment module includes: a first inverter and a second inverter; the input terminal of the first inverter is configured to input the initial level signal, the first power supply terminal of the first inverter is configured to input the second operating voltage, the second power supply terminal of the first inverter is grounded, and the output terminal of the first inverter is connected to the conversion module and the input terminal of the second inverter respectively; the first inverter is configured to convert the initial level signal into the first control signal. The first power supply terminal of the second inverter is set to input the second operating voltage, the second power supply terminal of the second inverter is grounded, and the output terminal of the second inverter is connected to the conversion module; the second inverter is configured to convert the first control signal into the second control signal.
7. The level conversion circuit as described in claim 5, wherein, The level adjustment module includes: a third inverter; The input terminal of the third inverter is set to input the initial level signal, the first power supply terminal of the third inverter is set to input the second operating voltage, the second power supply terminal of the third inverter is grounded, and the output terminal of the third inverter is connected to the third or fourth terminal of the conversion module. The third inverter is configured to adjust the potential of the initial level signal and output the adjusted level signal to the conversion module.
8. The level conversion circuit as described in claim 1, wherein, The circuit also includes a buffer; The input terminal of the buffer is connected to the output node, the first output terminal of the buffer is configured to output a first voltage, and the second output terminal of the buffer is configured to output a second voltage; The first voltage and the second voltage have opposite potentials.
9. The level conversion circuit according to any one of claims 1-8, wherein, The voltage level of the first operating voltage is greater than the voltage level of the second operating voltage; The first control signal has an opposite potential to the second control signal.
10. An electronic device comprising the level conversion circuit according to any one of claims 1 to 9.