Switching of direct currents

The hybrid switching arrangement with an electromechanical and semiconductor unit addresses the challenge of arc formation in direct current switching by using a semiconductor unit to manage the current path, ensuring safe and reliable switching.

WO2026098903A1PCT designated stage Publication Date: 2026-05-15SIEMENS AG
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
SIEMENS AG
Filing Date
2025-10-14
Publication Date
2026-05-15

AI Technical Summary

Technical Problem

Switching off direct currents is complicated by the absence of a natural zero crossing, leading to arc formation during contact opening in existing technologies.

Method used

A hybrid switching arrangement using an electromechanical first switch with a parallel circuit of an electromechanical second switch and a semiconductor switching unit, where the semiconductor unit is activated based on a monotonically increasing voltage across the second switch, ensuring the current path is closed and opened by the semiconductor unit to prevent arc formation.

Benefits of technology

Prevents contact bounce and arc formation by using the semiconductor switching unit to manage the current path, meeting standards for safe and reliable switching of direct currents.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a hybrid switching arrangement (1) for switching direct currents. The switching arrangement (1) comprises an electromechanical first switch (S1) and a parallel circuit, connected in series with the first switch (S1), of an electromechanical second switch (S2) which closes and opens with a time delay with respect to the first switch (S1), and of a semiconductor switching unit (11) which has a conducting state and a blocking state. The switching arrangement (1) additionally comprises a comparator unit (13), which is designed to compare a reference voltage with a measurement voltage that monotonically increasingly depends on a voltage across the second switch (S2), and a control unit (15), which is designed to put the semiconductor switching unit (11) into the conducting state when the switches (S1, S2) are closed when the measurement voltage falls below the reference voltage, and to put the semiconductor switching unit into the conducting state when the switches (S1, S2) are opened before the second switch (S2) is opened and into the blocking state after the second switch (S2) is opened while the first switch (S1) is still closed.
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Description

[0001] 2024P13177 DE

[0002] 1

[0003] Description

[0004] Switching of direct currents

[0005] The invention relates to a hybrid switching arrangement and a method for switching direct currents.

[0006] Direct current (DC) networks are becoming increasingly important in low-voltage applications. They are now used not only for powering railways, as before, but also for photovoltaic systems, battery storage, fast-charging stations for electric vehicles, and in industrial applications. Numerous research projects, such as "DC Industrie," demonstrate the advantages of DC networks.

[0007] Such networks require devices for switching direct currents. Switching off direct currents is complicated by the fact that, unlike alternating current, direct current does not have a natural zero crossing that, for example, extinguishes arcs that occur when switching contacts open.

[0008] The invention is based on the objective of providing an improved switching arrangement and an improved method for switching direct currents.

[0009] The problem is solved according to the invention by a switching arrangement with the features of claim 1 and a method with the features of claim 11.

[0010] Advantageous embodiments of the invention are the subject of the dependent claims.

[0011] A hybrid switching arrangement according to the invention for switching direct currents comprises

[0012] - an electromechanical first switch,

[0013] - a parallel circuit connected in series with the first switch, comprising an electromechanical second switch which closes automatically with a time delay after the first switch closes and opens automatically before the first switch opens, and a semiconductor switching unit which has a forward state in which it conducts for direct currents of at least one direction and a reverse state in which it blocks direct currents of both directions,

[0014] - a comparator unit that is set up to provide a reference voltage with a measuring voltage 2024P13177 DE

[0015] 2 to compare, which depends monotonically increasing on a voltage across the second switch, and

[0016] - A control unit configured to put the semiconductor switching unit into the on-state when the switches are closed if the measured voltage falls below the reference voltage, and to put it into the on-state before the second switch opens when the switches are opened, and into the off-state after the second switch opens while the first switch is still closed. The voltage across the second switch is understood to be the magnitude of the voltage drop across the second switch.

[0017] According to the invention, the semiconductor switching unit is activated (switched on) by the control unit when the switches are closed, i.e., put into the on-state, when the measured voltage falls below the reference voltage. The measured voltage thus triggers the control unit. Since the measured voltage increases monotonically with the voltage across the second switch, the voltage across the second switch also triggers the control unit; that is, the semiconductor switching unit is activated by the control unit when the voltage across the second switch falls below a threshold value that depends on the reference voltage.

[0018] The invention takes advantage of the fact that the second switch closes only after the first switch has closed, requires a certain amount of time to close during which the voltage across it decreases, and switches significantly slower than the semiconductor switching unit. Since the semiconductor switching unit is activated during the closing of the second switch, it therefore closes the current path in which the switching arrangement is located after the first switch has closed and before the second switch has finished closing (provided the reference voltage is not chosen to be too low).

[0019] Because the semiconductor switching unit is only activated after the first switch is closed, contact bounce of the first switch is prevented, since it is not the first switch, but the semiconductor switching unit that closes the current path. In particular, the first switch does not draw any arcs when closing, which can occur during contact bounce. Furthermore, the current path is closed and opened by the same element, namely the semiconductor switching unit, since when the switches are opened, the current path is only interrupted by deactivating the semiconductor switching unit, i.e., by switching it into the blocking state. Thus, the switching arrangement meets standards that require precisely this: the closing and opening of the current path by the same element. 2024P13177 DE

[0020] 3

[0021] In one embodiment of the switching arrangement according to the invention, the semiconductor switching unit has at least one self-blocking semiconductor switch.

[0022] In a further embodiment of the switching arrangement according to the invention, the semiconductor switching unit is conductive in the forward state for direct currents of both directions. In this case, the semiconductor switching unit has, for example, two anti-series connected, self-blocking semiconductor switches. The anti-series connection of self-blocking semiconductor switches enables the blocking of direct currents of both directions.

[0023] For example, every semiconductor switch is an IGBT (abbreviation for Insulated-Gate Bipolar Transistor) with an antiparallel connected diode, a bipolar transistor, or a field-effect transistor, such as a MOSFET (abbreviation for Metal-Oxide-Semiconductor Field-Effect Transistor).

[0024] In a further embodiment of the switching arrangement according to the invention, the comparator unit comprises a comparator with a first input, to which the reference voltage is applied, and a second input, to which the measurement voltage is applied. The comparator is configured to output a binary signal that assumes a first value if the measurement voltage falls below the reference voltage, and otherwise assumes a second value. For example, the comparator is configured to output the signal to the control unit. The comparator enables a simple and cost-effective comparison of the measurement voltage with the reference voltage.

[0025] In a further embodiment of the switching arrangement according to the invention, the comparator unit comprises a first voltage divider of a supply voltage with a first ohmic resistor and a second ohmic resistor, and the reference voltage is generated by the first voltage divider as a partial voltage of the supply voltage. This allows the reference voltage to be generated in a simple and cost-effective manner by a voltage divider.

[0026] In a further embodiment of the switching arrangement according to the invention, the comparator unit comprises a diode and a second voltage divider of the supply voltage with a third ohmic resistor and a fourth ohmic resistor. A series connection of the diode and the second switch is connected in parallel with the fourth ohmic resistor, and a measuring tap of the second voltage divider is connected between the third ohmic resistor and the fourth ohmic resistor. 2024P13177 DE

[0027] The fourth ohmic resistor is connected to the second input of the comparator. This configuration of the comparator unit allows the measurement voltage to be generated via the second voltage divider and the series connection of the diode and the second switch in parallel with one of the ohmic resistors of the second voltage divider. The diode protects the comparator from overvoltages when the second switch and the semiconductor switching unit are open, and when the second switch and / or the semiconductor switching unit are open, it allows current to flow through a measurement current path via the third ohmic resistor, the diode, and the second switch and / or the semiconductor switching unit. The measurement voltage is tapped at the measurement point of the second voltage divider and fed to the comparator by connecting its second input to the measurement point.

[0028] In a further embodiment of the switching arrangement according to the invention, a surge arrester is connected in parallel to the semiconductor switching unit. This protects the semiconductor switching unit from overvoltages, particularly during its deactivation.

[0029] The method according to the invention relates to switching direct currents with an electromechanical first switch and a parallel circuit of an electromechanical second switch and a semiconductor switching unit connected in series with the first switch. The second switch closes automatically with a time delay after the first switch closes and opens automatically with a time delay before the first switch opens. The semiconductor switching unit has a forward state in which it conducts for direct currents in at least one direction and a reverse state in which it blocks direct currents in both directions.When the switches are closed, a reference voltage is compared to a measurement voltage, which is monotonically increasing and depends on the voltage across the second switch. The semiconductor switching unit is switched on when the measurement voltage falls below the reference voltage. When the switches are opened, the semiconductor switching unit is switched on before the second switch opens and off after the second switch opens while the first switch is still closed.

[0030] The features of the method according to the invention correspond to the features of a switching arrangement according to the invention. Therefore, the advantages of the method according to the invention also correspond to the aforementioned advantages of a switching arrangement according to the invention. 2024P13177 DE

[0031] 5

[0032] The properties, features, and advantages of this invention described above, as well as the manner in which they are achieved, will become clearer and more readily understandable in connection with the following description of exemplary embodiments, which are explained in more detail in conjunction with the drawings. These drawings show:

[0033] FIG 1 two electromechanical switches of an embodiment of a switching arrangement according to the invention,

[0034] FIG 2 shows a circuit diagram of an embodiment of a switching arrangement according to the invention for switching direct currents with switches shown in Figure 1,

[0035] FIG 3 shows a flowchart of an embodiment of the method according to the invention when closing the switches of the switching arrangement shown in Figure 2,

[0036] FIG 4 shows a flowchart of an embodiment of the method according to the invention when opening the switches of the switching arrangement shown in Figure 2.

[0037] Corresponding parts are marked with the same reference symbols in the figures.

[0038] Figure 1 (FIG 1) shows a first electromechanical switch S1 and a second electromechanical switch S2 of an embodiment of a switching arrangement 1 according to the invention (see Figure 2). Each switch S1, S2 is a switch of a conventional electromechanical contactor 2 with an electromagnet (not shown). To close the contactor 2, the electromagnet is energized with a control current. The electromagnet then generates a magnetic field through which an armature of the contactor 2 is moved. The armature is connected to switching contacts 3, 5 of the switches S1, S2, which are moved by the movement of the armature to a fixed mating contact 7, 9, thereby closing the switches S1, S2.To open the contactor 2, the control current of the electromagnet is switched off and, by a restoring force of a (also not shown) spring of the contactor 2, the armature and thus also the switching contacts 3, 5 are moved back to their initial positions.

[0039] The switching contacts 3 of the first switch S1 have a distance a from their respective mating contact 7 that is smaller by a distance difference H than the distance b of the switching contacts 5 of the second switch S2 from their respective mating contact 9. Therefore, when switches S1 and S2 are closed, the second switch S2 automatically closes later than 2024P13177 DE

[0040] 6. The first switch S1. When switches S1 and S2 are opened, the second switch S2 automatically opens earlier than the first switch S1. Therefore, the two switches S1 and S2 open and close with a time delay.

[0041] Figure 2 (FIG 2) shows a circuit diagram of an embodiment of a hybrid switching arrangement 1 according to the invention for switching direct currents. The switching arrangement 1 comprises the switches S1, S2, a semiconductor switching unit 11, a comparator unit 13, a current measuring unit 14, a control unit 15 and a surge arrester 16 shown in Figure 1.

[0042] The semiconductor switching unit 11 is connected in parallel to the second switch S2. The parallel connection of the second switch S2 and the semiconductor switching unit 11 is connected in series with the first switch S1.

[0043] The semiconductor switching unit 11 comprises two anti-series connected, self-blocking semiconductor switches 17. In the embodiment shown in Figure 2, each semiconductor switch 17 is an IGBT with an anti-parallel diode. In other embodiments, the semiconductor switching unit 11 can comprise other semiconductor switches 17, for example, MOSFETs. The semiconductor switching unit 11 has a forward state, in which it conducts for direct currents in both directions, and a reverse state, in which it blocks direct currents in both directions. In the forward state, the two semiconductor switches 17 are switched on; in the reverse state, the two semiconductor switches 17 are switched off.

[0044] The comparator unit 13 is configured to compare a reference voltage with a measuring voltage that is monotonically increasing and depends on a voltage across the second switch S2. In the embodiment shown in Figure 2, the comparator unit 13 comprises, for this purpose, a comparator 19, a first voltage divider 21, a second voltage divider 23, and a diode 25.

[0045] The first voltage divider 21 has a first ohmic resistance R1 and a second ohmic resistance R2 and divides a supply voltage U between a first terminal 35 and a grounded second terminal 37 of the comparator unit 13 in proportion to the resistance values ​​of these resistors R1 and R2. For the following example, it is assumed that resistors R1 and R2 have the same resistance values, as shown in 2024P13177 DE.

[0046] 7 that the reference voltage is half the supply voltage U, that is, it has the value U / 2. The reference voltage is supplied to a first input 27 of the comparator 19.

[0047] The second voltage divider 23 has a third ohmic resistor R3 and a fourth ohmic resistor R4. The fourth ohmic resistor R4 is connected in parallel with a series connection of diode 25 and the second switch S2.

[0048] If a voltage higher than the supply voltage U is applied to the cathode of diode 25, for example, a DC voltage from a DC network in which the switching arrangement 1 is operated and for which diode 25 is designed to block the DC voltage, diode 25 is reverse-biased. This protects the comparator 19 from overvoltages. When the second switch S2 is closed and / or the semiconductor switching unit 17 is switched on, the voltage at the cathode of diode 25 is much lower than the supply voltage U, and a measuring current flows between terminals 35 and 37 through resistor R3 and diode 25 via the second switch S2 and / or the semiconductor switching unit 11.

[0049] A measuring tap 29 of the second voltage divider 23 between the third ohmic resistor R3 and the fourth ohmic resistor R4 is connected to a second input 31 of the comparator 19, thereby supplying a measuring voltage to the second input 31 of the comparator 19. The ratio of the resistance values ​​of the third ohmic resistor R3 and the fourth ohmic resistor R4 differs from the ratio of the resistance values ​​of the first ohmic resistor R1 and the second ohmic resistor R2. For the example of the following, it is assumed that the resistance value of the third ohmic resistor R3 and the resistance value of the fourth ohmic resistor R4 are in the ratio 1 / 10, that is, that the resistance value of the fourth ohmic resistor R4 is ten times higher than the resistance value of the third ohmic resistor R3.

[0050] The comparator 19 outputs a binary output signal 33 to the control unit 15. The output signal 33 assumes a first value if the measured voltage falls below the reference voltage, and a second value otherwise.

[0051] The current measuring unit 14 is configured to detect a current flowing through the semiconductor switching unit 11 and to output the measured signals it detects to the control unit 15. 2024P13177 DE

[0052] 8

[0053] The control unit 15 is set up to control the semiconductor switches 17 of the semiconductor switching unit 11 depending on the output signal 33 of the comparator 19 and the measurement signals of the current measuring unit 14.

[0054] Figures 3 and 4 show an embodiment of the method according to the invention with method steps 41 to 46 for switching direct currents by means of a switching arrangement 1 as described with reference to Figures 1 and 2.

[0055] Figure 3 (FIG 3) shows process steps 41, 42, 43 when closing switches S1, S2.

[0056] Before the switches S1 and S2 are closed, both switches S1 and S2 are open and the semiconductor switching unit 11 is in the locked state.

[0057] In the first process step 41, contactor 2 is switched on, meaning the control current for the electromagnet of contactor 2 is switched on. Subsequently, the first switch S1 closes, while the second switch S2 remains open. A high voltage then drops across the second switch S2.

[0058] In a second process step 42, the measuring voltage is compared with the reference voltage by the comparator 19.

[0059] In a third process step 43, the semiconductor switching unit 11 is switched to the on-state when the measuring voltage falls below the reference voltage, that is, when the output signal 33 of the comparator 19 assumes the first value.

[0060] As long as the second switch S2 is open, no current flows through the third resistor R3 and the diode 25. The voltage U / 2 is present at the first input 27 of the comparator 19 as a reference voltage, since the resistance values ​​of resistors R1 and R2 are assumed to be equal. Due to the second voltage divider 23, a voltage of approximately 0.9 - U is present at the second input 31 of the comparator 19 as a measurement voltage, since the resistance values ​​of resistors R3 and R4 are assumed to be in a ratio of 1 / 10. Therefore, with the second switch S2 open, a higher voltage is present at the second input 31 of the comparator 19 than at the first input 27. The output signal 33 of the comparator 19 thus assumes its second value. 2024P13177 DE

[0061] 9

[0062] When the second switch S2 begins to close, current can flow through diode 25 and the second switch S2 to the second terminal 37 of the comparator unit 13, and the voltage across the second switch S2 begins to decrease. The further the second switch S2 closes, the further the voltage across the second switch S2 falls, and thus the measurement voltage also decreases. As soon as the measurement voltage falls below the reference voltage, the output signal 33 of the comparator 19 jumps from its second value to its first value.

[0063] The semiconductor switching unit 11 is then switched on by the control unit 15. Since the semiconductor switches 17 switch significantly faster than the second switch S2, the semiconductor switching unit 11 is switched on before the second switch S2 is fully closed. This closes the current path in which the switching arrangement 1 is located via the first switch S1 and the semiconductor switching unit 11. Only then does the second switch S2 close, so that the current path is now closed via switches S1 and S2.

[0064] Since the fourth ohmic resistor R4 is ten times larger than the third ohmic resistor R3, the measured voltage falls below the reference voltage when the voltage across the second switch S2 is almost equal to the reference voltage.

[0065] Figure 4 (FIG 4) shows process steps 44, 45, 46 during the opening of switches S1, S2. Before the opening of switches S1, S2, both switches S1, S2 are closed, the semiconductor switching unit 11 is in the blocking state and a current flows through the first switch S1 and the second switch S2.

[0066] In a fourth process step 44, contactor 2 is switched off by disconnecting the control current of the electromagnet. Simultaneously, the semiconductor switches 17 of the semiconductor switching unit 11 are activated by the control unit 15 to set the semiconductor switching unit 11 to the on state. Since the semiconductor switches 17 switch faster than the second switch S2, the semiconductor switching unit 11 is thereby set to the on state before the second switch S2 opens.

[0067] In a fifth process step 45, the opening of the second switch S2 is detected. Since the first switch S1 is still closed after the second switch S2 opens, and the semiconductor switching unit 11 is in the on-state, a current flows through the first switch S1 and the semiconductor switching unit 11 after the second switch S2 opens. This current, and thus the opening of the second switch S2, is detected by the current measuring unit 14. The measurement signal from the current measuring unit 14 is output to the control unit 15. 2024P13177 DE

[0068] 10

[0069] In a sixth process step 46, after the second switch S2 is opened, the semiconductor switching unit 11 is switched to the off state by the control unit 15, thereby interrupting the current. Subsequently, the first switch S1 opens automatically.

[0070] Although the invention has been further illustrated and described in detail by means of preferred embodiments, the invention is not limited by the disclosed examples and other variations can be derived from them by a person skilled in the art without leaving the scope of protection of the invention.

[0071] 2024P13177 DE

[0072] Reference symbol list

[0073] 1 Switching arrangement

[0074] 2 Schütz

[0075] 3, 5 Switching contact

[0076] 7, 9 Counter-contact

[0077] 11 Semiconductor switching unit

[0078] 13 Comparator unit

[0079] 14 Current measuring unit

[0080] 15 Control unit

[0081] 16 surge arresters

[0082] 17 semiconductor switches

[0083] 19 Comparator

[0084] 21 first voltage divider

[0085] 23 second voltage divider

[0086] 25 diode

[0087] 27 first entrance

[0088] 29 Measuring tap

[0089] 31 second entrance

[0090] 33 Output signal

[0091] 35 first connection

[0092] 37 second connection

[0093] 41 to 46 Procedure step a, b Distance

[0094] H distance difference

[0095] R1 first ohmic resistor

[0096] R2 second ohmic resistor

[0097] R3 third ohmic resistor

[0098] R4 fourth ohmic resistor

[0099] 51 first switch

[0100] 52 second switch

[0101] U Supply voltage

Claims

2024P13177 DE 12 Patent claims 1. Hybrid switching arrangement (1) for switching direct currents, the switching arrangement (1) comprising - an electromechanical first switch (S1), - a parallel circuit connected in series with the first switch (S1) of an electromechanical second switch (S2), which automatically closes with a time delay after the first switch (S1) closes when the switches (S1, S2) close and automatically opens before the first switch (S1) opens when the switches (S1, S2) open, and a semiconductor switching unit (11) which has a forward state in which it is conductive for direct currents of at least one current direction and a reverse state in which it is blocking for direct currents of both current directions, - a comparator unit (13) configured to compare a reference voltage with a measurement voltage that is monotonically increasing and depends on a voltage across the second switch (S2), and - a control unit (15) configured to put the semiconductor switching unit (11) into the on-state when the switches (S1, S2) are closed if the measured voltage falls below the reference voltage, and when the switches (S1, S2) are opened, before the second switch (S2) is opened and after the second switch (S2) is opened to put switch (S2) into the locked state while the first switch (S1) is still closed.

2. Switching arrangement (1) according to claim 1, wherein the semiconductor switching unit (11) has at least one self-blocking semiconductor switch (17).

3. Switching arrangement (1) according to claim 1 or 2, wherein the semiconductor switching unit (11) is conductive in the forward state for direct currents of both current directions.

4. Switching arrangement (1) according to claim 3, wherein the semiconductor switching unit (11) comprises two anti-series connected, self-blocking semiconductor switches (17).

5. Switching arrangement (1) according to one of claims 2 to 4, wherein each semiconductor switch (17) is an IGBT with an antiparallel connected diode, a bipolar transistor or a field-effect transistor, for example a MOSFET.

6. Switching arrangement (1) according to one of the preceding claims, wherein the comparator unit (13) comprises a comparator (19) with a first input (27) to which the 2024P13177 DE 13 a reference voltage is applied, and a second input (31) to which the measurement voltage is applied, and the comparator (19) is set up to output a binary output signal (33) which takes on a first value if the measurement voltage falls below the reference voltage, and otherwise takes on a second value.

7. Switching arrangement (1) according to claim 6, wherein the comparator (19) is configured to output the output signal (33) to the control unit (15).

8. Switching arrangement (1) according to claim 6 or 7, wherein the comparator unit (13) has a first voltage divider (21) of a supply voltage (II) with a first ohmic resistance (R1) and a second ohmic resistance (R2) and the reference voltage is generated by the first voltage divider (21) as a partial voltage of the supply voltage (II).

9. Switching arrangement (1) according to one of claims 6 to 8, wherein the comparator unit (13) has a diode (25) and a second voltage divider (23) of a supply voltage (II) with a third ohmic resistor (R3) and a fourth ohmic resistor (R4), wherein a series connection of the diode (25) and the second switch (S2) is connected in parallel to the fourth ohmic resistor (R4) and a measuring tap (29) of the second voltage divider (23) between the third ohmic resistor (R3) and the fourth ohmic resistor (R4) is connected to the second input (31) of the comparator (19).

10. Switching arrangement (1) according to one of the preceding claims with a surge arrester (16) connected in parallel to the semiconductor switching unit (19).

11. Method for switching direct currents with an electromechanical first switch (S1) and a parallel circuit of an electromechanical second switch (S2) connected in series with the first switch (S1), which automatically closes after the first switch (S1) when the switches (S1, S2) close and automatically opens before the first switch (S1) opens when the switches (S1, S2) open, and a semiconductor switching unit (11) which has a forward state in which it is conductive for direct currents of at least one current direction and a reverse state in which it is blocking for direct currents of both current directions, wherein - when the switches (S1, S2) are closed, a reference voltage is compared with a measuring voltage that is monotonically increasing and depends on a voltage across the second switch (S2), and the semiconductor switching unit (11) is switched on when the 2024P13177 DE 14 The measured voltage falls below the reference voltage, and - when the switches (S1, S2) are opened, the semiconductor switching unit (11) is put into the on state before the second switch (S2) is opened and into the off state after the second switch (S2) is opened while the first switch (S1) is still closed.