Improving switching behavior by avoiding miller plateaus occurring simultaneously during switching operations of transistors of an inverter

Abstract

In a method for controlling an inverter (I) having a plurality of half-bridges (P1 - P3), a pulse pattern is to be obtained which characterizes target switching times of semiconductor switches (11 - 13, 21 - 23) of the inverter (I). Switching times (ZA, ZB) of different switches (11 - 13, 21 - 23) separated from one another by less than a minimum duration are determined as switching times (ZA, ZB) that are too close to one another, which is linked to a fault in the actuation signals of the switches (11 - 13, 21 - 23). The switches (11-13, 21-23) of the inverter (I) are controlled according to the target switching times and according to shifted switching times. The shifted switching times (ZA', ZB) are obtained by shifting the switching times that are too close to one another. The second switching times (ZA', ZB) are then temporally separated from one another by more than the specified duration. The invention also relates to a corresponding control device and to a corresponding vehicle drive.

Description

[0001] 202401002 1

[0002] Description

[0003] Improving switching behavior by avoiding simultaneous Miller plateaus in switching operations of transistors in an inverter.

[0004] It is known to equip vehicles with an electric drive system that incorporates a high-power traction inverter. Typically, this involves generating electrical signals with a power output exceeding 100 kW or 300 kW from a DC power supply, with the signals following a sinusoidal waveform through pulse-width modulation. Such a traction inverter has multiple half-bridges whose switches are alternately activated to generate a multi-phase synthetic sinusoidal voltage.

[0005] In particular, the switching edges occurring during inverter operation generate substantial power losses that need to be reduced. A well-known approach is to select and control the semiconductor switches to make the switching edge as steep as possible. This reduces, in particular, the time the respective semiconductor switch is in linear operation. Semiconductor switches such as high electron mobility MOSFETs (so-called HEMTs), SiC MOSFETs, GaN MOSFETs, or other semiconductor switches allow for particularly high current gradients at the switching edge.

[0006] However, in power applications, particularly fast switching operations of a semiconductor switch also generate oscillations, for example in the form of significant EMC disturbances or instabilities in another semiconductor switch or half-bridge of the same circuit (i.e. connected to the same supply potentials).

[0007] It is therefore an object of the invention to demonstrate a method by which switches of an inverter with high edge steepness can be switched even in high-power applications, thereby reducing the interference generated. 202401002 2

[0008] It has been recognized that disturbances in the control signals of switches can occur when the Miller regions, which occur during the switching operations of two switches, overlap in time or are not separated by a minimum duration. Miller regions are the time intervals in switching operations during which the transistors in question are on the Miller plateau. Within a Miller region, the Miller effect, or Miller capacitance, causes a time delay in the switching process. In particular, at the start of conduction in the power path of the switch (i.e., drain-source in MOSFETs) or at the start of disconnection in this power path, the subsequent switching operation is delayed due to the Miller capacitance. The rate of change or edge steepness of the (acting) control signal, such as the gate voltage, is delayed from this point onward by the Miller capacitance, thus delaying the switching operation itself.The start of conduction in the power path (during switch-on) or the start of disconnection (during switch-off) can mark the beginning of the Miller region or Miller plateau, respectively. The end of conduction (i.e., reaching the OFF state) or the end of disconnection (i.e., reaching the ON state) marks the end of the Miller region or Miller plateau, respectively. The beginning and end of the Miller region or Miller plateau are characterized by the beginning and end of the amplified effect of Miller capacitance on the switching process. The term "slope" is used here for short, referring to the magnitude of the positive or negative, signed slope. It relates to the control signal or the resulting change in resistance or conductance in the power path (drain-source).

[0009] It was recognized that the Miller region defines a time interval in which the switching operation of one switch has a particularly strong effect on the switching operation of another switch. This time interval is defined by the Miller region itself and can further encompass time intervals (of the same switching operation) in which the switching operation is not yet complete, or in which the control signal is still transient (i.e., has left the initial level and has not yet reached the final level). In summary, the Miller effect results in a disturbance-sensitive time interval within a switching operation or switching edge of a switch, in which this switching operation is particularly strongly disturbed by the switching operation of another switch.This occurs when the switches are coupled in such a way that the disturbance caused by the switching of one switch is transmitted to the other switch and can disrupt its switching operation. A coupling path can exist between the switches, through which a disturbance originating from one switch can be transmitted to another. The coupling path can be a magnetic coupling path, a capacitive coupling path, a resistive coupling path, or a coupling path provided by other transmission mechanisms. Magnetic or capacitive coupling between switches can occur due to their geometric proximity. In particular, an element on which both switches are arranged can provide a coupling or coupling path, for example, a metallic element such as a heat sink, a mounting element such as a frame, or the like.In particular, a common heat sink on which two switches are mounted can provide (capacitive) coupling between the switches. Furthermore, coupling between the switches can occur, especially when the switches are galvanically connected and, for example, connected to the same potential rails, such as switches of half-bridges that are connected in parallel (at their ends). In this case, the interference is transmitted via this exemplary connection between the switches.

[0010] It is proposed to reduce the impact of the Miller effect on another switch when one (semiconductor) switch is switched, and the resulting instability, by spacing out the switching points if they are separated by less than a minimum time interval (i.e., if a minimum interval is not maintained between the relevant Miller plateaus, or if the disturbance-sensitive time range is not free of Miller plateaus from other switches). This time interval is determined in particular by the duration of the Miller plateau and, if necessary, an additional time interval. This prevents the switching operations from strongly influencing each other due to overlapping or closely spaced Miller plateaus (or from allowing mutual interference while at least one of the switches is passing through the Miller plateau).The time span that the Miller plateau lasts is referred to here as the Miller range. However, the minimum time interval that should elapse between switching points can also be an additional 202401002 4.

[0011] These time intervals ("additional time intervals") are located either directly after the Miller region (e.g., during turn-on edges) or immediately before it (e.g., during turn-off edges). The time interval in which the mutual effects of switching operations of different switches are particularly strong can be referred to as the disturbance-sensitive time interval. If a switch has a falling switching edge (corresponding to a turn-off operation), then an additional time interval is located, in particular, immediately before the Miller region. If a switch has a rising switching edge (corresponding to a turn-on operation), then an additional time interval is located, in particular, immediately after the Miller region. The switching edge is present, in particular, in the switching signal, for example, in the gate voltage of a switch implemented as a MOSFET.When a first switch is switched off, it can be disturbed by a switching operation of a second (further) switch during the Miller cycle of the first switch and also in an additional interval before the Miller cycle. When a first switch is switched on, it can be disturbed by a switching operation of a second (further) switch during the Miller cycle of the first switch and also in an additional interval after the Miller cycle. A further additional interval can be provided after the Miller cycle when the first switch is switched off. A further additional interval can be provided before the Miller cycle when the first switch is switched on. Additional intervals can be provided before or after (and preferably before and after) the Miller cycle. The disturbance-sensitive area comprises the Miller cycle as well as the additional interval or (both) additional intervals that are preferably located immediately before or after the Miller cycle.Switching points of different switches are determined where the disturbance-sensitive area of ​​one switch is not observed, i.e., where the switching point of one switch would fall within the disturbance-sensitive area of ​​another switch. The switching point of one or both switches is shifted so that the disturbance-sensitive area is observed. The Miller range can be considered a characteristic of the switching point, ensuring that the Miller range of one switch does not fall within the disturbance-sensitive area of ​​the other switch. The switching points (e.g., edge onsets) are shifted as necessary to achieve this. 202401002 5.

[0012] The minimum duration is, in particular, longer than the Miller region by a temporal safety margin to prevent mutual interference during the Miller plateau, even in the case of temporal variations or tolerances. If a pulse pattern with target switching times exists, it is determined whether these switching times are sufficiently (i.e., by more than a predetermined time) apart. Since the switching times are closely linked to, or correspond to, the times at which the Miller regions occur, this prevents an overlap of the Miller regions of switching operations from different switches. In particular, the times of occurrence of the Miller regions can be corrected by a known time interval between switching times and the occurrence times of Miller regions. The safety margin can be characterized by the disturbance-sensitive region, its length, and, if applicable,through an additional time period.

[0013] If switching times are not sufficiently spaced apart (i.e., the minimum interval between successive target switching times is not maintained), they are shifted in time to ensure the minimum interval is met. These shifted switching times are also called corrected switching times. The switches are then activated (controlled) using both the target switching times that are sufficiently spaced and the corrected (shifted) switching times, which are sufficiently spaced due to the shift. These switching times (the initial, sufficiently spaced switching times and the subsequent, corrected switching times) are thus offset from each other. This results in a time-aligned pulse pattern with switching times, or Miller cycles, that are separated by the minimum interval or more.The switches of an inverter are controlled according to this equalized pulse pattern. In particular, different switches or switches of different half-bridges connected to the same supply potentials are controlled with this pulse pattern.

[0014] A method for controlling an inverter with multiple half-bridges is thus proposed. The half-bridges have switches designated as 202401002 6.

[0015] The switches are designed as semiconductors, such as MOSFETs or IGBTs, which can exhibit a Miller effect. In particular, there is coupling between the switches, whereby a disturbance caused by the switching of one switch is transmitted to the other switch via this coupling and can disrupt its switching operation. The inverter is preferably configured to generate a (common) three-phase power signal using the switches. In numerous embodiments, the outer ends of the half-bridges are connected to two supply potentials, between which a supply voltage is applied. Other embodiments provide different supply voltages or sources for different half-bridges or different switches.

[0016] A switching operation of one switch can interfere with the switching operation of another switch in the same half-bridge or in a different half-bridge of the inverter, particularly if the switching operations or switching times are so close together that the Miller plateaus or Miller regions can partially overlap, or if a Miller plateau of one switch falls within the interference-sensitive time range of another switch. The interference can be transmitted via inductive, capacitive, or resistive coupling between these switches. The inverter includes the switches that are coupled in this way. The inverter also has at least one coupling between the switches.

[0017] Each half-bridge has, in particular, two or more than two switches connected in series. The ends of the resulting series circuit are connected to the supply potentials.

[0018] First, a pulse pattern is obtained, which identifies the target switching times of the inverter's semiconductor switches. This acquisition step can be referred to as step (a). A control signal interface can be provided for obtaining the pulse pattern, such as an input to a driver device or a Miller correction stage, which may be connected upstream of a driver device. The Miller correction stage operates as a switching time equalization device (for equalizing the Miller ranges of different switches over time). The Miller correction stage is specifically configured to generate the second (corrected) switching times that result from target switching times or Miller ranges that are too close together. The Miller correction stage is preferably configured to shift target switching times (if successive switching times are less than the minimum time interval apart).The Miller correction stage can be configured to identify switching points that are too close together, which can be referred to as step (b). The switching points identified as being too close together are then shifted (zT) so that switching points with a time offset are obtained. Switching points that are too close together would cause interference in the control signals of the switches; thus, switching points that are too close together are associated with a potential interference.

[0019] The Miller correction stage can be configured to output the second (shifted or corrected) switching times, for example, by having a corresponding output interface. The terms "too close together," "too closely spaced," or "not sufficiently spaced" refer to switching times that are separated by less than the minimum time interval (possibly including the disturbance-sensitive time range), or whose Miller cycles are separated by less than the minimum time interval, i.e., they do not meet the minimum time interval requirement. The term "consecutive" means that the switching times follow each other directly. The term "time-spaced" means that the relevant switching times or their Miller cycles are separated by the minimum time interval or more.The switching points encompass all switching points of all switches between which a coupling exists, in particular all switches that are coupled in such a way that a disturbance caused by a switching operation of one switch can be transmitted to another switch and is capable of disrupting the switching operation of the other switch. As mentioned, capacitive or inductive couplings can exist, or couplings that exist because the switches are connected to the same supply potentials. The couplings ensure that switching operations of one switch can negatively influence the switching operation of another switch whose control signal is located in the Miller plateau. 202401002 8.

[0020] The pulse pattern is characteristic of (switching) edges that occur at (or are causally linked to) the target switching times. In particular, the pulse pattern indicates the direction of the switching action (upward or downward edge) to be performed at the respective times. The switching times characterized by the pulse pattern are specifically assigned to particular switches, so that the pulse pattern individually identifies the switching times of the different switches. The pulse pattern can therefore be a multidimensional, discrete-time or continuous-time signal whose edges indicate the switching times and their switching action for the individual switches. Other embodiments provide that the pulse pattern numerically specifies switching times or represents them in another way. The pulse pattern can be generated, in particular, by a control device or by a control loop based on pulse width modulation.This can correspond to the receiving step. Furthermore, a pulse pattern can be obtained by receiving it at the input interface (of a driver device, a Miller correction stage of a driver, or in a control loop, etc.). The received pulse pattern contains target switching times and can therefore be referred to as the target pulse pattern.

[0021] Furthermore, the inverter's switches are controlled, a step which can be referred to as step (c). The switches are controlled according to the first switching times (actual switching times) and second switching times (corrected switching times). The switching times are each specified for a particular switch. Therefore, signals are used for control that specify a switching time for all relevant switches. The corrected switching times are used when the corresponding first switching times differ by no more than the specified time interval. Control is typically implemented using a driver device that supplies the control inputs of the switches (gate or base) with a corresponding control signal (e.g., a gate signal); the driver device receives a signal that indicates the target switching times and the shifted switching times.The shifted switching times result from target switching times (which follow each other too closely or are not sufficiently spaced apart) by shifting them. In this process, if there are two consecutive target switching times, the first one, the next one, or both target switching times are shifted so that there is more than the specified time interval between the two switching times. To achieve this, the first switching time can be advanced. Alternatively, the subsequent switching time can be delayed. This process identifies switching times for different switches that follow each other directly and are separated by less than the minimum time interval. These insufficiently spaced switching times are then separated by delaying and / or advancing them. The shifting, i.e., delaying or...The advance timing – if possible – can be implemented with a fixed time offset. Alternatively, the offset time is determined by the difference between the predetermined time (characterized by the duration of the Miller plateau, or Miller region) and the time between successive target switching times. In other words, the offset time can be adjusted based on how much the time difference between the successive (first) switching times deviates from the predetermined time (downwards), or how far the Miller regions must be separated to ensure the minimum time is maintained. Additional time intervals can be provided. These either directly follow the Miller region (e.g., at switch-on edges) or immediately precede it (e.g., at switch-off edges).The time interval in which the mutual effects of switching operations of different switches are particularly strong is called the disturbance-sensitive time range. By shifting the switching times in time, they are spaced out from each other in such a way that the Miller cycle of one switch does not fall within the disturbance-sensitive time range of another switch.

[0022] The minimum switching time can be constant or can depend on at least one operating parameter of the inverter, for example, its temperature, the level of the supply voltage, the inverter's current power consumption, or another operating parameter that must be considered during the switching process. Switching points that are too close together are not shifted in such a way that another switching point is now too close (i.e., by less than the specified time) to the shifted switching point. In particular, the shift duration is not greater than the Miller cycle or two, five, or ten times this. In other words, it is preferably avoided that the shifting results in other successive switching points being less than the minimum time apart (i.e., following each other too closely).

[0023] As mentioned, a pulse pattern is obtained that marks the target switching times, which are then checked to ensure that successive switching times are not too close together. A further (equalized or corrected) pulse pattern can be generated, containing switching times that are corrected or partially shifted as described here. The pulse pattern with the shifted times can be referred to as the corrected pulse pattern. The correction involves shifting closely spaced switching times relative to each other so that the resulting switching times are separated by the minimum time interval or more. This correction corresponds to the shifting of closely spaced switching times described here.The subsequent pulse pattern thus comprises those target switching times that are spaced at least by the minimum time interval, as well as the second switching times that, after shifting, are spaced apart by the minimum time interval or more. The shifted switching times are those resulting from the target switching times that are too close together and are therefore shifted. As mentioned, if two switching times are too close together, the first switching time is shifted (by advancing it), the subsequent switching time is shifted (by retarding it), or both. "Shifting the switching times that are too close together" therefore does not necessarily mean shifting both switching times, but can also be achieved by shifting only one of the two switching times.The further, corrected pulse pattern thus results from the target pulse pattern by maintaining the successive switching times between which there is at least the minimum time duration, and those successive switching times that differ by less than 202401002 11.

[0024] The minimum interval between switching points must be maintained, and therefore shifted to ensure the minimum interval is met. The resulting pulse pattern is achieved by maintaining sufficiently spaced (consecutive) switching points and shifting or correcting those that are too close together to ensure the minimum interval is met. This shifting can also be described as staggering the switching points that are too close together.

[0025] The successive switching points are primarily from different switches. These can be the result of switching operations by different half-bridges that switch in close succession (less than the minimum time interval). The actuation step is performed with the extended pulse pattern, i.e., the pulse pattern that includes the shifted switching points (in addition to the initial, sufficiently spaced switching points).

[0026] Preferably, the (specified) minimum duration is determined by the duration a switch spends in the Miller plateau. Thus, the minimum duration is characterized by the Miller region. The minimum duration can correspond to the duration of the Miller region. The minimum duration can correspond to the duration between the beginning and end of the reduction in slew rate caused by the Miller effect. Limit values ​​for the reduction in slew rate can be specified, against which the Miller region is measured. The slew rate refers in particular to the control signal applied to the switch, especially the gate potential or the gate voltage (gate-source voltage).

[0027] The minimum duration can correspond to the time between the start of the switch closing (reaching a certain minimum conductivity of the power path) and the end of the closing process (reaching a certain ON conductivity of the power path with increasing conductivity). This applies to the closing process. For the opening process of the switch, the minimum duration can be defined as the time between the start of the switch opening (reaching a certain ON resistance of the power path with increasing resistance) and the end of the switch opening (reaching a certain OFF resistance of the power path). If two switching points (of different switches) coincide, then, according to one embodiment, they should be spaced at least sufficiently apart in time so that the Miller cycles (possibly including a time safety margin) of the two switching points do not overlap.(no Miller region falls within the disturbance-sensitive time domain). The switching times can refer to the beginning of the switching process, such as the onset of the switching signal's control signal. Since a constant time interval elapses between the start of the switching process and reaching the Miller plateau (or Miller region), considering only the start of the switching process is sufficient to avoid overlapping Miller regions, i.e., to ensure a sufficient time offset between them. The same applies to the end or midpoint of the switching process. This constant time interval can be taken into account during the determination process. In particular, the determination step can include identifying switching times that result in Miller regions separated by less than the minimum time interval. Here, the time between a characteristic of the switching process (switching edge), i.e.,The timing of the switching process, including the start, end, and midpoint of the switching edge, is taken into account, as is the time offset of the Miller region (the same edge). By determining the switching points (based on the characteristics of the switching process), those switching points are identified whose Miller regions are less than the minimum time interval apart.

[0028] A minimum dead time is typically maintained between switching operations of switches on the same half-bridge. This serves to prevent a short circuit across the half-bridge (i.e., to prevent a bridge short circuit). Determining switching times does not, in particular, include determining switching times of switches on the same half-bridge that do not adhere to a dead time. This can be combined with the method described here, but is preferably not part of the procedure described here. Such a dead time is not used for successive switching operations of switches belonging to different half-bridges. For switching operations of switches on different half-bridges, the switching times are shifted relative to each other, as described herein (202401002 13), if they follow each other too closely.However, for simplified calculation, a consideration (in the sense of step b) of successive switching times in switches of the same half-bridge can also be carried out. The switching times are temporally staggered (by shifting) if they are assigned to switches that are provided in half-bridges which are connected (at their ends) to the same supply voltage.

[0029] Determining whether switching times (of different switches) are less than the minimum time apart can be done simply by measuring the time elapsed after the first (target) switching time (of the received pulse pattern) until a subsequent (target) switching time is scheduled (for example, in the received pulse pattern). This can be done, for instance, with a timer that starts at the first (target) switching time. If the subsequent switching time is less than the minimum time apart from the first switching time (i.e., the timer counts less than the minimum time until the subsequent switching time), then the subsequent switching time is shifted one or more times until it is sufficiently far from the first switching time.In this process, the first switching point is used without delay for control, while the subsequent switching point is shifted and the shifted switching point is used for control (provided the subsequent, unshifted switching point is too close to the first).

[0030] (Switching time follows). The timer is reset by each target switching time (of all inverter switches). The timer determines whether the minimum switching time is maintained, i.e., whether successive switching times follow each other too closely. The minimum switching time begins when the timer is reset; after it expires, the next switching time is executed without delay. The next switching time (without delay or delayed) then resets the timer. The timer and the delay can be implemented in a control device that generates the pulse pattern, or in a driver device that, depending on the duration between two successive switching times, delays the relevant switching time (i.e., the second of the two times) so that the minimum switching time is maintained. 202401002 14

[0031] Another simple embodiment determines the Miller plateau based on the amplitude of the control signal used to actuate the switches (e.g., the gate voltage). Since the Miller plateau occurs within a specific amplitude interval (in Fig. 2, for example, at an amplitude of 8 or 6-10 on a rising edge / at an amplitude of 4 or 2-6 on a falling edge), the point at which the Miller plateau occurs for a switch can be determined by ascertaining whether the instantaneous amplitude of the control signal lies within a (predetermined) amplitude interval that is characteristic of the height of the Miller plateau. If this is the case, switching operations of other switches are suppressed by shifting the relevant switching operations. This can also be done using an amplitude (or an amplitude interval) that is linked to another characteristic of the switching edge, such as the beginning of the switching edge.This approach takes into account a known time offset between the onset of the switching edge (identifiable by a specific switching signal amplitude) and the Miller region. If the onset of the switching edge of a switch is determined based on its amplitude, a time window can be defined during which switching operations, i.e., switching points, of other switches are prevented. This time window is designed such that no switching point of another switch occurs during the Miller region (possibly within the disturbance-sensitive time range) of one switch; in particular, no other switch exhibits a Miller region. The time difference between the onset of the switching edge and the respective Miller region can be considered for both the one switch and the other switches.This difference is known and can vary for different edge directions or operating parameters such as current to be switched, supply voltage, etc. Shifting can therefore be achieved by blocking switching operations of other switches until the Miller regions of different switches no longer overlap, preferably taking into account the time offset between the onset of the edge and the subsequent occurrence of the Miller region.

[0032] The steps of identifying and / or shifting switching times that are too close together can be performed by components that are part of a 202401002 15

[0033] The output of a driver unit is connected upstream. In particular, at least one of these steps can be performed in a driver unit that is connected to the switches and receives the first pulse pattern. The driver unit can have a corresponding input interface to receive the first pulse pattern. This allows the use of a control device that outputs a pulse-wave modulated signal as the pulse pattern for switches of several half-bridges of the inverter, although it is not guaranteed that the relevant switching times have a minimum interval between them. The downstream driver unit then ensures that the Miller cycles of switches (of different half-bridges) do not overlap by checking the intervals of successive switching times and by shifting switching times that are too close together.Another variant involves generating the pulse signal, which is input to a driver device, with time equalization as described here, by a control device or a corresponding control loop. This variant is described below.

[0034] One variant of the method described here involves generating the resulting pulse pattern using a control loop. This control loop is associated with an electrical machine and serves to control that machine. The control loop is based (partially) on pulse width modulation, specifically using a duty cycle as the manipulated variable. The control loop implements, in particular, vector control, preferably of an electrical machine. Preferably, the control loop is configured to generate a synthetic multiphase sinusoidal voltage by pulse width modulation, where the pulse width modulation is characterized by duty cycles, i.e., by the switching times defined by these duty cycles.Pulse-width modulation (PWM) assigns a separate duty cycle to each phase of the multiphase sinusoidal voltage. This means that the different duty cycles can result in switching points for switches of different half-bridges (phases) within the multiphase sinusoidal voltage. The switching points, and therefore the duty cycle and the resulting pulses, are shifted if successive switching points of the synthetic multiphase sinusoidal voltage occur too close together. Thus, this variant involves intervention in a control loop where the duty cycles, or at least the resulting pulses, are shifted if they result in switching points (of different switches or switches of different half-bridges) that are too close together. Determining and shifting switching points that are too close together can therefore be performed within a control loop.Within a vector control system, and particularly in the component that defines the duty cycle or the switching points within the control loop, this can be implemented in the spatial vector modulation or in the relevant component that performs it. There, an initial pulse pattern (or initial switching points) can be generated, which, as described here, is analyzed for excessively closely spaced switching points, and those that are too close together are shifted as described. If this shifting is performed within the control system, a control-based compensation of the shift within the control loop can be implemented if necessary.

[0035] This method is particularly useful for controlling semiconductor switches such as transistors with exceptionally high electron mobility. With regard to their structural design, so-called HEMTs, such as HEM MOSFETs or HEM IGBTs, can be used. Electromobility is often linked to the band gap, so semiconductor switches with a band gap of more than 1.5 eV, at least 1.7 eV, or at least 2 eV can be used. GaN MOSFETs or SiC MOSFETs are suitable for numerous exemplary applications. In particular, GaN- or GaAs-based HEMTs can be used.

[0036] The method is preferably implemented using a logic circuit, software, or a combination thereof. The steps of detection and shifting can be performed using software blocks that can examine switching times with respect to their spacing and, if necessary, correct them, in accordance with the detection and shifting described herein. The method described herein can, in particular, be implemented by a microprocessor or a 202401002 17

[0037] A microcontroller in which software code runs that implements at least part of the method. In particular, the method can be implemented in a microprocessor or microcontroller that implements a control loop, electric motor control, or vector control for an electric machine (especially through corresponding software code), where software code also runs that implements part of the method. Specifically, a software block implementing vector control can contain software code that implements part of the method, in particular the steps of detection and displacement. The step of obtaining the pulse pattern can be implemented via an electronic interface or by parameter passing within a block of software code that performs the detection and / or displacement steps.The actuation step can be performed by the microprocessor or the microcontroller itself, preferably with a driver device being provided between these and the half-bridges to provide appropriate signal levels suitable for switching the semiconductor switches.

[0038] Furthermore, the procedure described here can be implemented using a control device. The control device is configured to execute the method. The control device has a signal input. This input is configured to execute step (a), i.e., the step of obtaining a pulse pattern. The signal input can be provided within the control device if it includes a generation unit for generating the pulse pattern. The signal input can consist of a single section of signal line, can have dedicated contacts, and, particularly when implemented as software, can be configured as a parameter pass to a software function or as access to the same memory cells that hold the pulse pattern.

[0039] The control device preferably has a signal output. This output is configured to execute step (c) of the control process. The signal output is configured to provide a signal that indicates the unshifted or target switching times and the shifted, i.e., corrected, switching times. The control device may include a microprocessor to execute at least one of these steps by means of software code running on the microprocessor.

[0040] Embodiments of the control device include a microprocessor. This microprocessor is configured to implement at least parts of a control loop for pulse-width modulated control of an electric machine, in particular for vector control of an electric machine. The control loop implemented by the microprocessor is configured to generate the pulse pattern. For this purpose, it can be programmed with appropriate software code. Furthermore, the microprocessor is programmed to output the pulse pattern, in particular to a signal input (which can be implemented as an electronic or software-based interface). According to some variants, the control device can include a driver device. This driver device is equipped with the signal input and, in particular, also with the signal output.The driver device is configured to execute the step, for example, by appropriate programming or by a logic circuit, and in particular by means of a timer (as an analog or digital circuit or as part of a programmed processor or controller). Furthermore, a switching time equalization device may be provided in or downstream of the control loop. This device is configured to detect switching times that are too close together, i.e., it is configured to determine the switching times to be shifted (switching times to be shifted: switching times that are less than the minimum time interval apart). In particular, the equalization device is configured to shift the switching times to be shifted, especially such that successive switching times are at least the minimum time interval apart. This can also be referred to as time equalization.The switching time equalization device is configured to output the fixed (target) switching times as well as the shifted switching times (time-equalized switching times). For this purpose, the switching time equalization device can have an output interface, such as an electronic interface or a software interface. 202401002 19.

[0041] A vehicle drive system can be provided, comprising an electric machine, in particular an asynchronous machine or a synchronous machine, preferably a three-phase machine. The vehicle drive system can have a control device as described herein. The vehicle drive system can further comprise an inverter. The control device is connected to the inverter for control purposes. The inverter is preferably connected to the electric machine to supply it with three-phase alternating current. For this purpose, the inverter has phase terminals that are connected to the phase terminals of the electric machine. The control device is configured to carry out the method described herein.

[0042] Switches belonging to the same inverter are defined herein as, in particular, switches that are interconnected (transmitting interference) via an (undesired) coupling as described herein. The interconnected switches jointly generate a multi-phase alternating current signal, specifically configured to generate a rotating magnetic field in the stator of an electric machine.

[0043] Figures 1 and 2 serve to illustrate embodiments of the process aspects and devices described here.

[0044] Figure 1 shows an inverter I whose DC side is connected to a DC voltage source ES (such as a traction battery), and whose phase terminals VP1 to VP3 are connected to the electric machine EM. The inverter I has three half-bridges P1 to P3, which can also be referred to as phases. Each of the depicted half-bridges P1-P3 comprises two switches connected in series, with the resulting junction forming one of the phase terminals.

[0045] Half-bridge P1 comprises high-side switch 11 and low-side switch 21, with these switches 11 and 21 connected in series via phase terminal VP1 as the connection point. Half-bridge P2 comprises high-side switch 12 and low-side switch 22, with these switches 12 and 22 connected in series via phase terminal VP2 as the connection point. Half-bridge P3 comprises high-side switch 13 and low-side switch 23, with these switches 13 and 23 connected in series via phase terminal VP3 as the connection point.

[0046] The switches of each half-bridge P1-P3 are connected to each other via their respective phase terminals VP1-VP3. This refers to the connection of the inner ends of the switches of each half-bridge P1-P3. The terminals of switches 11-23 that are opposite the connection point or the respective phase terminal VP1-VP3, i.e., the outer terminals of switches 11-23, are connected to the supply potentials HV- and HV+. The series connection of the switches forming the half-bridges P1-P3 is connected in parallel to each other and also in parallel to the supply voltage (DC voltage) provided by the supply potentials HV- and HV+.

[0047] Switches 11-23 are designed as semiconductor switches. Each has a control input UG. For MOSFETs and IGBTs, this is the gate terminal. A driver circuit TR and a microprocessor MP are provided, which are assigned to the inverter in Figure 1. In embodiments not shown, the inverter I only has the half-bridges P1-P3 and, instead of the driver circuit TR or the microprocessor MP, or generally instead of a control device, a connection for control signals (for the UG terminals). The control device, the driver circuit, or the microprocessor are then located outside the inverter I.

[0048] In the embodiment shown in Figure 1, a control device is provided, comprising the processor MP and the driver unit TR. The microprocessor MP, which can also be configured as a microcontroller, preferably includes a control loop R and a switching time equalization device EZ. In this embodiment, the control loop R generates a pulse pattern, and the subsequent device EZ is configured to perform the step of determining target switching times that are too close together. This device EZ is further configured to shift switching times that are too close together such that the interval between successive switching times is 202401002 21

[0049] The minimum time duration is maintained. Alternatively, the device EZ can be provided in the control loop R, in particular in a controlled section of the control loop R, for example in a unit that generates a pulse-width modulated pulse pattern. This unit can be a block for the inverse transformation of a rotor-related or stator-related vector representation of a particularly complex quantity (current, voltage, magnetic flux, etc.) of the control loop into a pulse pattern. This unit can have (at least) a duty cycle as its manipulated variable, whereby the pulse pattern or the target switching times of the switches result from the duty cycle. This pulse pattern is then time-spaced by the device in the control loop as shown here if the switching times of the switches follow each other too closely (i.e., are separated by less than the minimum time duration).

[0050] In the embodiment shown in Figure 1, the microprocessor or microcontroller MP generates a pulse pattern. This is input to the input E of the driver unit T. The driver unit T adapts the signal present at input E, for example by level adjustment or similar, and outputs the adapted signal at output A. The adapted signal is then passed from output A to the control inputs UB of switches 11-23. The relevant connections are shown symbolically in Figure 1. The driver unit preferably has a driver circuit for each half-bridge P1-P3 or for each switch 11-23. In Figure 1, the time equalization of closely spaced switching points described here is performed in the unit EZ.However, the temporal equalization can also be performed in the driver device TR, in a device following the driver device TR, in a device located between the microprocessor MP and the driver device, or already in the control loop R.

[0051] If the driver device has several driver circuits, each preferably has inputs for receiving switching times or control signals emitted by the other driver circuits in order to delay a planned switching time if one of the other driver circuits schedules or executes a switching time that would follow too closely. In other words, each driver circuit can then wait the minimum time before executing / emitting a scheduled switching time if a switching time that is not sufficiently far in the past has already been emitted or triggered by the other driver circuits.

[0052] Figure 2 illustrates the influence of closely spaced switching times of different switches in an inverter, such as the inverter in Figure 1. The exemplary diagram in Figure 1 shows the amplitude VG of a switching signal, here the gate-source voltage of a MOSFET acting as a switch, plotted against the time axis t with variable time units on the abscissa. Curves A1-A5 are rising switching edges of a switch, corresponding to different switching times. Switching edges A1-A5 represent possible switching edges with different switching times. For each switching edge A1-A5 (and also B), the associated Miller plateau MP is shown as a section with low slew rate, or the corresponding Miller region M1-M5, or the relevant disturbance, is shown as a time domain. The switching points of edges A1-A5 (and also B) can be the starting points of the edges (i.e., the beginning of the rise of the edge steepness), cf.The time tO of the flank A1 or the times of occurrence of the Miller plateaus MP or Miller range M1 - M7 are considered, cf. time t1 of the flank A1 .

[0053] The turn-on edges A1-A5 relate to a first switch, for example, switch 12, i.e., the high-side switch of half-bridge P2, where the turn-on edges A1-A5 represent possible edges for different, possible switching times. Furthermore, a turn-off edge B of a second switch is shown, for example, switch 21, i.e., the low-side switch of half-bridge P1 (i.e., a different half-bridge than the one containing the first switch 12). The second switch and the first switch are distinct switches, i.e., switches of different half-bridges. There is inductive, capacitive, and / or resistive coupling, which causes the turn-off edge to interfere with the turn-on edge, or vice versa, particularly within the Miller region of the edge in question. The turn-off edge B, like the edges A1-A5, traverses a Miller plateau in the time interval MB corresponding to the Miller region in question.The switching points can affect switches connected to different supply potentials, i.e., high-side and low-side switches. 202401002 23.

[0054] If, of the switching edges A1-A5, the switching edge A1 is used with a Miller plateau MP that occurs during the Miller region M1 starting at time t1, then the Miller region M1 is sufficiently time-separated from the Miller region MB of the switching edge B. No oscillations occur at the Miller regions M1 and MB of the two edges when edges B and A1 are executed as shown. When the second switch (edge ​​B) exhibits the Miller effect (approximately from time unit 48), the Miller effect of the first switch (edge ​​A1, Miller region approximately from time unit 24) has already ended some time ago. There is more than a minimum time interval (here: approximately 4 time units) between the switching times and thus also between the Miller regions M1 of switching edge A1 and MB of switching edge B. Therefore, no undesired oscillations occur.

[0055] Switching edge A5 also shows no oscillation behavior, as it occurs with sufficient time interval after switching edge B, so that the relevant Miller regions do not overlap (and also have an additional safety state).

[0056] The switch-on edge A2 exhibits a Miller region M2 in the time interval 32-36. From a simple perspective, this is sufficiently separated from the Miller region MB of the switch-off edge B. However, there is an additional time interval ZZ before the Miller region MB of the switch-off edge B, during which the switch executing the switch-off edge B is susceptible to disturbances. This results in a disturbed Miller region M5 for the switch-off edge B, since the Miller region M2 of the switch-on edge falls within the additional time interval ZZ and thus within the disturbance-sensitive region (ZZ + MB) of the switch-off edge B. Another perspective is that the still incomplete upward edge (amplitude values ​​smaller than the target value / final value 18, edge steepness > 0) of the switch-on edge A2 in the interval 40-50 disturbs the edge B in the Miller region (from time 48 onwards).that the upward slope occurring after the Miller region M2 of the switch-on edge A2 occurs during the Miller region of edge B and thus disrupts it. According to this view, it must also be determined whether a Miller region and a directly following edge region of a switching point or a 202401002 24.

[0057] The switching edge of one switch falls within the disturbance-sensitive time domain or within the Miller region of a switching point or the switching edge of another switch. If this is the case, the switching points will be spaced further apart in time.

[0058] A similar phenomenon can be observed for the switch-on edge A3: Its Miller region M3 is not sufficiently separated from the Miller region MB of the switch-off edge B, so that (as with A2) a disturbance M4 occurs in the switch-off edge B (or in the relevant control signal) even before the Miller region MB. The Miller region M3 thus lies in an additional time interval ZZ (before the Miller region MB) in which the switch-off edge B is susceptible to disturbances. As a result, the switching point of the first switch, represented by the switch-on edge A3, disturbs the switch-off edge B of the second switch. It is therefore necessary to determine whether a Miller region M3 of a switching point or switching operation falls within an additional time interval ZZ before the Miller region of the switching point (or Miller region) of another switch. In short, it must be determined whether a minimum duration, which includes an additional time interval ZZ before a Miller region, is maintained or not.If this is not adhered to, the switching times must be shifted relative to each other. It should be noted that the additional time interval ZZ is located before a Miller region MB of a switch-off edge. For a switch-on edge, the additional time interval ZZ can be located after the Miller region MB. The minimum duration can include the Miller region MB of a switching time (a switching edge) and optionally an additional time interval located before and / or after this Miller region MB, as well as, if applicable, the Miller region MB of another switching time (a different switching edge) and optionally an additional time interval located before and / or after this further Miller region MB. These up to four additional time intervals can differ, whereby, in particular, the time intervals located before and after a Miller region MB can be of different lengths.When switching at an edge of the current, the additional time interval before the Miller cycle is larger than the additional time interval after the Miller cycle; when switching at an edge of the current, this is reversed. The smaller additional time interval can also be zero. 202401002 25.

[0059] The reference symbol ZB denotes the beginning of the Miller region MB of the edge B. This occurs at time ZB, which can be called the switching time, as this marks the actual change between the switching states. (Alternatively, due to the fixed time offset between the edge start and the beginning of the Miller region, the time t = 2 can also be considered the switching time of edge B, since the switching process is initiated there by a change in the switching signal VG). It can be seen that the beginning of the Miller region M6 of edge A4 is very close to the beginning of the Miller region MB of edge B at time ZB. The Miller region MB of edge B begins at time ZB at approximately time unit 48 and extends to approximately time unit 51.The Miller region M6 of edge A4 partially falls within this time period, so that when edges A4 and B are used, the strong oscillation / disturbance shown by M6 occurs in the control signal of edge A4. If edge A5 is used instead of edge A4, whose switching point (Miller region) is only DO away from the switching point (Miller region) of edge B, no oscillation or disturbance occurs in the control signal, as shown by M7. Therefore, it can be determined that the switching point (Miller region) of edge A4 is less than a minimum time interval away from the switching point (Miller region) of edge B, so a shift V is required. The shift V results from using the later edge A5 instead of edge A4. It can be seen that the relevant switching points of the rising edge (A4, A5) are shifted from ZA to ZA'.A time interval D1 (instead of just DO) arises between the switching times of the rising edge A5 and the falling edge B, which is greater than a minimum duration, which can correspond approximately to the duration of the Miller region. M6 denotes the strong oscillation in the control signal of the rising edge A4. These oscillations result from the switching times (characterized, for example, by the respective Miller regions) of these edges being less than a minimum duration apart. In the example shown, the minimum duration could be, for example, 4, 6, or 8 time units.

[0060] Edge A1 exhibits a switching point (characterized by the Miller-wavelength).

[0061] The transition (Miller range) occurs at t1, i.e., at approximately time unit 24. This is more than the minimum time interval away from the switching point (Miller range) of edge B at time 48 (approximately), which is why no oscillations occur. The same applies to edge A5 with a switching point (Miller range) at approximately time unit 58, which is sufficiently (more than the minimum time interval) away from time unit 24, i.e., the switching point of edge A. Therefore, if edge A4 is present for a given edge B, the analysis shows that the minimum time interval between the respective switching points is not met. Instead of edge A4, edge A1 can then be used, since its switching points are sufficiently far away from the switching point of edge B. This would mean bringing forward or advancing the switching edge A4. Alternatively, edge A4 can also be delayed (by approximately...8 time units) to reach flank A5, which is also sufficiently far away in time from flank B.

[0062] Finally, Figure 2 shows that with a falling edge (such as edge B), the beginning of the edge (at time unit 2) is a greater time distance from the following Miller region (at approximately time unit 48) than is the case with rising edges. For example, edge A1 begins at time unit 9 and already exhibits a Miller region at time unit 24. In other words, the time interval between the beginning of the edge and the Miller region differs for edges of different directions. Furthermore, this time interval can depend on other operating parameters of the half-bridge or inverter, in particular the supply voltage (or also the temperature, the current to be switched, etc.). This also applies to the edge trail and the midpoint of the edge. Preferably, this is taken into account when determining whether the minimum time interval between two successive switching times is met.This is also taken into account when shifting the switching times in order to stagger them. Specifically, when determining and shifting the switching times, care is taken to ensure that the Miller cycles of the various switches or switching times are separated by the minimum time interval (or more). The switching times can be considered as indicators of the edge, such as edge start, edge end, edge midpoint, or other characteristics, provided that it is taken into account that there may be different time intervals between these indicators and the Miller cycles. This is preferably considered during the determination and shifting process. 202401002 27.

[0063] Simple implementations involve detecting the first edge (as a characteristic of a switching operation). This step can be performed as part of obtaining a pulse pattern. In Figure 2, this is edge B at time t = 2. Furthermore, the time interval between the edge onset and the Miller cycle can be predefined; here, the time between t = 2 and t = 46, i.e., 44 time units. Particularly simple embodiments stipulate that no switching point (another switch) may occur within this time interval. If a corresponding further switching point is identified that would fall within this time interval, it is postponed until at least the end of this interval. Other embodiments involve obtaining a further switching point and determining whether its Miller cycle would occur within the specified time interval.The next switching point is defined by a characteristic edge, with a known, further time interval between this characteristic, e.g., the start of the edge, and the Miller region. If this is the case, the next switching point is delayed until its Miller region lies after the Miller region of the first switching point.

[0064] In other words, based on a known time interval between an edge characteristic (such as the edge start) and the subsequent Miller region, the system determines when the Miller region is expected to occur at the first switching time (a target switching time that is actually executed). For edge B with an edge start at t = 2, this would be approximately time t = 2 + 44 = 46. Furthermore, the system determines when the corresponding Miller region of a subsequent switching time is expected. For edge A1 with an edge start at approximately t = 10 and a time interval of 15 time units from the edge start to the Miller region, this would be time 25. This is sufficiently far removed from the Miller region of edge B.For flank B and flank A4, it is already apparent at the beginning of flank A4 that, with a start time of 34 and a time interval of 15 until reaching the Miller region, the corresponding Miller region is expected at time 34 + 15 = 49, and thus only 3 time units away from time 46 (expected Miller region for flank B). Flank A4 would therefore need to be delayed, for example by 8 time units, to arrive at flank A5, which is sufficiently time-delayed compared to flank B with a Miller region of 202401002 28.

[0065] Range from approximately 40 + 15 = 55. It can be seen that for different

[0066] Different time durations can be specified for the edge directions in order to determine the location of the Miller region from the edge start (or another characteristic). Different time durations can also be specified for different semiconductor temperatures, switching currents, or supply voltages.

[0067] Time intervals are specified to deduce the position of the Miller cycle (for a first and a directly following switching point) from the characteristic associated with the switching point (such as the edge start), in order to determine that the switching points are less than the minimum time interval apart. If this is determined, the next switching point is shifted or delayed.

Claims

202401002 29 Patent claims 1. Method for controlling an inverter (I) with multiple half-bridges (P1 - P3), comprising the steps: (a) Obtaining a pulse pattern that identifies target switching times of semiconductor switches (11 - 13, 21 - 23) of the inverter (I); (b) Determining switching times (ZA, ZB) of different switches (11 - 13, 21 - 23) that are less than the minimum time interval apart than switching times (ZA, ZB) that are too close together, where this is associated with a disturbance in the control signals of the switches (11 - 13, 21 - 23); (c) Controlling the switches (11 - 13, 21 - 23) of the inverter (I) according to the target switching times and according to the shifted switching times, wherein these shifted switching times (ZA', ZB) result from shifting the switching times that are too close together, wherein the second switching times (ZA', ZB) are separated by more than the specified time period.

2. Method according to claim 1, wherein after step (b) of determination a further pulse pattern is generated, the switching times of which correspond to the switching times of the obtained pulse pattern, provided that their time difference is not less than the predetermined time duration, and whose switching times are otherwise shifted such that they are separated by at least the minimum time duration, wherein in step (c) the switches (11 - 13, 21 - 23) are controlled according to the further pulse pattern.

3. Method according to claim 1 or 2, wherein the minimum time duration is characterized by the time duration (MP) during which a switch is located in the Miller plateau (M1 - M7, MB), or is characterized by a disturbance-sensitive time range that includes this time duration (MP) as well as an additional time interval before and / or after this time duration (MP). 202401002 30 4. Method according to one of the preceding claims, wherein the switching times are shifted relative to each other if they are no more than the minimum time interval apart, and if these switching times are linked to switches of different half-bridges (P1 - P3).

5. Method according to one of the preceding claims, wherein the pulse pattern is obtained from a driver device (TR) which is connected to the switches (11 - 13, 21 - 23) for control purposes.

6. Method according to one of the preceding claims, wherein the obtained pulse pattern is generated by a control loop (R) of an electrical machine (EM), wherein a duty cycle according to which the switching times are determined is a manipulated variable of the control loop (R).

7. Method according to any of the preceding claims, wherein the switches (11 - 13, 21 - 23) which are controlled in step c) are semiconductor switches with a band gap of more than 1.5 eV, of at least 1.7 eV or of at least 2 eV.

8. Control device configured for carrying out the method according to one of the preceding claims, wherein the control device has a signal input (E) for carrying out step (a), and wherein the control device has a signal output (A) which is configured to carry out step (c) of the control by having the signal output (A) configured to output a signal that characterizes the first and second switching times.

9. Control device according to claim 8, comprising a microprocessor configured to implement at least parts of a control loop (R) for pulse-width modulated control of an electric machine (EM), wherein the control loop (R) implemented by the microprocessor is configured to generate the pulse pattern, wherein 202401002 31 (i) the control device comprises a driver device (TR) equipped with the signal input (E) and the signal output (A), and wherein the driver device (TR) is configured to perform step (b) or (ii) a switching time equalization device (EZ) is provided in or downstream of the control loop (R) and is equipped with: - to perform step (b) of determining switching times (ZA, ZB), - to shift the second switching times and - to output the first and second switching times.

10. Vehicle drive with an electric machine (EM), a control device (R, TR) according to claim 8 or 9 and an inverter (I), wherein the control device (R, TR) is connected to the inverter (I) in a controlling manner and the inverter (I) is connected to the electric machine (EM) to supply it with three-phase electrical current.

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