Amplifying circuit and high-frequency circuit

Abstract

An amplifying circuit (10) comprises: electric power amplifiers (11 and 12); a combining circuit (14) that is connected to an output end of the electric power amplifier (11) and an output end of the electric power amplifier (12); and a first series circuit that is composed of a first switch and a capacitor (171) that are connected in series to each other. The first series circuit is connected between the ground and a connection node (n1) on a path that connects the output end of the electric power amplifier (12) and the combining circuit (14).

Description

Amplifier Circuit and High-Frequency Circuit 【0001】 The present invention relates to an amplifier circuit and a high-frequency circuit. 【0002】 Patent Document 1 (FIG. 8) discloses a power amplification system including a pair of differential transistors, a transformer connected to the output side of the pair of differential transistors, and a reactance compensation circuit and a switch connected to the output side of the transformer. The reactance compensation circuit includes a plurality of reactance elements, and it is said that fluctuations in load impedance can be suppressed by switching the connection between the transformer and one of the plurality of reactance elements by a switch according to the frequency of a high-frequency signal. 【0003】 U.S. Patent Application Publication No. 2017 / 0338781 【0004】 In a power amplification system, since the optimum load impedances for output power and efficiency are different, a trade-off between output power and efficiency occurs. On the other hand, in the power amplification system disclosed in Patent Document 1, since the load impedance is adjusted by a variable reactance compensation circuit arranged on the output side of the transformer, it is difficult to switch the output power mode while maintaining efficiency. 【0005】 The present invention has been made to solve the above problems, and an object thereof is to provide an amplifier circuit and a high-frequency circuit capable of switching the output power mode while maintaining efficiency. 【0006】 To achieve the above object, an amplifier circuit according to one aspect of the present invention includes a first power amplifier, a second power amplifier, a combining circuit connected to the output end of the first power amplifier and the output end of the second power amplifier, and a first series circuit including a first switch and a first reactance element connected in series with each other. The first series circuit is connected between a first connection point on the path connecting the output end of the second power amplifier and the combining circuit and the ground. 【0007】Furthermore, a high-frequency circuit according to one aspect of the present invention comprises the amplification circuit described above, an antenna connection terminal, a plurality of filters connected between the amplification circuit and the antenna connection terminal, and an eighth switch connected between the amplification circuit and the plurality of filters, which selectively connects the amplification circuit and at least one of the plurality of filters. 【0008】 According to the present invention, it is possible to provide an amplification circuit and a high-frequency circuit that can switch the output power mode while maintaining efficiency. 【0009】 Figure 1A is a circuit diagram of an amplifier circuit, a high-frequency circuit, and a communication device according to an embodiment. Figure 1B is an equivalent circuit diagram of a switch connected to the output terminal of the second power amplifier. Figure 2A is a circuit state diagram of the high-frequency circuit in the first power mode according to an embodiment. Figure 2B is a circuit state diagram of the high-frequency circuit in the second power mode according to an embodiment. Figure 2C is a circuit state diagram of the high-frequency circuit in the third power mode according to an embodiment. Figure 3 is a circuit diagram of an amplifier circuit according to modification 1 of the embodiment. Figure 4A is a circuit diagram of an amplifier circuit according to modification 2 of the embodiment. Figure 4B is a circuit diagram of an amplifier circuit according to modification 3 of the embodiment. Figure 5 is a circuit diagram of an amplifier circuit according to modification 4 of the embodiment. Figure 6A is a circuit state diagram of the high-frequency circuit in the first power mode according to modification 4 of the embodiment. Figure 6B is a circuit state diagram of the high-frequency circuit in the second power mode according to modification 4 of the embodiment. Figure 6C is a circuit state diagram of the high-frequency circuit in the third power mode according to modification 4 of the embodiment. Figure 7 is a Smith chart showing the output impedance of each power amplifier in the amplifier circuit according to Modification 4 of the embodiment, and a graph showing the frequency characteristics of the output power of each power amplifier. Figure 8 is a circuit diagram of the amplifier circuit according to Modification 5 of the embodiment. Figure 9 is a circuit diagram of the amplifier circuit according to Modification 6 of the embodiment. Figure 10 is a circuit diagram of the amplifier circuit according to Modification 7 of the embodiment. Figure 11 is a circuit diagram of the impedance adjustment circuit according to Modification 9 of the embodiment. Figure 12 is a plan view of the amplifier circuit according to Modification 4 of the embodiment. 【0010】The embodiments of this disclosure will be described in detail below with reference to the drawings. The embodiments described below are all general or specific examples. The numerical values, shapes, materials, components, arrangement of components, and connection configurations shown in the following embodiments are examples and are not intended to limit the present invention. 【0011】 The figures are schematic diagrams that have been appropriately emphasized, omitted, or had their proportions adjusted to illustrate the present invention, and are not necessarily strictly accurate representations. Actual shapes, positional relationships, and proportions may differ. In each figure, substantially identical components are denoted by the same reference numerals, and redundant explanations may be omitted or simplified. 【0012】 In the circuit configurations of this disclosure, “connected” includes not only direct connection via connection terminals and / or wiring conductors, but also electrical connection via other circuit elements. “Connected between A and B” means connected to both A and B. 【0013】 Furthermore, in this disclosure, "path" means a transmission line consisting of wiring through which a high-frequency signal propagates, electrodes directly connected to said wiring, and terminals directly connected to said wiring or electrodes. Also, "path connecting A and B" means a path in the section between A and B, and does not include paths extending from A to circuit elements (or terminals) other than B outside of the above section, or paths extending from B to circuit elements (or terminals) other than A outside of the above section. 【0014】 Furthermore, in this disclosure, "component A is arranged in series with path B" means that both the signal input terminal and the signal output terminal of component A are connected to the wiring, electrodes, or terminals that constitute path B. 【0015】 In this invention, "terminal," "input terminal," and "output terminal" refer to the point where a conductor within an element terminates. However, if the impedance of the conductors between elements is sufficiently low, a terminal is interpreted not only as a single point, but as any point on the conductor between elements or as an entire conductor. 【0016】In the following figures, the x and y axes are mutually orthogonal axes on a plane parallel to the main surface of the mounting substrate. Specifically, if the mounting substrate has a rectangular shape in plan view, the x axis is parallel to the first side of the mounting substrate, and the y axis is parallel to the second side that is perpendicular to the first side of the mounting substrate. The z axis is perpendicular to the main surface of the mounting substrate, with its positive direction indicating upwards and its negative direction indicating downwards. 【0017】 Furthermore, in this disclosure, a plan view of the substrate means viewing the substrate and the circuit elements mounted on the substrate by orthogonal projection onto a plane parallel to the main surface of the substrate. 【0018】 Furthermore, in the component arrangements of this disclosure, "a component is placed on a substrate" includes the component being placed on the main surface of the substrate, and the component being placed within the substrate. "A component is placed on the main surface of the substrate" includes the component being placed in contact with the main surface of the substrate, as well as the component being placed above the main surface without contact with the main surface (for example, the component being stacked on top of another component that is placed in contact with the main surface). "A component is placed on the main surface of the substrate" may also include the component being placed in a recess formed on the main surface. "A component is placed within the substrate" includes the component being encapsulated within a module substrate, as well as the entire component being placed between the two main surfaces of the substrate but part of the component not being covered by the substrate, and only part of the component being placed within the substrate. 【0019】 Furthermore, in this disclosure, terms indicating relationships between elements such as parallel and perpendicular, terms indicating the shape of elements such as rectangular, and numerical ranges do not represent only strict meanings, but also include substantially equivalent ranges, such as differences of a few percent. 【0020】 Furthermore, in this disclosure, the numerical values ​​for phase and phase difference do not represent only their strict meaning, but also include a substantially equivalent range, meaning that they include differences of, for example, about 30%. 【0021】Furthermore, in the following embodiment, the passband of the filter is the portion of the frequency spectrum transmitted by the filter, and is defined as the frequency band between two frequencies that are 3 dB greater than the minimum power insertion loss. 【0022】 Furthermore, in this disclosure, the "pass phase" between two terminals of a high-frequency signal is obtained by applying a measuring RF probe to the two terminals and measuring the pass characteristics (S21) with a network analyzer. Also, the "reflection phase" at one terminal of the high-frequency signal is obtained by applying a measuring RF probe to that terminal and measuring the pass characteristics (S11) with a network analyzer. 【0023】 Furthermore, in this disclosure, "band" means at least one of the uplink operating band and the downlink operating band of a frequency band predefined by a standardization body (e.g., 3GPP®, IEEE (Institute of Electrical and Electronics Engineers), etc.) for a communication system constructed using Radio Access Technology (RAT). In this embodiment, the communication system can be, but is not limited to, an LTE (Long Term Evolution) system, a 5G (5th Generation)-NR (New Radio) system, and a WLAN (Wireless Local Area Network) system. The uplink operating band of a frequency band means the frequency range designated for uplink use within that frequency band. The downlink operating band of a frequency band means the frequency range designated for downlink use within that frequency band. 【0024】Furthermore, in this disclosure, “the power amplifier is operating” means that the power amplifier is controlled to be ON (i.e., in a state in which the power amplifier is capable of amplifying high-frequency signals). Specifically, “the power amplifier is operating” means that the power amplifier is supplied with a bias current (bias voltage) and / or a power supply voltage, thereby amplifying high-frequency signals. The ON / OFF state of the power amplifier can be controlled by supplying / not supplying a bias current (bias voltage) and / or a power supply voltage. 【0025】 "Power class" is a classification of the output power of user equipment (UE), defined by the maximum output power. A lower power class value indicates a higher maximum output power that is permitted. For example, 3GPP (registered trademark) (3rd Generation Partnership Project) defines power classes 1, 1.5, 2, and 3. Specifically, power class 1 is defined as having a maximum output power of 31 dBm. Power class 1.5 is defined as having a maximum output power of 29 dBm. Power class 2 is defined as having a maximum output power of 26 dBm. Power class 3 is defined as having a maximum output power of 23 dBm. 【0026】 The maximum output power of a UE is defined as the maximum output power at the antenna terminal. The output power of a UE is measured using methods defined by 3GPP (registered trademark) (3rd Generation Partnership Project), etc. For example, the output power is measured by measuring the radiated power at the antenna. Alternatively, instead of measuring the radiated power, the output power of the antenna can be measured by providing a terminal near the antenna and connecting a measuring instrument (such as a spectrum analyzer) to that terminal. 【0027】 (Embodiment) [1 Circuit Configuration of Amplifier Circuit 10, High-Frequency Circuit 1, and Communication Device 4] The circuit configuration of the amplifier circuit 10, high-frequency circuit 1, and communication device 4 according to this embodiment will be described with reference to Figure 1A. Figure 1A is a circuit configuration diagram of the amplifier circuit 10, high-frequency circuit 1, and communication device 4 according to this embodiment. 【0028】 [1.1 Circuit Configuration of Communication Device 4] First, the circuit configuration of the communication device 4 will be described. As shown in Figure 1A, the communication device 4 according to this embodiment comprises a high-frequency circuit 1, an antenna 2, and an RF signal processing circuit (RFIC: Radio Frequency Integrated Circuit) 3. 【0029】 The high-frequency circuit 1 transmits high-frequency signals between the antenna 2 and the RFIC 3. The detailed circuit configuration of the high-frequency circuit 1 will be described later. 【0030】 Antenna 2 is connected to the antenna connection terminal 100 of the high-frequency circuit 1 and transmits high-frequency signals output from the high-frequency circuit 1. Antenna 2 also receives high-frequency signals from an external source and outputs them to the high-frequency circuit 1. 【0031】 RFIC3 is an example of a signal processing circuit that processes high-frequency signals. Specifically, RFIC3 processes the transmission signal input from the baseband signal processing circuit (BBIC, not shown) by upconversion, etc., and outputs the transmission signal generated by this signal processing to the transmission path of the high-frequency circuit 1. RFIC3 also processes the received signal input via the reception path of the high-frequency circuit 1 by downconversion, etc., and outputs the received signal generated by this signal processing to the BBIC. RFIC3 also has a control unit that controls the high-frequency circuit 1. Note that some or all of the control unit functions of RFIC3 may be implemented in the PA control circuit 50 of the high-frequency circuit 1. 【0032】The RFIC 3 also functions as a control unit that controls the power supply voltage Vcc and bias current supplied to each amplifier in the amplification circuit 10. Specifically, the RFIC 3 outputs a control signal to the PA control circuit 50. The PA control circuit 50 outputs a control signal corresponding to the control signal from the RFIC 3 to a power supply circuit (not shown) and a bias circuit (not shown). The power supply circuit and bias circuit may be located in the high-frequency circuit 1 or the amplification circuit 10. Each amplifier in the amplification circuit 10 is supplied with a power supply voltage Vcc controlled by the control signal from the power supply circuit, and a bias current (or bias voltage) controlled by the control signal is supplied from the bias circuit. By preventing the bias circuit from supplying a predetermined bias current (or bias voltage) due to the control signal output from the PA control circuit 50, the power amplifiers 11 and 12 can be turned off. 【0033】 Furthermore, the RFIC 3 also functions as a control unit that controls the conduction and non-conductivity of the switch 17 of the high-frequency circuit 1 based on the band or power mode being used. 【0034】 In this embodiment of the communication device 4, the antenna 2 is not an essential component. 【0035】 [1.2 Circuit Configuration of High-Frequency Circuit 1] Next, the circuit configuration of high-frequency circuit 1 will be described. As shown in Figure 1A, high-frequency circuit 1 comprises an amplification circuit 10, filters 31, 32, 33, 34, 35 and 36, switches 21 and 22, low-noise amplifiers 41 to 43, PA control circuit 50, antenna connection terminal 100, and control terminal 140. 【0036】 The amplification circuit 10 is a circuit that amplifies the high-frequency signals of bands A, B, and C input from the high-frequency input terminal 110. 【0037】In this embodiment, Band A, Band B, and Band C each refer to frequency bands predefined by standardization organizations (e.g., 3GPP (registered trademark: 3rd Generation Partnership Project), IEEE (Institute of Electrical and Electronics Engineers), etc.) for communication systems constructed using Radio Access Technology (RAT). In this embodiment, the communication system can be, but is not limited to, a 2G (2nd Generation) system, a 4G (4th Generation)-LTE (Long Term Evolution) system, a 5G (5th Generation)-NR (New Radio) system, and a WLAN (Wireless Local Area Network) system. 【0038】 Filter 31 is one of several filters provided in the high-frequency circuit 1, connected between the amplification circuit 10 and the antenna connection terminal 100, and has a passband that includes the transmission bandwidth of band A. Specifically, one end of filter 31 is connected to the first selection terminal of switch 21, and the other end of filter 31 is connected to the antenna connection terminal 100 via switch 22. 【0039】 Filter 32 is one of several filters provided by the high-frequency circuit 1, connected between the amplification circuit 10 and the antenna connection terminal 100, and has a passband that includes the transmission bandwidth of band B. Specifically, one end of filter 32 is connected to the second selection terminal of switch 21, and the other end of filter 32 is connected to the antenna connection terminal 100 via switch 22. 【0040】 Filter 33 is one of several filters provided by the high-frequency circuit 1, connected between the amplification circuit 10 and the antenna connection terminal 100, and has a passband that includes the transmission bandwidth of band C. Specifically, one end of filter 33 is connected to the third selection terminal of switch 21, and the other end of filter 33 is connected to the antenna connection terminal 100 via switch 22. 【0041】Filter 34 is connected between the low-noise amplifier 41 and the antenna connection terminal 100, and has a passband including the reception band of band A. Specifically, one end of filter 34 is connected to the input end of low-noise amplifier 41, and the other end of filter 34 is connected to antenna connection terminal 100 via switch 22. 【0042】 Filter 35 is connected between the low-noise amplifier 42 and the antenna connection terminal 100, and has a passband including the reception band of band C. Specifically, one end of filter 35 is connected to the input end of low-noise amplifier 42, and the other end of filter 35 is connected to antenna connection terminal 100 via switch 22. 【0043】 Filter 36 is connected between the low-noise amplifier 43 and the antenna connection terminal 100, and has a passband including the reception band of band B. Specifically, one end of filter 36 is connected to the input end of low-noise amplifier 43, and the other end of filter 36 is connected to antenna connection terminal 100 via switch 22. 【0044】 Band A is, for example, a band for 5G capable of transmitting signals in power class 2 (5G PC2). Power class 2 is an example of a class with a maximum output power at the first power level. 【0045】 Band B is, for example, a band capable of transmitting signals with a maximum output power at the third power level (LPM: low power mode). The third power level is lower than the first power level and the second power level. 【0046】 Band C is, for example, a band for 5G capable of transmitting signals in power class 3 (5G PC3). Power class 3 is an example of a class with a maximum output power at the second power level. The second power level is lower than the first power level and higher than the third power level. 【0047】Note that the first power level is not limited to the maximum output power of power class 2, and the second power level is not limited to the maximum output power of power class 3. The first power level may be higher than the second power level and the third power level, and the second power level may be higher than the third power level. For example, when the first power level is the maximum output power of power class 1.5 or 1, the second power level may be the maximum output power of power class 2, and the third power level may be the maximum output power of power class 3. 【0048】 Switch 21 is an example of an eighth switch and has a common terminal connected to the high-frequency output terminal 120 of the amplifier circuit 10, a first selection terminal connected to the filter 31, a second selection terminal connected to the filter 32, and a third selection terminal connected to the filter 33, and selectively connects the amplifier circuit 10 to at least one of the filters 31 to 33. 【0049】 Switch 22 is an example of an antenna switch and has a common terminal and first to fourth selection terminals. The common terminal of switch 22 is connected to the antenna connection terminal 100, the first selection terminal of switch 22 is connected to the filters 31 and 34, the second selection terminal of switch 22 is connected to the filter 32, the third selection terminal of switch 22 is connected to the filters 33 and 35, and the fourth selection terminal of switch 22 is connected to the filter 36. With the above connection configuration, switch 22 switches the connection and disconnection between the filters 31 and 34 and the antenna connection terminal 100, switches the connection and disconnection between the filter 32 and the antenna connection terminal 100, switches the connection and disconnection between the filters 33 and 35 and the antenna connection terminal 100, and switches the connection and disconnection between the filter 36 and the antenna connection terminal 100. 【0050】 Note that the low-noise amplifiers 41 to 43 connected to the filters 34 to 36 may be included in the amplifier circuit 10. 【0051】Furthermore, at least one of an inductor and a capacitor may be connected to each of the paths connecting filters 31 and 34 to switch 22, the path connecting filter 32 to switch 22, and the path connecting filters 33 and 35 to switch 22. 【0052】 The PA control circuit 50 can control the power amplifiers 11, 12 and the switch 17 based on the maximum output level of the transmitted signal. Specifically, the PA control circuit 50 (1) in the first power mode, the common terminal 17a and the selection terminal 17c are made conductive, and the common terminal 17a and the selection terminal 17b are made non-conductive; (2) in the second power mode, the common terminal 17a and the selection terminal 17b are made conductive, and the common terminal 17a and the selection terminal 17c are made non-conductive; (3) in the third power mode, the common terminal 17a and the selection terminal 17b are made non-conductive, and the common terminal 17a and the selection terminal 17c are made non-conductive. 【0053】 Here, the first power mode is a mode in which the maximum output power is at the first power level and a high-frequency signal is transmitted; the second power mode is a mode in which the maximum output power is at the second power level and a high-frequency signal is transmitted; and the third power mode is a mode in which the maximum output power is at the third power level and a high-frequency signal is transmitted. 【0054】 According to the above circuit configuration, the high-frequency circuit 1 is capable of transmitting a high-frequency signal in band A in the first power mode, a high-frequency signal in band C in the second power mode, and a high-frequency signal in band B in the third power mode. 【0055】 Furthermore, the high-frequency circuit 1 according to the present invention only needs to include at least the amplifier circuit 10, the switch 22, and the filters 31 and 33 from the circuit configuration shown in Figure 1A. 【0056】 [1.3 Circuit Configuration of Amplifier Circuit 10] Next, the circuit configuration of the amplifier circuit 10 will be explained in detail. 【0057】As shown in Figure 1A, the amplification circuit 10 includes power amplifiers 11 and 12, a 90° hybrid circuit 13, a combining circuit 14, a switch 17, a capacitor 171, a low-pass filter 15, a high-pass filter 16, a power supply voltage circuit 18, an impedance adjustment circuit 19, a high-frequency input terminal 110, and a high-frequency output terminal 120. 【0058】 The high-frequency input terminal 110 is connected to the RFIC 3. The high-frequency output terminal 120 is connected to the common terminal of the switch 21. The high-frequency input terminal 110, the high-frequency output terminal 120, and the antenna connection terminal 100 may each be metal conductors such as metal electrodes and metal bumps, or they may be points (nodes) on metal wiring. 【0059】 The 90° hybrid circuit 13 is an example of a demultiplexer and has an input terminal 13a (first input terminal) connected to the high-frequency input terminal 110, an output terminal 13b (first output terminal) connected to the input terminal of the power amplifier 11, and an output terminal 13c (second output terminal) connected to the input terminal of the power amplifier 12. It can distribute the high-frequency signal supplied from the RFIC 3 via the high-frequency input terminal 110 into two high-frequency signals having approximately a 90-degree phase difference and supply them to the power amplifiers 11 and 12, respectively. 【0060】 The 90° hybrid circuit 13 does not necessarily have to be included in the amplification circuit 10, and a phase shift circuit with a different circuit configuration may be used instead of the 90° hybrid circuit 13. 【0061】 The power amplifier 11 is an example of a first power amplifier and is connected between the 90° hybrid circuit 13 and the low-pass filter 15. Specifically, the input terminal of the power amplifier 11 is connected to the output terminal 13b of the 90° hybrid circuit 13, and the output terminal of the power amplifier 11 is connected to the input terminal 14b of the combining circuit 14 via the low-pass filter 15. The power amplifier 11 can amplify high-frequency signals with a phase that leads the power amplifier 12 by approximately 90°. 【0062】The power amplifier 12 is an example of a second power amplifier and is connected between the 90° hybrid circuit 13 and the high-pass filter 16. Specifically, the input terminal of the power amplifier 12 is connected to the output terminal 13c of the 90° hybrid circuit 13, and the output terminal of the power amplifier 12 is connected to the input terminal 14c of the combining circuit 14 via the high-pass filter 16. The power amplifier 12 can amplify high-frequency signals with a phase lag of approximately 90° relative to the power amplifier 11. 【0063】 Power amplifiers 11 and 12 can be composed of heterojunction bipolar transistors (HBTs) and can be manufactured using semiconductor materials. Examples of semiconductor materials include silicon germanium (SiGe) or gallium arsenide (GaAs). However, the amplification transistors of power amplifiers 11 and 12 are not limited to HBTs. For example, power amplifiers 11 and 12 may be composed of HEMTs (High Electron Mobility Transistors) or MESFETs (Metal-Semiconductor Field Effect Transistors). In this case, gallium nitride (GaN) or silicon carbide (SiC) may be used as the semiconductor material. Furthermore, some or all of the amplification transistors of power amplifiers 11 and 12 may be composed of CMOS (Complementary Metal Oxide Semiconductors) and may be manufactured by an SOI (Silicon on Insulator) process. In this case, silicon single crystal (Si) may be used as the semiconductor material. 【0064】The low-pass filter 15 is connected between the output terminal of the power amplifier 11 and the input terminal 14b of the combining circuit 14. The low-pass filter 15 can delay the phase of the high-frequency signal amplified by the power amplifier 11 by 45 degrees (-45°). The low-pass filter 15 includes, for example, an inductor 151 (first inductor) arranged in series in the path connecting the input terminal and output terminal of the low-pass filter 15. In addition to the inductor 151, the low-pass filter 15 may also include at least one of a capacitor and an inductor. 【0065】 The high-pass filter 16 is connected between the output terminal of the power amplifier 12 and the input terminal 14c of the combining circuit 14. The high-pass filter 16 can advance the phase of the high-frequency signal amplified by the power amplifier 12 by 45 degrees (+45°). The high-pass filter 16 includes, for example, a capacitor 161 (first capacitor) arranged in series in the path connecting the input terminal and output terminal of the high-pass filter 16. In this embodiment, the high-pass filter 16 includes, in addition to the capacitor 161, inductors 162 and 164 and a capacitor 163. The inductor 162 is arranged in series in the path connecting the input terminal and output terminal of the high-pass filter 16. The capacitor 163 and inductor 164, which are connected in series with each other, are connected between the connection point of the inductor 162 and capacitor 161 and ground, forming a harmonic termination circuit. The high-pass filter 16 does not necessarily have to include inductors 162, 164 and capacitor 163, and may also include at least one of the capacitor and inductor in addition to capacitor 161. 【0066】 The low-pass filter 15 and the high-pass filter 16 are essential components when the phase difference between the output signal of the power amplifier 11 and the output signal of the power amplifier 12 is approximately 90°, but they are not necessary when the phase difference is approximately 180°. 【0067】Furthermore, the inductor 151 may be a variable inductor whose inductance value is variable. Also, the capacitor 161 may be a variable capacitor whose capacitance value is variable. With this, by changing the inductance value and / or capacitance value at the timing of switching the conduction and non-conductivity of the switch 17, it becomes possible to fine-tune the impedance seen from the output terminal of the power amplifier 11 to the combining circuit 14 side. 【0068】 The combining circuit 14 is connected to the output terminal of the power amplifier 11 via a low-pass filter 15, and also connected to the output terminal of the power amplifier 12 via a high-pass filter 16. Specifically, the combining circuit 14 has input terminals 14b and 14c and an output terminal 14a, and can combine a high-frequency signal that has passed through the low-pass filter 15 and been input to input terminal 14b with a high-frequency signal that has passed through the high-pass filter 16 and been input to input terminal 14c using current, and output the current-combined high-frequency signal from output terminal 14a. 【0069】 The power supply voltage circuit 18 includes a power supply voltage terminal 130, inductors 181 and 182, and a capacitor 183. Inductor 181 is a so-called choke inductor and is connected between the power supply voltage terminal 130 and the output terminal of the power amplifier 11. As a result, the power supply voltage (Vcc) is supplied to the power amplifier 11 via inductor 181. Inductor 182 is a so-called choke inductor and is connected between the power supply voltage terminal 130 and the output terminal of the power amplifier 12. As a result, the power supply voltage (Vcc) is supplied to the power amplifier 12 via inductor 182. Note that inductors 181 and 182 do not necessarily have to be included in the amplification circuit 10. Capacitor 183 is a so-called bypass capacitor and is connected between the path connecting the power supply voltage terminal 130 and the power amplifier 11 and ground, and between the path connecting the power supply voltage terminal 130 and the power amplifier 12 and ground. Note that capacitor 183 and power supply voltage terminal 130 do not necessarily have to be included in the amplification circuit 10. 【0070】The impedance adjustment circuit 19 comprises a variable capacitor 191, an inductor 192, and a capacitor 193. The variable capacitor 191 and inductor 192, connected in parallel to each other, are arranged in series in the path connecting the output terminal 14a of the combining circuit 14 to the high-frequency output terminal 120. The capacitor 193 is a capacitor for blocking the DC component and is arranged in series in the path connecting the output terminal 14a to the variable capacitor 191 and inductor 192. With this configuration, by changing the capacitance value of the variable capacitor 191 at the timing of switching the conduction and non-conductivity of the switch 17, it becomes possible to fine-tune the impedance of the amplification circuit 10 as seen from the high-frequency output terminal 120 to the antenna 2 side. Note that the impedance adjustment circuit 19 does not necessarily have to be included in the amplification circuit 10. 【0071】 Capacitor 171 is an example of a first reactance element, with one end connected to switch 17 and the other end connected to ground. The capacitance value of capacitor 171 is set to, for example, the reactance component of the complex conjugate of the optimal load impedance of the power amplifier 12 when the power amplifier 12 is connected to connection node n1. The first reactance element connected to switch 17 may be an inductor instead of capacitor 171 to correspond to the above reactance component. 【0072】 The switch 17 has a common terminal 17a, and select terminals 17b and 17c, and switches between (1) the common terminal 17a and select terminal 17b are disconnected and the common terminal 17a and select terminal 17c are connected, (2) the common terminal 17a and select terminal 17b are connected and the common terminal 17a and select terminal 17c are disconnected, and (3) the common terminal 17a and select terminal 17b are disconnected and the common terminal 17a and select terminal 17c are disconnected. The common terminal 17a is connected to the input terminal 14c of the combining circuit 14 via a high-pass filter 16, the select terminal 17b is connected to a capacitor 171, and the select terminal 17c is connected to the output terminal of the power amplifier 12. 【0073】Figure 1B is an equivalent circuit diagram of a switch 17 connected to the output terminal of the power amplifier 12. As shown in the figure, the switch 17 can be considered as a switch circuit composed of a first SPST (Single-Pole Single-Throw) type switch having a common terminal 17a (first terminal) and a select terminal 17b (second terminal), and a second SPST type switch having a common terminal 17a (third terminal) and a select terminal 17c (fourth terminal). The first series circuit, which is a circuit in which the first switch and the capacitor 171 are connected in series, is connected between the connection node n1 (first connection point) on the path connecting the output terminal of the power amplifier 12 and the combining circuit 14 and ground. Specifically, the common terminal 17a of the first switch is connected to the connection node n1, and the select terminal 17b of the first switch is connected to the capacitor 171. The second switch is connected between the connection node n1 and the output terminal of the power amplifier 12. Specifically, the common terminal 17a of the second switch is connected to the connection node n1, and the selection terminal 17c of the second switch is connected to the output terminal of the power amplifier 12. 【0074】 According to this, instead of turning off the power amplifier 12, the second switch is set to a non-conductive state, thereby disconnecting the power amplifier 12 and the combining circuit 14, and thus an amplification mode using only the power amplifier 11 can be realized. 【0075】 [1.4 Transmission Mode of High-Frequency Circuit 1] Figure 2A is a circuit state diagram of the high-frequency circuit 1 according to the embodiment in the first power mode. The first power mode is a mode in which the maximum output power is the first power level and a high-frequency signal of band A (hereinafter sometimes referred to as "5G PC2") is transmitted. As shown in the figure, in the first power mode, the common terminal 17a and the selection terminal 17c are connected in switch 17, and the common terminal 17a and the selection terminal 17b are not connected. Also, the common terminal and the first selection terminal are connected in switch 21. 【0076】The transmission signal for Band A is split by the 90° hybrid circuit 13 into a decoupled signal RF1 with a phase of 0° and a decoupled signal RF2 with a phase of -90°, and these are input to power amplifiers 11 and 12, respectively, and amplified. The decoupled signal RF1 output from power amplifier 11 passes through the low-pass filter 15 to a phase of -45°, and the decoupled signal RF2 output from power amplifier 12 passes through the high-pass filter 16 to a phase of -45°. The in-phase decoupled signals RF1 and RF2 are combined in the combining circuit 14 and output from antenna 2 via the impedance adjustment circuit 19, switch 21, filter 31, switch 22, and antenna connection terminal 100. 【0077】 According to this, in the first power mode, the phase difference of the high-frequency signals at the output terminals of power amplifiers 11 and 12 is 90°, so the amplification circuit 10 can ensure stable efficiency and output power against load impedance fluctuations. 【0078】 Figure 2B is a circuit diagram of the high-frequency circuit 1 according to the embodiment in the second power mode. The second power mode is a mode in which the maximum output power is at the second power level and a high-frequency signal in band C (hereinafter sometimes referred to as "5G PC3") is transmitted. As shown in the figure, in the second power mode, the common terminal 17a and the selection terminal 17b are connected at switch 17, and the common terminal 17a and the selection terminal 17c are not connected. Also, at switch 21, the common terminal and the third selection terminal are connected. 【0079】 The transmission signal for band C is not decoupled by the 90° hybrid circuit 13, but is input only to the power amplifier 11 and amplified. The transmission signal output from the power amplifier 11 passes through the low-pass filter 15 and is output from the antenna 2 via the impedance adjustment circuit 19, switch 21, filter 33, switch 22, and antenna connection terminal 100. 【0080】According to this, fluctuations between the output impedance at the output terminal of the power amplifier 11 in the second power mode and the output impedance at the output terminal of the power amplifier 11 in the first power mode can be suppressed. Therefore, it becomes possible to switch the output power while maintaining efficiency in the first power mode and the second power mode. 【0081】 Figure 2C is a circuit state diagram of the high-frequency circuit 1 according to the embodiment in the third power mode. The third power mode is a mode in which a high-frequency signal in band B (hereinafter sometimes referred to as "LPM") is transmitted with a maximum output power of the third power level. As shown in the figure, in the third power mode, the common terminal 17a and the selection terminal 17b are disconnected at switch 17, and the common terminal 17a and the selection terminal 17c are also disconnected. In addition, the common terminal and the second selection terminal are connected at switch 21. 【0082】 The transmission signal for band B is not decoupled by the 90° hybrid circuit 13, but is input only to the power amplifier 11 and amplified. The transmission signal output from the power amplifier 11 passes through the low-pass filter 15 and is output from the antenna 2 via the impedance adjustment circuit 19, switch 21, filter 32, switch 22, and antenna connection terminal 100. 【0083】 According to this, the output impedance at the output terminal of the power amplifier 11 in the third power mode can be set to a value that prioritizes efficiency over output power. Therefore, it becomes possible to switch the output power while maintaining efficiency in the third power mode. 【0084】Furthermore, the amplification circuit 10 can be applied to a Doherty-type amplification circuit. In the amplification circuit 10, for example, the power amplifier 11 can be used as a carrier amplifier and the power amplifier 12 as a peak amplifier. In the first power mode, when the input power of the high-frequency signal is low, the high-frequency signal is amplified by the power amplifier 11, and when the input power of the high-frequency signal is high, the high-frequency signal is amplified and combined by power amplifiers 11 and 12. Due to this operation, in the amplification circuit 10 in the first power mode, the output impedance of the power amplifier 11 increases in the low-output power region, improving efficiency at low output power. Also, in the high-output power region, the output impedance as seen from the power amplifier 11 decreases, improving linearity at high output power. 【0085】 [2 Amplifier Circuit 10A According to Modification 1] Figure 3 is a circuit diagram of the amplifier circuit 10A according to Modification 1 of the embodiment. The amplifier circuit 10A according to this modification comprises power amplifiers 11 and 12, a 90° hybrid circuit 13, a combining circuit 14, a switch 67, a capacitor 171, a low-pass filter 15, a high-pass filter 16, a power supply voltage circuit 18, an impedance adjustment circuit 19, a high-frequency input terminal 110, and a high-frequency output terminal 120. The amplifier circuit 10A according to this modification differs from the amplifier circuit 10 according to the embodiment in that a switch 67 is placed in place of a switch 17.Hereafter, the amplifier circuit 10A according to this modification will be described focusing on the switch 67, which has a different configuration, while omitting the explanation of the same configuration as the amplifier circuit 10 according to the embodiment. 【0086】 Capacitor 171 is an example of a first reactance element, with one end connected to switch 67 and the other end connected to ground. 【0087】Switch 67 is an example of a first switch and has terminals 67a (first terminal) and 67b (second terminal), which switch between connecting and disconnecting terminals 67a and 67b. Terminal 67a is connected to connection node n1 (first connection point) on the path connecting the output terminal of the power amplifier 12 and the combining circuit 14, and terminal 67b is connected to capacitor 171. Switch 67 and capacitor 171 are connected in series to form a first series circuit, which is connected between connection node n1 (first connection point) and ground. 【0088】 The on and off states of power amplifiers 11 and 12 are switched by control signals supplied from the PA control circuit 50. 【0089】 Note that the switch 67 and the capacitor 171 may be connected in series in reverse. Specifically, one end of the capacitor 171 may be connected to connection node n1, the other end of the capacitor 171 may be connected to terminal 67a, and terminal 67b may be connected to ground. 【0090】 The only difference between this modified high-frequency circuit and the high-frequency circuit 1 according to the embodiment is that an amplification circuit 10A is provided instead of the amplification circuit 10. 【0091】 In the high-frequency circuit according to this modified example, in the first power mode, terminals 67a and 67b of switch 67 are disconnected, and power amplifiers 11 and 12 are turned on. Also, the common terminal and the first selection terminal of switch 21 are connected. 【0092】As a result, the transmission signal for band A is split by the 90° hybrid circuit 13 into a decoupled signal RF1 with a phase of 0° and a decoupled signal RF2 with a phase of -90°, and these are input to power amplifiers 11 and 12, respectively, and amplified. The decoupled signal RF1 output from power amplifier 11 passes through the low-pass filter 15 to a phase of -45°, and the decoupled signal RF2 output from power amplifier 12 passes through the high-pass filter 16 to a phase of -45°. The in-phase decoupled signals RF1 and RF2 are combined in the combining circuit 14 and output from antenna 2 via the impedance adjustment circuit 19, switch 21, filter 31, switch 22, and antenna connection terminal 100. 【0093】 According to this, in the first power mode, the phase difference of the high-frequency signals at the output terminals of power amplifiers 11 and 12 is 90°, so stable efficiency and output power can be ensured against load impedance fluctuations. 【0094】 Furthermore, in the second power mode, terminals 67a and 67b are connected at switch 67, power amplifier 11 is turned on, and power amplifier 12 is turned off. Also, at switch 21, the common terminal and the third selection terminal are connected. 【0095】 As a result, the transmission signal for band C is not decoupled by the 90° hybrid circuit 13, but is input only to the power amplifier 11 and amplified. The transmission signal output from the power amplifier 11 passes through the low-pass filter 15 and is output from the antenna 2 via the impedance adjustment circuit 19, switch 21, filter 33, switch 22, and antenna connection terminal 100. 【0096】 According to this, fluctuations between the output impedance at the output terminal of the power amplifier 11 in the second power mode and the output impedance at the output terminal of the power amplifier 11 in the first power mode can be suppressed. Therefore, it becomes possible to switch the output power while maintaining efficiency in the first power mode and the second power mode. 【0097】Furthermore, in the third power mode, terminals 67a and 67b of switch 67 are disconnected, power amplifier 11 is turned on, and power amplifier 12 is turned off. 【0098】 The transmission signal for band B is not decoupled by the 90° hybrid circuit 13, but is input only to the power amplifier 11 and amplified. The transmission signal output from the power amplifier 11 passes through the low-pass filter 15 and is output from the antenna 2 via the impedance adjustment circuit 19, switch 21, filter 32, switch 22, and antenna connection terminal 100. 【0099】 According to this, the output impedance at the output terminal of the power amplifier 11 in the third power mode can be set to a value that prioritizes efficiency over output power. Therefore, it becomes possible to switch the output power while maintaining efficiency in the third power mode. 【0100】 [3 Amplifier Circuit 10B According to Modification 2] Figure 4A is a circuit diagram of the amplifier circuit 10B according to Modification 2 of the embodiment. The amplifier circuit 10B according to this modification comprises power amplifiers 11 and 12, transformers 61 and 14C, a switch 17, capacitors 171, 183 and 184, an impedance adjustment circuit 19, a high-frequency input terminal 110 and a high-frequency output terminal 120, a power supply voltage terminal 130, and a bias terminal 150. The amplifier circuit 10B according to this modification differs from the amplifier circuit 10 according to the embodiment in that it is a differential amplifier circuit, whereas the amplifier circuit 10 according to the embodiment is a balanced amplifier circuit.Hereafter, the amplifier circuit 10B according to this modification will be described focusing on the different configurations, omitting the explanation of the same configuration as the amplifier circuit 10 according to the embodiment. 【0101】Transformer 61 is an example of a first transformer and has an input coil 611 (first input coil) and an output coil 612 (first output coil) that are magnetically coupled to each other. One end of the input coil 611 is connected to the high-frequency input terminal 110, and the other end of the input coil 611 is connected to ground. One end of the output coil 612 is connected to the input terminal of the power amplifier 11, and the other end of the output coil 612 is connected to the input terminal of the power amplifier 12. With this connection configuration, transformer 61 can distribute the high-frequency signal supplied from RFIC 3 via the high-frequency input terminal 110 into two high-frequency signals having a phase difference of approximately 180 degrees and supply them to power amplifiers 11 and 12, respectively. Note that transformer 61 does not necessarily have to be included in the amplification circuit 10B. 【0102】 Transformer 14C is an example of a second transformer and also an example of a combining circuit. Transformer 14C has an input coil 141 (second input coil) and an output coil 142 (second output coil) that are magnetically coupled to each other. One end of the input coil 141 is connected to the output terminal of the power amplifier 11, and the other end of the input coil 141 is connected to connection node n1. One end of the output coil 142 is connected to the high-frequency output terminal 120 via an impedance adjustment circuit 19, and the other end of the output coil 142 is connected to ground. With the above connection configuration, transformer 14C can voltage combine the high-frequency signal output from the power amplifier 11 and the high-frequency signal output from the power amplifier 12, and output the voltage-combined high-frequency signal from one end of the output coil 142. 【0103】 Power amplifier 11 is an example of a first power amplifier and is connected between transformer 61 and transformer 14C. Power amplifier 11 can amplify high-frequency signals with a phase leading approximately 180° relative to power amplifier 12. 【0104】 Power amplifier 12 is an example of a second power amplifier and is connected between transformer 61 and transformer 14C. Power amplifier 12 can amplify high-frequency signals with a phase lag of approximately 180° relative to power amplifier 11. 【0105】Capacitor 183 is a so-called bypass capacitor and is connected between the path between the power supply voltage terminal 130 and the power amplifier 11 and ground, and between the path between the power supply voltage terminal 130 and the power amplifier 12 and ground. Note that capacitor 183 and power supply voltage terminal 130 do not necessarily have to be included in the amplification circuit 10B. 【0106】 Capacitor 184 is a so-called bypass capacitor, connected between the path between the bias terminal 150 and the power amplifier 11 and ground, and between the path between the bias terminal 150 and the power amplifier 12 and ground. Note that capacitor 184 and bias terminal 150 do not necessarily have to be included in the amplification circuit 10B. 【0107】 Capacitor 171 is an example of a first reactance element, with one end connected to switch 17 and the other end connected to ground. 【0108】 The switch 17 has a common terminal 17a, and select terminals 17b and 17c, and switches between (1) the common terminal 17a and select terminal 17b are disconnected and the common terminal 17a and select terminal 17c are connected, (2) the common terminal 17a and select terminal 17b are connected and the common terminal 17a and select terminal 17c are disconnected, and (3) the common terminal 17a and select terminal 17b are disconnected and the common terminal 17a and select terminal 17c are disconnected. The common terminal 17a is connected to the other end of the input coil 141 of the transformer 14C, the select terminal 17b is connected to the capacitor 171, and the select terminal 17c is connected to the output terminal of the power amplifier 12. 【0109】 The only difference between this modified high-frequency circuit and the high-frequency circuit 1 of the embodiment is that an amplification circuit 10B is placed in place of the amplification circuit 10. 【0110】 In the high-frequency circuit according to this modified example, in the first power mode, the common terminal 17a and the selection terminal 17c are connected at switch 17, and the common terminal 17a and the selection terminal 17b are not connected. Also, at switch 21, the common terminal and the first selection terminal are connected. 【0111】The transmission signal for band A is decomposed by transformer 61 into a decomposed signal RF1 with a phase of 0° and a decomposed signal RF2 with a phase of -180°, and these are input to power amplifiers 11 and 12, respectively, and amplified. The decomposed signal RF1 output from power amplifier 11 and the decomposed signal RF2 output from power amplifier 12 are in opposite phase and combined by transformer 14C, and output from antenna 2 via impedance adjustment circuit 19, switch 21, filter 31, switch 22 and antenna connection terminal 100. 【0112】 According to this, in the first power mode, the phase difference of the high-frequency signals at the output terminals of power amplifiers 11 and 12 is 180°, so a low-noise and low-loss differential amplifier circuit 10B can be realized. 【0113】 Furthermore, in the second power mode, the common terminal 17a and the selection terminal 17b are connected at switch 17, and the common terminal 17a and the selection terminal 17c are disconnected. Also, at switch 21, the common terminal and the third selection terminal are connected. 【0114】 The transmission signal for band C is not demultiplexed by transformer 61, but is input only to power amplifier 11 and amplified. The transmission signal output from power amplifier 11 passes through transformer 14C, and is output from antenna 2 via impedance adjustment circuit 19, switch 21, filter 33, switch 22, and antenna connection terminal 100. 【0115】 According to this, fluctuations between the output impedance at the output terminal of the power amplifier 11 in the second power mode and the output impedance at the output terminal of the power amplifier 11 in the first power mode can be suppressed. Therefore, it becomes possible to switch the output power while maintaining efficiency in the first power mode and the second power mode. 【0116】 Furthermore, in the third power mode, the common terminal 17a and the selection terminal 17b are disconnected at switch 17, and the common terminal 17a and the selection terminal 17c are also disconnected. In addition, the common terminal and the second selection terminal are connected at switch 21. 【0117】The transmission signal for band B is not decoupled by transformer 61, but is input only to power amplifier 11 and amplified. The transmission signal output from power amplifier 11 passes through transformer 14C, and is output from antenna 2 via impedance adjustment circuit 19, switch 21, filter 32, switch 22, and antenna connection terminal 100. 【0118】 According to this, the output impedance at the output terminal of the power amplifier 11 in the third power mode can be set to a value that prioritizes efficiency over output power. Therefore, it becomes possible to switch the output power while maintaining efficiency in the third power mode. 【0119】 [4 Amplifier Circuit 10C According to Modification 3] Figure 4B is a circuit diagram of the amplifier circuit 10C according to Modification 3 of the embodiment. The amplifier circuit 10C according to this modification comprises power amplifiers 11 and 12, transformers 61 and 14C, a switch 67, capacitors 171, 183 and 184, an impedance adjustment circuit 19, a high-frequency input terminal 110 and a high-frequency output terminal 120, a power supply voltage terminal 130, and a bias terminal 150. The amplifier circuit 10C according to this modification differs from the amplifier circuit 10B according to Modification 2 in that a switch 67 is placed in place of a switch 17. Hereinafter, the amplifier circuit 10C according to this modification will be described in detail, omitting the explanation of the same configuration as the amplifier circuit 10B according to Modification 2, and focusing on the switch 67, which has a different configuration. 【0120】 Capacitor 171 is an example of a first reactance element, with one end connected to switch 67 and the other end connected to ground. 【0121】 Switch 67 is an example of a first switch and has terminals 67a (first terminal) and 67b (second terminal), which switch the connection and disconnection of terminals 67a and 67b. Terminal 67a is connected to connection node n1 (first connection point) on the path connecting the output terminal of the power amplifier 12 and the combining circuit 14C, and terminal 67b is connected to capacitor 171. Switch 67 and capacitor 171 are connected in series to form a first series circuit, which is connected between connection node n1 (first connection point) and ground. 【0122】 The on and off states of power amplifiers 11 and 12 are switched by control signals supplied from the PA control circuit 50. 【0123】 The only difference between this modified high-frequency circuit and the high-frequency circuit 1 of the embodiment is that an amplification circuit 10C is provided instead of the amplification circuit 10. 【0124】 In the high-frequency circuit according to this modified example, in the first power mode, terminals 67a and 67b of switch 67 are disconnected, and power amplifiers 11 and 12 are turned on. Also, the common terminal and the first selection terminal of switch 21 are connected. 【0125】 As a result, the transmission signal for band A is split by transformer 61 into a decoupled signal RF1 with a phase of 0° and a decoupled signal RF2 with a phase of -180°, and these are input to power amplifiers 11 and 12, respectively, and amplified. The decoupled signal RF1 output from power amplifier 11 and the decoupled signal RF2 output from power amplifier 12 are in opposite phase and combined by transformer 14C, and output from antenna 2 via impedance adjustment circuit 19, switch 21, filter 31, switch 22 and antenna connection terminal 100. 【0126】 According to this, in the first power mode, the phase difference of the high-frequency signals at the output terminals of power amplifiers 11 and 12 is 180°, so a low-noise and low-loss differential amplifier circuit can be realized. 【0127】 Furthermore, in the second power mode, terminals 67a and 67b are connected at switch 67, power amplifier 11 is turned on, and power amplifier 12 is turned off. Also, at switch 21, the common terminal and the third selection terminal are connected. 【0128】 As a result, the transmission signal for band C is not decoupled by transformer 61, but is input only to power amplifier 11 and amplified. The transmission signal output from power amplifier 11 passes through transformer 14C, and is output from antenna 2 via impedance adjustment circuit 19, switch 21, filter 33, switch 22, and antenna connection terminal 100. 【0129】 According to this, fluctuations between the output impedance at the output terminal of the power amplifier 11 in the second power mode and the output impedance at the output terminal of the power amplifier 12 in the first power mode can be suppressed. Therefore, it becomes possible to switch the output power while maintaining efficiency in both the first and second power modes. 【0130】 Furthermore, in the third power mode, terminals 67a and 67b of switch 67 are disconnected, power amplifier 11 is turned on, and power amplifier 12 is turned off. 【0131】 The transmission signal for band B is not decoupled by transformer 61, but is input only to power amplifier 11 and amplified. The transmission signal output from power amplifier 11 passes through transformer 14C, and is output from antenna 2 via impedance adjustment circuit 19, switch 21, filter 32, switch 22, and antenna connection terminal 100. 【0132】 According to this, the output impedance at the output terminal of the power amplifier 11 in the third power mode can be set to a value that prioritizes efficiency over output power. Therefore, it becomes possible to switch the output power while maintaining efficiency in the third power mode. 【0133】[5.1 Circuit Configuration of Amplifier Circuit 10D According to Modification 4] Next, the circuit configuration of the amplifier circuit 10D, which is equipped with three power amplifiers, will be described. Figure 5 is a circuit diagram of the amplifier circuit 10D according to Modification 4 of the embodiment. As shown in the figure, the amplifier circuit 10D according to this modification comprises power amplifiers 11, 12 and 72, a 90° hybrid circuit 13, a combining circuit 14, a switch 68, a capacitor 171, a low-pass filter 15, a high-pass filter 16, a power supply voltage circuit 18, an impedance adjustment circuit 19, a high-frequency input terminal 110 and a high-frequency output terminal 120. The main difference between the amplifier circuit 10D according to this modification and the amplifier circuit 10D according to the embodiment is that it is equipped with three power amplifiers, whereas the amplifier circuit 10 according to the embodiment is equipped with two power amplifiers. Hereinafter, the amplifier circuit 10D according to this modification will be described focusing on the different configurations, omitting the explanation of the same configuration as the amplifier circuit 10 according to the embodiment. 【0134】 The 90° hybrid circuit 13 is an example of a demultiplexer and has an input terminal 13a (first input terminal) connected to the high-frequency input terminal 110, an output terminal 13b (first output terminal) connected to the input terminal of the power amplifier 11, and an output terminal 13c (second output terminal) connected to the input terminals of power amplifiers 12 and 72. It can distribute the high-frequency signal supplied from the RFIC 3 via the high-frequency input terminal 110 into two high-frequency signals having approximately a 90-degree phase difference and supply them to the power amplifier 11 and power amplifiers 12 and 72, respectively. 【0135】 The power amplifier 11 is an example of a first power amplifier and is connected between the 90° hybrid circuit 13 and the low-pass filter 15. Specifically, the input terminal of the power amplifier 11 is connected to the output terminal 13b of the 90° hybrid circuit 13, and the output terminal of the power amplifier 11 is connected to the input terminal 14b of the combining circuit 14 via the low-pass filter 15. The power amplifier 11 can amplify high-frequency signals with a phase that leads the power amplifier 12 by approximately 90°. 【0136】The power amplifier 72 is an example of a second power amplifier and is connected between the 90° hybrid circuit 13 and the high-pass filter 16. Specifically, the input terminal of the power amplifier 72 is connected to the output terminal 13c of the 90° hybrid circuit 13, and the output terminal of the power amplifier 72 is connected to the input terminal 14c of the combining circuit 14 via the high-pass filter 16. The power amplifier 72 can amplify high-frequency signals with a phase lag of approximately 90° relative to the power amplifier 11. 【0137】 Capacitor 171 is an example of a first reactance element, with one end connected to switch 68 and the other end connected to ground. 【0138】 Switch 68 has a common terminal 68a, and select terminals 68b and 68c, and switches between (1) common terminal 68a and select terminal 68b are disconnected and common terminal 68a and select terminal 68c are connected, (2) common terminal 68a and select terminal 68b are connected and common terminal 68a and select terminal 68c are disconnected, and (3) common terminal 68a and select terminal 68b are disconnected and common terminal 68a and select terminal 68c are disconnected. Common terminal 68a is connected to the input terminal 14c of the combining circuit 14 via a high-pass filter 16, select terminal 68b is connected to a capacitor 171, and select terminal 68c is connected to the output terminal of the power amplifier 72. 【0139】 The switch 68 can be considered as a switch circuit composed of a first SPST-type switch having a common terminal 68a (first terminal) and a selection terminal 68b (second terminal), and a second SPST-type switch having a common terminal 68a (third terminal) and a selection terminal 68c (fourth terminal). The first series circuit, which is a circuit in which the first switch and the capacitor 171 are connected in series, is connected between the connection node n1 (first connection point) on the path connecting the output terminal of the power amplifier 72 and the combining circuit 14 and ground. Specifically, the common terminal 68a of the first switch is connected to the connection node n1, and the selection terminal 68b of the first switch is connected to the capacitor 171. The second switch is connected between the connection node n1 and the output terminal of the power amplifier 72. Specifically, the common terminal 68a of the second switch is connected to the connection node n1, and the selection terminal 68c of the second switch is connected to the output terminal of the power amplifier 72. 【0140】 According to this, instead of turning off the power amplifier 72, the second switch is set to a non-conductive state, thereby disconnecting the power amplifier 72 from the combining circuit 14, and thus enabling amplification modes in power amplifiers 11 and 12. 【0141】 The power amplifier 12 is an example of a third power amplifier and is connected between the 90° hybrid circuit 13 and the high-pass filter 16. Specifically, the input terminal of the power amplifier 12 is connected to the input terminal of the power amplifier 72, and the output terminal of the power amplifier 12 is connected to the connection node n1. The power amplifier 12 can amplify high-frequency signals with a phase delay of approximately 90° relative to the power amplifier 11. 【0142】 The power amplifiers 11, 12, and 72 can be constructed from HBTs and manufactured using semiconductor materials. For example, SiGe or GaAs can be used as the semiconductor material. However, the amplification transistors of the power amplifiers 11, 12, and 72 are not limited to HBTs. For example, the power amplifiers 11, 12, and 72 may be constructed from HEMTs or MESFETs. In this case, GaN or SiC may be used as the semiconductor material. Furthermore, some or all of the amplification transistors of the power amplifiers 11, 12, and 72 may be constructed from CMOS and manufactured by an SOI process. In this case, Si may be used as the semiconductor material. 【0143】 The combining circuit 14 is connected to the output terminal of the power amplifier 11 via a low-pass filter 15, and also to the output terminals of power amplifiers 12 and 72 via a high-pass filter 16. 【0144】 The only difference between this modified high-frequency circuit and the high-frequency circuit 1 according to the embodiment is that an amplification circuit 10D is placed in place of the amplification circuit 10. 【0145】 [5.2 Transmission Mode of High-Frequency Circuit According to Modification 4] In this modification, Band A is, for example, a 5G band capable of transmitting signals in power class 2 (5G PC2). Power class 2 is an example of a class in which the maximum output power is the first power level. 【0146】 Band B is also a band for 5G, for example, that can transmit signals at power class 3 (5G PC3). Power class 3 is an example of a class where the maximum output power is the third power level. The third power level is lower than the first power level. 【0147】 Furthermore, Band C is a band belonging to the low band group for 2G, where, for example, the maximum output power can transmit signals at the second power level (2G LB). The second power level is lower than the first power level and higher than the third power level. 【0148】 Furthermore, the first power level is not limited to the maximum output power of power class 2, nor is the third power level limited to the maximum output power of power class 3. The first power level only needs to be higher than the second and third power levels, and the second power level only needs to be higher than the third power level. For example, if the first power level is the maximum output power of power class 1.5 or 1, then the second power level may be the maximum output power of power class 2, and the third power level may be the maximum output power of power class 3. 【0149】 Figure 6A is a circuit state diagram of the high-frequency circuit in the first power mode according to the fourth modified embodiment. The first power mode is a mode in which the maximum output power is at the first power level and a high-frequency signal (5G PC2) in band A is transmitted. As shown in the figure, in the first power mode, the common terminal 68a and the selection terminal 68c are connected in switch 68, and the common terminal 68a and the selection terminal 68b are not connected. Also, in switch 21, the common terminal and the first selection terminal are connected. 【0150】The transmission signal for Band A is split by the 90° hybrid circuit 13 into a demultiplexed signal RF1 with a phase of 0° and a demultiplexed signal RF2 with a phase of -90°, and these are input to power amplifiers 11, 12, and 72 respectively for amplification. The demultiplexed signal RF1 output from power amplifier 11 passes through the low-pass filter 15 to a phase of -45°, and the demultiplexed signals RF2 output from power amplifiers 12 and 72 pass through the high-pass filter 16 to a phase of -45°. The in-phase demultiplexed signals RF1 and RF2 are combined in the combining circuit 14 and output from antenna 2 via the impedance adjustment circuit 19, switch 21, filter 31, switch 22, and antenna connection terminal 100. 【0151】 According to this, in the first power mode, the amplification circuit 10D can output a band A signal with stable efficiency and output power against load impedance fluctuations because the phase difference between the high-frequency signal at the output terminal of power amplifier 11 and the high-frequency signals at the output terminals of power amplifiers 12 and 72 is 90°. 【0152】 Figure 7 shows a Smith chart illustrating the output impedance of each power amplifier in the amplification circuit according to the fourth modified embodiment, and a graph illustrating the frequency characteristics of the output power of each power amplifier. Figure 7(a) shows the output impedance and output power of each power amplifier in the third power mode (5G PC3), Figure 7(b) shows the output impedance and output power of each power amplifier in the second power mode (2G LB), and Figure 7(c) shows the output impedance and output power of each power amplifier in the first power mode (5G PC2). 【0153】As shown in the upper part of Figure 7(c), in the first power mode, the output impedances (load impedance at the output terminal) of power amplifiers 11, 12, and 72 are all close to the position of Γopt (optimal load impedance) obtained from the load pull. Also, as shown in the lower part of Figure 7(c), in the first power mode, fluctuations in the output power of power amplifiers 11, 12, and 72 are suppressed within a predetermined frequency range (880-915 MHz). As a result, in the first power mode, the amplification circuit 10D can stably output a signal whose maximum output power is at the first power level while maintaining high efficiency. 【0154】 The circuit parameters of the low-pass filter 15, the high-pass filter 16, and the impedance adjustment circuit 19 are set so that in the first power mode, the output impedance of the power amplifiers 11, 12, and 72 is Γopt (or close to Γopt). 【0155】 Figure 6B is a circuit state diagram of the high-frequency circuit in the second power mode according to the fourth modified embodiment. The second power mode is a mode in which the maximum output power is the second power level and a high-frequency signal (2 GHz) in band C is transmitted. As shown in the figure, in the second power mode, the common terminal 68a and the selection terminal 68b are connected in switch 68, and the common terminal 68a and the selection terminal 68c are not connected. Also, in switch 21, the common terminal and the third selection terminal are connected. 【0156】The transmission signal for band C is split by the 90° hybrid circuit 13 into a decoupled signal RF1 with a phase of 0° and a decoupled signal RF2 with a phase of -90°, and these are input to power amplifiers 11 and 12 respectively for amplification. Since the common terminal 68a and the selection terminal 68c are not connected, the decoupled signal RF2 is not input to power amplifier 72. The decoupled signal RF1 output from power amplifier 11 passes through the low-pass filter 15 to a phase of -45°, and the decoupled signal RF2 output from power amplifier 12 passes through the high-pass filter 16 to a phase of -45°. The in-phase decoupled signals RF1 and RF2 are combined in the combining circuit 14 and output from antenna 2 via the impedance adjustment circuit 19, switch 21, filter 33, switch 22, and antenna connection terminal 100. 【0157】 According to this, in the second power mode, the amplification circuit 10D can output a band C signal with stable efficiency and output power against load impedance fluctuations because the phase difference between the high-frequency signal at the output terminal of power amplifier 11 and the high-frequency signal at the output terminal of power amplifier 12 is 90°. 【0158】 Furthermore, since a capacitor 171 is connected to connection node n1 to compensate for the fact that power amplifier 72 is not connected, fluctuations between the output impedance at the output terminals of power amplifiers 11 and 12 in the second power mode and the output impedance at the output terminals of power amplifiers 11 and 12 in the first power mode can be suppressed. As a result, as shown in the upper part of Figure 7(b), in the second power mode, the output impedances (load impedance at the output terminals) of power amplifiers 11 and 12 are both close to the position of Γopt obtained from the load pull. Also, as shown in the lower part of Figure 7(b), in the second power mode, fluctuations in the output power of power amplifiers 11 and 12 are suppressed in a predetermined frequency range (880-915 MHz). As a result, in the second power mode, the amplification circuit 10D can output a signal in which the maximum output power is at the second power level while maintaining high efficiency. 【0159】The capacitance value of capacitor 171 is set to the reactance component of the complex conjugate of the optimal load impedance of the power amplifier 72 when the power amplifier 72 is connected to connection node n1. Capacitor 171 may also be an inductor to correspond to the above reactance component. 【0160】 Figure 6C is a circuit state diagram of the high-frequency circuit in the third power mode according to the fourth modified embodiment. The third power mode is a mode in which a high-frequency signal (5G PC3) in band B is transmitted with a maximum output power of the third power level. As shown in the figure, in the third power mode, the common terminal 68a and the selection terminal 68b are disconnected in switch 68, and the common terminal 68a and the selection terminal 68c are also disconnected. In addition, the common terminal and the second selection terminal are connected in switch 21. 【0161】 The transmission signal for band B is split by the 90° hybrid circuit 13 into a decoupled signal RF1 with a phase of 0° and a decoupled signal RF2 with a phase of -90°, and these are input to power amplifiers 11 and 12 respectively for amplification. Since the common terminal 68a and the selection terminal 68c are not connected, the decoupled signal RF2 is not input to power amplifier 72. The decoupled signal RF1 output from power amplifier 11 passes through the low-pass filter 15 to a phase of -45°, and the decoupled signal RF2 output from power amplifier 12 passes through the high-pass filter 16 to a phase of -45°. The in-phase decoupled signals RF1 and RF2 are combined in the combining circuit 14 and output from antenna 2 via the impedance adjustment circuit 19, switch 21, filter 32, switch 22, and antenna connection terminal 100. 【0162】 According to this, in the third power mode, the amplification circuit 10D can output a band B signal with stable efficiency and output power against load impedance fluctuations because the phase difference between the high-frequency signal at the output terminal of power amplifier 11 and the high-frequency signal at the output terminal of power amplifier 12 is 90°. 【0163】Furthermore, in the third power mode, the power amplifier 72 is disconnected and the capacitor 171 is not connected to the connection node n1. As shown in the upper part of Figure 7(a), in the third power mode, the output impedance of the power amplifier 11 (load impedance at the output terminal) is located on the higher impedance side than Γopt obtained from the load pull. As a result, in the third power mode, the amplification circuit 10D can output a signal whose maximum output power is at the third power level while maintaining high efficiency due to the high impedance. 【0164】 The capacitance value of capacitor 171 is set so that the position of the output impedance of power amplifier 11 on the Smith chart in the third power mode is close to Γopt in the second power mode. 【0165】 As described above, the amplification circuit 10D is capable of switching the output power while maintaining efficiency in the first power mode, second power mode, and third power mode. 【0166】 Furthermore, the amplification circuit 10D can be applied to a Doherty-type amplification circuit. In the amplification circuit 10D, for example, power amplifier 11 can be used as a carrier amplifier, and power amplifiers 12 and 72 can be used as peak amplifiers. In the first power mode, when the input power of the high-frequency signal is low, the high-frequency signal is amplified by power amplifier 11, and when the input power of the high-frequency signal is high, the high-frequency signal is amplified and combined by power amplifiers 11, 12 and 72. Also, in the second and third power modes, when the input power of the high-frequency signal is low, the high-frequency signal is amplified by power amplifier 11, and when the input power of the high-frequency signal is high, the high-frequency signal is amplified and combined by power amplifiers 11 and 12. Due to this operation, in the amplification circuit 10D, the output impedance of power amplifier 11 increases in the low-output power region, improving efficiency at low output power. Also, in the high-output power region, the output impedance seen from power amplifier 11 decreases, improving linearity at high output power. 【0167】[6 Amplifier Circuit 10E According to Modification 5] Figure 8 is a circuit diagram of the amplifier circuit 10E according to Modification 5 of the embodiment. As shown in the figure, the amplifier circuit 10E according to this modification comprises power amplifiers 11, 12 and 71, a 90° hybrid circuit 13, a combining circuit 14, a switch 69, a capacitor 172, a low-pass filter 15, a high-pass filter 16, a power supply voltage circuit 18, an impedance adjustment circuit 19, a high-frequency input terminal 110 and a high-frequency output terminal 120. The amplifier circuit 10E according to this modification differs from the amplifier circuit 10D according to Modification 4 in that a capacitor 172 and a switch 69 are arranged in place of a capacitor 171 and a switch 68.Hereafter, the amplifier circuit 10E according to this modification will be described focusing on the different configurations, omitting the explanation of the same configuration as the amplifier circuit 10D according to Modification 4. 【0168】 The 90° hybrid circuit 13 is an example of a demultiplexer and has an input terminal 13a (first input terminal) connected to the high-frequency input terminal 110, an output terminal 13c (first output terminal) connected to the input terminal of the power amplifier 12, and an output terminal 13b (second output terminal) connected to the input terminals of power amplifiers 71 and 11. It can distribute the high-frequency signal supplied from the RFIC 3 via the high-frequency input terminal 110 into two high-frequency signals having approximately a 90-degree phase difference and supply them to the power amplifier 12 and the power amplifiers 71 and 11, respectively. 【0169】 The 90° hybrid circuit 13 does not necessarily have to be included in the amplification circuit 10E, and a phase shift circuit with a different circuit configuration may be used instead of the 90° hybrid circuit 13. 【0170】 The power amplifier 12 is an example of a first power amplifier and is connected between the 90° hybrid circuit 13 and the high-pass filter 16. Specifically, the input terminal of the power amplifier 12 is connected to the output terminal 13c of the 90° hybrid circuit 13, and the output terminal of the power amplifier 12 is connected to the input terminal 14c of the combining circuit 14 via the high-pass filter 16. The power amplifier 12 can amplify high-frequency signals with a phase lag of approximately 90° relative to the power amplifier 11. 【0171】The power amplifier 71 is an example of a second power amplifier and is connected between the 90° hybrid circuit 13 and the low-pass filter 15. Specifically, the input terminal of the power amplifier 71 is connected to the output terminal 13b of the 90° hybrid circuit 13, and the output terminal of the power amplifier 71 is connected to the input terminal 14b of the combining circuit 14 via the low-pass filter 15. The power amplifier 71 can amplify high-frequency signals with a phase that leads the power amplifier 12 by approximately 90°. 【0172】 Capacitor 172 is an example of a first reactance element, with one end connected to switch 69 and the other end connected to ground. 【0173】 The switch 69 has a common terminal 69a, and select terminals 69b and 69c, and switches between (1) the common terminal 69a and select terminal 69b are disconnected and the common terminal 69a and select terminal 69c are connected, (2) the common terminal 69a and select terminal 69b are connected and the common terminal 69a and select terminal 69c are disconnected, and (3) the common terminal 69a and select terminal 69b are disconnected and the common terminal 69a and select terminal 69c are disconnected. The common terminal 69a is connected to the input terminal 14b of the combining circuit 14 via the low-pass filter 15, the select terminal 69b is connected to the capacitor 172, and the select terminal 69c is connected to the output terminal of the power amplifier 71. 【0174】 The switch 69 can be considered as a switch circuit composed of a first SPST-type switch having a common terminal 69a (first terminal) and a selection terminal 69b (second terminal), and a second SPST-type switch having a common terminal 69a (third terminal) and a selection terminal 69c (fourth terminal). The first series circuit, which is a circuit in which the first switch and the capacitor 172 are connected in series, is connected between the connection node n2 (first connection point) on the path connecting the output terminal of the power amplifier 71 and the combining circuit 14 and ground. Specifically, the common terminal 69a of the first switch is connected to the connection node n2, and the selection terminal 69b of the first switch is connected to the capacitor 172. The second switch is connected between the connection node n2 and the output terminal of the power amplifier 71. Specifically, the common terminal 69a of the second switch is connected to the connection node n2, and the selection terminal 69c of the second switch is connected to the output terminal of the power amplifier 71. 【0175】 According to this, instead of turning off the power amplifier 71, the second switch is set to a non-conductive state, thereby disconnecting the power amplifier 71 from the combining circuit 14, and thus enabling amplification modes in power amplifiers 11 and 12. 【0176】 Power amplifier 11 is an example of a third power amplifier and is connected between the 90° hybrid circuit 13 and the low-pass filter 15. Specifically, the input terminal of power amplifier 11 is connected to the input terminal of power amplifier 71, and the output terminal of power amplifier 11 is connected to connection node n2. Power amplifier 11 can amplify high-frequency signals with a phase leading approximately 90° relative to power amplifier 12. 【0177】 The power amplifiers 11, 12, and 71 can be constructed from HBTs and manufactured using semiconductor materials. For example, SiGe or GaAs can be used as the semiconductor material. However, the amplification transistors of the power amplifiers 11, 12, and 71 are not limited to HBTs. For example, the power amplifiers 11, 12, and 71 may be constructed from HEMTs or MESFETs. In this case, GaN or SiC may be used as the semiconductor material. Furthermore, some or all of the amplification transistors of the power amplifiers 11, 12, and 71 may be constructed from CMOS and manufactured by an SOI process. In this case, Si may be used as the semiconductor material. 【0178】 The combining circuit 14 is connected to the output terminals of power amplifiers 11 and 71 via a low-pass filter 15, and also connected to the output terminal of power amplifier 12 via a high-pass filter 16. 【0179】 The only difference between this modified high-frequency circuit and the high-frequency circuit 1 according to the embodiment is that an amplification circuit 10E is provided instead of the amplification circuit 10. 【0180】 In the high-frequency circuit according to this modified example, in the first power mode, the common terminal 69a and the selection terminal 69c are connected at switch 69, and the common terminal 69a and the selection terminal 69b are not connected. Also, at switch 21, the common terminal and the first selection terminal are connected. 【0181】 According to this, in the first power mode, the amplification circuit 10E has a phase difference of 90° between the high-frequency signals at the output terminals of power amplifiers 11 and 71 and the high-frequency signals at the output terminal of power amplifier 12, so it can output a band A signal that has stable efficiency and output power with respect to load impedance fluctuations. 【0182】 Furthermore, in the second power mode, the common terminal 69a and the selection terminal 69b are connected at switch 69, and the common terminal 69a and the selection terminal 69c are not connected. Also, at switch 21, the common terminal and the third selection terminal are connected. 【0183】 According to this, in the second power mode, the amplification circuit 10E can output a signal in band C with stable efficiency and output power against load impedance fluctuations because the phase difference between the high-frequency signal at the output terminal of power amplifier 11 and the high-frequency signal at the output terminal of power amplifier 12 is 90°. In addition, since a capacitor 172 is connected to connection node n2 to compensate for the fact that power amplifier 71 is not connected, fluctuations between the output impedance at the output terminals of power amplifiers 11 and 12 in the second power mode and the output impedance at the output terminals of power amplifiers 11 and 12 in the first power mode can be suppressed. Therefore, the amplification circuit 10D can output a signal whose maximum output power is at the second power level while maintaining high efficiency. 【0184】 Furthermore, in the third power mode, the common terminal 69a and the selection terminal 69b are disconnected at switch 69, and the common terminal 69a and the selection terminal 69c are also disconnected. In addition, the common terminal and the second selection terminal are connected at switch 21. 【0185】According to this, in the third power mode, the amplification circuit 10E can output a band B signal with stable efficiency and output power against load impedance fluctuations because the phase difference between the high-frequency signal at the output terminal of power amplifier 11 and the high-frequency signal at the output terminal of power amplifier 12 is 90°. Furthermore, since power amplifier 71 is not connected and capacitor 172 is not connected to connection node n2, the output impedance of power amplifier 12 is located on the higher impedance side than Γopt obtained from load pull. As a result, in the third power mode, the amplification circuit 10E can output a signal whose maximum output power is at the third power level while maintaining high efficiency due to the high impedance. 【0186】 As described above, the amplification circuit 10E is capable of switching the output power while maintaining efficiency in the first power mode, second power mode, and third power mode. 【0187】 [7 Amplifier Circuit 10F According to Modification 6] Figure 9 is a circuit diagram of the amplifier circuit 10F according to Modification 6 of the embodiment. As shown in the figure, the amplifier circuit 10F according to this modification comprises power amplifiers 11, 12, 71 and 72, a 90° hybrid circuit 13, a combining circuit 14, switches 68 and 69, capacitors 171 and 172, a low-pass filter 15, a high-pass filter 16, a power supply voltage circuit 18, an impedance adjustment circuit 19, a high-frequency input terminal 110 and a high-frequency output terminal 120. The amplifier circuit 10F according to this modification differs from the amplifier circuit 10D according to Modification 4 in that it includes the addition of a power amplifier 71, a capacitor 172 and a switch 69. Hereinafter, the amplifier circuit 10F according to this modification will be described focusing on the different configurations, omitting the explanation of the same configuration as the amplifier circuit 10D according to Modification 4. 【0188】The 90° hybrid circuit 13 is an example of a demultiplexer and has an input terminal 13a (first input terminal) connected to the high-frequency input terminal 110, an output terminal 13b (first output terminal) connected to the input terminals of power amplifiers 11 and 71, and an output terminal 13c (second output terminal) connected to the input terminals of power amplifiers 12 and 72. It can distribute the high-frequency signal supplied from the RFIC 3 via the high-frequency input terminal 110 into two high-frequency signals with approximately a 90-degree phase difference and supply them to power amplifiers 11 and 71 and power amplifiers 12 and 72, respectively. Note that the 90° hybrid circuit 13 does not have to be included in the amplification circuit 10F, and a phase shift circuit with a different circuit configuration may be used instead of the 90° hybrid circuit 13. 【0189】 The power amplifier 11 is an example of a first power amplifier and is connected between the 90° hybrid circuit 13 and the low-pass filter 15. Specifically, the input terminal of the power amplifier 11 is connected to the output terminal 13b of the 90° hybrid circuit 13, and the output terminal of the power amplifier 11 is connected to the input terminal 14b of the combining circuit 14 via the low-pass filter 15. The power amplifier 11 can amplify high-frequency signals with a phase that leads the power amplifier 12 by approximately 90°. 【0190】 The power amplifier 72 is an example of a second power amplifier and is connected between the 90° hybrid circuit 13 and the high-pass filter 16. Specifically, the input terminal of the power amplifier 72 is connected to the output terminal 13c of the 90° hybrid circuit 13, and the output terminal of the power amplifier 72 is connected to the input terminal 14c of the combining circuit 14 via the high-pass filter 16. The power amplifier 72 can amplify high-frequency signals with a phase lag of approximately 90° relative to the power amplifier 11. 【0191】 The power amplifier 12 is an example of a third power amplifier and is connected between the 90° hybrid circuit 13 and the high-pass filter 16. Specifically, the input terminal of the power amplifier 12 is connected to the input terminal of the power amplifier 72, and the output terminal of the power amplifier 12 is connected to the connection node n1. The power amplifier 12 can amplify high-frequency signals with a phase delay of approximately 90° relative to the power amplifier 11. 【0192】The power amplifier 71 is an example of a fourth power amplifier and is connected between the 90° hybrid circuit 13 and the low-pass filter 15. Specifically, the input terminal of the power amplifier 71 is connected to the input terminal of the power amplifier 11, and the output terminal of the power amplifier 71 is connected to the combining circuit 14 via the switch 69 and connection node n2. The power amplifier 71 can amplify high-frequency signals with a phase leading approximately 90° relative to the power amplifier 12. 【0193】 Capacitor 172 is an example of a second reactance element, with one end connected to switch 69 and the other end connected to ground. 【0194】 The switch 69 has a common terminal 69a, and select terminals 69b and 69c, and switches between (1) the common terminal 69a and select terminal 69b are disconnected and the common terminal 69a and select terminal 69c are connected, (2) the common terminal 69a and select terminal 69b are connected and the common terminal 69a and select terminal 69c are disconnected, and (3) the common terminal 69a and select terminal 69b are disconnected and the common terminal 69a and select terminal 69c are disconnected. The common terminal 69a is connected to the input terminal 14b of the combining circuit 14 via the low-pass filter 15, the select terminal 69b is connected to the capacitor 172, and the select terminal 69c is connected to the output terminal of the power amplifier 71. 【0195】 The switch 69 can be considered as a switch circuit composed of a third SPST type switch having a common terminal 69a and a selection terminal 69b, and a fourth SPST type switch having a common terminal 69a and a selection terminal 69c. The second series circuit, which is a circuit in which the third switch and the capacitor 172 are connected in series, is connected between the connection node n2 (second connection point) on the path connecting the output terminal of the power amplifier 71 and the combining circuit 14 and ground. Specifically, the common terminal 69a of the third switch is connected to the connection node n2, and the selection terminal 69b of the third switch is connected to the capacitor 172. The fourth switch is connected between the connection node n2 and the output terminal of the power amplifier 11. Specifically, the common terminal 69a of the fourth switch is connected to the connection node n2, and the selection terminal 69c of the fourth switch is connected to the output terminal of the power amplifier 71. 【0196】The only difference between this modified high-frequency circuit and the high-frequency circuit 1 according to the embodiment is that an amplification circuit 10F is provided instead of the amplification circuit 10. 【0197】 In the high-frequency circuit according to this modified example, in the first power mode, the common terminal 68a and the selection terminal 68c are connected at switch 68, and the common terminal 68a and the selection terminal 68b are not connected. Also, at switch 69, the common terminal 69a and the selection terminal 69c are connected, and the common terminal 69a and the selection terminal 69b are not connected. Furthermore, at switch 21, the common terminal and the first selection terminal are connected. 【0198】 According to this, in the first power mode, the amplification circuit 10F has a phase difference of 90° between the high-frequency signals at the output terminals of power amplifiers 11 and 71 and the high-frequency signals at the output terminals of power amplifiers 12 and 72, so it can output a band A signal with stable efficiency and output power against load impedance fluctuations. 【0199】 Furthermore, in the second power mode, the common terminal 68a and the selection terminal 68b are connected at switch 68, and the common terminal 68a and the selection terminal 68c are disconnected. At switch 69, the common terminal 69a and the selection terminal 69b are connected, and the common terminal 69a and the selection terminal 69c are disconnected. Also, at switch 21, the common terminal and the third selection terminal are connected. 【0200】According to this, in the second power mode, the amplification circuit 10F can output a signal in band C with stable efficiency and output power against load impedance fluctuations because the phase difference between the high-frequency signal at the output terminal of power amplifier 11 and the high-frequency signal at the output terminal of power amplifier 12 is 90°. Furthermore, since capacitor 171 is connected to connection node n1 to compensate for the fact that power amplifier 72 is not connected, and capacitor 172 is connected to connection node n2 to compensate for the fact that power amplifier 71 is not connected, fluctuations between the output impedance at the output terminals of power amplifiers 11 and 12 in the second power mode and the output impedance at the output terminals of power amplifiers 11 and 12 in the first power mode can be suppressed. Therefore, the amplification circuit 10F can output a signal whose maximum output power is at the second power level while maintaining high efficiency. 【0201】 Furthermore, in the third power mode, the common terminal 68a and the selection terminal 68b are disconnected at switch 68, and the common terminal 68a and the selection terminal 68c are disconnected. Also, at switch 69, the common terminal 69a and the selection terminal 69b are disconnected, and the common terminal 69a and the selection terminal 69c are disconnected. Also, at switch 21, the common terminal and the second selection terminal are connected. 【0202】According to this, in the third power mode, the amplification circuit 10F can output a band B signal with stable efficiency and output power against load impedance fluctuations because the phase difference between the high-frequency signal at the output terminal of power amplifier 11 and the high-frequency signal at the output terminal of power amplifier 12 is 90°. Furthermore, since power amplifier 71 is not connected and capacitor 172 is not connected to connection node n2, the output impedance of power amplifier 12 is located on the higher impedance side than Γopt obtained from the load pull. Also, since power amplifier 72 is not connected and capacitor 171 is not connected to connection node n1, the output impedance of power amplifier 11 is located on the higher impedance side than Γopt obtained from the load pull. As a result, in the third power mode, the amplification circuit 10F can output a signal whose maximum output power is at the third power level while maintaining high efficiency due to the high impedance. 【0203】 As described above, the amplification circuit 10F is capable of switching the output power while maintaining efficiency in the first power mode, second power mode, and third power mode. 【0204】In this modified configuration, in the fourth power mode, where the maximum output power is lower than the first power level and higher than the second power level, the common terminal 68a and the selection terminal 68b may be connected, the common terminal 68a and the selection terminal 68c may be disconnected, the common terminal 69a and the selection terminal 69c may be connected, and the common terminal 69a and the selection terminal 69b may be disconnected. According to this configuration, the amplification circuit 10F can output a signal with stable efficiency and output power against load impedance fluctuations because the phase difference between the high-frequency signals at the output terminals of power amplifiers 11 and 71 and the high-frequency signals at the output terminal of power amplifier 12 is 90°. Furthermore, since a capacitor 171 is connected to connection node n1 to compensate for the disconnection of power amplifier 72, fluctuations between the output impedance at the output terminals of power amplifiers 11 and 12 in this power mode and the output impedance at the output terminals of power amplifiers 11 and 12 in the first power mode can be suppressed. Therefore, the amplification circuit 10F can output a signal whose maximum output power is lower than the first power level and higher than the second power level, while maintaining high efficiency. 【0205】 Furthermore, in the fourth power mode, the common terminal 69a and the selection terminal 69b may be connected, the common terminal 69a and the selection terminal 69c may be disconnected, the common terminal 68a and the selection terminal 68c may be connected, and the common terminal 68a and the selection terminal 68b may be disconnected. In this case, the amplification circuit 10F can output a signal with stable efficiency and output power against load impedance fluctuations because the phase difference between the high-frequency signal at the output terminal of power amplifier 11 and the high-frequency signals at the output terminals of power amplifiers 12 and 72 is 90°. In addition, since the capacitor 172 is connected to the connection node n2 to compensate for the disconnection of power amplifier 71, fluctuations between the output impedance at the output terminals of power amplifiers 11 and 12 in this power mode and the output impedance at the output terminals of power amplifiers 11 and 12 in the first power mode can be suppressed. Therefore, the amplification circuit 10F can output a signal with a maximum output power that is lower than the first power level and higher than the second power level while maintaining high efficiency. 【0206】 [8 Amplifier Circuit 10G According to Modification 7] Figure 10 is a circuit diagram of the amplifier circuit 10G according to Modification 7 of the embodiment. The amplifier circuit 10G according to this modification comprises power amplifiers 11, 12 and 72, a 90° hybrid circuit 13, a combining circuit 14, a switch 63, a capacitor 171, a low-pass filter 15, a high-pass filter 16, a power supply voltage circuit 18, an impedance adjustment circuit 19, a high-frequency input terminal 110 and a high-frequency output terminal 120. The amplifier circuit 10G according to this modification differs from the amplifier circuit 10D according to Modification 4 in that a switch 63 is placed in place of a switch 68.Hereafter, the amplifier circuit 10G according to this modification will be described in detail, omitting the explanation of the same configuration as the amplifier circuit 10D according to Modification 4, and focusing on the switch 63, which has a different configuration. 【0207】 The input terminal of power amplifier 12 is connected to the input terminal of power amplifier 72, and the output terminal of power amplifier 12 is connected to the output terminal of power amplifier 72. 【0208】 Capacitor 171 is an example of a first reactance element, with one end connected to switch 63 and the other end connected to ground. 【0209】 Switch 63 is an example of a first switch and has terminals 63a (first terminal) and 63b (second terminal), and switches the connection and disconnection of terminals 63a and 63b. Terminal 63a is connected to connection node n1 (first connection point) on the path connecting the output terminal of the power amplifier 12 and the combining circuit 14, and terminal 63b is connected to capacitor 171. Switch 63 and capacitor 171 constitute a first series circuit connected in series with each other, and the first series circuit is connected between connection node n1 (first connection point) and ground. 【0210】 The on and off states of the power amplifiers 11, 12, and 72 are switched by control signals supplied from the PA control circuit 50. 【0211】Note that the switch 63 and the capacitor 171 may be connected in series in reverse. Specifically, one end of the capacitor 171 may be connected to connection node n1, the other end of the capacitor 171 may be connected to terminal 63a, and terminal 63b may be connected to ground. 【0212】 The only difference between this modified high-frequency circuit and the high-frequency circuit 1 of the embodiment is that an amplification circuit 10G is provided instead of the amplification circuit 10. 【0213】 In the high-frequency circuit according to this modified example, in the first power mode, terminals 63a and 63b of switch 63 are disconnected, and power amplifiers 11, 12 and 72 are turned on. Also, the common terminal and the first selection terminal of switch 21 are connected. 【0214】 As a result, the transmission signal for band A is split by the 90° hybrid circuit 13 into a decoupled signal RF1 with a phase of 0° and a decoupled signal RF2 with a phase of -90°, and these are input to power amplifiers 11, 12, and 72 respectively for amplification. The decoupled signal RF1 output from power amplifier 11 passes through the low-pass filter 15 to a phase of -45°, and the decoupled signals RF2 output from power amplifiers 12 and 72 pass through the high-pass filter 16 to a phase of -45°. The in-phase decoupled signals RF1 and RF2 are combined in the combining circuit 14 and output from antenna 2 via the impedance adjustment circuit 19, switch 21, filter 31, switch 22, and antenna connection terminal 100. 【0215】 According to this, in the first power mode, the phase difference between the high-frequency signal at the output terminal of power amplifier 11 and the high-frequency signals at the output terminals of power amplifiers 12 and 72 is 90°, so stable efficiency and output power can be ensured against load impedance fluctuations. 【0216】 In the second power mode, terminals 63a and 63b are connected at switch 63, power amplifiers 11 and 12 are turned on, and power amplifier 72 is turned off. Also, the common terminal and the third selection terminal are connected at switch 21. 【0217】 As a result, the transmission signal for band C is split by the 90° hybrid circuit 13 into a decoupled signal RF1 with a phase of 0° and a decoupled signal RF2 with a phase of -90°, and these are input to power amplifiers 11 and 12, respectively, and amplified. The decoupled signal RF1 output from power amplifier 11 passes through the low-pass filter 15 to a phase of -45°, and the decoupled signal RF2 output from power amplifier 12 passes through the high-pass filter 16 to a phase of -45°. The in-phase decoupled signals RF1 and RF2 are combined in the combining circuit 14 and output from antenna 2 via the impedance adjustment circuit 19, switch 21, filter 33, switch 22, and antenna connection terminal 100. 【0218】 According to this, fluctuations between the output impedance at the output terminals of power amplifiers 11 and 12 in the second power mode and the output impedance at the output terminals of power amplifiers 11 and 12 in the first power mode can be suppressed. Therefore, it becomes possible to switch the output power while maintaining efficiency in the first power mode and the second power mode. 【0219】 Furthermore, in the third power mode, terminals 63a and 63b of switch 63 are disconnected, power amplifiers 11 and 12 are turned on, and power amplifier 72 is turned off. 【0220】 The transmission signal for band B is split by the 90° hybrid circuit 13 into a decoupled signal RF1 with a phase of 0° and a decoupled signal RF2 with a phase of -90°, and these are input to power amplifiers 11 and 12, respectively, and amplified. The decoupled signal RF1 output from power amplifier 11 passes through the low-pass filter 15 to a phase of -45°, and the decoupled signal RF2 output from power amplifier 12 passes through the high-pass filter 16 to a phase of -45°. The in-phase decoupled signals RF1 and RF2 are combined in the combining circuit 14 and output from antenna 2 via the impedance adjustment circuit 19, switch 21, filter 32, switch 22, and antenna connection terminal 100. 【0221】According to this, the output impedance at the output terminal of the power amplifier 11 in the third power mode can be set to a position that prioritizes efficiency over output power. Therefore, it becomes possible to switch the output power while maintaining efficiency in the third power mode. 【0222】 In this modified example, the amplifier circuit 10G has a configuration in which the switch 68 (SPDT type) in the amplifier circuit 10D of modified example 4 is replaced with a switch 63 (SPST type). However, the amplifier circuit of modified example 8 has a configuration in which, in the amplifier circuit 10F having four power amplifiers 11, 12, 71 and 72, the switch 68 (SPDT type) is replaced with a first SPST type switch, and the switch 69 (SPDT type) is replaced with a third SPST type switch. 【0223】 In the amplification circuit according to modified example 8, in the first power mode, the first switch and the third switch are in a non-conductive state, and the power amplifiers 11, 12, 71, and 72 are in an ON state. 【0224】 According to this, in the first power mode, the phase difference between the high-frequency signals at the output terminals of power amplifiers 11 and 71 and the high-frequency signals at the output terminals of power amplifiers 12 and 72 is 90°, so stable efficiency and output power can be ensured against load impedance fluctuations. 【0225】 In the second power mode, the first and third switches are in a conductive state, power amplifiers 11 and 12 are in an ON state, and power amplifiers 71 and 72 are in an OFF state. 【0226】 According to this, fluctuations between the output impedance at the output terminals of power amplifiers 11 and 12 in the second power mode and the output impedance at the output terminals of power amplifiers 11 and 12 in the first power mode can be suppressed. Therefore, it becomes possible to switch the output power while maintaining efficiency in the first power mode and the second power mode. 【0227】Furthermore, in the third power mode, the first and third switches are in a non-conductive state, power amplifiers 11 and 12 are in an ON state, and power amplifiers 71 and 72 are in an OFF state. 【0228】 According to this, the output impedance at the output terminals of power amplifiers 11 and 12 in the third power mode can be set to a value that prioritizes efficiency over output power. Therefore, it becomes possible to switch the output power while maintaining efficiency in the third power mode. 【0229】 [9 Circuit Configuration of Impedance Adjustment Circuit 19A According to Modification 9] Each of the amplification circuits 10A to 10G according to the embodiment and each of the amplification circuits 10A to 10G according to the respective modifications may be equipped with the impedance adjustment circuit 19A according to this modification instead of the impedance adjustment circuit 19. Figure 11 is a circuit diagram of the impedance adjustment circuit 19A according to modification 9 of the embodiment. The impedance adjustment circuit 19A shown in the figure comprises capacitors 194, 195, 196 and 197, inductors 198 and 199, and switches 64, 65 and 66. A second parallel connection circuit of capacitor 194 (fourth capacitor) and switch 64 (sixth switch) and capacitor 195 (fifth capacitor), which are connected in series with each other, is arranged in series in the series arm path connecting the output terminal 14a and the high-frequency output terminal 120. Furthermore, a first parallel connection circuit of capacitor 196 (second capacitor) and switch 65 (fifth switch) connected in series with capacitor 197 (third capacitor) is connected between the series arm path between the output terminal 14a and the second parallel connection circuit and ground. In addition, a first series connection circuit of inductor 199 (second inductor) and switch 66 (seventh switch) connected in parallel with inductor 198 (third inductor) is connected between the series arm path between the second parallel connection circuit and the high-frequency output terminal 120 and ground. 【0230】In the above circuit configuration, the real component of the load impedance at the output terminal 14a of the combining circuit 14 can be shifted by switching the conduction and non-conduction states of switches 64 to 66. For example, by setting switch 64 to a non-conducting state, switch 65 to a conduction state, and switch 66 to a conduction state, the real component of the load impedance at the output terminal 14a is shifted to a higher value. Alternatively, by setting switch 64 to a conduction state, switch 65 to a non-conducting state, and switch 66 to a non-conducting state, the real component of the load impedance at the output terminal 14a is shifted to a lower value. 【0231】 According to this, in the amplification circuits 10, 10A to 10G, the impedance adjustment circuit 19A can adjust the balance between the efficiency that is optimal on the high impedance side and the output power that is optimal on the low impedance side. 【0232】 [10 Component Arrangement of Amplifier Circuit 10D] Next, the component arrangement of the amplifier circuit 10D according to the 4th modified embodiment will be described. Figure 12 is a plan view of the amplifier circuit 10D according to the 4th modified embodiment. Figure 12 shows the arrangement of circuit components when the main surface 90a of the mounting substrate 90 is viewed through from the positive z-axis direction. In Figure 12, circuit components located on the main surface 90a of the mounting substrate 90 and inside the mounting substrate 90 are shown with solid lines, and circuit components located on the main surface 90b are shown with dashed lines. In addition, in Figure 12, the wiring connecting the mounting substrate 90 and each circuit component is partially omitted from the illustration. 【0233】 The amplifier circuit 10D shown in Figure 12 has a mounting board 90 in addition to the amplifier circuit 10D shown in Figure 5. 【0234】The mounting substrate 90 has two opposing main surfaces 90a (first main surface) and 90b (second main surface: not shown in Figure 12), and is a substrate on which circuit components constituting the amplifier circuit 10D are mounted. As the mounting substrate 90, for example, a low-temperature co-fired ceramics (LTCC) substrate having a laminated structure of multiple dielectric layers, a high-temperature co-fired ceramics (HTCC) substrate, a component-embedded substrate, a substrate having a redistribution layer (RDL), or a printed circuit board can be used. 【0235】 As shown in Figure 12, the main surface 90a has a 90° hybrid circuit 13, power amplifiers 11, 12 and 72, inductors 151, 162, 164, 181, 182 and 192, capacitors 161, 163, 183 and 193, and a variable capacitor 191. On the other hand, the main surface 90b has a switch 68 and a capacitor 171. 【0236】 According to this, since the circuit components are distributed and arranged on the main surfaces 90a and 90b of the mounting board 90, the amplification circuit 10D can be miniaturized. 【0237】 The 90° hybrid circuit 13, power amplifiers 11, 12, and 72 are included in semiconductor IC 81 (first semiconductor integrated component). The switch 68 and capacitor 171 are included in semiconductor IC 82 (second semiconductor integrated component). The 90° hybrid circuit 13 does not necessarily have to be included in semiconductor IC 81. Furthermore, semiconductor IC 82 may include at least one of the low-noise amplifiers 41-43 and switches 21 and 22 that are part of the high-frequency circuit. 【0238】 According to this, the 90° hybrid circuit 13, power amplifiers 11, 12, and 72 are integrated into a single chip, and the switch 68 and capacitor 171 are also integrated into a single chip, so the amplification circuit 10D can be miniaturized. 【0239】The semiconductor ICs 81 and 82 may be constructed using, for example, CMOS (Complementary Metal Oxide Semiconductor), and specifically manufactured by an SOI (Silicon on Insulator) process. Furthermore, the semiconductor ICs 81 and 82 may be composed of at least one of GaAs, SiGe, and GaN. However, the semiconductor material of the semiconductor ICs 81 and 82 is not limited to the materials described above. 【0240】 The inductors 151, 162, 164, 181, 182, and 192, and the capacitors 161, 163, 183, and 193 are surface-mount components. At least one of the inductors 151, 162, 164, 181, 182, and 192, and the capacitors 161, 163, 183, and 193 may be composed of planar conductors (and via conductors) formed on the mounting substrate 90. 【0241】 [11 Effects, etc.] The amplification circuit 10 according to this embodiment comprises power amplifiers 11 and 12, a combining circuit 14 connected to the output terminal of power amplifier 11 and the output terminal of power amplifier 12, and a first series circuit consisting of a first switch and a capacitor 171 connected in series with each other. The first series circuit is connected between a connection node n1 on the path connecting the output terminal of power amplifier 12 and the combining circuit 14 and ground. 【0242】 According to this, when both power amplifiers 11 and 12 are operated (referred to as high-power mode), the capacitor 171 is not connected to the above path, and when only power amplifier 11 is operated (referred to as low-power mode), the capacitor 171 is connected to the above path. This suppresses fluctuations between the output impedance at the output terminal of power amplifier 11 in low-power mode and the output impedance at the output terminal of power amplifier 11 in high-power mode. Therefore, it becomes possible to switch the output power while maintaining efficiency in high-power mode and low-power mode. 【0243】For example, in the amplification circuit 10, the first switch has a common terminal 17a and a selection terminal 17b, the common terminal 17a is connected to connection node n1, and the capacitor 171 is connected between the selection terminal 17b and ground. Furthermore, there is a second switch having a common terminal 17a and a selection terminal 17c, and the second switch is connected between connection node n1 and the output terminal of the power amplifier 12. 【0244】 According to this, the power amplifier 12 and the combining circuit 14 can be connected and disconnected by switching the conduction and non-conductivity of the second switch. 【0245】 For example, the amplification circuit 10D according to modified example 4 comprises power amplifiers 11, 12, and 72, a combining circuit 14 connected to the output terminals of power amplifiers 11, 12, and 72, a first series circuit consisting of a first switch and a capacitor 171 connected in series with each other, and a second switch connected between a connection node n1 on the path connecting the output terminal of power amplifier 72 and the combining circuit 14 and the output terminal of power amplifier 72. The input terminal of power amplifier 12 is connected to the input terminal of power amplifier 72, the output terminal of power amplifier 12 is connected to connection node n1, and the first series circuit is connected between connection node n1 and ground. 【0246】 According to this, when power amplifiers 11, 12, and 72 are operated (first power mode), the capacitor 171 is not connected to the above path, and when power amplifiers 11 and 12 are operated (second power mode), the capacitor 171 is connected to the above path. This suppresses fluctuations between the output impedance at the output terminal of power amplifier 11 in the second power mode and the output impedance at the output terminal of power amplifier 11 in the first power mode. Therefore, it becomes possible to switch the output power while maintaining efficiency in the first power mode and the second power mode. 【0247】For example, the amplification circuit 10F according to modified example 6 comprises power amplifiers 11, 12, 71 and 72, a combining circuit 14 connected to the output terminals of power amplifiers 11, 12, 71 and 72, a first series circuit consisting of a first switch and a capacitor 171 connected in series with each other, a second series circuit consisting of a third switch and a capacitor 172 connected in series with each other, a second switch connected between the output terminal of power amplifier 72 and connection node n1, and a fourth switch connected between the output terminal of power amplifier 71 and connection node n2. The input terminal of power amplifier 12 is connected to the input terminal of power amplifier 72, the output terminal of power amplifier 12 is connected to connection node n1, the first series circuit is connected between connection node n1 and ground, the input terminal of power amplifier 11 is connected to the input terminal of power amplifier 71, the output terminal of power amplifier 11 is connected to connection node n2, and the second series circuit is connected between connection node n2 and ground. 【0248】 According to this, when power amplifiers 11, 12, 71, and 72 are operated (first power mode), capacitors 171 and 172 are not connected to the above path, and when power amplifiers 11 and 12 are operated (second power mode), capacitors 171 and 172 are connected to the above path. This suppresses fluctuations between the output impedance at the output terminals of power amplifiers 11 and 12 in the first power mode and the output impedance at the output terminals of power amplifiers 11 and 12 in the second power mode. Therefore, it becomes possible to switch the output power while maintaining efficiency in the first power mode and the second power mode. 【0249】 For example, the amplification circuit 10G according to modified example 7 comprises power amplifiers 11, 12, and 72, a combining circuit 14 connected to the output terminals of power amplifiers 11, 12, and 72, and a first series circuit consisting of a first switch and a capacitor 171 connected in series with each other. The input terminal of power amplifier 12 is connected to the input terminal of power amplifier 72, the output terminal of power amplifier 12 is connected to the output terminal of power amplifier 72, and the first series circuit is connected between connection node n1 and ground. 【0250】According to this, when power amplifiers 11, 12, and 72 are operated (first power mode), the capacitor 171 is not connected to the above path, and when power amplifiers 11 and 12 are operated (referred to as the second power mode), the capacitor 171 is connected to the above path, thereby suppressing fluctuations between the output impedance at the output terminal of power amplifier 11 in the second power mode and the output impedance at the output terminal of power amplifier 11 in the first power mode. Therefore, it becomes possible to switch the output power while maintaining efficiency in the first power mode and the second power mode. 【0251】 For example, the amplification circuit according to modification 8 comprises power amplifiers 11, 12, 71 and 72, a combining circuit 14 connected to the output terminals of power amplifiers 11, 12, 71 and 72, a first series circuit consisting of a first switch and a capacitor 171 connected in series with each other, and a second series circuit consisting of a third switch and a capacitor 172 connected in series with each other, the input terminal of power amplifier 12 is connected to the input terminal of power amplifier 72, the output terminal of power amplifier 12 is connected to the output terminal of power amplifier 72, the input terminal of power amplifier 11 is connected to the input terminal of power amplifier 71, the output terminal of power amplifier 11 is connected to the output terminal of power amplifier 71, the first series circuit is connected between connection node n1 and ground, and the second series circuit is connected between connection node n2 and ground. 【0252】 According to this, when power amplifiers 11, 12, 71, and 72 are operated (first power mode), capacitors 171 and 172 are not connected to the above path, and when power amplifiers 11 and 12 are operated (referred to as the second power mode), capacitors 171 and 172 are connected to the above path. This suppresses fluctuations between the output impedance at the output terminals of power amplifiers 11 and 12 in the second power mode and the output impedance at the output terminals of power amplifiers 11 and 12 in the first power mode. Therefore, it becomes possible to switch the output power while maintaining efficiency in the first power mode and the second power mode. 【0253】For example, when the amplifier circuits 10 and 10D transmit a high-frequency signal in the first power mode, the first switch becomes non-conductive and the second switch becomes conductive, and when the amplifier circuits 10 and 10D transmit a high-frequency signal in the second power mode, the first switch becomes conductive and the second switch becomes non-conductive. 【0254】 According to this, fluctuations between the output impedance at the output terminal of the power amplifier 11 in the first power mode and the output impedance at the output terminal of the power amplifier 11 in the second power mode can be suppressed. Therefore, it becomes possible to switch the output power while maintaining efficiency in both the first and second power modes. 【0255】 Furthermore, for example, when a high-frequency signal is transmitted in the third power mode in the amplification circuits 10 and 10D, the first switch becomes non-conductive, and the second switch also becomes non-conductive. 【0256】 According to this, the output impedance at the output terminal of the power amplifier 11 in the third power mode can be set to a position that prioritizes efficiency over output power. Therefore, it becomes possible to switch the output power while maintaining efficiency in the third power mode. 【0257】 For example, in the amplification circuit 10F, when a high-frequency signal is transmitted in the first power mode, the first and third switches become non-conductive, and the second and fourth switches become conductive; when a high-frequency signal is transmitted in the second power mode, the first and third switches become conductive, and the second and fourth switches become non-conductive; and when a high-frequency signal is transmitted in the third power mode, the first and third switches become non-conductive, and the second and fourth switches become non-conductive. 【0258】According to this, in the first power mode, capacitors 171 and 172 are not connected to connection nodes n1 and n2, while in the second power mode, capacitors 171 and 172 are connected to connection nodes n1 and n2, respectively. This suppresses fluctuations between the output impedance at the output terminals of power amplifiers 11 and 12 in the second power mode and the output impedance at the output terminals of power amplifiers 11 and 12 in the first power mode. Furthermore, the output impedance at the output terminals of power amplifiers 11 and 12 in the third power mode can be positioned to prioritize efficiency over output power. This makes it possible to switch output power while maintaining efficiency in each power mode. 【0259】 For example, in the amplification circuit 10A, when a high-frequency signal is transmitted in the first power mode, the first switch becomes non-conductive and power amplifiers 11 and 12 become ON. When a high-frequency signal is transmitted in the second power mode, the first switch becomes conductive, power amplifier 11 becomes ON, and power amplifier 12 becomes OFF. 【0260】 For example, in the amplification circuit 10G, when a high-frequency signal is transmitted in the first power mode, the first switch becomes non-conductive, and power amplifiers 11, 12, and 72 are turned on. When a high-frequency signal is transmitted in the second power mode, the first switch becomes conductive, power amplifiers 11 and 12 are turned on, and power amplifier 72 is turned off. 【0261】 According to this, fluctuations between the output impedance at the output terminal of the power amplifier 11 in the first power mode and the output impedance at the output terminal of the power amplifier 11 in the second power mode can be suppressed. Therefore, it becomes possible to switch the output power while maintaining efficiency in both the first and second power modes. 【0262】 For example, when transmitting a high-frequency signal in the third power mode in the amplification circuit 10A, the first switch becomes non-conductive, the power amplifier 11 becomes ON, and the power amplifier 12 becomes OFF. 【0263】 For example, when transmitting a high-frequency signal in the third power mode in the amplification circuit 10G, the first switch becomes non-conductive, power amplifiers 11 and 12 become ON, and power amplifier 72 becomes OFF. 【0264】 According to this, the output impedance at the output terminal of the power amplifier 11 in the third power mode can be set to a position that prioritizes efficiency over output power. Therefore, it becomes possible to switch the output power while maintaining efficiency in the third power mode. 【0265】 For example, in the amplification circuit according to Modification 8, when a high-frequency signal is transmitted in the first power mode, the first switch and the third switch are in a non-conductive state, and power amplifiers 11, 12, 71, and 72 are in an ON state; when a high-frequency signal is transmitted in the second power mode, the first switch and the third switch are in a conductive state, power amplifiers 11 and 12 are in an ON state, and power amplifiers 71 and 72 are in an OFF state; and when a high-frequency signal is transmitted in the third power mode, the first switch and the third switch are in a non-conductive state, power amplifiers 11 and 12 are in an ON state, and power amplifiers 71 and 72 are in an OFF state. 【0266】 According to this, in the first power mode, capacitors 171 and 172 are not connected to connection nodes n1 and n2, while in the second power mode, capacitors 171 and 172 are connected to connection nodes n1 and n2, respectively. This suppresses fluctuations between the output impedance at the output terminals of power amplifiers 11 and 12 in the second power mode and the output impedance at the output terminals of power amplifiers 11 and 12 in the first power mode. Furthermore, the output impedance at the output terminals of power amplifiers 11 and 12 in the third power mode can be positioned to prioritize efficiency over output power. This makes it possible to switch output power while maintaining efficiency in each power mode. 【0267】For example, the amplification circuits 10, 10A, 10D, 10E, 10F, and 10G further include a high-frequency input terminal 110 and a high-frequency output terminal 120, a 90° hybrid circuit 13 having an input terminal 13a connected to the high-frequency input terminal 110, an output terminal 13b connected to the input terminal of the power amplifier 11, and an output terminal 13c connected to the input terminal of the power amplifier 12, a low-pass filter 15, and a high-pass filter 16, wherein one of the low-pass filter 15 and the high-pass filter 16 is connected between one output terminal of the power amplifiers 11 and 12 and the combining circuit 14, and the other of the low-pass filter 15 and the high-pass filter 16 is connected between the first connection point and the combining circuit 14. 【0268】 According to this, stable efficiency and output power can be ensured even with respect to load impedance fluctuations. 【0269】 For example, in the amplifier circuits 10, 10A, 10D, 10E, 10F, and 10G, the low-pass filter 15 includes an inductor 151 arranged in series with respect to the input terminal and the output terminal, and the high-pass filter 16 includes a capacitor 161 arranged in series with respect to respect to the input terminal and the output terminal, wherein the inductance value of the inductor 151 is variable and the capacitance value of the capacitor 161 is variable. 【0270】 According to this, by changing the inductance value and / or capacitance value at the timing of switching the conduction and non-conductivity of the first switch and the second switch, it becomes possible to fine-tune the impedance seen from the output terminals of the power amplifiers 11 and 12 to the combining circuit 14 side. 【0271】Furthermore, for example, the amplifier circuit 10B according to Modification 2 and the amplifier circuit 10C according to Modification 3 include a high-frequency input terminal 110 and a high-frequency output terminal 120, power amplifiers 11 and 12, a transformer 61 having an input coil 611 and an output coil 612, a transformer 14C having an input coil 141 and an output coil 142 and connected to the output terminal of the power amplifier 11 and the output terminal of the power amplifier 12, and a first series circuit consisting of a first switch and a capacitor 171 connected in series with each other, wherein the first series circuit is connected to the output terminal of the power amplifier 12 and the transformer 14C The input coil 611 is connected between the connection node n1 on the path connecting the two coils and ground. One end of the input coil 611 is connected to the high-frequency input terminal 110, and the other end of the input coil 611 is connected to ground. One end of the output coil 612 is connected to the input terminal of the power amplifier 11, and the other end of the output coil 612 is connected to the input terminal of the power amplifier 12. One end of the input coil 141 is connected to the output terminal of the power amplifier 11, and the other end of the input coil 141 is connected to the connection node n1. One end of the output coil 142 is connected to the high-frequency output terminal 120, and the other end of the output coil 142 is connected to ground. 【0272】 This makes it possible to switch output power while maintaining low noise and low loss in each power mode. 【0273】 For example, the amplification circuits 10 and 10A to 10G further include an impedance adjustment circuit 19A, which comprises a first impedance adjustment circuit in which a series connection circuit of capacitor 196 and switch 65 and capacitor 197 are connected in parallel, a second impedance adjustment circuit in which a series connection circuit of capacitor 194 and switch 64 and capacitor 195 are connected in parallel, and a third impedance adjustment circuit in which a parallel connection circuit of inductor 199 and switch 66 and inductor 198 are connected in series, the second impedance adjustment circuit being arranged in series with the series arm path connecting the combining circuit 14 and the high-frequency output terminal 120, the first impedance adjustment circuit being connected between the series arm path and ground, and the third impedance adjustment circuit being connected between the series arm path and ground. 【0274】According to this, the real component of the load impedance at the output terminal 14a of the combining circuit 14 can be shifted. Therefore, the impedance adjustment circuit 19A can adjust the balance between the efficiency that is optimal on the high impedance side and the output power that is optimal on the low impedance side. 【0275】 For example, the amplification circuits 10 and 10A to 10G further include a mounting board 90 having opposing main surfaces 90a and 90b, with the power amplifiers 11 and 12 arranged on the main surface 90a and the first switch and capacitor 171 arranged on the main surface 90b. 【0276】 According to this, since the circuit components are distributed and arranged on the main surfaces 90a and 90b of the mounting board 90, the amplification circuits 10 and 10A to 10G can be miniaturized. 【0277】 For example, in amplification circuits 10 and 10A to 10G, power amplifiers 11 and 12 are included in semiconductor IC 81, and the first switch and capacitor 171 are included in semiconductor IC 82. 【0278】 According to this, the power amplifiers 11 and 12 are integrated into a single chip, and the first switch and capacitor 171 are also integrated into a single chip, so the amplification circuits 10 and 10A to 10G can be miniaturized. 【0279】 For example, the high-frequency circuit according to the embodiment includes an amplification circuit 10 and one of 10A to 10G, an antenna connection terminal 100, a plurality of filters 31 to 33 connected between the amplification circuit 10 (10A to 10G) and the antenna connection terminal 100, and a switch 21 connected between the amplification circuit 10 (10A to 10G) and the plurality of filters 31 to 33, which selectively connects the amplification circuit 10 (10A to 10G) to at least one of the plurality of filters 31 to 33. 【0280】 This makes it possible to provide a high-frequency circuit that can switch output power while maintaining efficiency in high-power and low-power modes. 【0281】For example, the high-frequency circuit according to the embodiment further includes low-noise amplifiers 41 to 43 connected to the paths connecting the antenna connection terminal 100 and each of the plurality of filters 31 to 33. 【0282】 According to this, a high-frequency circuit capable of transmitting and receiving high-frequency signals with different power levels can be provided. 【0283】 (Other Embodiments, etc.) Although embodiments and modifications of the amplification circuit and high-frequency circuit according to the embodiments of the present invention have been described above, the amplification circuit and high-frequency circuit according to the present invention are not limited to the above embodiments and modifications. Other embodiments realized by combining any components in the above embodiments and modifications, modifications obtained by applying various modifications to the above embodiments and modifications that a person skilled in the art can conceive of without departing from the spirit of the present invention, and various devices incorporating the above amplification circuit and high-frequency circuit are also included in the present invention. 【0284】 For example, in the amplification circuit and high-frequency circuit according to the above embodiment and its modifications, other circuit elements and wiring may be inserted between the paths connecting each circuit element and signal path disclosed in the drawings. 【0285】 The present invention can be widely used in communication devices such as mobile phones as an amplification circuit, high-frequency circuit, or communication device located in the front end. 【0286】1. High-frequency circuit 2. Antenna 3. RF signal processing circuit (RFIC) 4. Communication device 10, 10A, 10B, 10C, 10D, 10E, 10F, 10G Amplifier circuit 11, 12, 71, 72 Power amplifier 13. 90° hybrid circuit 13a Input terminal 13b, 13c Output terminal 14. Combining circuit 14a Output terminal 14b, 14c Input terminal 14C, 61 Transformer 15. Low-pass filter 16. High-pass filter 17, 21, 22, 63, 64, 65, 66, 67, 68, 69 Switch 17a, 68a, 69a Common terminal 17b, 17c, 68b, 68c, 69b, 69c Select terminal 18. Power supply voltage circuit 19, 19A Impedance adjustment circuit 31, 32, 33, 34, 35, 36 Filters 41, 42, 43 Low-noise amplifiers 50 PA control circuits 63a, 63b, 67a, 67b Terminals 81, 82 Semiconductor ICs 90 Mounting boards 90a, 90b Main surface 100 Antenna connection terminals 110 High-frequency input terminals 120 High-frequency output terminals 130 Power supply voltage terminals 140 Control terminals 141, 611 Input coils 142, 612 Output coils 150 Bias terminals 151, 162, 164, 181, 182, 192, 198, 199 Inductors 161, 163, 171, 172, 183, 184, 193, 194, 195, 196, 197 Capacitors 191 Variable capacitors n1, n2 Connection nodes

Claims

1. An amplification circuit comprising: a first power amplifier; a second power amplifier; a combining circuit connected to the output terminal of the first power amplifier and the output terminal of the second power amplifier; and a first series circuit consisting of a first switch and a first reactance element connected in series with each other, wherein the first series circuit is connected between a first connection point on the path connecting the output terminal of the second power amplifier and the combining circuit and ground.

2. The amplification circuit according to claim 1, wherein the first switch has a first terminal and a second terminal, the first terminal being connected to the first connection point, and the first reactance element being connected between the second terminal and ground, and further comprises a second switch having a third terminal and a fourth terminal, the second switch being connected between the first connection point and the output terminal of the second power amplifier.

3. The amplifier circuit according to claim 2, further comprising a third power amplifier, wherein the input terminal of the third power amplifier is connected to the input terminal of the second power amplifier, and the output terminal of the third power amplifier is connected to the first connection point.

4. The amplifier circuit according to claim 3, further comprising: a fourth power amplifier; a second series circuit consisting of a third switch and a second reactance element connected in series with respect to each other; and a fourth switch, wherein the input terminal of the fourth power amplifier is connected to the input terminal of the first power amplifier; the output terminal of the fourth power amplifier is connected to the combining circuit; the second series circuit is connected between a second connection point on the path connecting the output terminal of the fourth power amplifier and the combining circuit and ground; and the fourth switch is connected between the second connection point and the output terminal of the fourth power amplifier.

5. The amplifier circuit according to claim 1, further comprising a third power amplifier, wherein the input terminal of the third power amplifier is connected to the input terminal of the second power amplifier, and the output terminal of the third power amplifier is connected to the output terminal of the second power amplifier.

6. The amplifier circuit according to claim 5, further comprising a fourth power amplifier and a second series circuit consisting of a third switch and a second reactance element connected in series with respect to the input terminal of the fourth power amplifier, the output terminal of the fourth power amplifier connected to the output terminal of the first power amplifier, and the second series circuit connected between a second connection point on the path connecting the output terminal of the fourth power amplifier and the combining circuit and ground.

7. The amplifier circuit according to claim 2 or 3, wherein when a high-frequency signal is transmitted in a first power mode in which the maximum output power is a first power level, the first switch is in a non-conductive state and the second switch is in a conductive state, and when a high-frequency signal is transmitted in a second power mode in which the maximum output power is a second power level lower than the first power level, the first switch is in a conductive state and the second switch is in a non-conductive state.

8. The amplifier circuit according to claim 7, wherein when a high-frequency signal is transmitted in a third power mode in which the maximum output power is lower than the second power level, the first switch becomes non-conductive and the second switch also becomes non-conductive.

9. The amplifier circuit according to claim 4, wherein when a high-frequency signal is transmitted in a first power mode where the maximum output power is a first power level, the first switch and the third switch are in a non-conductive state and the second switch and the fourth switch are in a conductive state; when a high-frequency signal is transmitted in a second power mode where the maximum output power is a second power level lower than the first power level, the first switch and the third switch are in a conductive state and the second switch and the fourth switch are in a non-conductive state; and when a high-frequency signal is transmitted in a third power mode where the maximum output power is a third power level lower than the second power level, the first switch and the third switch are in a non-conductive state and the second switch and the fourth switch are in a non-conductive state.

10. When transmitting a high-frequency signal in a first power mode in which the maximum output power is a first power level, the first switch is in a non-conductive state and the first power amplifier and the second power amplifier are in an ON state; when transmitting a high-frequency signal in a second power mode in which the maximum output power is a second power level lower than the first power level, the first switch is in a conductive state, the first power amplifier is in an ON state and the second power amplifier is in an OFF state, the amplifier circuit according to any one of claims 1, 5, and 6.

11. When transmitting a high-frequency signal in a third power mode in which the maximum output power is lower than the second power level, the first switch becomes non-conductive, the first power amplifier becomes ON, and the second power amplifier becomes OFF, the amplifier circuit according to claim 10.

12. The amplifier circuit according to claim 6, wherein when a high-frequency signal is transmitted in a first power mode where the maximum output power is a first power level, the first switch and the third switch are in a non-conductive state, and the first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier are in an ON state; when a high-frequency signal is transmitted in a second power mode where the maximum output power is a second power level lower than the first power level, the first switch and the third switch are in a conductive state, and the first power amplifier and the third power amplifier are in an ON state, and the second power amplifier and the fourth power amplifier are in an OFF state; and when a high-frequency signal is transmitted in a third power mode where the maximum output power is a third power level lower than the second power level, the first switch and the third switch are in a non-conductive state, and the first power amplifier and the third power amplifier are in an ON state, and the second power amplifier and the fourth power amplifier are in an OFF state.

13. The amplifier circuit according to any one of claims 1 to 12, further comprising: a high-frequency input terminal and a high-frequency output terminal; a 90° hybrid circuit having a first input terminal connected to the high-frequency input terminal, a first output terminal connected to the input terminal of the first power amplifier, and a second output terminal connected to the input terminal of the second power amplifier; a low-pass filter; and a high-pass filter, wherein one of the low-pass filter and the high-pass filter is connected between the output terminal of the first power amplifier and the combining circuit, and the other of the low-pass filter and the high-pass filter is connected between the first connection point and the combining circuit.

14. The amplifier circuit according to claim 13, wherein the low-pass filter includes a first inductor arranged in series with respect to the input terminal and the output terminal, the high-pass filter includes a first capacitor arranged in series with respect to the input terminal and the output terminal, the first inductor has a variable inductance value, and the first capacitor has a variable capacitance value.

15. The amplification circuit according to any one of claims 1 to 14, further comprising a high-frequency input terminal and a high-frequency output terminal, and a first transformer having a first input coil and a first output coil, wherein the combining circuit includes a second transformer having a second input coil and a second output coil, one end of the first input coil is connected to the high-frequency input terminal, the other end of the first input coil is connected to ground, one end of the first output coil is connected to the input terminal of the first power amplifier, the other end of the first output coil is connected to the input terminal of the second power amplifier, one end of the second input coil is connected to the output terminal of the first power amplifier, the other end of the second input coil is connected to the first connection point, one end of the second output coil is connected to the high-frequency output terminal, and the other end of the second output coil is connected to ground.

16. The amplifier circuit according to claim 13 or 14, further comprising: a first impedance adjustment circuit in which a series connection circuit of a second capacitor and a fifth switch is connected in parallel with a third capacitor; a second impedance adjustment circuit in which a series connection circuit of a fourth capacitor and a sixth switch is connected in parallel with a fifth capacitor; and a third impedance adjustment circuit in which a parallel connection circuit of a second inductor and a seventh switch is connected in series with a third inductor, wherein the second impedance adjustment circuit is arranged in series with a series arm path connecting the combining circuit and the high-frequency output terminal; the first impedance adjustment circuit is connected between the series arm path and ground; and the third impedance adjustment circuit is connected between the series arm path and ground.

17. The amplifier circuit according to any one of claims 1 to 16, further comprising a mounting substrate having a first main surface and a second main surface facing each other, wherein the first power amplifier and the second power amplifier are arranged on the first main surface, and the first switch and the first reactance element are arranged on the second main surface.

18. The amplification circuit according to claim 17, wherein the first power amplifier and the second power amplifier are included in a first semiconductor integrated component, and the first switch and the first reactance element are included in a second semiconductor integrated component.

19. A high-frequency circuit comprising: an amplification circuit according to any one of claims 1 to 18; an antenna connection terminal; a plurality of filters connected between the amplification circuit and the antenna connection terminal; and an eighth switch connected between the amplification circuit and the plurality of filters, which selectively connects the amplification circuit and at least one of the plurality of filters.

20. The high-frequency circuit according to claim 19, further comprising a low-noise amplifier connected to a path connecting the antenna connection terminal and each of the plurality of filters.

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