Power conversion device

WO2026176875A1PCT designated stage Publication Date: 2026-08-27PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
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Patent Information

Application Number
PCT/JP2026/002557
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-21
Filing Date
2026-01-27
Publication Date
2026-08-27

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Abstract

The present invention addresses the problem of enabling zero-voltage soft switching and reducing current distortion. A control device determines a common shift amount (dcom) such that, when a difference (Δd) between the duty command values of any two phases among the duty command values (du, dv, dw) of a plurality of phases is less than a predetermined threshold (Δdth), the duty command value of one phase among the duty command values of the two phases becomes a value corresponding to 100% or a value corresponding to 0%, and shifts each of the duty command values (du, dv, dw) of the plurality of phases by the common shift amount (dcom) to generate a plurality of first PWM signals (SU1, SV1, SW1), a plurality of second PWM signals (SU2, SV2, SW2), and a plurality of control signals (SU6, SU7, SV6, SV7, SW6, SW7).
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Description

Power converter

[0001] This disclosure relates to a power conversion device, and more particularly to a power conversion device capable of converting DC power to AC power.

[0002] The power conversion device disclosed in Patent Document 1 comprises a first DC terminal and a second DC terminal, a power conversion circuit, a plurality of AC terminals, a plurality of switches, a plurality of resonant capacitors, a resonant inductor, a capacitor, and a control device. The power conversion circuit has a plurality of first switching elements and a plurality of second switching elements. In the power conversion circuit, a plurality of switching circuits, each in which a plurality of first switching elements and a plurality of second switching elements are connected in series one-to-one, are connected in parallel to each other. In the power conversion circuit, a plurality of first switching elements are connected to the first DC terminal, and a plurality of second switching elements are connected to the second DC terminal. The plurality of AC terminals correspond one-to-one to the plurality of switching circuits. Each of the plurality of AC terminals is connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit. The plurality of switches correspond one-to-one to the plurality of switching circuits. Each of the plurality of switches has its first end connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit, and its second end is commonly connected to a common connection point. Multiple resonant capacitors correspond one-to-one with multiple switches. Each of the multiple resonant capacitors is connected between the first terminal and the second DC terminal of the corresponding switch. The resonant inductor has a first terminal and a second terminal. In the resonant inductor, the first terminal of the resonant inductor is connected to a common connection point. A capacitor is connected between the second terminal and the second DC terminal of the resonant inductor. The control device controls multiple first switching elements, multiple second switching elements, and multiple switches. When the control device determines that two-phase resonant currents corresponding to two of the multiple switching circuits are flowing simultaneously through the resonant inductor, it controls the on-periods of the first and second switching elements in one of the two switching circuits.

[0003] In the power conversion device disclosed in Patent Document 1, soft switching can be performed more reliably.

[0004] In the power conversion device disclosed in Patent Document 1, current distortion of the load current may increase due to the difference in the line voltage generated by shifting the on-periods of the first switching element and the second switching element in one switching circuit.

[0005] International Publication No. 2023 / 074636

[0006] An object of the present disclosure is to provide a power conversion device capable of performing zero-voltage soft switching and reducing current distortion.

[0007] A power conversion device according to one embodiment of the present disclosure comprises a first DC terminal, a second DC terminal, a power conversion circuit, a plurality of AC terminals, a plurality of switches, a plurality of resonant capacitors, a resonant inductor, a regenerative capacitor, and a control device. The power conversion circuit has a plurality of first switching elements and a plurality of second switching elements. In the power conversion circuit, a plurality of switching circuits, each in which the plurality of first switching elements and the plurality of second switching elements are connected in series in a one-to-one relationship, are connected in parallel to each other. In the power conversion circuit, the plurality of first switching elements are connected to the first DC terminal, and the plurality of second switching elements are connected to the second DC terminal. The plurality of AC terminals correspond one-to-one to the plurality of switching circuits. Each of the plurality of AC terminals is connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit among the plurality of switching circuits. The plurality of switches correspond one-to-one to the plurality of switching circuits. Each of the plurality of switches has its first end connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit among the plurality of switching circuits, and its second end is commonly connected to a common connection point. The resonant capacitor corresponds one-to-one with the plurality of switches. Each of the plurality of resonant capacitors is connected between the first end and the second DC terminal of the corresponding switch in the plurality of switching circuits. The resonant inductor has a third end and a fourth end. In the resonant inductor, the third end is connected to the common connection point. The regenerative capacitor has a fifth end and a sixth end. In the regenerative capacitor, the fifth end is connected to the first DC terminal or the second DC terminal, and the sixth end is connected to the fourth end of the resonant inductor. The control device generates a plurality of first PWM signals to control the plurality of first switching elements, a plurality of second PWM signals to control the plurality of second switching elements, and a plurality of control signals to control the plurality of switches, based on a plurality of phase duty cycle command values ​​that correspond one-to-one with the plurality of switching circuits.The control device determines a common shift amount when the difference between the duty command values ​​of any two of the multiple phases is less than a predetermined threshold, such that the duty command value of one of the two phases becomes a value equivalent to 100% or 0%, and shifts each of the multiple phases' duty command values ​​by the common shift amount to generate the multiple first PWM signals, the multiple second PWM signals, and the multiple control signals.

[0008] Figure 1 is a circuit diagram of a system equipped with a power converter according to Embodiment 1. Figure 2 is an explanatory diagram of the duty cycle command values ​​used in the control device of the power converter. Figure 3 is a timing chart of the power converter before shifting the duty cycle command values ​​of multiple phases. Figure 4 is a timing chart of the power converter after shifting the duty cycle command values ​​of multiple phases. Figure 5 is a timing chart of the power converter before shifting the duty cycle command values ​​of multiple phases. Figure 6 is a timing chart of the power converter after shifting the duty cycle command values ​​of multiple phases. Figure 7 is a timing chart of the power converter before shifting the duty cycle command values ​​of multiple phases. Figure 8 is a timing chart of the power converter after shifting the duty cycle command values ​​of multiple phases. Figure 9 is an explanatory diagram of the operation of the power converter when the load current of the U phase > 0 and the resonant capacitor of the U phase is being charged. Figure 10 is an explanatory diagram of the operation of the power converter when the load current of the V phase > 0 and the resonant capacitor of the V phase is being charged. Figure 11 is an explanatory diagram of the operation of the power converter described above when the load current of the W phase > 0 and the resonant capacitor of the W phase is being charged. Figure 12 is an explanatory diagram of the operation of the power converter described above when the load current of the U phase > 0 and the resonant capacitor of the U phase is being discharged. Figure 13 is an explanatory diagram of the operation of the power converter described above when the load current of the U phase < 0 and the resonant capacitor of the U phase is being discharged. Figure 14 is an explanatory diagram of the operation of the power converter described above when the load current of the U phase < 0 and the resonant capacitor of the U phase is being charged. Figure 15 is a timing chart of the power converter described above before the duty cycle command values ​​of multiple phases are shifted. Figure 16 is a timing chart of the power converter described above after the duty cycle command values ​​of multiple phases have been shifted. Figure 17 is a circuit diagram of a system equipped with the power converter described above according to Embodiment 3.

[0009] (Embodiment 1) Below, the power conversion device 100 according to Embodiment 1 will be described with reference to Figures 1 to 14.

[0010] (1) Overall Configuration of the Power Converter The power converter 100 includes, for example, a first DC terminal 31, a second DC terminal 32, and a plurality (for example, three) AC terminals 41, as shown in Figure 1. A DC power supply E1 is connected between the first DC terminal 31 and the second DC terminal 32 of the power converter 100, and an AC load RA1 is connected to the plurality of AC terminals 41. The AC load RA1 is, for example, a three-phase servo motor. The power converter 100 converts the DC output from the DC power supply E1 into AC power and outputs it to the AC load RA1. The DC power supply E1 includes, for example, an AC-DC converter, a DC-DC converter, a solar cell, or a fuel cell. In the power converter 100, if the plurality of AC terminals 41 are three AC terminals 41, the AC power is, for example, three-phase AC power having U-phase, V-phase, and W-phase.

[0011] The power converter 100 comprises a power conversion circuit 11, a plurality (for example, three) of switches 8, a plurality (for example, three) of resonant capacitors 9, a regenerative capacitor 15, a resonant inductor L1, and a control device 50. The power converter 100 further comprises a protection circuit 17 and a capacitor C10. Each of the plurality of switches 8 is, for example, a bidirectional switch.

[0012] The power conversion circuit 11 has a plurality (for example, three) of first switching elements 1 and a plurality (for example, three) of second switching elements 2. In the power conversion circuit 11, a plurality (for example, three) of switching circuits 10, each consisting of a plurality of first switching elements 1 and a plurality of second switching elements 2 connected in series in a one-to-one ratio, are connected in parallel to each other. In the power conversion circuit 11, the plurality of first switching elements 1 are connected to a first DC terminal 31, and the plurality of second switching elements 2 are connected to a second DC terminal 32. The plurality of AC terminals 41 correspond one-to-one to the plurality of switching circuits 10. Each of the plurality of AC terminals 41 is connected to the connection point 3 of the first switching element 1 and the second switching element 2 in the corresponding switching circuit 10. The plurality of switches 8 correspond one-to-one to the plurality of switching circuits 10. Each of the plurality of switches 8 has its first end 81 connected to the connection point 3 of the first switching element 1 and the second switching element 2 in the corresponding switching circuit 10, and its second end 82 connected to a common connection point 25. Multiple resonant capacitors 9 correspond one-to-one with multiple switches 8. Each of the multiple resonant capacitors 9 is connected between the first terminal 81 and the second DC terminal 32 of the corresponding switch 8. The resonant inductor L1 has a third terminal and a fourth terminal. In the resonant inductor L1, the third terminal of the resonant inductor L1 is connected to the common connection point 25. The regenerative capacitor 15 has a fifth terminal 153 and a sixth terminal 154. In the regenerative capacitor 15, the fifth terminal 153 is connected to the second DC terminal 32, and the sixth terminal 154 is connected to the fourth terminal of the resonant inductor L1. Therefore, the sixth terminal 154 of the regenerative capacitor 15 is connected to the common connection point 25 via the resonant inductor L1. The control device 50 generates a plurality of first PWM (Pulse Width Modulation) signals SU1, SV1, SW1 for controlling a plurality of first switching elements 1, a plurality of second PWM signals SU2, SV2, SW2 for controlling a plurality of second switching elements 2, and a plurality of control signals SU6, SU7, SV6, SV7, SW6, SW7 for controlling a plurality of switches 8.

[0013] (2) Details of the power converter In the following description, for the sake of convenience, the switching circuits 10 corresponding to the U-phase, V-phase, and W-phase may be referred to as switching circuit 10U, switching circuit 10V, and switching circuit 10W, respectively. Also, in the following description, the first switching element 1 and the second switching element 2 of switching circuit 10U may be referred to as the first switching element 1U and the second switching element 2U. Also, in the following description, the first switching element 1 and the second switching element 2 of switching circuit 10V may be referred to as the first switching element 1V and the second switching element 2V. Also, in the following description, the first switching element 1 and the second switching element 2 of switching circuit 10W may be referred to as the first switching element 1W and the second switching element 2W. Furthermore, in the following, the connection point 3 between the first switching element 1U and the second switching element 2U may be referred to as connection point 3U, the connection point 3 between the first switching element 1V and the second switching element 2V may be referred to as connection point 3V, and the connection point 3 between the first switching element 1W and the second switching element 2W may be referred to as connection point 3W. Furthermore, in the following, the AC terminal 41 connected to connection point 3U may be referred to as AC terminal 41U, the AC terminal 41 connected to connection point 3V may be referred to as AC terminal 41V, and the AC terminal 41 connected to connection point 3W may be referred to as AC terminal 41W. Furthermore, in the following, the resonant capacitor 9 connected in parallel to the second switching element 2U may be referred to as resonant capacitor 9U, the resonant capacitor 9 connected in parallel to the second switching element 2V may be referred to as resonant capacitor 9V, and the resonant capacitor 9 connected in parallel to the second switching element 2W may be referred to as resonant capacitor 9W. Furthermore, in the following, the switch 8 connected to connection point 3U may be referred to as switch 8U, the switch 8 connected to connection point 3V as switch 8V, and the switch 8 connected to connection point 3W as switch 8W.

[0014] The power converter 100 has the high-potential output terminal (positive terminal) of the DC power supply E1 connected to the first DC terminal 31, and the low-potential output terminal (negative terminal) of the DC power supply E1 connected to the second DC terminal 32. In addition, the power converter 100 has, for example, three AC terminals 41U, 41V, and 41W connected to the U-phase terminal, V-phase terminal, and W-phase terminal of the AC load RA1, respectively.

[0015] In the power conversion circuit 11, each of the multiple (e.g., three) first switching elements 1 and each of the multiple (e.g., three) second switching elements 2 has a control terminal, a first main terminal, and a second main terminal. The control terminals of the multiple first switching elements 1 and the multiple second switching elements 2 are connected to the control device 50. In each of the multiple switching circuits 10 of the power conversion device 100, the first main terminal of the first switching element 1 is connected to the first DC terminal 31, the second main terminal of the first switching element 1 is connected to the first main terminal of the second switching element 2, and the second main terminal of the second switching element 2 is connected to the second DC terminal 32. In each of the multiple switching circuits 10, the first switching element 1 is a high-side switching element (P-side switching element), and the second switching element 2 is a low-side switching element (N-side switching element). Each of the multiple first switching elements 1 and the multiple second switching elements 2 is, for example, an IGBT (Insulated Gate Bipolar Transistor). Therefore, the control terminal, first main terminal, and second main terminal of each of the multiple first switching elements 1 and the multiple second switching elements 2 are the gate terminal, collector terminal, and emitter terminal, respectively.

[0016] The power conversion circuit 11 further includes a plurality of first diodes 4 connected in antiparallel in a one-to-one relationship to a plurality of first switching elements 1 (three), and a plurality of second diodes 5 connected in antiparallel in a one-to-one relationship to a plurality of second switching elements 2 (three). In each of the plurality of first diodes 4, the anode of the first diode 4 is connected to the second main terminal (emitter terminal) of the first switching element 1 corresponding to the first diode 4, and the cathode of the first diode 4 is connected to the first main terminal (collector terminal) of the first switching element 1 corresponding to the first diode 4. In each of the plurality of second diodes 5, the anode of the second diode 5 is connected to the second main terminal (emitter terminal) of the second switching element 2 corresponding to the second diode 5, and the cathode of the second diode 5 is connected to the first main terminal (collector terminal) of the second switching element 2 corresponding to the second diode 5.

[0017] The connection point 3U between the first switching element 1U and the second switching element 2U is connected via AC terminal 41U to, for example, the U-phase terminal of the AC load RA1. The connection point 3V between the first switching element 1V and the second switching element 2V is connected via AC terminal 41V to, for example, the V-phase terminal of the AC load RA1. The connection point 3W between the first switching element 1W and the second switching element 2W is connected via AC terminal 41W to, for example, the W-phase terminal of the AC load RA1.

[0018] Multiple resonant capacitors 9 correspond one-to-one with multiple switches 8. Each of the multiple resonant capacitors 9 is connected between the first terminal and the second DC terminal 32 of the corresponding switch 8. The power converter 100 has multiple resonant circuits. The multiple resonant circuits include a resonant circuit having a resonant capacitor 9U and a resonant inductor L1, a resonant circuit having a resonant capacitor 9V and a resonant inductor L1, and a resonant circuit having a resonant capacitor 9W and a resonant inductor L1. The resonant inductor L1 is common to all of the multiple resonant circuits.

[0019] Each of the multiple switches 8 has a third switching element 6 and a fourth switching element 7. Each of the multiple (three in the example of Figure 1) third switching elements 6 and each of the multiple (three in the example of Figure 1) fourth switching elements 7 has a control terminal, a first main terminal and a second main terminal. The control terminals of the multiple third switching elements 6 and the multiple fourth switching elements 7 are connected to the control device 50. Each of the multiple third switching elements 6 and the multiple fourth switching elements 7 is, for example, an IGBT. Therefore, the control terminal, first main terminal and second main terminal of each of the multiple third switching elements 6 and the multiple fourth switching elements 7 are the gate terminal, collector terminal and emitter terminal, respectively. In each of the multiple switches 8, the third switching element 6 and the fourth switching element 7 are connected in reverse series. In each of the multiple switches 8, the first main terminal (collector terminal) of the third switching element 6 is connected to the first main terminal (collector terminal) of the fourth switching element 7. In each of the multiple switches 8, the second main terminal (emitter terminal) of the third switching element 6 is connected to the connection point 3 of the corresponding switching circuit 10 among the multiple switching circuits 10, and the second main terminal (emitter terminal) of the fourth switching element 7 is connected to the resonant inductor L1. Furthermore, each of the multiple switches 8 has a diode 61 connected in antiparallel to the third switching element 6 and a diode 71 connected in antiparallel to the fourth switching element 7. In this embodiment, with respect to each of the multiple switches 8, the first end 81 of the switch 8 is the second main terminal of the third switching element 6 in that switch 8, and the second end 82 of the switch 8 is the second main terminal of the fourth switching element 7 in that switch 8.

[0020] In the power converter 100, switch 8U is connected to the connection point 3U between the first switching element 1U and the second switching element 2U. In other words, the first terminal 81 of switch 8U is connected to the connection point 3U between the first switching element 1U and the second switching element 2U in the switching circuit 10U. Switch 8V is connected to the connection point 3V between the first switching element 1V and the second switching element 2V. In other words, the first terminal 81 of switch 8V is connected to the connection point 3V between the first switching element 1V and the second switching element 2V in the switching circuit 10V. Switch 8W is connected to the connection point 3W between the first switching element 1W and the second switching element 2W. In other words, the first terminal 81 of switch 8W is connected to the connection point 3W between the first switching element 1W and the second switching element 2W in the switching circuit 10W. In the following, for the sake of explanation, the third switching element 6 and the fourth switching element 7 of switch 8U may be referred to as the third switching element 6U and the fourth switching element 7U, respectively; the third switching element 6 and the fourth switching element 7 of switch 8V may be referred to as the third switching element 6V and the fourth switching element 7V, respectively; and the third switching element 6 and the fourth switching element 7 of switch 8W may be referred to as the third switching element 6W and the fourth switching element 7W, respectively.

[0021] Multiple switches 8 are controlled by the control device 50. In other words, the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W are controlled by the control device 50.

[0022] The resonant inductor L1 has a third terminal and a fourth terminal. In the resonant inductor L1, the third terminal is connected to the common connection point 25. The fourth terminal of the resonant inductor L1 is connected to the sixth terminal 154 of the regenerative capacitor 15.

[0023] The regenerative capacitor 15 is connected between the fourth terminal of the resonant inductor L1 and the second DC terminal 32. The regenerative capacitor 15 is, for example, a film capacitor.

[0024] The protection circuit 17 includes a third diode 13 and a fourth diode 14. The third diode 13 is connected between the common connection point 25 and the first DC terminal 31. The anode of the third diode 13 is connected to the common connection point 25. Also, the cathode of the third diode 13 is connected to the first DC terminal 31. The fourth diode 14 is connected between the common connection point 25 and the second DC terminal 32. The anode of the fourth diode 14 is connected to the second DC terminal 32. Also, the cathode of the fourth diode 14 is connected to the common connection point 25. Therefore, the fourth diode 14 is connected in series with the third diode 13.

[0025] Capacitor C10 is connected between the first DC terminal 31 and the second DC terminal 32, and is connected in parallel to the power conversion circuit 11. Capacitor C10 is, for example, an electrolytic capacitor.

[0026] The control device 50 controls a plurality of first switching elements 1, a plurality of second switching elements 2, and a plurality of switches 8. The execution entity of the control device 50 includes a computer system. The computer system has one or more computers. The computer system mainly consists of a processor and memory as hardware. The function of the control device 50 as the execution entity in this disclosure is realized by the processor executing a program recorded in the memory of the computer system. The program may be pre-recorded in the memory of the computer system, or it may be provided via a telecommunications line, or it may be recorded and provided on a non-temporary recording medium such as a memory card, optical disk, or hard disk drive (magnetic disk) that can be read by the computer system. The processor of the computer system is composed of one or more electronic circuits including a semiconductor integrated circuit (IC) or a large-scale integrated circuit (LSI). The plurality of electronic circuits may be aggregated on a single chip or distributed across multiple chips. The plurality of chips may be aggregated on a single device or distributed across multiple devices.

[0027] The control device 50 outputs first PWM signals SU1, SV1, and SW1 to control the on / off state of each of the multiple first switching elements 1U, 1V, and 1W. Each of the first PWM signals SU1, SV1, and SW1 is a PWM signal whose potential level changes between, for example, a first potential level (hereinafter also referred to as a low level) and a second potential level (hereinafter also referred to as a high level) that is higher than the first potential level. The first switching elements 1U, 1V, and 1W are turned on when the first PWM signals SU1, SV1, and SW1 are at a high level and turned off when they are at a low level, respectively. The control device 50 also outputs second PWM signals SU2, SV2, and SW2 to control the on / off state of each of the multiple second switching elements 2U, 2V, and 2W. Each of the second PWM signals SU2, SV2, and SW2 is a PWM signal whose potential level changes between, for example, a first potential level (hereinafter also called the low level) and a second potential level (hereinafter also called the high level) that is higher than the first potential level. The second switching elements 2U, 2V, and 2W are turned on when the second PWM signals SU2, SV2, and SW2 are at a high level and turned off when they are at a low level, respectively.

[0028] The control device 50 generates a plurality of first PWM signals SU1, SV1, SW1 and a plurality of second PWM signals SU2, SV2, SW2 based on the three-phase duty command values ​​du, dv, and dw (see Figure 2) of the three-phase modulation scheme. Figure 2 shows a U-phase modulated wave with the U-phase duty command value du as an instantaneous value, a V-phase modulated wave with the V-phase duty command value dv as an instantaneous value, and a W-phase modulated wave with the W-phase duty command value dw as an instantaneous value. The U-phase modulated wave, V-phase modulated wave, and W-phase modulated wave are sinusoidal and have a phase difference of 120° from each other. The control device 50 generates the three-phase modulated duty command values ​​du, dv, and dw based on information regarding the state of the AC load RA1. If the AC load RA1 is a three-phase servo motor, information regarding the state of the AC load RA1 includes, for example, the detected values ​​from multiple current sensors that detect the output currents (hereinafter also referred to as load currents) iU, iV, and iW flowing through the U-phase, V-phase, and W-phase terminals of the AC load RA1, respectively.

[0029] As shown in Figures 3 to 8, the control device 50 generates multiple first PWM signals SU1, SV1, SW1, multiple second PWM signals SU2, SV2, SW2, and multiple control signals SU6, SU7, SV6, SV7, SW6, SW7 for each period of the triangular wave carrier signal CA1, using the three-phase duty command values ​​du, dv, dw and the carrier signal CA1. Of Figures 3 to 8, Figures 3, 5, and 7 show the timing charts estimated before the shift operation when the control device 50 performs the shift operation described later, while Figures 4, 6, and 8 correspond to Figures 3, 5, and 7, respectively, and show the timing charts when the shift operation is performed. Note that one period of the carrier signal CA1 is shorter than one period of each of the U-phase modulated wave, V-phase modulated wave, and W-phase modulated wave.

[0030] The control device 50 generates a first PWM signal SU1 and a second PWM signal SU2 to be supplied to the first switching element 1U and the second switching element 2U, respectively, based on the carrier signal CA1 and the duty cycle command value du. The control device 50 also generates a first PWM signal SV1 and a second PWM signal SV2 to be supplied to the first switching element 1V and the second switching element 2V, respectively, based on the carrier signal CA1 and the duty cycle command value dv of the V phase. The control device 50 also generates a first PWM signal SW1 and a second PWM signal SW2 to be supplied to the first switching element 1W and the second switching element 2W, respectively, based on the carrier signal CA1 and the duty cycle command value dw of the W phase. In this embodiment, the control device 50 sets the maximum value of the carrier signal CA1 to 1 and the minimum value to 0. Furthermore, the control device 50 sets the maximum value (corresponding to 100%) of each of the three-phase duty command values ​​du, dv, and dw to 1, and the minimum value (corresponding to 0%) to 0. In this embodiment, when the duty command value du of the U phase is greater than 0.5, the polarity of the U phase load current iU is positive, and when the duty command value du of the U phase is less than 0.5, the polarity of the U phase load current iU is negative. Also in this embodiment, when the duty command value dv of the V phase is greater than 0.5, the polarity of the V phase load current iV is positive, and when the duty command value dv of the V phase is less than 0.5, the polarity of the V phase load current iV is negative. Also in this embodiment, when the duty command value dw of the W phase is greater than 0.5, the polarity of the W phase load current iW is positive, and when the duty command value dw of the W phase is less than 0.5, the polarity of the W phase load current iW is negative. Furthermore, the control device 50 may set the maximum and minimum values ​​of the carrier signal CA1 to values ​​other than 1 and 0, respectively, and the maximum and minimum values ​​of the three-phase duty command values ​​du, dv, and dw to values ​​other than 1 and 0, respectively. In this case, if the duty command value du of the U phase is greater than {(maximum value of duty command value du) - (minimum value of duty command value du)} / 2, the polarity of the U phase load current iU is positive, and if it is less than {(maximum value of duty command value du) - (minimum value of duty command value du)} / 2, the polarity of the U phase load current iU is negative.Furthermore, if the duty cycle command value dv of the V phase is greater than {(maximum value of duty cycle command value dv) - (minimum value of duty cycle command value dv)} / 2, the polarity of the V phase load current iV is positive, and if it is less than {(maximum value of duty cycle command value dv) - (minimum value of duty cycle command value dv)} / 2, the polarity of the V phase load current iV is negative. Also, if the duty cycle command value dw of the W phase is greater than {(maximum value of duty cycle command value dw) - (minimum value of duty cycle command value dw)} / 2, the polarity of the W phase load current iW is positive, and if it is less than {(maximum value of duty cycle command value dw) - (minimum value of duty cycle command value dw)} / 2, the polarity of the W phase load current iW is negative.

[0031] The duty cycles of the first PWM signal SU1 and the second PWM signal SU2, generated by the control device 50, change based on the duty cycle command value du. The control device 50 generates the first PWM signal SU1 by comparing the duty cycle command value du with the carrier signal CA1. More specifically, the control device 50 compares the duty cycle command value du with the carrier signal CA1 and generates the first PWM signal SU1 which is high level when the duty cycle command value du is greater than the carrier signal CA1 and low level when the duty cycle command value du is less than or equal to the carrier signal CA1. The control device 50 also generates the second PWM signal SU2 by inverting the first PWM signal SU1. Furthermore, the control device 50 sets a dead time period Td (see Figure 9) between the high-level period of the first PWM signal SU1 and the high-level period of the second PWM signal SU2 so that the ON period of the first switching element 1U and the ON period of the second switching element 2U do not overlap.

[0032] The duty cycles of the first PWM signal SV1 and the second PWM signal SV2, both generated by the control device 50, change based on the duty cycle command value dv. The control device 50 generates the first PWM signal SV1 by comparing the duty cycle command value dv with the carrier signal CA1. More specifically, the control device 50 compares the duty cycle command value dv with the carrier signal CA1 and generates the first PWM signal SV1 which is high level during periods when the duty cycle command value dv is greater than the carrier signal CA1, and low level during periods when the duty cycle command value dv is less than or equal to the carrier signal CA1. The control device 50 also generates the second PWM signal SV2 by inverting the first PWM signal SV1. Furthermore, the control device 50 sets a dead time period Td (see Figure 10) between the high-level period of the first PWM signal SV1 and the high-level period of the second PWM signal SV2 so that the ON period of the first switching element 1V and the ON period of the second switching element 2V do not overlap.

[0033] The duty cycles of the first PWM signal SW1 and the second PWM signal SW2, both generated by the control device 50, change based on the duty cycle command value dw. The control device 50 generates the first PWM signal SW1 by comparing the duty cycle command value dw with the carrier signal CA1. More specifically, the control device 50 compares the duty cycle command value dw with the carrier signal CA1 and generates the first PWM signal SW1 which is high level when the duty cycle command value dw is greater than the carrier signal CA1 and low level when the duty cycle command value dw is less than or equal to the carrier signal CA1. The control device 50 also generates the second PWM signal SW2 by inverting the first PWM signal SW1. Furthermore, the control device 50 sets a dead time period Td (see Figure 11) between the high-level period of the first PWM signal SW1 and the high-level period of the second PWM signal SW2 so that the ON period of the first switching element 1W and the ON period of the second switching element 2W do not overlap.

[0034] The control device 50 determines a common shift amount dcom when the difference Δd between the duty cycle command values ​​of any two of the multi-phase duty cycle command values ​​du, dv, and dw is less than a predetermined threshold Δdth, such that the duty cycle command value of one of the two phases corresponds to a value equivalent to 100% or 0%, and shifts each of the multi-phase duty cycle command values ​​du, dv, and dw by the common shift amount dcom, and generates a plurality of first PWM signals SU1, SV1, SW1, a plurality of second PWM signals SU2, SV2, SW2, and a plurality of control signals SU6, SU7, SV6, SV7, SW6, SW7 based on the shifted duty cycle command values ​​du, dv, and dw.

[0035] The control device 50 sets the maximum value Cmax of the carrier signal CA1 to 1, the minimum value Cmin of the carrier signal CA1 to 0, and sets the maximum value of each of the three phase duty cycle command values ​​du, dv, and dw to 1 and the minimum value to 0.

[0036] For example, for each cycle of the carrier signal CA1, if the difference Δd between the duty cycle command values ​​of any two of the multi-phase duty cycle command values ​​du, dv, and dw is less than a predetermined threshold Δdth, the control device 50 calculates the common shift amount dcom by performing the calculation dcom = Cmax - max{du, dv, dw} or dcom = |Cmin - min{du, dv, dw}|. More specifically, if the difference Δd between the duty cycle command values ​​of any two of the multi-phase duty cycle command values ​​du, dv, and dw is less than a predetermined threshold Δdth, and each of the two duty cycle command values ​​is greater than (Cmax - Cmin) / 2 = 0.5, the control device 50 calculates the common shift amount dcom by performing the calculation dcom = Cmax - max{du, dv, dw}. The control device 50 determines a common shift amount dcom by calculating dcom = |Cmin - min{du, dv, dw}| if the difference Δd between the duty command values ​​of any two of the multi-phase duty command values ​​du, dv, and dw is less than a predetermined threshold Δdth, and each of the two duty command values ​​is less than (Cmax - Cmin) / 2 = 0.5.

[0037] Furthermore, the control device 50 shifts the three-phase duty command values ​​du, dv, and dw by a common shift amount dcom so that the duty command value of one of the two-phase duty command values ​​becomes 1 or 0, and generates a plurality of first PWM signals SU1, SV1, SW1, a plurality of second PWM signals SU2, SV2, SW2, and a plurality of control signals SU6, SU7, SV6, SV7, SW6, SW7 based on the carrier signal CA1 and the shifted three-phase duty command values ​​du, dv, and dw. When shifting the three-phase duty command values ​​du, dv, and dw by a common shift amount dcom so that the duty command value of one of the two-phase duty command values ​​becomes 1, the common shift amount dcom is added to each of the three-phase duty command values ​​du, dv, and dw. To shift the duty cycle values ​​of the three phases du, dv, and dw by a common shift amount dcom so that the duty cycle value of one of the two phases becomes 0, subtract the common shift amount dcom from each of the three phase duty cycle values ​​du, dv, and dw.

[0038] The control device 50 sets a dead time period Td between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 for each of the plurality of switching circuits 10, and sets the high-level period of the control signal to each of the plurality of switches 8 based on the dead time period Td for the corresponding switching circuit 10 among the plurality of switching circuits 10.

[0039] Multiple switches 8, resonant inductors L1, multiple resonant capacitors 9, and regenerative capacitors 15 are provided to perform zero-voltage soft switching of multiple first switching elements 1 and multiple second switching elements 2.

[0040] In the power conversion device 100, the control device 50 controls not only the multiple first switching elements 1 and the second switching elements 2 of the power conversion circuit 11, but also the multiple switches 8.

[0041] The control device 50 generates control signals SU6, SU7, SV6, SV7, SW6, and SW7 for controlling the on / off states of the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W, respectively, and outputs them to the gate terminals of the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W, respectively.

[0042] The switch 8U can pass the charging current flowing through the path of the regeneration capacitor 15 - resonance inductor L1 - switch 8U - resonance capacitor 9U when the third switching element 6U is in the on state and the fourth switching element 7U is in the off state. The charging current is the current for charging the resonance capacitor 9U. The switch 8U can pass the discharging current flowing through the path of the resonance capacitor 9U - switch 8U - resonance inductor L1 - regeneration capacitor 15 when the third switching element 6U is in the off state and the fourth switching element 7U is in the on state. The discharging current is the current for discharging the charge of the resonance capacitor 9U.

[0043] The switch 8V can pass the charging current flowing through the path of the regeneration capacitor 15 - resonance inductor L1 - switch 8V - resonance capacitor 9V when the third switching element 6V is in the on state and the fourth switching element 7V is in the off state. The charging current is the current for charging the resonance capacitor 9V. The switch 8V can pass the discharging current flowing through the path of the resonance capacitor 9V - switch 8V - resonance inductor L1 - regeneration capacitor 15 when the third switching element 6V is in the off state and the fourth switching element 7V is in the on state. The discharging current is the current for discharging the charge of the resonance capacitor 9V.

[0044] Switch 8W can pass the charging current flowing through the path of regenerative capacitor 15 - resonant inductor L1 - switch 8W - resonant capacitor 9W when the third switching element 6W is ON and the fourth switching element 7W is OFF. The charging current is the current that charges the resonant capacitor 9W. Switch 8W can pass the discharge current flowing through the path of resonant capacitor 9W - switch 8W - resonant inductor L1 - regenerative capacitor 15 when the third switching element 6W is OFF and the fourth switching element 7W is ON. The discharge current is the current that discharges the charge from the resonant capacitor 9W.

[0045] (3) Operation of the power converter In the following, the current iL1 flowing through the resonant inductor L1 will be described as positive when flowing in the direction of the arrow in Figure 1, and negative when flowing in the opposite direction to the arrow in Figure 1. Furthermore, the load currents iU, iV, and iW flowing through the U-phase, V-phase, and W-phase terminals of the AC load RA1 will be described as positive when flowing in the direction of the arrow in Figure 1, and negative when flowing in the opposite direction to the arrow in Figure 1. Furthermore, the currents i9U, i9V, and i9W flowing through the resonant capacitors 9U, 9V, and 9W will be described as positive when flowing in the direction of the arrow in Figure 1, and negative when flowing in the opposite direction to the arrow in Figure 1. Therefore, in the discharge operation where the resonant capacitors 9U, 9V, and 9W are discharged, the polarity of the currents i9U, i9V, and i9W is positive, and in the charging operation where the resonant capacitors 9U, 9V, and 9W are charged, the polarity of the currents i9U, i9V, and i9W is negative. Furthermore, in the following explanation, the voltage value of the DC power supply E1 will be described as Vd (see Figures 8 to 13).

[0046] In the power conversion device 100, for example, when the third switching element 6U of the switch 8U changes from the on state where the current iL1 flows through the resonance inductor L1 with a positive polarity to the off state. In this case, the current iL1 flowing through the resonance inductor L1 is regenerated to the power conversion circuit 11 via the third diode 13 until the energy of the resonance inductor L1 is consumed and the current iL1 becomes zero. Also, in the power conversion device 100, for example, when the fourth switching element 7U of the switch 8U changes from the on state where the current iL1 flows through the resonance inductor L1 with a negative polarity to the off state. In this case, the current iL1 flowing through the resonance inductor L1 flows through the path of the fourth diode 14 - resonance inductor L1 - regeneration capacitor 15 until the energy of the resonance inductor L1 is consumed and the current iL1 becomes zero.

[0047] Also, in the power conversion device 100, for example, when the third switching element 6V of the switch 8V changes from the on state where the current iL1 flows through the resonance inductor L1 with a positive polarity to the off state. In this case, the current iL1 flowing through the resonance inductor L1 is regenerated to the power conversion circuit 11 via the third diode 13 until the energy of the resonance inductor L1 is consumed and the current iL1 becomes zero. Also, in the power conversion device 100, for example, when the fourth switching element 7V of the switch 8V changes from the on state where the current iL1 flows through the resonance inductor L1 with a negative polarity to the off state. In this case, the current iL1 flowing through the resonance inductor L1 flows through the path of the fourth diode 14 - resonance inductor L1 - regeneration capacitor 15 until the energy of the resonance inductor L1 is consumed and the current iL1 becomes zero.

[0048] Furthermore, in the power converter 100, for example, there are cases where the third switching element 6W of switch 8W is turned ON and a current iL1 flows through the resonant inductor L1 in the positive polarity, and then the third switching element 6W of switch 8W is turned OFF. In this case, the current iL1 flowing through the resonant inductor L1 is regenerated to the power converter circuit 11 via the third diode 13 until the energy of the resonant inductor L1 is consumed and the current iL1 becomes zero. Also, in the power converter 100, for example, there are cases where the fourth switching element 7W of switch 8W is turned ON and a current iL1 flows through the resonant inductor L1 in the negative polarity, and then the fourth switching element 7W is turned OFF. In this case, the current iL1 flowing through the resonant inductor L1 flows through the path of the fourth diode 14 - resonant inductor L1 - regenerative capacitor 15 until the energy of the resonant inductor L1 is consumed and the current iL1 becomes zero.

[0049] The control device 50 sets a dead time period Td (see Figures 8 to 13) between the high-level period of the first PWM signals SU1, SV1, SW1 to the first switching elements 1U, 1V, 1W and the high-level period of the second PWM signals SU2, SV2, SW2 to the second switching elements 2U, 2V, 2W for each of the multiple switching circuits 10. The control device 50 also sets the high-level period of the control signal to each of the multiple switches 8 based on the dead time period Td for the corresponding switching circuit 10 among the multiple switching circuits 10. Here, the control device 50 sets the length of the high-level period of the control signal to each of the multiple switches 8 as, for example, the sum of the length of the first period and the length of the second period. The length of the first period is an integer (N) multiple of the resonant half-period determined by the capacitance of the resonant capacitor 9 corresponding to the switch 8 and the inductance of the resonant inductor L1. If the resonant period is Tres, the length of the first period is N × (Tres / 2). It is desirable that the end of the first period, that is, the end of a period that is an integer multiple of the resonant half-period, coincides with the end of the dead time period Td for the switching circuit 10 corresponding to the switch 8. For example, in the example in Figure 7, N=1, the length between time points t2 and t3 of the control signal SU6 is the length of the first period. More specifically, the length of the first period is designed so that Tres / 2 = the length of the dead time period Td, with N=1. In other words, Figure 7 is an example in which the capacitance of the resonant capacitor 9 and the inductance of the resonant inductor L1 are selected so that Tres / 2 coincides with the length of the dead time period Td. The length of the second period is, as an example, an additional time Tau determined by the voltage V15 of the regenerative capacitor 15, the inductance of the resonant inductor L1, and the load current value. The length of the first period described above is an ideal design example and may be 90% to 110% of the length N × (Tres / 2). Similarly, the length of the second period described above is an ideal design example and may be 90% to 110% of the additional time (additional time Tau in the example of Figure 7) determined by the voltage of the regenerative capacitor 15, the inductance of the resonant inductor L1, and the load current value.

[0050] In the following, the basic operation of zero-voltage soft switching for each of the multiple first switching elements 1 and the multiple second switching elements 2 will be explained with reference to Figures 8 to 13. The basic operation is the operation when resonant current flows simultaneously through two or more of the multiple switches 8 to the resonant inductor L1. After explaining the basic operation, the shift operation when the control device 50 determines that the difference Δd of any two of the three-phase duty command values ​​du, dv, and dw is less than a predetermined threshold Δdth will be explained.

[0051] (3.1) Basic Operation In zero-voltage soft switching of the first switching element 1, it is necessary to set the voltage across the first switching element 1 to zero immediately before the first switching element 1 that is the target of zero-voltage soft switching is turned on. Similarly, in zero-voltage soft switching of the second switching element 2, it is necessary to set the voltage across the second switching element 2 to zero immediately before the second switching element 2 that is the target of zero-voltage soft switching is turned on. Hereafter, the switching element that is the target of zero-voltage soft switching (first switching element 1 or second switching element 2) will also be referred to as the target switching element.

[0052] The basic operation of the control device 50 differs depending on the polarity (positive / negative) of the load current flowing through the AC terminal 41 connected to the target switching element and the operation (charging / discharging) of the resonant capacitor 9 connected in series or parallel to the target switching element. The load current is positive when it flows from the AC terminal 41 toward the AC load RA1, and negative when it flows from the AC load RA1 toward the AC terminal 41. During the charging operation of the resonant capacitor 9, the voltage across the resonant capacitor 9 increases. Conversely, during the discharging operation of the resonant capacitor 9, the voltage across the resonant capacitor 9 decreases. The voltage across each of the multiple second switching elements 2 is the same as the voltage across the resonant capacitor 9 connected in parallel to the second switching elements 2.

[0053] (3.1.1) When the load current > 0, the operation control device 50 for soft-switching the first switching element turns on the third switching element 6 corresponding to the first switching element 1 if the target of soft-switching is the first switching element 1 (hereinafter also referred to as the target first switching element 1) and the polarity of the load current flowing through the AC terminal 41 connected to the target first switching element 1 is positive. As a result, the control device 50 causes the resonant inductor L1 and the resonant capacitor 9 connected to the target first switching element 1 to resonate, charging the resonant capacitor 9 from the regenerative capacitor 15 and making the voltage across the target first switching element 1 zero. As a result, the power converter 100 can achieve zero-voltage soft-switching of the target first switching element 1.

[0054] Figure 9 shows the first PWM signal SU1, the second PWM signal SU2, the control signal SU6, the load current iU, the current iL1, the voltage V1u across the first switching element 1U, and the voltage V2u across the second switching element 2U, in the case where the target first switching element is the first switching element 1U of the switching circuit 10U. Figure 9 also shows the additional time Tau set for the control signal SU6 in the control device 50. The additional time Tau will be described later.

[0055] Figure 10 also illustrates the case where the target first switching element is the first switching element 1V of the switching circuit 10V, showing the first PWM signal SV1, the second PWM signal SV2, the control signal SV6, the load current iV, the current iL1, the voltage V1v across the first switching element 1V, and the voltage V2v across the second switching element 2V. Figure 10 also shows the additional time Tav set for the control signal SV6 in the control device 50. The additional time Tav will be described later.

[0056] Figure 11 shows the first PWM signal SW1, the second PWM signal SW2, the control signal SW6, the load current iW, the current iL1, the voltage V1w across the first switching element 1W, and the voltage V2w across the second switching element 2W, in the case where the target first switching element is the first switching element 1W of the switching circuit 10W. Figure 11 also shows the additional time Taw set for the control signal SW6 in the control device 50. The additional time Taw will be described later.

[0057] The above-mentioned additional time Tau is set to achieve soft switching of the target switching element (first switching element 1U) regardless of the value of the load current iU, by making the start time t1 of the high-level period of the control signal SU6 earlier than the start time t2 of the dead time period Td, as shown in Figure 9, and making the high-level period of the control signal SU6 longer than the half-cycle of resonance (dead time period Td in this embodiment). The length of the additional time Tau is set based on the value of the load current iU. In order to start LC resonance from the start time t2 of the dead time period Td, it is desirable that the value of the current iL1 matches the value of the load current iU at the start time t2 of the dead time period Td. This is because, as long as iL1 < iU, the entire current iL1 flows to the AC load RA1, and therefore the resonant capacitor 9U cannot be charged. The end time of the high-level period of the control signal SU6 can be the same as or later than the end time t3 of the dead time period Td. Figure 9 shows an example where the end time of the high-level period of the control signal SU6 is set to be the same as the end time t3 of the dead time period Td. The control device 50 sets the high-level period of the control signal SU6 to Tau + Td, for example. That is, the control device 50 sets N = 1 and Tres / 2 = length of the dead time period Td, so that the length of the first period is N × Tres / 2 = Td. In the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at the end time t3 of the dead time period Td, and the voltage V1u across the first switching element 1U becomes zero at the end time t3 of the dead time period Td. In the example in Figure 9, the current iL1 flowing through the resonant inductor L1 starts flowing from the start time t1 of the high-level period of the control signal SU6, and becomes zero at time t4, after an additional time Tau has elapsed from the end time t3 of the dead time period Td. Regarding the current iL1, from the time t2 when the dead time period Td begins, iL1 ≥ iU, and the current iL1 in the shaded region of the fourth current waveform from the top in Figure 9 flows into the resonant capacitor 9U, causing LC resonance to occur.The current iL1 is regenerated to the power conversion circuit 11 via the third diode 13, which is directly connected to the resonant inductor L1, after the end of the dead time period Td at time t3.

[0058] As described above, the control device 50 determines the additional time Tau based on the load current iU so that iL1 = iU at the time t2 when the dead time period Td begins, in order to start LC resonance at time t2 when the dead time period Td begins and to end the half-cycle of resonance at time t3 when the dead time period Td ends. More specifically, the control device 50 determines the additional time Tau by calculating Tau = iU × (L / V15) using, for example, the detection result of the load current iU by a current sensor or its signal processing value, or an estimated value of the load current iU, the inductance L of the resonant inductor L1 which is stored in advance, and the detection result of the voltage V15 of the regenerative capacitor 15 (potential V15 at the sixth terminal 154 of the regenerative capacitor 15). The detection result of the load current iU at this time or its signal processing value is the detection value at the time when the additional time Tau is added in the carrier signal CA1, or the timing closest to that time. Furthermore, the estimated value of the load current iU at this time is the value obtained by estimating the load current iU at the period in which the additional time Tau is added to the carrier signal CA1. In the case of basic operation, the resonant half-period is half of the resonant period, which is the reciprocal of the resonant frequency of the resonant circuit including the resonant inductor L1 and one resonant capacitor 9. Therefore, if the inductance of the resonant inductor L1 is L and the capacitance of the resonant capacitor 9 is C, then the resonant half-period is π × (L・C) 1/2 In the control device 50, the resonant half-period during basic operation is set to be the same as, for example, the length of the dead time period Td.

[0059] The above-mentioned additional time Tav is set to achieve soft switching of the target switching element (first switching element 1V) regardless of the value of the load current iV, by making the start time t5 of the high-level period of the control signal SV6 earlier than the start time t6 of the dead time period Td, as shown in Figure 10, and making the high-level period of the control signal SV6 longer than the half-period of resonance (dead time period Td in this embodiment). The length of the additional time Tav is set based on the value of the load current iV. In order to start LC resonance from the start time t6 of the dead time period Td, it is desirable that the value of the current iL1 at the start time t6 of the dead time period Td matches the value of the load current iV. This is because, as long as iL1 < iV, the entire current iL1 flows to the AC load RA1, and therefore the resonant capacitor 9V cannot be charged. The end time of the high-level period of the control signal SV6 can be the same as or later than the end time t7 of the dead time period Td. Figure 10 shows an example where the end of the high-level period of the control signal SV6 is set to the same time as the end of the dead time period Td, t7. The control device 50 sets the high-level period of the control signal SV6 to Tab + Td. That is, the control device 50 sets N = 1 and Tres / 2 = length of the dead time period Td, so the length of the first period is N × Tres / 2 = Td. In the switching circuit 10V, the voltage V2v across the second switching element 2V becomes Vd at the end of the dead time period Td, t7, and the voltage V1v across the first switching element 1V becomes zero at the end of the dead time period Td, t7. In the example in Figure 10, the current iL1 flowing through the resonant inductor L1 starts flowing from the start of the high-level period of the control signal SV6, t5, and becomes zero at t8, after the additional time Tab has elapsed from the end of the dead time period Td, t7. Regarding the current iL1, from time t6 when the dead time period Td begins, iL1 ≥ iV, and the current iL1 in the shaded region of the fourth current waveform from the top in Figure 10 flows into the resonant capacitor 9V, causing LC resonance to occur.The current iL1 is regenerated to the power conversion circuit 11 via the third diode 13, which is directly connected to the resonant inductor L1, after the end of the dead time period Td at time t7.

[0060] As described above, the control device 50 determines the additional time Tav based on the load current iv such that iL1 = iv at time t6 when the dead time period Td begins, in order to start LC resonance at time t6 when the dead time period Td begins and to end the half-cycle of resonance at time t7 when the dead time period Td ends. More specifically, the control device 50 determines the additional time Tav by calculating Tav = iv × (L / V15) using, for example, the detection result of the load current iv by the current sensor or its signal processing value, or an estimated value of the load current iv, the inductance L of the resonant inductor L1 which is stored in advance, and the detection result of the voltage V15 of the regenerative capacitor 15. The detection result of the load current iv at this time or its signal processing value is the detection value at the time when the additional time Tav is added in the carrier signal CA1, or the timing closest to that time. Furthermore, the estimated value of the load current iV at this time is obtained by estimating the load current iV at the period in which the additional time Tav is added to the carrier signal CA1, etc.

[0061] The above-mentioned additional time Taw is set to achieve soft switching of the target switching element (first switching element 1W) regardless of the value of the load current iW, by making the start time t9 of the high-level period of the control signal SW6 earlier than the start time t10 of the dead time period Td, as shown in Figure 11, and making the high-level period of the control signal SW6 longer than the resonant half-period (dead time period Td in this embodiment). The length of the additional time Taw is set based on the value of the load current iW. In order to start LC resonance from the start time t10 of the dead time period Td, it is desirable that the value of the current iL1 matches the value of the load current iW at the start time t10 of the dead time period Td. This is because, as long as iL1 < iW, the entire current iL1 flows to the AC load RA1, and therefore the resonant capacitor 9W cannot be charged. The end time of the high-level period of the control signal SW6 can be the same as or later than the end time t11 of the dead time period Td. Figure 11 shows an example where the end of the high-level period of the control signal SW6 is set to the same time as the end of the dead time period Td, t11. The control device 50 sets the high-level period of the control signal SW6 to Taw + Td. That is, the control device 50 sets N = 1 and Tres / 2 = length of the dead time period Td, so the length of the first period is N × Tres / 2 = Td. In the switching circuit 10W, the voltage V2w across the second switching element 2W becomes Vd at the end of the dead time period Td, t11, and the voltage V1w across the first switching element 1W becomes zero at the end of the dead time period Td, t11. In the example in Figure 11, the current iL1 flowing through the resonant inductor L1 starts flowing from the start of the high-level period of the control signal SW6, t9, and becomes zero at t12, after the additional time Taw has elapsed from the end of the dead time period Td, t11. Regarding the current iL1, from time t10 when the dead time period Td begins, iL1 ≥ iW, and the current iL1 in the shaded region of the fourth current waveform from the top in Figure 11 flows into the resonant capacitor 9W, causing LC resonance to occur.The current iL1 is regenerated to the power conversion circuit 11 via the third diode 13, which is directly connected to the resonant inductor L1, after the end of the dead time period Td at time t11.

[0062] As described above, the control device 50 determines the additional time Taw based on the load current iW such that iL1 = iW at the start of the dead time period Td (t10) and the half-cycle of resonance ends at the end of the dead time period Td (t11). More specifically, the control device 50 determines the additional time Taw by calculating Taw = iW × (L / V15) using, for example, the detection result of the load current iW by a current sensor or its signal processing value, or an estimated value of the load current iW, the inductance L of the resonant inductor L1 which is stored in advance, and the detection result of the voltage V15 of the regenerative capacitor 15. The detection result of the load current iW or its signal processing value at this time is the detection value at the period in which the additional time Taw is added to the carrier signal CA1, or the timing closest to that period. Furthermore, the estimated load current iW at this time is obtained by using the estimated load current iW during the carrier period in which the additional time Taw is added.

[0063] (3.1.2) The operation control device 50 for soft-switching the second switching element when the load current > 0 compares the current value of the load current with the first current threshold when the target of soft-switching is the second switching element 2 (hereinafter also referred to as the target second switching element 2) and the polarity of the load current (load current iU, load current iV, or load current iW) flowing through the AC terminal 41 connected to the target second switching element 2 is positive. As an example of the operation design of the control device 50, the control device 50 does not turn on the switch 8 when the current value of the load current is greater than the first current threshold, and turns on the switch 8 during the dead time period Td when the current value of the load current is less than the first current threshold. Here, as in section (3.1.1), it is assumed that the resonant half-period is set to be the same as the length of the dead time period Td, for example. In the power converter 100, when the load current value is greater than the first current threshold, the control device 50 can discharge the resonant capacitor 9U connected in parallel to the target second switching element 2 using the load current iU without turning on the switch 8 corresponding to the target second switching element 2. As a result, the power converter 100 can achieve zero-voltage soft switching of the target second switching element 2.

[0064] Figure 12 shows the first PWM signal SU1, the second PWM signal SU2, the control signal SU7, the load current iU, the current i9U, and the voltage V2u across the second switching element 2U in the case where the target second switching element 2 is the second switching element 2U of the switching circuit 10U, and the load current value is greater than the first current threshold. Also in Figure 12, the additional time Tau set in the control device 50 for the control signal SU7 of the fourth switching element 7U of the switch 8U.

[0065] The control device 50 does not provide a high-level period for the control signal SU7 if the load current iU is greater than the first current threshold. In this case, in the power converter 100, current i9U starts flowing from the resonant capacitor 9U at time t22 when the dead time period Td begins, and the current i9U drops to zero before time t23 when the dead time period Td ends, so that the voltage V2u across the second switching element 2U becomes zero before time t23 when the dead time period Td ends. As a result, in the power converter 100, when the second PWM signal SU2 changes from a low level to a high level at time t23 when the dead time period Td ends, the second switching element 2U is soft-switched to zero voltage.

[0066] When the load current iU is less than the first current threshold, the control device 50 provides a high-level period for the control signal SU7, for example, as shown by the dashed line in Figure 12. The start time of the high-level period for the control signal SU7 is, for example, the same as the start time t22 of the dead time period Td. The end time of the high-level period for the control signal SU7 is the same as the end time t23 of the dead time period Td. As a result, in the power converter 100, the voltage V2u across the second switching element 2U becomes zero before the end time t23 of the dead time period Td. Therefore, in the power converter 100, when the second PWM signal SU2 changes from low level to high level at the end time t23 of the dead time period Td, the second switching element 2U is zero-voltage soft-switched. The start time of the high-level period for the control signal SU7 may be a time t21 that is earlier by an additional time Tau than the start time of the dead time period Td. The end of the high-level period of the control signal SU7 may be at a time t24 that is later than the end of the dead time period Td (t23) by an additional time Tau. The time before and after the period overlapping with the dead time period Td in the high-level period is not limited to the additional time Tau, but may be any other set time. Furthermore, the relationship between the first current threshold of the load current and the method for determining the high-level period of the control signal to switch 8, as described above, is an ideal design example and is not limited to this example. For example, the control device 50 may set the high-level period of the control signal for switch 8 so that switch 8 turns on during the dead time period Td, even if the load current value is greater than the first current threshold. Also, the control device 50 does not need to turn on switch 8 during the dead time period Td even if the load current value is less than the first current threshold. Furthermore, the control device 50 may set the high-level period of the control signal for switch 8 so that switch 8 is always turned on during the dead time period Td, regardless of the first current threshold. Also, the control device 50 may keep switch 8 always in the off state, regardless of the first current threshold. Furthermore, the control device 50 does not need to match the high-level period of the control signal to the switch 8 with the dead time period Td.In one design example, the high-level period of the control signal to switch 8 may be designed in a way other than the length of the dead time period Td, depending on the design time of the resonant half-period.

[0067] (3.1.3) When the load current is less than 0, the control device 50 for soft-switching the second switching element turns on the fourth switching element 7 corresponding to the second switching element 2 if the polarity of the load current (load current iU, load current iV, or load current iW) flowing through the AC terminal 41 connected to the target second switching element 2 is negative. As a result, the control device 50 causes the resonant capacitor 9 and the resonant inductor L1 connected to the target second switching element 2 to resonate, causing the resonant capacitor 9 to discharge and reducing the voltage across the target second switching element 2 to zero. As a result, the power converter 100 can achieve zero-voltage soft switching of the target second switching element 2.

[0068] Figure 13 shows the first PWM signal SU1, the second PWM signal SU2, the control signal SU7, the load current iU, the current iL1, and the voltage V2u across the second switching element 2U, in the case where the target second switching element 2 is the second switching element 2U of the switching circuit 10U. Figure 13 also shows the additional time Tau that the control device 50 sets for the control signal SU7 of the fourth switching element 7U of the switch 8U. The end time of the high-level period of the control signal SU7 can be the same as or after the end time t33 of the dead time period Td. In Figure 13, an example is shown where the end time of the high-level period of the control signal SU7 is set to be the same as the end time t33 of the dead time period Td. The control device 50 sets the high-level period of the control signal SU7 to Tau + Td, for example. In the switching circuit 10U, the voltage V2u across the second switching element 2U becomes zero at time t33, when the dead time period Td ends. In the example in Figure 13, the current iL1 flowing through the resonant inductor L1 begins to flow from time t31, when the high-level period of the control signal SU7 begins, and becomes zero at time t34, when an additional time Tau has elapsed from time t33, when the dead time period Td ends. With respect to the current iL1, iL1 ≤ iU occurs from time t32, when the dead time period Td begins, causing LC resonance to occur and a resonant current (discharge current of the resonant capacitor 9U) to flow from the resonant capacitor 9U towards the resonant inductor L1. After time t33, when the dead time period Td ends, the current iL1 is regenerated to the power conversion circuit 11 via the fourth diode 14, which is directly connected to the resonant inductor L1.

[0069] The control device 50 determines the additional time Tau based on the load current iU so that iL1 = iU at the start of the dead time period Td (t32), in order to start LC resonance at the start of the dead time period Td (t32) and end the half-cycle of resonance at the end of the dead time period Td (t33). More specifically, the control device 50 determines the additional time Tau by calculating Tau = |iU| × (L / V15), using, for example, the detection result of the output current iU from the current sensor or its signal processing value, or an estimated value of the load current iU, the inductance L of the resonant inductor L1 which is stored in advance, and the detection result of the voltage V15 of the regenerative capacitor 15. The load current value used at this time (the detection result of the load current iU or its signal processing value) is the detection value at the carrier cycle in which the additional time Tau is added, or at the timing closest to that carrier cycle. Furthermore, the estimated value of the load current iU at this time is the estimated value of the load current iU at the carrier period in which the additional time Tau is added. In the case of basic operation, the resonant half-period is half of the resonant period, which is the reciprocal of the resonant frequency of the resonant circuit including the resonant inductor L1 and one resonant capacitor 9. Therefore, if the inductance of the resonant inductor L1 is L and the capacitance of the resonant capacitor 9 is C, then the resonant half-period is π × (L・C) 1/2 In the control device 50, the resonant half-period during basic operation is set to be the same as, for example, the length of the dead time period Td.

[0070] (3.1.4) The operation control device 50 for soft-switching the first switching element when the load current < 0 compares the current value of the load current (load current iU, load current iV, or load current iW) flowing through the AC terminal 41 connected to the target first switching element 1 with a second current threshold (the second current threshold is a negative value, and the absolute value of the second current threshold is, for example, the same as the value of the first current threshold) when the polarity of the load current (load current iU, load current iV, or load current iW) is negative. As an example of the operation design of the control device 50, the control device 50 does not turn on the switch 8 when the current value of the load current is less than the second current threshold, and turns on the switch 8 during the dead time period Td when the current value of the load current is greater than the second current threshold. Here, as in section (3.1.1), it is assumed that the resonant half-period is set to be, for example, the same as the length of the dead time period Td. When the load current is less than the second current threshold, the power converter 100 can charge the resonant capacitor 9U connected in series with the target first switching element 1 using the load current without the control device 50 turning on the switch 8 corresponding to the target first switching element 1. This enables the power converter 100 to achieve zero-voltage soft switching of the target first switching element 1.

[0071] Figure 14 shows the first PWM signal SU1, the second PWM signal SU2, the control signal SU6, the load current iU, the current i9U, the voltage V1u across the first switching element 1U, and the voltage V2u across the second switching element 2U when the target first switching element 1 is the first switching element 1U of the switching circuit 10U, and the current value of the load current is greater than the second current threshold (in other words, when the absolute value of the load current is less than the absolute value of the second current threshold).

[0072] The control device 50 does not provide a high-level period for the control signal SU6 when the load current value is smaller than the second current threshold (in other words, when the absolute value of the load current is larger than the absolute value of the second current threshold). In this case, in the power converter 100, current i9U starts flowing through the resonant capacitor 9U at time t41 when the dead time period Td begins. As a result, in the power converter 100, the resonant capacitor 9U is charged and the voltage V2u across the second switching element 2U increases, the current i9U becomes zero before time t42 when the dead time period Td ends, and the voltage V1u across the first switching element 1U becomes zero before time t42 when the dead time period Td ends. As a result, in the power converter 100, when the first PWM signal SU1 changes from a low level to a high level at time t42 when the dead time period Td ends, the first switching element 1U is zero-voltage soft-switched.

[0073] The control device 50, when the load current value is greater than the second current threshold (in other words, when the absolute value of the load current is less than the absolute value of the second current threshold), sets a high-level period for the control signal SU6, as shown by the dashed line in Figure 14. The start time of the high-level period for the control signal SU6 is the same as the start time t41 of the dead time period Td. The end time of the high-level period for the control signal SU6 is the same as the end time t42 of the dead time period Td. As a result, in the power converter 100, the voltage V1u across the first switching element 1U becomes zero before the end time t42 of the dead time period Td. Therefore, in the power converter 100, when the first PWM signal SU1 changes from a low level to a high level at the end time t42 of the dead time period Td, the first switching element 1U is soft-switched to zero voltage. Furthermore, the relationship between the second current threshold of the load current and the method for determining the high-level period of the control signal to switch 8, as described above, is an ideal design example and is not limited to the above design example. For example, the control device 50 may set the high-level period of the control signal to switch 8 so that switch 8 turns on during the dead time period Td, even when the load current value is smaller than the second current threshold. Also, the control device 50 does not have to turn on switch 8 during the dead time period Td even when the load current value is larger than the second current threshold. Also, the control device 50 may set the high-level period of the control signal to switch 8 so that switch 8 is always turned on during the dead time period Td, regardless of the second current threshold. Also, the control device 50 may keep switch 8 always in the off state, regardless of the second current threshold. Also, the control device 50 does not have to make the high-level period of the control signal to switch 8 coincide with the dead time period Td as described above. For example, the high-level period of the control signal to switch 8 may be designed to be other than the length of the dead time period Td, depending on the design time of the resonant half-period.

[0074] (3.2) In the shift-operated power converter 100, the duty cycle command values ​​of two of the three phases, du, dv, and dw, approach each other at electrical angles of 60°, and during one cycle of the carrier signal CA1, the time difference between the start of the ON period of each of the two phase switches 8 becomes shorter, and there is a possibility that resonant currents will flow simultaneously through the resonant capacitors 9 of the two switching circuits 10 corresponding to the duty cycle command values ​​of the two phases in the resonant inductor L1.

[0075] For example, in the example shown in Figure 2, if the duty cycle command values ​​du and dv are both 0.75 or close to 0.75, the time difference between the start of the high-level period of the control signal SU6 and the start of the high-level period of the control signal SV6 becomes shorter, and it is possible that the resonant current passing through the resonant capacitor 9U (hereinafter also referred to as the "U-phase resonant current") and the resonant current passing through the resonant capacitor 9V (hereinafter also referred to as the "V-phase resonant current") will flow through the resonant inductor L1 simultaneously. In this case, with respect to the current iL1 flowing through the resonant inductor L1, the polarity of the U-phase resonant current and the V-phase resonant current is positive.

[0076] Furthermore, in the example shown in Figure 2, if the duty cycle command values ​​dv and dw are both 0.75 or close to 0.75, the time difference between the start of the high-level period of the control signal SV6 and the start of the high-level period of the control signal SW6 becomes shorter, and it is possible that the resonant current of the V phase and the resonant current passing through the resonant capacitor 9W (hereinafter also referred to as the "W phase resonant current") will flow through the resonant inductor L1 simultaneously. In this case, with respect to the current iL1 flowing through the resonant inductor L1, the polarity of the V phase resonant current and the W phase resonant current is positive.

[0077] Furthermore, in the example shown in Figure 2, if the duty cycle command values ​​dw and du are both 0.75 or close to 0.75, the time difference between the start of the high-level period of the control signal SW6 and the start of the high-level period of the control signal SU6 becomes shorter, and it is possible that the resonant current of the W phase and the resonant current of the U phase will flow simultaneously through the resonant inductor L1. In this case, with respect to the current iL1 flowing through the resonant inductor L1, the polarity of the resonant current of the W phase and the resonant current of the U phase is positive.

[0078] Furthermore, in the example shown in Figure 2, if the duty cycle command values ​​du and dv are both 0.25 or close to 0.25, the time difference between the start of the high-level period of the control signal SU7 and the start of the high-level period of the control signal SV7 becomes shorter, and it is possible that the resonant current of the U-phase and the resonant current of the V-phase will flow simultaneously through the resonant inductor L1. In this case, with respect to the current iL1 flowing through the resonant inductor L1, the polarity of the resonant current of the U-phase and the resonant current of the V-phase is negative.

[0079] Furthermore, in the example shown in Figure 2, if the duty cycle command values ​​dv and dw are both 0.25 or close to 0.25, the time difference between the start of the high-level period of the control signal SV7 and the start of the high-level period of the control signal SW7 becomes shorter, and it is possible that the resonant current of the V-phase and the resonant current of the W-phase will flow simultaneously through the resonant inductor L1. In this case, with respect to the current iL1 flowing through the resonant inductor L1, the polarity of the resonant current of the V-phase and the resonant current of the W-phase is negative.

[0080] Furthermore, in the example shown in Figure 2, if the duty cycle command values ​​dw and du are both 0.25 or close to 0.25, the time difference between the start of the high-level period of the control signal SW7 and the start of the high-level period of the control signal SU7 becomes shorter, and it is possible that the W-phase resonant current and the U-phase resonant current will flow simultaneously through the resonant inductor L1. In this case, with respect to the current iL1 flowing through the resonant inductor L1, the polarity of the W-phase resonant current and the U-phase resonant current is negative.

[0081] In the power converter 100, if two-phase current flows simultaneously through the resonant inductor L1 (in other words, if current flows simultaneously through each of the two resonant capacitors 9), the resonant frequency of the resonant circuit including the resonant inductor L1 changes compared to the case where one-phase current flows through the resonant inductor L1, and it may become impossible to achieve zero-voltage soft switching.

[0082] The control device 50 compares predetermined duty cycle command values ​​du, dv, and dw for each cycle of the carrier signal CA1. Here, the control device 50 calculates the difference Δd between the U-phase duty cycle command value du and the V-phase duty cycle command value dv (Δduv = |du - dv|), calculates the difference Δd between the V-phase duty cycle command value dv and the W-phase duty cycle command value dw (Δdvw = |dv - dw|), and calculates the difference Δd between the W-phase duty cycle command value dw and the U-phase duty cycle command value du (Δdwu = |dw - du|).

[0083] The control device 50 determines a common shift amount dcom such that the duty cycle command value of one of the two phases becomes either 100% (1 in this embodiment) or 0% (0 in this embodiment) when the difference Δd between the duty cycle command values ​​of any two of the multiple phases of duty cycle command values ​​du, dv, and dw is less than a predetermined threshold Δdth. The predetermined threshold Δdth is determined to satisfy the first condition, the second condition, and the third condition.

[0084] The first condition includes the case where the resonant current of the U phase and the resonant current of the V phase overlap in the resonant inductor L1 when Δduv is less than a predetermined threshold Δdth, and the condition where the resonant current of the U phase and the resonant current of the V phase do not overlap in the resonant inductor L1 when Δduv is greater than or equal to a predetermined threshold Δdth. The first condition includes the cases where the resonant current of the U phase and the resonant current of the V phase overlap and the cases where they do not overlap in the resonant inductor L1 when Δduv is less than a predetermined threshold Δdth.

[0085] The second condition includes the case where the resonant current of the V phase and the resonant current of the W phase overlap in the resonant inductor L1 when Δdvw is less than a predetermined threshold Δdth, and the condition where the resonant current of the V phase and the resonant current of the W phase do not overlap in the resonant inductor L1 when Δdvw is greater than or equal to a predetermined threshold Δdth. The second condition includes the cases where the resonant current of the V phase and the resonant current of the W phase overlap and the cases where they do not overlap in the resonant inductor L1 when Δdvw is less than a predetermined threshold Δdth.

[0086] The third condition includes the case where the W-phase resonant current and the U-phase resonant current overlap in the resonant inductor L1 when Δdwu is less than a predetermined threshold Δdth, and the condition where the W-phase resonant current and the U-phase resonant current do not overlap in the resonant inductor L1 when Δdwu is greater than or equal to a predetermined threshold Δdth. The third condition includes the cases where the W-phase resonant current and the U-phase resonant current overlap and do not overlap in the resonant inductor L1 when Δdwu is less than a predetermined threshold Δdth.

[0087] The predetermined threshold Δdth is set to a value greater than the maximum value (e.g., 0.16) that satisfies the boundary condition when the two-phase resonant currents overlap in the resonant inductor L1 (e.g., 0.20). More specifically, the predetermined threshold Δdth is set to, for example, 0.20 × |Cmax - Cmin|.

[0088] The control device 50 determines a common shift amount dcom by calculating dcom = Cmax - max{du,dv,dw} if the difference Δd of the duty command values ​​of any two of the multi-phase duty command values ​​du,dv,dw is less than a predetermined threshold Δdth, and the values ​​of each of the two phase duty command values ​​for which the difference Δd is less than the predetermined threshold Δdth are greater than 0.5. If the values ​​of each of the two phase duty command values ​​for which the difference Δd is less than the predetermined threshold Δdth are greater than 0.5, the polarity of the load current of the two phases is positive.

[0089] For example, as shown in Figure 3, if the difference Δd between the duty cycle command value du of the U phase and the duty cycle command value dv of the V phase is less than a predetermined threshold Δdth, and the duty cycle command value du of the U phase and the duty cycle command value dv of the V phase are greater than 0.5, and the duty cycle command value du of the U phase is greater than the duty cycle command value dv of the V phase, the control device 50 determines the common shift amount dcom by calculating dcom = Cmax - du. In the example in Figure 3, the duty cycle command value dw of the W phase is less than 0.5.

[0090] Figure 3 illustrates the timing chart when the control device 50 has determined in advance that the difference Δd between the duty cycle command value du of the U phase and the duty cycle command value dv of the V phase is less than a predetermined threshold Δdth, and that the duty cycle command value du of the U phase and the duty cycle command value dv of the V phase are greater than 0.5. Here, Figure 3 illustrates the timing chart of the carrier signal CA1, the duty cycle command values ​​du, dv, and dw of the three phases before the shift, the first PWM signal SU1, the second PWM signal SU2, the first PWM signal SV1, the second PWM signal SV2, the first PWM signal SW1, the second PWM signal SW2, a plurality (six) of control signals SU6, SU7, SV6, SV7, SW6, SW7, current iL1, the line voltage Vuv between the U phase and the V phase, and the load current iU of the U phase. In Figure 3, the current iL1 is shown separately from the U-phase and V-phase resonant currents, which are estimated when no shift operation is performed, and which partially overlap with each other.

[0091] As shown in Figure 4, the control device 50 shifts each of the multi-phase duty command values ​​du, dv, and dw by a common shift amount dcom, and generates multiple first PWM signals SU1, SV1, SW1, multiple second PWM signals SU2, SV2, SW2, and multiple control signals SU6, SU7, SV6, SV7, SW6, SW7 based on the carrier signal CA1 and the shifted three-phase duty command values ​​du, dv, and dw. Figure 4 shows the timing chart for the carrier signal CA1, the duty cycle command values ​​du, dv, dw of the three phases after the shift, the first PWM signal SU1, the second PWM signal SU2, the first PWM signal SV1, the second PWM signal SV2, the first PWM signal SW1, the second PWM signal SW2, the control signals SU6, SU7, SV6, SV7, SW6, SW7, the current iL1, the line voltage Vuv between the U-phase and V-phase, and the load current iU of the U-phase. In Figure 4, the duty cycle command values ​​du, dv, dw of the multiple phases before the shift (see Figure 3), the current iL1 that is estimated to flow through the resonant inductor L1 before the shift (see Figure 3) but does not flow through the resonant inductor L1 after the shift, and the line voltage Vuv estimated before the shift (see Figure 3) are shown by dashed lines.

[0092] When the duty cycle command value du after the shift is 1, the control device 50 generates a first PWM signal SU1 that is high level for the entire duration of one cycle of the carrier signal CA1, and generates a second PWM signal SU2 that is low level for the entire duration of one cycle of the carrier signal CA1.

[0093] As can be seen from the waveform of current iL1 in Figure 3 and the waveform of current iL1 in Figure 4, in the power converter 100, if the control device 50 determines in advance that the difference Δd between the two-phase duty command values ​​du and dv is less than a predetermined threshold Δdth, it performs a shift operation, so that the first switching element 1U turns on and the second switching element 2U turns off for one period of the carrier signal CA1, and the resonant current of the U phase does not flow during the high-level period of the control signal SU6. As a result, in the power converter 100, the resonant current of the U phase and the resonant current of the V phase do not overlap in the resonant inductor L1, so the switching of the first switching element 1V becomes zero-voltage soft switching.

[0094] Furthermore, as can be seen from Figures 3 and 4, in the power converter 100 according to Embodiment 1, the fluctuation of the line voltage Vuv between the U phase and the V phase is small, and it is possible to reduce current distortion compared to the power converter of Patent Document 1.

[0095] Furthermore, as can be seen from Figures 3 and 4, in the power converter 100, the first switching element 1U and the second switching element 2U are not switched within one cycle of the carrier signal CA1, so the switching loss can be reduced to two-thirds.

[0096] Furthermore, as shown in Figure 5, for example, if the difference Δd between the duty cycle command value du of the U phase and the duty cycle command value dv of the V phase is less than a predetermined threshold Δdth, and the duty cycle command value du of the U phase and the duty cycle command value dv of the V phase are greater than 0.5, and the duty cycle command value dv of the V phase is greater than the duty cycle command value du of the U phase, the control device 50 determines the common shift amount dcom by calculating dcom = Cmax - dv. In the example in Figure 5, the duty cycle command value dw of the W phase is less than 0.5.

[0097] As shown in Figure 6, the control device 50 shifts each of the multi-phase duty cycle command values ​​du, dv, and dw by a common shift amount dcom, and generates multiple first PWM signals SU1, SV1, SW1, multiple second PWM signals SU2, SV2, SW2, and multiple control signals SU6, SU7, SV6, SV7, SW6, SW7 based on the carrier signal CA1 and the shifted three-phase duty cycle command values ​​du, dv, and dw. Note that the interpretation of Figure 6 is the same as that of Figure 4. In Figure 6, the multi-phase duty cycle command values ​​du, dv, and dw before the shift (see Figure 5), the current iL1 that is estimated to flow through the resonant inductor L1 before the shift (see Figure 5) but does not flow through the resonant inductor L1 after the shift, and the line voltage Vuv estimated before the shift (see Figure 5) are shown by dashed lines.

[0098] When the duty cycle command value dv after the shift is 1, the control device 50 generates a first PWM signal SV1 that is high level for the entire duration of one cycle of the carrier signal CA1, and generates a second PWM signal SV2 that is low level for the entire duration of one cycle of the carrier signal CA1.

[0099] As can be seen from the waveform of current iL1 in Figure 5 and the waveform of current iL1 in Figure 6, in the power converter 100, if the control device 50 determines in advance that the difference Δd between the two-phase duty command values ​​du and dv is less than a predetermined threshold Δdth, it performs a shift operation, so that the first switching element 1V is turned on and the second switching element 2V is turned off for one period of the carrier signal CA1, and the resonant current of the V phase does not flow during the high-level period of the control signal SV6. As a result, in the power converter 100, the resonant current of the U phase and the resonant current of the V phase do not overlap in the resonant inductor L1, so the switching of the first switching element 1U becomes zero-voltage soft switching.

[0100] Furthermore, as can be seen from Figures 5 and 6, the power converter 100 exhibits small fluctuations in the line voltage Vuv between the U-phase and V-phase, making it possible to reduce current distortion compared to the power converter described in Patent Document 1.

[0101] Furthermore, as can be seen from Figures 5 and 6, in the power converter 100, the first switching element 1V and the second switching element 2V are not switched within one cycle of the carrier signal CA1, so the switching loss can be reduced to two-thirds.

[0102] The control device 50 determines a common shift amount dcom by calculating dcom = |Cmin - min{du,dv,dw}| if the difference Δd of the duty command values ​​of any two of the multiphase duty command values ​​du,dv,dw is less than a predetermined threshold Δdth, and the values ​​of each of the two phase duty command values ​​for which the difference Δd is less than the predetermined threshold Δdth are less than 0.5 (or if the polarity of the two phase load currents is negative). If the values ​​of each of the two phase duty command values ​​for which the difference Δd is less than the predetermined threshold Δdth are less than 0.5, the polarity of the two phase load currents is negative.

[0103] Furthermore, as shown in Figure 7, for example, if the difference Δd between the duty cycle command value du of the U phase and the duty cycle command value dv of the V phase is less than a predetermined threshold Δdth, and the duty cycle command value du of the U phase and the duty cycle command value dv of the V phase are both less than 0.5, and the duty cycle command value du of the U phase is less than the duty cycle command value dv of the V phase, the control device 50 determines the common shift amount dcom by calculating dcom = |Cmin - du|. In the example in Figure 7, the duty cycle command value dw of the W phase is greater than 0.5.

[0104] Figure 7 illustrates the timing chart when the control device 50 has determined in advance that the difference Δd between the duty cycle command value du of the U phase and the duty cycle command value dv of the V phase is less than a predetermined threshold Δdth, and that the duty cycle command value du of the U phase and the duty cycle command value dv of the V phase are less than 0.5. Here, Figure 7 illustrates the timing chart of the three phase duty cycle command values ​​du, dv, dw before the shift, the first PWM signal SU1, the second PWM signal SU2, the first PWM signal SV1, the second PWM signal SV2, the first PWM signal SW1, the second PWM signal SW2, the control signals SU6, SU7, SV6, SV7, SW6, SW7, the current iL1, the line voltage Vuv between the U phase and the V phase, and the load current iU of the U phase.

[0105] As shown in Figure 8, the control device 50 shifts each of the multi-phase duty command values ​​du, dv, and dw by a common shift amount dcom, and generates multiple first PWM signals SU1, SV1, SW1, multiple second PWM signals SU2, SV2, SW2, and multiple control signals SU6, SU7, SV6, SV7, SW6, SW7 based on the carrier signal CA1 and the shifted three-phase duty command values ​​du, dv, and dw. Figure 8 shows the timing charts for the three phases after the shift: duty cycle command values ​​du, dv, dw, first PWM signal SU1, second PWM signal SU2, first PWM signal SV1, second PWM signal SV2, first PWM signal SW1, second PWM signal SW2, control signals SU6, SU7, SV6, SV7, SW6, SW7, current iL1, line voltage Vuv between the U-phase and V-phase, and load current iU of the U-phase. In Figure 8, the duty cycle command values ​​du, dv, dw of the multiple phases before the shift (see Figure 7), the current iL1 that is estimated to flow through the resonant inductor L1 before the shift (see Figure 7) but does not flow through the resonant inductor L1 after the shift, and the line voltage Vuv estimated before the shift (see Figure 7) are shown with dashed lines.

[0106] When the duty cycle command value du after the shift is 0, the control device 50 generates a first PWM signal SU1 that is low level for the entire duration of one cycle of the carrier signal CA1, and generates a second PWM signal SU2 that is high level for the entire duration of one cycle of the carrier signal CA1.

[0107] As can be seen from the waveform of current iL1 in Figure 7 and the waveform of current iL1 in Figure 8, in the power converter 100, if the control device 50 determines in advance that the difference Δd between the two-phase duty command values ​​du and dv is less than a predetermined threshold Δdth, it performs a shift operation, so that the first switching element 1U is turned off and the second switching element 2U is turned on for one period of the carrier signal CA1, and the resonant current of the U phase does not flow during the high-level period of the control signal SU7. As a result, in the power converter 100, the resonant current of the U phase and the resonant current of the V phase do not overlap in the resonant inductor L1, so the switching of the second switching element 2V becomes zero-voltage soft switching.

[0108] Furthermore, as can be seen from Figures 7 and 8, the power converter 100 exhibits small fluctuations in the line voltage Vuv between the U-phase and V-phase, making it possible to reduce current distortion compared to the power converter described in Patent Document 1.

[0109] Furthermore, as can be seen from Figures 7 and 8, in the power converter 100, the first switching element 1U and the second switching element 2U are not switched within one cycle of the carrier signal CA1, so the switching loss can be reduced to two-thirds.

[0110] (4) Advantages In the power conversion device 100 according to Embodiment 1, the control device 50 generates a plurality of first PWM signals SU1, SV1, SW1 for controlling a plurality of first switching elements 1, a plurality of second PWM signals SU2, SV2, SW2 for controlling a plurality of second switching elements 2, and a plurality of control signals SU6, SU7, SV6, SV7, SW6, SW7 for controlling a plurality of switches 8, based on a plurality of phase duty command values ​​du, dv, dw that correspond one-to-one to a plurality of switching circuits 10. The control device 50 determines a common shift amount dcom such that the duty command value of one of the two phases corresponds to a value equivalent to 100% or 0% when the difference Δd of the duty command values ​​of any two of the plurality of phase duty command values ​​du, dv, dw is less than a predetermined threshold Δdth. The control device 50 shifts each of the multi-phase duty command values ​​du, dv, and dw by a common shift amount dcom, and generates multiple first PWM signals SU1, SV1, SW1, multiple second PWM signals SU2, SV2, SW2, and multiple control signals SU6, SU7, SV6, SV7, SW6, SW7 based on the shifted multi-phase duty command values ​​du, dv, and dw.

[0111] With the above configuration, zero-voltage soft switching is possible, and current distortion can be reduced. Furthermore, with the above configuration, when the difference Δd between the duty cycle command values ​​of any two of the multiple phases of duty cycle command values ​​du, dv, and dw is less than a predetermined threshold Δdth, the first switching element 1 and the second switching element 2 of the switching circuit 10 corresponding to the phases where the duty cycle command value becomes 100% or 0% are not switched, thus reducing switching losses.

[0112] (Embodiment 2) Hereinafter, the power conversion device 100 according to Embodiment 2 will be described based on Figures 1, 15, and 16.

[0113] (1) The circuit configuration of the power converter 100 according to Embodiment 2 is the same as the circuit configuration of the power converter 100 according to Embodiment 1 (see Figure 1), so the illustration and description are omitted.

[0114] In the power converter 100 according to Embodiment 2, a part of the shift operation of the control device 50 differs from the shift operation of the control device 50 in Embodiment 1.

[0115] In this embodiment, when the multi-phase duty command values ​​du, dv, and dw are shifted by a common shift amount dcom, the control device 50 shortens the on-time of one of the multiple switches 8. The one switch 8 corresponds to a switching circuit 10 among the multiple switching circuits 10 that is controlled based on a single-phase duty command value where the duty command value is 1 or 0. In this embodiment, the control device 50 shortens the high-level period of the control signal for one switch 8 among the multiple switches 8 that corresponds to the switching circuit 10 of the phase where the duty command value becomes 1 or 0 in the three-phase duty command values ​​du, dv, and dw after the shift. In this embodiment, the control device 50 shortens the high-level period of the control signal for the one switch 8 to zero. Note that when the control device 50 shortens the high-level period of the control signal for the one switch 8, it is not limited to shortening it to zero, but may shorten it to a high-level period that is shorter than the high-level period before the shift but longer than zero.

[0116] Figure 15 shows the timing chart of the three phases before the shift, including the duty cycle command values ​​du, dv, dw, the first PWM signal SU1, the second PWM signal SU2, the first PWM signal SV1, the second PWM signal SV2, the first PWM signal SW1, the second PWM signal SW2, the control signals SU6, SU7, SV6, SV7, SW6, SW7, the current iL1, the line voltage Vuv between the U phase and the V phase, and the load current iU of the U phase.

[0117] In the example shown in Figure 16, the control device 50 shifts each of the multi-phase duty command values ​​du, dv, and dw by a common shift amount dcom, and generates multiple first PWM signals SU1, SV1, SW1, multiple second PWM signals SU2, SV2, SW2, and multiple control signals SU6, SU7, SV6, SV7, SW6, SW7 based on the carrier signal CA1 and the shifted three-phase duty command values ​​du, dv, and dw. Figure 16 shows the timing charts for the three phases after the shift: duty cycle command values ​​du, dv, dw, first PWM signal SU1, second PWM signal SU2, first PWM signal SV1, second PWM signal SV2, first PWM signal SW1, second PWM signal SW2, control signals SU6, SU7, SV6, SV7, SW6, SW7, current iL1, line voltage Vuv between the U-phase and V-phase, and load current iU of the U-phase. In Figure 16, the duty cycle command values ​​du, dv, dw of the multiple phases before the shift (see Figure 15), the current iL1 that is estimated to flow through the resonant inductor L1 before the shift (see Figure 15) but does not flow through the resonant inductor L1 after the shift, and the line voltage Vuv estimated before the shift (see Figure 15) are shown by dashed lines.

[0118] When the duty cycle command value du after the shift is 1, the control device 50 generates a first PWM signal SU1 that is high level for the entire duration of one cycle of the carrier signal CA1, and generates a second PWM signal SU2 that is low level for the entire duration of one cycle of the carrier signal CA1.

[0119] As can be seen from the waveform of current iL1 in Figure 15 and the waveform of current iL1 in Figure 16, in the power converter 100, if the control device 50 determines in advance that the difference Δd between the two-phase duty command values ​​du and dv is less than a predetermined threshold Δdth, it performs a shift operation, so that the first switching element 1U turns on and the second switching element 2U turns off for one period of the carrier signal CA1, and the resonant current of the U phase does not flow during the high-level period of the control signal SU6. As a result, in the power converter 100, the resonant current of the U phase and the resonant current of the V phase do not overlap in the resonant inductor L1, so the switching of the first switching element 1V becomes zero-voltage soft switching.

[0120] Furthermore, as can be seen from Figures 15 and 16, the power converter 100 exhibits small fluctuations in the line voltage Vuv between the U-phase and V-phase, making it possible to reduce current distortion compared to the power converter described in Patent Document 1.

[0121] Furthermore, as can be seen from Figures 15 and 16, in the power converter 100, the first switching element 1U and the second switching element 2U are not switched within one cycle of the carrier signal CA1, so the switching loss can be reduced to two-thirds.

[0122] In the example shown in Figure 16, the control device 50 of the power converter 100 shortens the high-level periods of the control signals SU6 and SU7 to zero during one cycle of the carrier signal CA1, thereby shortening the ON period of the switch 8U (see Figure 1) to zero.

[0123] (2) Advantages In the power conversion device 100 according to Embodiment 2, the control device 50 generates a plurality of first PWM signals SU1, SV1, SW1 for controlling a plurality of first switching elements 1, a plurality of second PWM signals SU2, SV2, SW2 for controlling a plurality of second switching elements 2, and a plurality of control signals SU6, SU7, SV6, SV7, SW6, SW7 for controlling a plurality of switches 8, based on a plurality of phase duty command values ​​du, dv, dw that correspond one-to-one to a plurality of switching circuits 10. The control device 50 determines a common shift amount dcom such that the duty command value of one of the two phases corresponds to a value equivalent to 100% or 0% when the difference Δd of the duty command values ​​of any two of the plurality of phase duty command values ​​du, dv, dw is less than a predetermined threshold Δdth. The control device 50 shifts each of the multi-phase duty command values ​​du, dv, and dw by a common shift amount dcom, and generates multiple first PWM signals SU1, SV1, SW1, multiple second PWM signals SU2, SV2, SW2, and multiple control signals SU6, SU7, SV6, SV7, SW6, SW7 based on the shifted multi-phase duty command values ​​du, dv, and dw.

[0124] With the above configuration, zero-voltage soft switching is possible, and current distortion can be reduced.

[0125] Furthermore, in the power conversion device 100 according to Embodiment 2, the control device 50 shortens the on-time of one of the multiple switches 8 when the duty cycle command values ​​du, dv, and dw of multiple phases are shifted by a common shift amount dcom. The one switch 8 corresponds to a switching circuit 10 among the multiple switching circuits 10 that is controlled based on the duty cycle command value of the one phase.

[0126] With the above configuration, by shortening the on-period of the switch 8 corresponding to the switching circuit 10 of the phase where the duty cycle command value is shifted to a value equivalent to 100% or a value equivalent to 0%, it is possible to reduce the loss of current flowing through the switch 8.

[0127] (Embodiment 3) The power converter 100A according to Embodiment 3 will be described below with reference to Figure 17.

[0128] (1) The power converter 100A according to Embodiment 3 differs from the power converter 100 according to Embodiment 1 in that the fifth terminal 153 of the regenerative capacitor 15 is connected to the first DC terminal 31 instead of the second DC terminal 32. With respect to the power converter 100A according to Embodiment 2, the same reference numerals are used for components that are the same as those in the power converter 100 according to Embodiment 1, and their descriptions are omitted.

[0129] (2) In the power converter 100A according to the third operating embodiment, the operation of the control device 50 is the same as the operation of the control device 50 in the first embodiment, so the explanation is omitted.

[0130] (3) Advantages The power converter 100A according to Embodiment 3 is capable of zero-voltage soft switching, similar to the power converter 100 according to Embodiment 1, and is also capable of reducing current distortion.

[0131] (Other Modifications) Embodiments 1 to 3 described above are merely one of many embodiments of this disclosure. Embodiments 1 to 3 described above can be modified in various ways depending on the design, etc., as long as the objectives of this disclosure are achieved.

[0132] For example, the carrier signal CA1 is a carrier signal used to generate multiple first PWM signals SU1, SV1, SW1 and multiple second PWM signals SU2, SV2, SW2, but it is not limited to a triangular waveform; a sawtooth waveform carrier signal is also acceptable.

[0133] Furthermore, each of the multiple first switching elements 1 and the multiple second switching elements 2 is not limited to IGBTs, but may also be a MOSFET. In this case, each of the multiple first diodes 4 may be replaced with a parasitic diode of the MOSFET constituting the corresponding first switching element 1. Similarly, each of the multiple second diodes 5 may be replaced with a parasitic diode of the MOSFET constituting the corresponding second switching element 2. The MOSFETs are, for example, Si-based MOSFETs or SiC-based MOSFETs. Each of the multiple first switching elements 1 and the multiple second switching elements 2 may also be, for example, a bipolar transistor or a GaN-based GIT.

[0134] Furthermore, in power converters 100 and 100A, if the capacitance of each of the multiple resonant capacitors 9 is relatively small, instead of externally attaching the multiple resonant capacitors 9 one-to-one between the ends of the multiple second switching elements 2, the parasitic capacitance between the ends of the multiple second switching elements 2 may also serve as the multiple resonant capacitors 9.

[0135] Furthermore, the length of the dead time period Td is not limited to being set to be the same as the resonant half-period; it may also be set to a length different from the resonant half-period.

[0136] The dead time period Td may be set by a dead time generation circuit, such as a gate driver IC (Integrated Circuit), which is provided separately from the control device 50. Alternatively, the control device 50 may include a gate driver IC, and the dead time generation circuit of the gate driver IC may set the dead time period Td.

[0137] Regarding the method for setting the additional times Tau, Tav, and Taw described in the "(3.1) Basic Operation" section of Embodiment 1, the calculation formula is an ideal design example and is not limited to cases where calculations are always performed using such a formula. In some cases, it is not a problem to set the additional times Tau, Tav, and Taw to 0 or another fixed time. Furthermore, if the purpose of the additional times Tau, Tav, and Taw can be achieved, values ​​obtained by calculations using other formulas are also acceptable. For example, in the basic operation, the calculation Tau = iU × (L / V15) is performed, but it is not limited to this, and Tau may be set to 0, set between 0 and iU × (L / V15), always set to a constant additional time, calculated using another formula, or set in combination of these.

[0138] In each of the multiple switches 8, the second main terminal (emitter terminal) of the third switching element 6 is connected to the second main terminal (emitter terminal) of the fourth switching element 7, the first main terminal (collector terminal) of the third switching element 6 is connected to the connection point 3 of the corresponding switching circuit 10 among the multiple switching circuits 10, and the first main terminal (collector terminal) of the fourth switching element 7 is connected to the common connection point 25. In this case, each of the multiple switches 8 further has a diode antiparallel connected to the third switching element 6 and a diode antiparallel connected to the fourth switching element 7.

[0139] Furthermore, each of the third switching element 6 and the fourth switching element 7 may be replaced with a MOSFET or a bipolar transistor.

[0140] In each of the multiple switches 8, the third switching element 6 and the fourth switching element 7 may be connected in antiparallel. Furthermore, each of the multiple switches 8 may further include a diode connected in antiparallel to the third switching element 6 and a diode connected in antiparallel to the fourth switching element 7.

[0141] Furthermore, in each of the multiple switches 8, the third switching element 6 and the fourth switching element 7 may be MOSFETs.

[0142] Each of the multiple switches 8 may be a dual-gate type GaN-based GIT having a first source terminal, a first gate terminal, a second gate terminal, and a second source terminal. In this case, a control signal SU6 is applied between the first gate terminal and the first source terminal of the dual-gate type GaN-based GIT constituting switch 8U, and a control signal SU7 is applied between the second gate terminal and the second source terminal. Similarly, a control signal SV6 is applied between the first gate terminal and the first source terminal of the dual-gate type GaN-based GIT constituting switch 8V, and a control signal SV7 is applied between the second gate terminal and the second source terminal. Furthermore, a control signal SW6 is applied between the first gate terminal and the first source terminal of the dual-gate type GaN-based GIT constituting switch 8W, and a control signal SW7 is applied between the second gate terminal and the second source terminal.

[0143] Each power converter 100 may further include a capacitor connected between the fourth end of the resonant inductor L1 and the first DC terminal 31. In this case, each power converter 100 has a series circuit of the capacitor and the regenerative capacitor 15 connected between the first DC terminal 31 and the second DC terminal 32.

[0144] (Aspects) The following aspects are disclosed herein.

[0145] The power conversion device (100; 100A) according to the first embodiment includes a first DC terminal (31), a second DC terminal (32), a power conversion circuit (11), a plurality of AC terminals (41), a plurality of switches (8), a plurality of resonant capacitors (9), a resonant inductor (L1), a regenerative capacitor (15), and a control device (50). The power conversion circuit (11) has a plurality of first switching elements (1) and a plurality of second switching elements (2). In the power conversion circuit (11), a plurality of switching circuits (10), each in which a plurality of first switching elements (1) and a plurality of second switching elements (2) are connected in series one to one, are connected in parallel to each other. In the power conversion circuit (11), a plurality of first switching elements (1) are connected to the first DC terminal (31), and a plurality of second switching elements (2) are connected to the second DC terminal (32). Multiple AC terminals (41) correspond one-to-one with multiple switching circuits (10). Each of the multiple AC terminals (41) is connected to the connection point (3) of the first switching element (1) and the second switching element (2) in the corresponding switching circuit (10) among the multiple switching circuits (10). Multiple switches (8) correspond one-to-one with multiple switching circuits (10). Each of the multiple switches (8) has its first end (81) connected to the connection point (3) of the first switching element (1) and the second switching element (2) in the corresponding switching circuit (10) among the multiple switching circuits (10), and its second end (82) is commonly connected to a common connection point (25). Resonant capacitors (9) correspond one-to-one with multiple switches (8). Each of the multiple resonant capacitors (9) is connected between the first end (81) and the second DC terminal (32) of the corresponding switch (8) among the multiple switches (8). The resonant inductor (L1) has a third terminal and a fourth terminal. In the resonant inductor (L1), the third terminal is connected to the common connection point (25). The regenerative capacitor (15) has a fifth terminal (153) and a sixth terminal (154). In the regenerative capacitor (15), the fifth terminal (153) is connected to the first DC terminal (31) or the second DC terminal (32), and the sixth terminal (154) is connected to the fourth terminal of the resonant inductor (L1).The control device (50) generates multiple first PWM signals (SU1, SV1, SW1) for controlling multiple first switching elements (1), multiple second PWM signals (SU2, SV2, SW2) for controlling multiple second switching elements (2), and multiple control signals for controlling multiple switches (8), based on multi-phase duty command values ​​(du, dv, dw) that correspond one-to-one to multiple switching circuits (10). The control device (50) determines a common shift amount (dcom) such that the duty cycle command value of one of the two phases corresponds to either 100% or 0% when the difference (Δd) between the duty cycle command values ​​of any two of the multiple phases (du, dv, dw) is less than a predetermined threshold (Δdth). The control device then shifts each of the multiple phases (du, dv, dw) by the common shift amount (dcom) to generate multiple first PWM signals (SU1, SV1, SW1), multiple second PWM signals (SU2, SV2, SW2), and multiple control signals (SU6, SU7, SV6, SV7, SW6, SW7).

[0146] According to this embodiment, zero-voltage soft switching is possible, and current distortion can be reduced.

[0147] In the power converter (100; 100A) according to the second embodiment, in the first embodiment, the control device (50) determines a common shift amount (dcom) based on the maximum value (Cmax) or minimum value (Cmin) of the carrier signal (CA1) used to generate a plurality of first PWM signals (SU1, SV1, SW1) and a plurality of second PWM signals (SU2, SV2, SW2), and the duty cycle command values ​​of the two phases.

[0148] In the power converter (100) according to the third embodiment, in the first or second embodiment, the control device (50) shortens the on-time of one of the multiple switches (8) when the duty cycle command values ​​(du, dv, dw) of multiple phases are shifted by a common shift amount (dcom). The one switch (8) corresponds to a switching circuit (10) among the multiple switching circuits (10) that is controlled based on the duty cycle command value of the one phase.

[0149] According to this embodiment, by shortening the on-period of the switch (8) corresponding to the switching circuit (10) of the phase in which the duty cycle command value has been shifted to a value equivalent to 100% or a value equivalent to 0%, it is possible to reduce the loss of current flowing through the switch (8).

[0150] 1 First switching element 2 Second switching element 3 Connection point 8 Switch 9 Resonant capacitor 10 Switching circuit 11 Power conversion circuit 15 Regenerative capacitor 153 Fifth terminal 154 Sixth terminal 31 First DC terminal 32 Second DC terminal 41 AC terminal 50 Control device 100, 100A Power converter CA1 Carrier signal du, dv, dw Duty shift command value dcom Common shift amount Δd Difference in duty shift command values ​​of two phases Δdth Predetermined threshold iU, iv, iW Output current (load current) L1 Resonant inductor RA1 AC load SU1, SV1, SW1 First PWM signal SU2, SV2, SW2 Second PWM signal SU6, SU7, SV6, SV7, SW6, SW7 Control signal

Claims

1. A power conversion circuit having a first DC terminal, a second DC terminal, a plurality of first switching elements and a plurality of second switching elements, wherein a plurality of switching circuits are connected in parallel to each other, with the plurality of first switching elements and the plurality of second switching elements connected in one-to-one series, the plurality of first switching elements connected to the first DC terminal, and the plurality of second switching elements connected to the second DC terminal, a plurality of AC terminals corresponding one-to-one to the plurality of switching circuits, each connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit, a plurality of switches corresponding one-to-one to the plurality of switching circuits, each having its first end connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit and its second end commonly connected to a common connection point, a plurality of resonant capacitors corresponding one-to-one to the plurality of switches, each connected between the first end of the corresponding switch and the second DC terminal, and a resonant inductor having a third end and a fourth end, the third end of which is connected to the common connection point, Power conversion device comprising: a regenerative capacitor having a fifth and a sixth terminal, the fifth terminal being connected to the first DC terminal or the second DC terminal, and the sixth terminal being connected to the fourth terminal of the resonant inductor; and a control device that generates a plurality of first PWM signals for controlling the plurality of first switching elements, a plurality of second PWM signals for controlling the plurality of second switching elements, and a plurality of control signals for controlling the plurality of switches, based on a plurality of duty cycle command values ​​of multiple phases corresponding one-to-one to the plurality of switching circuits, wherein the control device determines a common shift amount such that the duty cycle command value of one of the two phases corresponds to 100% or 0% when the difference between the duty cycle command values ​​of any two of the plurality of phases is less than a predetermined threshold, and shifts each of the plurality of phases' duty cycle command values ​​by the common shift amount to generate the plurality of first PWM signals, the plurality of second PWM signals, and the plurality of control signals.

2. The power converter according to claim 1, wherein the control device determines the common shift amount based on the maximum or minimum value of the carrier signals used to generate the plurality of first PWM signals and the plurality of second PWM signals, and the duty cycle command value of the two phases.

3. The power conversion device according to claim 1 or 2, wherein when the duty command values ​​of the multiple phases are shifted by the common shift amount, the control device shortens the on-time of one of the multiple switches, and the one switch corresponds to a switching circuit among the multiple switching circuits that is controlled based on the duty command value of the one phase.