Magnetic storage device
By optimizing the thickness ratio of the bottom electrode and the top electrode, the problems of surface roughness and etching difficulty caused by improper thickness in the manufacturing of existing magnetic storage devices have been solved, achieving more efficient magnetic tunnel junction pattern manufacturing and excellent electrical properties.
Patent Information
- Application Number
- CN202010391513.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-06-11
- Filing Date
- 2020-05-11
- Publication Date
- 2025-12-19
- Estimated Expiration
- 2040-05-11
AI Technical Summary
In the manufacturing process of existing magnetic storage devices, an improper thickness ratio between the bottom electrode and the top electrode can lead to increased surface roughness or increased etching difficulty, affecting the crystal growth and electrical properties of the magnetic tunnel junction pattern.
The thickness of the bottom electrode is set to 0.6 to 1.1 times the thickness of the magnetic tunnel junction pattern, and the thickness of the top electrode is set to 1.2 to 1.9 times the thickness of the magnetic tunnel junction pattern. The electrode thickness ratio is optimized to facilitate crystal growth and etching processes.
It enables easier fabrication of magnetic tunnel junction patterns, reduces surface roughness and etching difficulty, and improves the manufacturing efficiency and electrical properties of magnetic storage devices.
Smart Images

Figure CN112071876B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to a semiconductor device, and in particular, to a magnetic memory device including a magnetic tunnel junction. BACKGROUND
[0002] As the demand for electronic devices having increased speed and / or reduced power consumption increases, semiconductor memory devices having faster operating speeds and / or lower operating voltages can be required. Magnetic memory devices have been proposed to meet such requirements. For example, magnetic memory devices can provide technical advantages such as high speed and / or non-volatility, and thus can emerge as next-generation memory devices.
[0003] A magnetic memory device includes a magnetic tunnel junction pattern (MTJ). The MTJ generally includes two magnetic layers and an insulating layer interposed between the two magnetic layers. The resistance of the MTJ varies according to the magnetization directions of the magnetic layers. For example, the resistance of the MTJ is higher when the magnetization directions of the magnetic layers are anti-parallel to each other than when they are parallel to each other. Such a resistance difference can be used for a data storage operation of the magnetic memory device. SUMMARY
[0004] An embodiment of the present inventive concept provides a magnetic memory device having excellent or desired characteristics and a method of fabricating the same.
[0005] An embodiment of the present inventive concept provides a magnetic memory device that can be more easily fabricated and a method of fabricating the same.
[0006] According to an embodiment of the present inventive concept, a magnetic memory device can include a lower contact plug on a substrate, a magnetic tunnel junction pattern on the lower contact plug, a bottom electrode between the lower contact plug and the magnetic tunnel junction pattern and in contact with a bottom surface of the magnetic tunnel junction pattern, and a top electrode on a top surface of the magnetic tunnel junction pattern. Each of the bottom electrode, the magnetic tunnel junction pattern, and the top electrode can have a thickness in a first direction perpendicular to a top surface of the substrate. A first thickness of the bottom electrode can be about 0.6 to 1.1 times a second thickness of the magnetic tunnel junction pattern.
[0007] According to an embodiment of the present inventive concept, a magnetic memory device can include an interconnection line on a substrate, a contact between the substrate and the interconnection line and connecting the interconnection line to the substrate, a conductive line on the interconnection line, a magnetic tunnel junction pattern between the interconnection line and the conductive line, a lower contact plug between the magnetic tunnel junction pattern and the interconnection line and adjacent to the interconnection line, a bottom electrode between the magnetic tunnel junction pattern and the lower contact plug, and a top electrode between the magnetic tunnel junction pattern and the conductive line. Each of the bottom electrode, the magnetic tunnel junction pattern, and the top electrode can have a thickness in a first direction perpendicular to a top surface of the substrate. A first thickness of the bottom electrode can be about 0.6 to 1.1 times a second thickness of the magnetic tunnel junction pattern.
[0008] According to an embodiment of the present inventive concept, a magnetic memory device can include an interconnect structure on a substrate, the interconnect structure including interconnect lines spaced apart from each other in a first direction perpendicular to a top surface of the substrate and contacts between the interconnect lines; a lower contact plug on the interconnect structure and connected to an uppermost one of the interconnect lines; a magnetic tunnel junction pattern on the lower contact plug; a bottom electrode between the lower contact plug and the magnetic tunnel junction pattern; a conductive line on the magnetic tunnel junction pattern; and a top electrode between the magnetic tunnel junction pattern and the conductive line. Each of the bottom electrode, the magnetic tunnel junction pattern, and the top electrode can have a thickness in the first direction. A first thickness of the bottom electrode can be about 0.6 to 1.1 times a second thickness of the magnetic tunnel junction pattern. BRIEF DESCRIPTION OF DRAWINGS
[0009] Example embodiments will be more clearly understood from the following brief description, taken in connection with the accompanying drawings. The accompanying drawings represent non-limiting example embodiments as described herein.
[0010] Figure 1 is a circuit diagram showing a unit memory cell of a magnetic memory device according to an embodiment of the present inventive concept.
[0011] Figure 2 is a plan view showing a magnetic memory device according to an embodiment of the present inventive concept.
[0012] Figure 3 is a cross-sectional view taken along line I-I' of Figure 2 .
[0013] Figure 4 is an enlarged view of portion A of Figure 3 .
[0014] Figure 5A and Figure 5B is a cross-sectional view showing an example of a magnetic tunnel junction pattern of Figure 3 .
[0015] Figures 6 to 9 is a cross-sectional view taken along line I-I' of Figure 2 , for showing a method of manufacturing a magnetic memory device according to an embodiment of the present inventive concept.
[0016] It should be noted that the foregoing drawings are intended to be illustrative, and not restrictive, of the methods, structures, and / or materials used in certain example embodiments, and that they are provided to supplement the written description provided below and to further aid in understanding the examples of the present inventive concepts. These drawings are not to scale, and can not accurately reflect the precise structural or performance characteristics of any given embodiment, and should not be interpreted as limiting or restricting the scope or range of values or characteristics encompassed by the example embodiments. For example, relative thicknesses and positions of molecules, layers, regions, and / or structural elements can be reduced or enlarged for clarity. The use of similar or identical reference numerals in various drawings is intended to indicate the presence of a similar or identical element or feature. DETAILED DESCRIPTION
[0017] Example embodiments of the inventive concepts will now be described more fully with reference to the accompanying drawings in which example embodiments are shown. As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The term "and / or" includes any and all combinations of one or more of the associated listed items. When an element is referred to as being "on" another element, it can be directly on the other element or indirectly on the other element with one or more intervening elements interposed therebetween, or it can be directly connected to the other element. When an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements interposed therebetween.
[0018] Figure 1 is a circuit diagram showing a unit memory cell of a magnetic memory device according to an embodiment of the present inventive concepts.
[0019] Referring to Figure 1 The unit memory cell MC can include a memory device ME and a selection element SE. The memory device ME and the selection element SE can be electrically connected in series to each other. The memory device ME can be provided between and connected to the bit line BL and the selection element SE. The selection element SE can be provided between and connected to the memory device ME and the source line SL, and can be controlled by the word line WL. The selection element SE can include, for example, a bipolar transistor or a metal oxide semiconductor (MOS) field effect transistor.
[0020] The memory device ME can include a magnetic tunnel junction pattern MTJ including magnetic patterns MP1 and MP2 spaced apart from each other and a tunnel barrier pattern TBP interposed between the magnetic patterns MP1 and MP2. One of the magnetic patterns MP1 and MP2 can have a fixed magnetization direction regardless of the presence of an external magnetic field generated in a typical use condition, and thus it can serve as a reference magnetic pattern of the magnetic tunnel junction pattern MTJ. The other of the magnetic patterns MP1 and MP2 can have a magnetization direction that can be changed to one of two stable magnetization directions by an external magnetic field, and thus it can serve as a free magnetic pattern of the magnetic tunnel junction pattern MTJ. The resistance of the magnetic tunnel junction pattern MTJ can be much greater when the magnetization directions of the reference magnetic pattern and the free magnetic pattern are anti-parallel than when they are parallel. In other words, the resistance of the magnetic tunnel junction pattern MTJ can be controlled by adjusting the magnetization direction of the free magnetic pattern. Thus, the resistance difference of the magnetic tunnel junction pattern MTJ caused by the difference in the magnetization direction between the reference magnetic pattern and the free magnetic pattern can be used as a data storage mechanism in the memory device ME.
[0021] Figure 2 is a plan view showing a magnetic memory device according to an embodiment of the inventive concept. Figure 3 is a cross-sectional view taken along the line I-I' of Figure 2 is an enlarged view of a portion A of Figure 4 is a cross-sectional view taken along the line I-I' of Figure 3 is an enlarged view of a portion A of Figure 5A and Figure 5B are cross-sectional views showing examples of a magnetic tunnel junction pattern of Figure 3
[0022] Referring to Figure 2 and Figure 3 , an interconnect structure 115 can be disposed on a substrate 100. The substrate 100 can be a semiconductor substrate such as a silicon, a silicon-on-insulator (SOI), a silicon germanium (SiGe), a germanium (Ge), and a gallium arsenide (GaAs) wafer. The interconnect structure 115 can include interconnect lines 110 spaced apart from each other in a first direction D1 perpendicular to a top surface 100U of the substrate 100. The interconnect lines 110 can extend in a second direction D2 parallel to the top surface 100U of the substrate 100. The terms first, second, and the like can be used herein to distinguish one element from another element, and the elements should not be limited by the terms. Spatial relationship terms such as "below", "under", "lower", "above", "upper" and the like are used herein to describe a relationship of one element or feature to another element or elements or features as illustrated in the drawings, but it will be understood that the spatial relationship terms are intended to encompass different orientations of the device in use or operation, in addition to the orientations depicted in the drawings.
[0023] The lowermost interconnect line of the interconnect lines 110 can be spaced apart from the substrate 100 in the first direction Dl. The interconnect structure 115 can include contacts 112 disposed between the lowermost interconnect line 110 and the substrate 100 and between the interconnect lines 110. Some of the contacts 112 can connect the lowermost interconnect line 110 to the substrate 100, while other of the contacts 112 can connect the interconnect lines 110 to each other. The uppermost interconnect line of the interconnect lines 110 can be connected to a corresponding one of the interconnect lines 110 by a contact 112 connected thereto. The uppermost interconnect line 110 can be electrically connected to the lowermost interconnect line 110 by a contact 112 connected thereto and the interconnect line 110. The interconnect lines 110 and the contacts 112 can be formed of or include a metallic material, such as copper.
[0024] A selection element SE can be disposed in the substrate 100. As an example, the selection element SE can be a field effect transistor. The lowermost interconnect line 110 can be electrically connected to a terminal of the selection element SE by a contact 112 connected thereto. A first interlayer insulating layer 120 can be disposed on the substrate 100 to extend over or cover the interconnect structure 115. As used herein, the term "cover" can not necessarily require a complete covering. A top surface of the uppermost interconnect line 110 can be substantially coplanar with a top surface of the first interlayer insulating layer 120. As an example, the top surface of the uppermost interconnect line 110 can be located at the same height as the top surface of the first interlayer insulating layer 120. In this specification, a height can mean a distance measured in the first direction Dl from a top surface 100U of the substrate 100. The first interlayer insulating layer 120 can be formed of or include an oxide, a nitride, and / or an oxynitride.
[0025] A second interlayer insulating layer 122 can be disposed on the first interlayer insulating layer 120 and can extend over or cover the top surface of the uppermost interconnect line 110. The second interlayer insulating layer 122 can be formed of or include an oxide, a nitride, and / or an oxynitride.
[0026] The lower contact plug 130 can be disposed in the second interlayer insulating layer 122 and can be located on the interconnection structure 115. The lower contact plug 130 can be two-dimensionally arranged on the interconnection structure 115 in the second direction D2 and the third direction D3. The third direction D3 can be parallel to the top surface 100U of the substrate 100 and can cross the second direction D2. Each lower contact plug 130 can be provided to penetrate or extend through the second interlayer insulating layer 122 and can be connected to a corresponding one of the uppermost interconnection lines 110. As an example, each lower contact plug 130 can be in contact with a top surface of a corresponding one of the uppermost interconnection lines 110. Each lower contact plug 130 can be electrically connected to a terminal of a corresponding one of the selection elements SE through a corresponding one of the interconnection lines 110 and a corresponding one of the contacts 112. The lower contact plug 130 can be formed of or include a metallic material, such as tungsten, titanium, copper, and / or tantalum.
[0027] The data storage structure DS can be disposed on the lower contact plug 130. The data storage structure DS can be two-dimensionally arranged in the second direction D2 and the third direction D3 and can be respectively disposed on the lower contact plug 130. The second interlayer insulating layer 122 can have a recessed top surface 122RU formed between the data storage structures DS. The recessed top surface 122RU of the second interlayer insulating layer 122 can be located at a lower height than a top surface 130U of each lower contact plug 130.
[0028] The third interlayer insulating layer 126 can be disposed on the second interlayer insulating layer 122 to extend over or cover the data storage structure DS. The third interlayer insulating layer 126 can extend over or cover the recessed top surface 122RU of the second interlayer insulating layer 122 and can extend over or cover the side surfaces of the data storage structure DS. The protective insulating layer 124 can be interposed between the side surfaces of each data storage structure DS and the third interlayer insulating layer 126. The protective insulating layer 124 can be provided to surround the side surfaces of each data storage structure DS when viewed in a plan view. The protective insulating layer 124 can extend from the side surfaces of each data storage structure DS into a region between the second interlayer insulating layer 122 and the third interlayer insulating layer 126. The protective insulating layer 124 can be interposed between the recessed top surface 122RU of the second interlayer insulating layer 122 and the third interlayer insulating layer 126. The protective insulating layer 124 can be formed of or include a nitride, such as silicon nitride, and the third interlayer insulating layer 126 can be formed of or include an oxide, a nitride, and / or an oxynitride.
[0029] The conductive lines 180 can be disposed on the third interlayer dielectric layer 126. The conductive lines 180 can extend in the second direction D2 and can be spaced apart from each other in the third direction D3. Each conductive line 180 can collectively connect to some (i.e., multiple) data storage structures arranged in the second direction D2 in the data storage structure DS. The conductive lines 180 can be formed of or include a metallic material (e.g., copper). The conductive lines 180 can function as bit lines.
[0030] Each of the uppermost interconnect lines 110 and the conductive lines 180 can have a thickness in the first direction Dl. In some embodiments, the thickness 180T of each conductive line 180 can be greater than the thickness 110T of each uppermost interconnect line 110. As an example, the thickness 180T of each conductive line 180 can be about twice the thickness 110T of each uppermost interconnect line 110 (i.e., 180T = 2 x 110T).
[0031] Referring to Figure 3 and Figure 4 Each data storage structure DS can include a bottom electrode BE, a magnetic tunnel junction pattern MTJ, and a top electrode TE sequentially stacked on each lower contact plug 130. The bottom electrode BE can be interposed between each lower contact plug 130 and the magnetic tunnel junction pattern MTJ, and the top electrode TE can be interposed between a corresponding one of the conductive lines 180 and the magnetic tunnel junction pattern MTJ. The magnetic tunnel junction pattern MTJ can include a first magnetic pattern MP1, a second magnetic pattern MP2, and a tunnel barrier pattern TBP between the first magnetic pattern MP1 and the second magnetic pattern MP2. The first magnetic pattern MP1 can be disposed between the bottom electrode BE and the tunnel barrier pattern TBP, and the second magnetic pattern MP2 can be disposed between the top electrode TE and the tunnel barrier pattern TBP.
[0032] The bottom electrode BE can be in contact with the top surface 130U of each lower contact plug 130 and extend beyond an edge of the top surface 130U of each lower contact plug 130, and can extend in the first direction Dl from the top surface 130U of each lower contact plug 130 to be in contact with a bottom surface MTJ_L of the magnetic tunnel junction pattern MTJ. The bottom surface MTJ_L of the magnetic tunnel junction pattern MTJ can correspond to a bottom surface of the first magnetic pattern MP1. The bottom electrode BE can be formed of or include a metallic nitride (e.g., TiN). The bottom electrode BE can be a single or unitary layer that extends from the top surface 130U of each lower contact plug 130 to the bottom surface MTJ_L of the magnetic tunnel junction pattern MTJ. As used herein, a “unitary” layer can refer to a continuous or unitary layer. As an example, the bottom electrode BE can be a single or unitary layer of a metallic nitride (e.g., TiN).
[0033] The top electrode TE can be in contact with a top surface MTJ U of the magnetic tunnel junction pattern MTJ and can extend from the top surface MTJ U of the magnetic tunnel junction pattern MTJ in the first direction Dl to be in contact with a bottom surface 180L of a corresponding conductive line 180. The conductive line 180 can extend beyond an edge of the top electrode TE in the second direction D2. The top surface MTJ U of the magnetic tunnel junction pattern MTJ can correspond to a top surface of the second magnetic pattern MP2. The top electrode TE can be formed of or include at least one of a non-magnetic metal (e.g., W) and a metal nitride (e.g., TiN). As an example, the top electrode TE can be formed of or include the same metal nitride as the bottom electrode BE. The top electrode TE can be a single or integral layer that extends from the top surface MTJ U of the magnetic tunnel junction pattern MTJ to the bottom surface 180L of the corresponding conductive line 180. As an example, the top electrode TE can be a single or integral layer of a metal nitride (e.g., TiN).
[0034] Each of the bottom electrode BE, the magnetic tunnel junction pattern MTJ, and the top electrode TE can have a thickness in the first direction Dl. The first thickness Tl of the bottom electrode BE can be about 0.6 to 1.1 times a second thickness T2 of the magnetic tunnel junction pattern MTJ (i.e., 0.6T2 < Tl < 1.1T2). In a case where the first thickness Tl is less than 0.6 times the second thickness T2 (i.e., Tl < 0.6T2), a surface roughness of the bottom electrode BE can increase. In this case, the surface roughness of the bottom electrode BE can be transcribed or transferred to the magnetic tunnel junction pattern MTJ, which can cause difficulties in crystal growth of the magnetic tunnel junction pattern MTJ. In a case where the first thickness Tl is greater than 1.1 times the second thickness T2 (i.e., Tl > 1.1T2), it can be difficult to etch a bottom electrode layer during an etching process used to form the bottom electrode BE. The first thickness Tl of the bottom electrode BE can thus be critical to the formation and characteristics of the bottom electrode BE and the magnetic tunnel junction pattern MTJ thereon.
[0035] The third thickness T3 of the top electrode TE can be about 1.2 to 1.9 times (i.e., 1.2T2≤T3≤1.9T2) of the second thickness T2 of the magnetic tunnel junction pattern MTJ. In a case where the third thickness T3 is less than 1.2 times (i.e., T3<1.2T2) of the second thickness T2, a metal element (e.g., Cu) in the corresponding conductive line 180 can more easily diffuse into the tunnel barrier pattern TBP in the magnetic tunnel junction pattern MTJ, thereby deteriorating the electrical characteristics of the magnetic tunnel junction pattern MTJ. In a case where the third thickness T3 is greater than 1.9 times (i.e., T3>1.9T2) of the second thickness T2, it can be difficult to etch the magnetic tunnel junction layer during an etching process for forming the magnetic tunnel junction pattern MTJ. The third thickness T3 of the top electrode TE can thus be critical to the formation and characteristics of the magnetic tunnel junction pattern MTJ and its tunnel barrier pattern TBP.
[0036] As an example, the second thickness T2 of the magnetic tunnel junction pattern MTJ can be in a range from about 1 nm to about 3 nm. In this case, the first thickness T1 of the bottom electrode BE can be in a range from about 1 nm to about 3 nm, and the third thickness T3 of the top electrode TE can be in a range from about 2 nm to about 5 nm. As an example, the second thickness T2 of the magnetic tunnel junction pattern MTJ can be in a range from about 1 nm to about 3 nm. In this case, the first thickness T1 of the bottom electrode BE can be in a range from about 1 nm to about 3 nm, and the third thickness T3 of the top electrode TE can be in a range from about 2 nm to about 5 nm. As an example, the second thickness T2 of the magnetic tunnel junction pattern MTJ can be in a range from about 1 nm to about 3 nm. In this case, the first thickness T1 of the bottom electrode BE can be in a range from about 1 nm to about 3 nm, and the third thickness T3 of the top electrode TE can be in a range from about 2 nm to about 5 nm. As an example, the second thickness T2 of the magnetic tunnel junction pattern MTJ can be in a range from about 1 nm to about 3 nm. In this case, the first thickness T1 of the bottom electrode BE can be in a range from about 1 nm to about 3 nm, and the third thickness T3 of the top electrode TE can be in a range from about 2 nm to about 5 nm.
[0037] In some embodiments, a side surface of the first magnetic pattern MP1 can be inclined at an angle with respect to a bottom surface of the first magnetic pattern MP1 (e.g., a bottom surface MTJ_L of the magnetic tunnel junction pattern MTJ). A first angle θ1 between the side surface of the first magnetic pattern MP1 and the bottom surface of the first magnetic pattern MP1 can be an acute angle. A side surface of the tunnel barrier pattern TBP can be inclined at an angle with respect to a bottom surface of the tunnel barrier pattern TBP (e.g., an interface between the tunnel barrier pattern TBP and the first magnetic pattern MP1). A second angle θ2 between the side surface of the tunnel barrier pattern TBP and the bottom surface of the tunnel barrier pattern TBP can be an obtuse angle. A side surface of the second magnetic pattern MP2 can be inclined at an angle with respect to a bottom surface of the second magnetic pattern MP2 (e.g., an interface between the tunnel barrier pattern TBP and the second magnetic pattern MP2). A third angle θ3 between the side surface of the second magnetic pattern MP2 and the bottom surface of the second magnetic pattern MP2 can be an acute angle.
[0038] Referring to Figure 3 , Figure 5A , and Figure 5B , the first magnetic pattern MP1 can be a reference layer whose magnetization direction MD1 is fixed to a particular direction, and the second magnetic pattern MP2 can be a free layer whose magnetization direction MD2 can be changed to be parallel or anti-parallel to the magnetization direction MD1 of the first magnetic pattern MP1. Figure 5A , andFigure 5B An example is shown in which the second magnetic pattern MP2 serves as a free layer, but the inventive concept is not limited to this example. In an embodiment, the first magnetic pattern MP1 can be a free layer, and the second magnetic pattern MP2 can be a reference layer, unlike the structure shown in FIG. 1A. Figure 5A and Figure 5B The first magnetic pattern MP1 can be a free layer, and the second magnetic pattern MP2 can be a reference layer, unlike the structure shown in FIG. 1A. Referring to Figure 5A , as an example, the magnetization direction MD1 of the first magnetic pattern MP1 and the magnetization direction MD2 of the second magnetic pattern MP2 can be perpendicular to an interface between the tunnel barrier pattern TBP and the second magnetic pattern MP2. In this case, each of the first magnetic pattern MP1 and the second magnetic pattern MP2 can include at least one of a perpendicular magnetic material (e.g., CoFeTb, CoFeGd, and CoFeDy), a perpendicular magnetic material having an L10 structure, a CoPt-based material having a hexagonal close-packed structure, and a perpendicular magnetic structure. The perpendicular magnetic material having an L10 structure can include at least one of L10FePt, L10FePd, L10CoPd, and L10CoPt. The perpendicular magnetic structure can include magnetic layers and non-magnetic layers that are alternately and repeatedly stacked. For example, the perpendicular magnetic structure can include at least one of (Co / Pt)n, (CoFe / Pt)n, (CoFe / Pd)n, (Co / Pd)n, (Co / Ni)n, (CoNi / Pt)n, (CoCr / Pt)n, and (CoCr / Pd)n, where n denotes a number of stacks or a number of pairs of layers that are alternately stacked. Referring to Figure 5B , as another example, the magnetization direction MD1 of the first magnetic pattern MP1 and the magnetization direction MD2 of the second magnetic pattern MP2 can be parallel to an interface between the tunnel barrier pattern TBP and the second magnetic pattern MP2. In this case, each of the first magnetic pattern MP1 and the second magnetic pattern MP2 can include a ferromagnetic material. The first magnetic pattern MP1 can further include an anti-ferromagnetic material that is provided in the first magnetic pattern MP1 and serves to fix a magnetization direction of the ferromagnetic material.
[0039] The tunnel barrier pattern TBP can include, for example, at least one of magnesium oxide, titanium oxide, aluminum oxide, magnesium zinc oxide, and magnesium boron oxide.
[0040] According to an embodiment of the present inventive concept, the data storage structure DS can be configured such that the first thickness T1 of the bottom electrode BE is about 0.6 to 1.1 times the second thickness T2 of the magnetic tunnel junction pattern MTJ. In this case, a crystal growth process for forming the magnetic tunnel junction pattern MTJ can be more easily performed, and the bottom electrode BE can be more easily formed by an etching process for forming the bottom electrode BE. Further, the data storage structure DS can be configured such that the third thickness T3 of the top electrode TE is about 1.2 to 1.9 times the second thickness T2 of the magnetic tunnel junction pattern MTJ. In this case, diffusion of a metal element (e.g., Cu) in the corresponding conductive line 180 into the tunnel barrier pattern TBP in the magnetic tunnel junction pattern MTJ can be reduced or prevented, and the magnetic tunnel junction pattern MTJ can be formed by an etching process for forming the magnetic tunnel junction pattern MTJ. Accordingly, a magnetic memory device having excellent or desired characteristics can be more easily manufactured.
[0041] Figures 6 to 9 is a cross-sectional view taken along the line I-I' of Figure 2 for illustrating a method of manufacturing a magnetic memory device according to an embodiment of the present inventive concept. In the following description, elements or manufacturing steps previously described with reference to Figures 2 to 4 , Figure 5A and Figure 5B may be denoted by the same reference numerals without repeating the description thereof for the sake of brevity.
[0042] With reference to Figure 2 and Figure 6 , a selection element SE can be formed in the substrate 100, and an interconnection structure 115 can be formed on the substrate 100. The interconnection structure 115 can include interconnection lines 110 spaced apart from each other in a first direction D1 and contacts 112 connected to the interconnection lines 110. A lowermost one of the interconnection lines 110 can be formed to be electrically connected to the substrate 100 through the contact 112 connected thereto. As an example, the lowermost one of the interconnection lines 110 can be formed to be electrically connected to the selection element SE through the contact 112 connected thereto. An uppermost one of the interconnection lines 110 can be formed to be connected to a corresponding one of the interconnection lines 110 through the contact 112 connected thereto. The uppermost one of the interconnection lines 110 can be formed to be electrically connected to the lowermost one of the interconnection lines 110 through the contact 112 connected thereto and the interconnection line 110. A first interlayer insulating layer 120 can be formed on the substrate 100 to extend over or cover the interconnection structure 115. In some embodiments, a top surface of the uppermost one of the interconnection lines 110 can be substantially coplanar with a top surface of the first interlayer insulating layer 120.
[0043] A second interlayer insulating layer 122 can be formed on the first interlayer insulating layer 120 to extend on or cover a top surface of the uppermost interconnection line 110. Lower contact plugs 130 can be formed in the second interlayer insulating layer 122. The lower contact plugs 130 can be formed to be spaced apart from each other in the second direction D2 and the third direction D3 when viewed in a plan view. The formation of the lower contact plugs 130 can include forming vertical holes (e.g., holes extending in the first direction D1) to penetrate or extend through the second interlayer insulating layer 122, forming a contact conductive layer on the second interlayer insulating layer 122 to fill the vertical holes, and planarizing the contact conductive layer to expose the second interlayer insulating layer 122. As a result of the planarization process, the lower contact plugs 130 can be locally formed in the vertical holes. Each of the lower contact plugs 130 can be formed to penetrate or extend through the second interlayer insulating layer 122 and can be connected to a corresponding one of the uppermost interconnection lines 110.
[0044] A bottom electrode layer BEL and a magnetic tunnel junction layer MTJL can be sequentially formed on the second interlayer insulating layer 122. The bottom electrode layer BEL can be formed to extend on or cover top surfaces of the lower contact plugs 130 and the second interlayer insulating layer 122. The magnetic tunnel junction layer MTJL can include a first magnetic layer ML1, a tunnel barrier layer TBL, and a second magnetic layer ML2 sequentially stacked on the bottom electrode layer BEL. The bottom electrode layer BEL can be formed of or include a metal nitride (e.g., TiN). The bottom electrode layer BEL can be a single or integral layer of the metal nitride. The first magnetic layer ML1, the tunnel barrier layer TBL, and the second magnetic layer ML2 can be formed of or include the same materials as the first magnetic pattern MP1, the tunnel barrier pattern TBP, and the second magnetic pattern MP2, respectively, described with reference to FIGS. 1A and 1B. The bottom electrode layer BEL and the magnetic tunnel junction layer MTJL can be formed by, for example, a sputtering deposition process. Figure 5A and Figure 5B The bottom electrode layer BEL and the magnetic tunnel junction layer MTJL can be formed by, for example, a sputtering deposition process.
[0045] The mask patterns 140 can be formed on the magnetic tunnel junction layer MTJL. When viewed in plan view, the mask patterns 140 can be spaced apart from one another in the second direction D2 and the third direction D3 and can define areas on which the data storage structures DS are to be formed. Each mask pattern 140 can include a lower mask pattern 142 and an upper mask pattern 144 that are sequentially stacked on the magnetic tunnel junction layer MTJL. The lower mask pattern 142 can be interposed between the magnetic tunnel junction layer MTJL and the upper mask pattern 144. The lower mask pattern 142 can be formed of, or include, at least one of a non-magnetic metal (e.g., W) and a metal nitride (e.g., TiN). As an example, the lower mask pattern 142 can include the same metal nitride as the bottom electrode layer BEL. The lower mask pattern 142 can be a single or unitary layer of the metal nitride. The upper mask pattern 144 can be formed of, or include, an insulating material (e.g., an oxide, a nitride, and / or an oxynitride).
[0046] Referring to Figure 2 and Figure 7 An etching process can be performed using the mask patterns 140 as etching masks. The etching process can be an ion beam etching process using the ion beam IB, and in an embodiment, the ion beam IB can include positively charged argon ions (Ar + ). The magnetic tunnel junction layer MTJL and the bottom electrode layer BEL can be sequentially etched by the etching process, as a result of which the magnetic tunnel junction pattern MTJ and the bottom electrode BE can be formed. The first magnetic layer ML1, the tunnel barrier layer TBL, and the second magnetic layer ML2 can be etched by the etching process to form the first magnetic pattern MP1, the tunnel barrier pattern TBP, and the second magnetic pattern MP2. The magnetic tunnel junction pattern MTJ can include the first magnetic pattern MP1, the tunnel barrier pattern TBP, and the second magnetic pattern MP2 that are sequentially stacked on the bottom electrode BE. During the etching process, the upper mask pattern 144 of each mask pattern 140 can be removed. After the etching process, at least a portion of the lower mask pattern 142 of each mask pattern 140 can remain on the magnetic tunnel junction pattern MTJ. The remaining portion of the lower mask pattern 142 can serve as the top electrode TE.
[0047] According to an embodiment of the present inventive concept, the bottom electrode BE, the magnetic tunnel junction pattern MTJ, and the top electrode TE can be formed to have a first thickness T1, a second thickness T2, and a third thickness T3, respectively. The first thickness T1 of the bottom electrode BE can be about 0.6 to 1.1 times the second thickness T2 of the magnetic tunnel junction pattern MTJ, and the third thickness T3 of the top electrode TE can be about 1.2 to 1.9 times the second thickness T2 of the magnetic tunnel junction pattern MTJ. In a case where the first thickness T1 is greater than 1.1 times the second thickness T2, it can be difficult to etch the bottom electrode layer BEL during the etching process to form the bottom electrode BE. In a case where the third thickness T3 is greater than 1.9 times the second thickness T2, each mask pattern 140 can have a relatively large total height 140H. In this case, the ion beam IB can be blocked by the mask pattern 140 during the etching process, which can cause technical difficulties in etching the magnetic tunnel junction layer MTJL and thus in forming the magnetic tunnel junction pattern MTJ.
[0048] In some embodiments, as a result of the etching process, the second interlayer insulating layer 122 can be formed to have a recessed top surface 122RU between the data storage structures DS. The recessed top surface 122RU of the second interlayer insulating layer 122 can be located at a lower height than the top surface 130U of each lower contact plug 130. In some embodiments, the etching process can be performed to allow each of the first magnetic pattern MP1, the second magnetic pattern MP2, and the tunnel barrier pattern TBP to have a sloped side surface, as described with reference to Figure 4 Accordingly, the conductive contaminant material generated during the etching process can be reduced or prevented or inhibited from being re-deposited on the side surface of the tunnel barrier pattern TBP, thereby reducing or preventing short circuit formation between the first magnetic pattern MP1 and the second magnetic pattern MP2.
[0049] Referring to Figure 2 and Figure 8 , the bottom electrode BE, the magnetic tunnel junction pattern MTJ, and the top electrode TE can constitute the data storage structure DS. In an embodiment, a plurality of data storage structures DS can be formed to be disposed on the lower contact plug 130, respectively. When viewed in a plan view, the plurality of data storage structures DS can be formed to be spaced apart from each other in the second direction D2 and the third direction D3.
[0050] The protective insulating layer 124 and the third interlayer insulating layer 126 can be sequentially formed on the second interlayer insulating layer 122. The third interlayer insulating layer 126 can extend over or cover the recessed top surface 122RU of the second interlayer insulating layer 122 and can extend over or cover the plurality of data storage structures DS. The protective insulating layer 124 can be interposed between the recessed top surface 122RU of the second interlayer insulating layer 122 and the third interlayer insulating layer 126 and can extend into a region between each data storage structure DS and the third interlayer insulating layer 126.
[0051] Referring to Figure 2 and Figure 9 A plurality of trenches 150 can be formed in the third interlayer insulating layer 126. The plurality of trenches 150 can extend in the second direction D2 and can be spaced apart from each other in the third direction D3. Each of the plurality of trenches 150 can be formed to penetrate or extend through a portion of the protective insulating layer 124 and expose a corresponding one of the data storage structures DS arranged in the second direction D2. Each of the plurality of trenches 150 can be formed to expose a top surface of the top electrode TE of the corresponding one of the data storage structures DS.
[0052] Referring back to Figure 2 and Figure 3 Conductive lines 180 can be respectively formed in the plurality of trenches 150. The formation of the conductive lines 180 can include forming a conductive layer on the third interlayer insulating layer 126 to fill the plurality of trenches 150 and planarizing the conductive layer to expose the third interlayer insulating layer 126. As a result of the planarization process, the conductive lines 180 can be locally formed in the plurality of trenches 150.
[0053] According to an embodiment of the present inventive concept, the data storage structure DS can be configured such that the first thickness T1 of the bottom electrode BE is about 0.6 to 1.1 times the second thickness T2 of the magnetic tunnel junction pattern MTJ. Thus, surface roughness of the bottom electrode BE can be reduced, which makes it possible to more easily perform a crystal growth process for forming the magnetic tunnel junction pattern MTJ and to more easily form the bottom electrode BE through an etching process for forming the bottom electrode BE. In addition, the data storage structure DS can be configured such that the third thickness T3 of the top electrode TE is about 1.2 to 1.9 times the second thickness T2 of the magnetic tunnel junction pattern MTJ. Thus, diffusion of a metal element in the conductive line 180 can be reduced or prevented, and the magnetic tunnel junction pattern MTJ can be more easily formed during an etching process for forming the magnetic tunnel junction pattern MTJ.
[0054] Thus, a magnetic memory device having excellent or desired characteristics can be more easily manufactured.
[0055] While example embodiments of the inventive concept have been particularly shown and described, those of ordinary skill in the art will understand that changes can be made in form and detail without departing from the spirit and scope of the appended claims.
[0056] This application claims priority to Korean Patent Application No. 10-2019-0068895, filed on June 11, 2019, in the Korean Intellectual Property Office, the entire contents of which are hereby incorporated by reference.
Claims
1. A magnetic storage device, comprising: Lower contact plug on the substrate; Magnetic tunnel junction pattern on the lower contact plug; The bottom electrode is located between the lower contact plug and the magnetic tunnel junction pattern, and contacts the bottom surface of the magnetic tunnel junction pattern. as well as The top electrode is located on the top surface of the magnetic tunnel junction pattern. The bottom electrode and the top electrode are spaced apart from each other in a first direction, and the first thickness of the bottom electrode in the first direction is 0.6 to 1.1 times the second thickness of the magnetic tunnel junction pattern in the first direction. The third thickness of the top electrode in the first direction is 1.2 to 1.9 times the second thickness of the magnetic tunnel junction pattern in the first direction, and The second thickness of the magnetic tunnel junction pattern in the first direction is from to Within the range.
2. The magnetic storage device according to claim 1, wherein the bottom electrode comprises a metal nitride.
3. The magnetic storage device according to claim 1, wherein the bottom electrode is an integral layer of metal nitride.
4. The magnetic storage device of claim 1, wherein the top electrode comprises at least one of a nonmagnetic metal and a metal nitride, and the magnetic storage device further comprises: An insulating layer, wherein the lower contact plug is in the insulating layer, and wherein the bottom surface of the bottom electrode contacts both the insulating layer and the lower contact plug.
5. The magnetic storage device according to claim 1, wherein the top electrode is an integral layer of metal nitride.
6. The magnetic storage device of claim 1, wherein the bottom electrode contacts the top surface of the lower contact plug.
7. The magnetic storage device of claim 1, wherein the bottom electrode contacts the top surface of the lower contact plug and extends beyond the edge of the top surface of the lower contact plug, and the magnetic storage device further comprises: The interconnection structure between the substrate and the lower contact plug The interconnect structure includes: Interconnects, spaced apart from each other on the substrate in the first direction; and Contact between the interconnects, The lower contact plug is connected to the uppermost one of the interconnects.
8. The magnetic storage device according to claim 7, further comprising: A conductive line extends on the top electrode and beyond the edge of the top electrode in a second direction, wherein the second direction is perpendicular to the first direction. The top electrode is located between the conductive line and the magnetic tunnel junction pattern, and the fourth thickness of the conductive line in the first direction is greater than the fifth thickness of the uppermost interconnect in the first direction.
9. The magnetic storage device of claim 8, wherein the top electrode is in contact with the top surface of the magnetic tunnel junction pattern and the bottom surface of the conductive wire.
10. The magnetic storage device according to claim 6, further comprising: The conductive lines on the top electrode The top electrode is in contact with the top surface of the magnetic tunnel junction pattern and the bottom surface of the conductive wire.
11. A magnetic storage device, comprising: Interconnect lines on the substrate; Contact is made between the substrate and the interconnect and the interconnect is connected to the substrate; Conductive lines on the interconnecting lines; A magnetic tunnel junction pattern is formed between the interconnect and the conductive line; A lower contact plug is located between the magnetic tunnel junction pattern and the interconnect. The bottom electrode is located between the magnetic tunnel junction pattern and the lower contact plug; as well as The top electrode is located between the magnetic tunnel junction pattern and the conductive line. The bottom electrode and the top electrode are spaced apart from each other in a first direction, and the first thickness of the bottom electrode in the first direction is 0.6 to 1.1 times the second thickness of the magnetic tunnel junction pattern in the first direction. The third thickness of the top electrode in the first direction is 1.2 to 1.9 times the second thickness of the magnetic tunnel junction pattern in the first direction, and The second thickness of the magnetic tunnel junction pattern in the first direction is from to Within the range.
12. The magnetic storage device of claim 11, wherein the bottom electrode contacts the bottom surface of the magnetic tunnel junction pattern and the top surface of the lower contact plug, and wherein the bottom electrode extends beyond the edge of the top surface of the lower contact plug.
13. The magnetic storage device of claim 12, wherein the bottom electrode is an integral layer of metal nitride.
14. The magnetic storage device of claim 11, wherein the top electrode is in contact with the top surface of the magnetic tunnel junction pattern and the bottom surface of the conductive wire.
15. The magnetic storage device of claim 14, wherein the top electrode is an integral layer of metal nitride.
16. The magnetic storage device according to claim 11, further comprising: Selection element in the substrate The interconnecting line is electrically connected to a terminal of the selection element via the contact.
17. The magnetic storage device of claim 12, wherein each of the bottom electrode and the top electrode is an integral layer of metal nitride, and wherein the top electrode contacts the bottom surface of the conductive wire, the conductive wire extending beyond the edge of the top electrode.
18. The magnetic storage device of claim 17, wherein the bottom electrode and the top electrode comprise the same metal nitride.
19. The magnetic storage device of claim 11, wherein the fourth thickness of the conductive line in the first direction is greater than the fifth thickness of the interconnect line in the first direction.
20. A magnetic storage device, comprising: An interconnect structure on a substrate, the interconnect structure including interconnect lines spaced apart from each other in a first direction and contacts between the interconnect lines; The lower contact plug is on the interconnect structure and contacts the uppermost of the interconnect lines; Magnetic tunnel junction pattern on the lower contact plug; The bottom electrode between the lower contact plug and the magnetic tunnel junction pattern; Conductive lines on the magnetic tunnel junction pattern; as well as The top electrode between the magnetic tunnel junction pattern and the conductive line. The bottom electrode and the top electrode are spaced apart from each other in the first direction, and the first thickness of the bottom electrode in the first direction is 0.6 to 1.1 times the second thickness of the magnetic tunnel junction pattern in the first direction. The third thickness of the top electrode in the first direction is 1.2 to 1.9 times the second thickness of the magnetic tunnel junction pattern in the first direction, and The second thickness of the magnetic tunnel junction pattern in the first direction is from to Within the range.
21. The magnetic storage device of claim 20, wherein the bottom electrode is an integral layer extending from the top surface of the lower contact plug to the bottom surface of the magnetic tunnel junction pattern.
22. The magnetic storage device of claim 20, wherein the top electrode is an integral layer extending from the top surface of the magnetic tunnel junction pattern to the bottom surface of the conductive line.
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