A semiconductor device and a method of fabricating the same
Patent Information
- Application Number
- CN202210853682.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-07-11
- Publication Date
- 2026-09-11
- Estimated Expiration
- 2042-07-11
AI Technical Summary
最终形成的器件的沟道表面残留有锗掺杂硅层6且界面粗糙,严重影响了载流子迁移率和器件性能
[0020]This invention provides a semiconductor device and its fabrication method, in which alternating germanium-silicon layers and silicon layers are formed on a substrate. Germanium in the germanium-silicon layers diffuses into the silicon layers, forming a germanium-doped silicon layer on the surface of the silicon layers. The method involves removing the germanium-silicon layers; oxidizing the germanium-doped silicon layers to form a germanium-silicon oxide layer; and removing the germanium-silicon oxide layer to expose the surface of the silicon layers, where a single-crystal silicon layer is formed. The single-crystal silicon and the silicon layers together constitute a silicon channel. This invention transforms the germanium-doped silicon layer, which has a high interface state density and is doped with germanium, into a single-crystal silicon layer without germanium doping and with a complete crystal structure. This reduces the interface roughness and interface state density, thereby improving the device's carrier mobility and device performance.
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Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit technology, and in particular to a semiconductor device and its fabrication method. Background Technology
[0002] With the development of integrated circuit manufacturing process technology nodes, higher requirements have been placed on the gate control capability, size and power consumption of transistors. Compared with FinFET (Fin Field-Effect Transistor), GAA (Gate All Around) can achieve better transistor performance by wrapping the channel on all four sides with the gate.
[0003] GAA devices are formed by alternating SiGe / Si (germanium-silicon / silicon) layers to create nanosheets or nanowires, with SiGe being selectively removed to leave Si as the channel. The lattice structure and impurity content on the channel surface have a significant impact on carrier mobility and the final performance of the device.
[0004] Figures 1 to 3 This is a schematic diagram illustrating the steps involved in fabricating a semiconductor device. (Example) Figure 1 As shown, alternating germanium-silicon layers 2 and silicon layers 3 are formed on a substrate 1, with spacers 4 formed on both sides of the germanium-silicon layers 2. An epitaxial layer 5 is also formed on the substrate 1, located on both sides of the spacers 4 and the silicon layers 3. The germanium-silicon layers 2 are subsequently removed, leaving the silicon layers 3 as a channel. However, before removing the germanium-silicon layers 2, the semiconductor device undergoes several high-temperature processes, such as shallow trench isolation annealing. These high-temperature processes cause germanium in the germanium-silicon layers 2 to diffuse into the silicon layers 3, resulting in the formation of a germanium-doped silicon layer 6 at the interface of the silicon layers 3, significantly increasing the interface state density at the interface of the silicon layers 3.
[0005] Next, please refer to Figure 2 As shown, the germanium-silicon layer 2 is removed, leaving the silicon layer 3. The surface of the silicon layer 3 has a germanium-doped silicon layer 6, and the interface is rough. Next, please refer to... Figure 3 As shown, an interface layer 7, a dielectric layer 8, and a gate 9 are formed sequentially. The final device has a residual germanium-doped silicon layer 6 on the channel surface, and the interface is rough, severely affecting carrier mobility and device performance. Summary of the Invention
[0006] The purpose of this invention is to provide a semiconductor device and its fabrication method, which improves the carrier mobility and device performance by making the channel surface lattice complete, reducing the interface roughness and the interface state density.
[0007] To solve the above-mentioned technical problems, the present invention provides a method for fabricating a semiconductor device, comprising the following steps: providing a substrate, wherein alternating layers of germanium-silicon and silicon are formed on the substrate, wherein germanium in the germanium-silicon layers diffuses into the silicon layers, and a germanium-doped silicon layer is formed on the surface of the silicon layers;
[0008] Remove the germanium-silicon layer;
[0009] The germanium-doped silicon layer is oxidized to form a germanium-silicon oxide layer; and
[0010] The germanium-silicon oxide layer is removed to expose the surface of the silicon layer, and a single crystal silicon is formed on the exposed surface of the silicon layer. The single crystal silicon and the silicon layer together form a silicon channel.
[0011] Optionally, the method for oxidizing the germanium-doped silicon layer to form a germanium-silicon oxide layer includes in-situ water vapor generation process, oxygen plasma oxidation, or dry oxygen oxidation.
[0012] Optionally, the thickness of the germanium-silicon oxide layer is 1 nm to 3 nm.
[0013] Optionally, the germanium-silicon oxide may be removed using a chemical oxide removal technique.
[0014] Optionally, a single-crystal silicon can be formed on the exposed silicon layer surface using an epitaxial process.
[0015] Optionally, after forming the single-crystal silicon, the fabrication method further includes: forming an interface layer that covers the silicon channel.
[0016] Optionally, after forming the interface layer, the fabrication method further includes: forming a dielectric layer, wherein the dielectric layer covers the interface layer.
[0017] Optionally, spacers are formed on both sides of the germanium-silicon layer before the germanium-silicon layer is removed.
[0018] Optionally, an epitaxial layer is also formed on the substrate, the epitaxial layer being located on both sides of the spacer and the silicon layer.
[0019] Accordingly, the present invention also provides a semiconductor device, which is manufactured using the semiconductor device manufacturing method described above.
[0020] This invention provides a semiconductor device and its fabrication method, in which alternating germanium-silicon layers and silicon layers are formed on a substrate. Germanium in the germanium-silicon layers diffuses into the silicon layers, forming a germanium-doped silicon layer on the surface of the silicon layers. The method involves removing the germanium-silicon layers; oxidizing the germanium-doped silicon layers to form a germanium-silicon oxide layer; and removing the germanium-silicon oxide layer to expose the surface of the silicon layers, where a single-crystal silicon layer is formed. The single-crystal silicon and the silicon layers together constitute a silicon channel. This invention transforms the germanium-doped silicon layer, which has a high interface state density and is doped with germanium, into a single-crystal silicon layer without germanium doping and with a complete crystal structure. This reduces the interface roughness and interface state density, thereby improving the device's carrier mobility and device performance. Attached Figure Description
[0021] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention.
[0022] Figures 1 to 3 This is a schematic diagram of the steps involved in the fabrication of a semiconductor device.
[0023] Figure 4 This is a flowchart of a method for fabricating a semiconductor device according to an embodiment of the present invention.
[0024] Figures 5 to 11 This is a schematic diagram of the steps in a method for fabricating a semiconductor device according to an embodiment of the present invention.
[0025] Figure label:
[0026] Figures 1 to 3 In the middle: 1-substrate; 2-germanium-silicon layer; 3-silicon layer; 4-spacer; 5-epitaxy layer; 6-germanium-doped silicon layer; 7-interface layer; 8-dielectric layer; 9-gate.
[0027] Figures 5 to 11 In the diagram, 10-substrate; 11-germanium-silicon layer; 12-silicon layer; 13-spacer; 14-epitaxy layer; 15-germanium-doped silicon layer; 16-germanium-silicon oxide layer; 17-silicon channel; 18-interface layer; 19-dielectric layer; 20-gate. Detailed Implementation
[0028] To make the objectives, advantages, and features of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clarify the explanation of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and may sometimes use different scales.
[0029] As used in this invention, the singular forms “a,” “an,” and “the” include plural objects; the term “or” is generally used to mean “and / or”; the term “a number” is generally used to mean “at least one”; and the term “at least two” is generally used to mean “two or more”. Furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as “first,” “second,” or “third” may explicitly or implicitly include one or at least two of that feature, unless otherwise expressly indicated.
[0030] Figure 4 This is a flowchart of a method for fabricating a semiconductor device according to an embodiment of the present invention.
[0031] like Figure 4 As shown, the method for fabricating the semiconductor device includes the following steps:
[0032] S1: A substrate is provided, on which alternating layers of germanium-silicon and silicon are formed, wherein germanium in the germanium-silicon layers diffuses into the silicon layers to form a germanium-doped silicon layer on the surface of the silicon layers;
[0033] S2: Remove the germanium-silicon layer;
[0034] S3: Oxidize the germanium-doped silicon layer to form a germanium-silicon oxide layer;
[0035] S4: Remove the germanium-silicon oxide layer to expose the surface of the silicon layer, and form a single crystal silicon on the exposed surface of the silicon layer. The single crystal silicon and the silicon layer together form a silicon channel.
[0036] Figures 5 to 11 This is a schematic diagram illustrating the structural steps of a semiconductor device fabrication method according to an embodiment of the present invention. Next, we will combine... Figure 4 and Figures 5 to 11 A method for fabricating a semiconductor device according to an embodiment of the present invention will be described in detail.
[0037] In step S1, please refer to Figure 5As shown, a substrate 10 is provided, on which alternating layers of germanium-silicon 11 and silicon 12 are formed, and germanium in the germanium-silicon 11 diffuses into the silicon 12 to form a germanium-doped silicon layer 15 on the surface of the silicon layer 12.
[0038] The substrate 10 can be made of silicon, germanium, germanium-silicon, silicon carbide, gallium arsenide, or indium gallium arsenide, or it can be silicon-on-insulator or germanium-on-insulator; or it can be other materials, such as gallium arsenide or other III-V compounds. In this embodiment, the substrate 10 is preferably made of silicon.
[0039] Alternating layers of germanium-silicon (SiGe) 11 and silicon 12 are formed on the substrate 10. This embodiment shows only three layers of the germanium-silicon 11 and three layers of the silicon 12; in other embodiments, there may be two, four, or more layers, which is not limited by the present invention. The silicon-germanium layer 11 serves as a sacrificial layer and will be removed subsequently, while the silicon layer 12 subsequently serves as a channel layer.
[0040] Spacers 13 are formed on both sides of the germanium-silicon layer 11, and an epitaxial layer 14 is formed on the substrate 10, the epitaxial layer 14 being located on both sides of the germanium-silicon layer 11 and the silicon layer 12.
[0041] For example, alternating germanium-silicon layers 11 and silicon layers 12 are sequentially formed on the substrate 10. Then, a portion of the germanium-silicon layers 11 is laterally etched away to form grooves on both sides of the germanium-silicon layers 11, and an insulating material is filled into the grooves to form spacers 13. Finally, an epitaxial layer 14 is formed on both sides of the germanium-silicon layers 11 and silicon layers 12.
[0042] It is understood that after forming the alternating germanium-silicon layer 11 and the silicon layer 12, the semiconductor device fabrication method includes multiple high-temperature processes, such as shallow trench isolation annealing. These high-temperature processes cause germanium in the germanium-silicon layer 11 to diffuse into the silicon layer 12, forming a germanium-doped silicon layer 15 on the surface of the silicon layer 12. That is, a portion of the silicon layer at the surface of the silicon layer 12 forms the germanium-doped silicon layer 15 due to germanium doping. Figure 5 As shown.
[0043] In step S2, please refer to Figure 6 As shown, the germanium-silicon layer 11 is removed.
[0044] Specifically, taking advantage of the principle that the etching rate of silicon-germanium is much higher than that of silicon, the germanium-silicon layer 11 is selectively etched while the silicon layer 12 is retained. For example, the germanium-silicon layer 11 can be removed by wet etching or dry etching.
[0045] Since the germanium content in the germanium-doped silicon layer 15 is much lower than that in the germanium-silicon layer 11, the germanium-doped silicon layer 15 is not removed when the germanium-silicon layer 11 is removed. The silicon layer 11 and the germanium-doped silicon layer 15 on its surface form the channel of the final semiconductor device. The presence of the germanium-doped silicon layer 15 leads to a rough channel interface and increased interface state density, severely affecting carrier mobility and device performance. Therefore, in subsequent processes, the germanium-doped silicon layer 15 is treated to reduce channel interface roughness and interface state density, thereby improving device carrier mobility and device performance.
[0046] In step S3, please refer to Figure 7 As shown, the germanium-doped silicon layer 15 is oxidized to form a germanium-silicon oxide layer 16.
[0047] As an example, the germanium-doped silicon layer 15 can be rapidly oxidized using an in-situ steam generation (ISSG) process to form the germanium-silicon oxide layer 16. The thickness of the germanium-silicon oxide layer 16 is 1 nm to 3 nm, for example, 1 nm, 2 nm, or 3 nm, preferably 2 nm. Of course, the present invention is not limited thereto. In other embodiments, the germanium-silicon oxide layer 16 can also be formed using oxygen plasma oxidation or dry oxygen oxidation methods, and of course, other methods known to those skilled in the art can also be used.
[0048] In step S4, please refer to Figure 8 and Figure 9 As shown, the germanium-silicon oxide layer 16 is removed to expose the surface of the silicon layer 12, and a single crystal silicon is formed on the exposed surface of the silicon layer 12. The single crystal silicon and the silicon layer together form a silicon channel 17.
[0049] Specifically, first, please refer to Figure 8 As shown, the germanium-silicon oxide layer 16 is removed to expose the surface of the silicon layer 12. In this embodiment, the germanium-silicon oxide layer 16 can be removed using chemical oxide removal technology. For example, ammonia (NH3) and hydrogen fluoride (HF) gas are reacted with the germanium-silicon oxide layer 16 to generate silicate gas, thereby removing the germanium-silicon oxide layer 16 from the surface of the silicon layer 12 and exposing the surface of the silicon layer 12. This reaction is carried out at low temperature to avoid affecting doping diffusion.
[0050] Next, please refer to Figure 9As shown, monocrystalline silicon is formed on the exposed surface of the silicon layer 12, and the monocrystalline silicon and the silicon layer together constitute a silicon channel 17. Exemplarily, the monocrystalline silicon can be formed using an epitaxial process with low-temperature, low-pressure reaction conditions, which reduces the epitaxial process rate and thus makes the formation rate of the monocrystalline silicon controllable, thereby forming the monocrystalline silicon at the location of the germanium-silicon oxide layer 16. That is, the monocrystalline silicon is grown in situ after the germanium-silicon oxide layer 16 is removed. Simultaneously, the low-temperature reaction conditions can avoid affecting doping diffusion.
[0051] In this embodiment, the process for removing the germanium-silicon oxide layer 16 and the process for forming the single-crystal silicon can be integrated into the same process flow. After removing the germanium-silicon oxide layer 16, the single-crystal silicon is grown in situ. The single-crystal silicon formed on the surface of the silicon layer 12, together with the silicon layer, serves as the silicon channel 17. The newly formed single-crystal silicon has a complete lattice, is undoped, has good interface roughness, and low interface state density, which significantly improves the device carrier mobility and device performance.
[0052] Next, please refer to Figure 10 As shown, the fabrication method further includes: forming an interface layer (IL) 18, the interface layer 18 covering the silicon channel 17. It is understood that, due to the cross-sectional direction of the schematic diagram, in... Figure 10 In this process, the interface layer 18 does not completely cover the silicon channel 17.
[0053] The interface layer 18 may be made of silicon oxide, silicon nitride, or silicon oxynitride, or other suitable materials. The interface layer 18 may be fabricated by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), or a combination thereof. Preferably, the interface layer 18 may be formed by ozone oxidation of the single-crystal silicon, and the thickness of the interface layer 18 may be, for example, 1 nm.
[0054] Next, please refer to Figure 11 As shown, the fabrication method further includes: forming a dielectric layer 19, the dielectric layer 19 covering the interface layer 18. Then, it further includes forming a gate 20, the gate 20 covering the dielectric layer 19. Figure 10 Similarly, due to the cross-sectional direction of the schematic diagram, Figure 11The dielectric layer 19 does not completely cover the interface layer 18, and the gate 20 does not completely cover the dielectric layer 19. The dielectric layer 19 is preferably an HK dielectric layer, and the material of the HK dielectric layer may include tantalum oxide (Ta2O5), strontium titanium oxide (SrTiO3), hafnium oxide (HfO2), hafnium silicon oxide (HfSiO), zirconium oxide (ZrO2), etc., preferably hafnium oxide. The HK dielectric layer can be formed by one or more thin film deposition processes, including but not limited to chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), thermal oxidation, electroplating, electroless plating, or any combination thereof. In some embodiments, ALD is preferred. The gate 20 is made of aluminum or tungsten and can be formed using processes such as chemical vapor deposition and physical vapor deposition.
[0055] In the semiconductor device fabrication method provided by the present invention, a germanium-doped silicon layer 15 is oxidized to form a germanium-silicon oxide layer 16, the germanium-silicon oxide layer 16 is removed and a single crystal silicon is formed on the exposed silicon layer 12. The germanium-doped silicon layer 15 with germanium doping on the surface of the silicon layer 12 and a large interface state density is transformed into a single crystal silicon without germanium doping and with a complete crystal structure. Its interface roughness is reduced and its interface state density is reduced, thereby improving the device carrier mobility and device performance.
[0056] Accordingly, the present invention also provides a semiconductor device, which is manufactured using the semiconductor device manufacturing method described above.
[0057] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.
Claims
1. A method of manufacturing a semiconductor device, characterized by, Includes the following steps: A substrate is provided on which alternating layers of germanium-silicon and silicon are formed, wherein germanium in the germanium-silicon layers diffuses into the silicon layers to form a germanium-doped silicon layer on the surface of the silicon layers; Remove the germanium-silicon layer; The germanium-doped silicon layer is oxidized to form a germanium-silicon oxide layer; as well as The germanium-silicon oxide layer is removed to expose the surface of the silicon layer, and a single crystal silicon is formed on the exposed surface of the silicon layer. The single crystal silicon and the silicon layer together form a silicon channel.
2. The method of manufacturing a semiconductor device according to Claim 1, wherein Methods for oxidizing the germanium-doped silicon layer to form a germanium-silicon oxide layer include in-situ water vapor generation process, oxygen plasma oxidation, or dry oxygen oxidation.
3. The method of manufacturing a semiconductor device according to Claim 2, wherein The thickness of the germanium-silicon oxide layer is 1 nm to 3 nm.
4. The method of manufacturing a semiconductor device according to Claim 1, wherein The germanium-silicon oxide was removed using a chemical oxide removal technique.
5. The method of manufacturing a semiconductor device according to Claim 1, wherein Monocrystalline silicon is formed on the exposed silicon layer surface using an epitaxial process.
6. The method of producing a semiconductor device according to Claim 1, wherein After forming the single-crystal silicon, the fabrication method further includes: forming an interface layer, the interface layer covering the silicon channel.
7. The method of manufacturing a semiconductor device according to Claim 6, wherein After forming the interface layer, the fabrication method further includes: forming a dielectric layer, wherein the dielectric layer covers the interface layer.
8. The method of producing a semiconductor device according to Claim 1, wherein Before the germanium-silicon layer is removed, spacers are formed on both sides of the germanium-silicon layer.
9. The method of producing a semiconductor device according to Claim 8, wherein An epitaxial layer is also formed on the substrate, the epitaxial layer being located on both sides of the spacer and the silicon layer.
10. A semiconductor device, characterized by comprising: It is manufactured using the method for manufacturing a semiconductor device as described in any one of claims 1 to 9.
Citation Information
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