Integrated Circuit Pin Design Method Based on Virtuoso

Abstract

The present application relates to a method for designing integrated circuit pins based on Virtuoso, and relates to the technical field of integrated circuit design. The method includes: using the Skill program interface of the Virtuoso software, writing a program script file according to predetermined execution steps, automatically loading the program script file when the Virtuoso software starts, and responding to the call request of the program script file, extracting and displaying the pin name and connection name of the target integrated circuit in the bus form in the unit view; the predetermined execution steps include: extracting and storing the pin name of the pin in the unit view of the target integrated circuit; modifying the pin name of each extracted pin to a bus form in which each prefix corresponds to multiple address bits; modifying the connection name of the circuit connection corresponding to the pin according to the pin name in the bus form. The method can automatically realize batch and quick processing of pin names and connection names through scripts, reduce manual operations, and improve the efficiency of integrated circuit design.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuit design, and in particular to a Virtuoso-based integrated circuit pin design method. Background Art

[0002] Virtuoso software is an integrated circuit design software launched by EDA software supplier Cadence. It can complete all aspects of the entire IC design process, including circuit diagram input, circuit simulation, layout design, layout verification, parasitic parameter extraction and post-simulation, so it is widely used in the development of integrated circuits. In the process of using Virtuoso software for integrated circuit design, Schematic is a graphical representation of the circuit, which can be used to show the various components in the circuit (such as resistors, capacitors, transistors, etc.) and their connection methods. Symbol is a graphical representation of the components or subcircuits in Schematic, which is used to simplify the representation of complex circuits. Each Symbol usually represents a circuit element or module and is associated with a pin in the actual circuit. Designers can define the logical structure and function of the circuit through Schematic and Symbol.

[0003] Schematic and Symbol usually contain a large number of pins, which are used to represent the logical interface of signal input, output or bidirectional signal connection. Pins can connect different circuit modules or components to form a complete circuit system. In Schematic and Symbol, these pins are usually scattered and may be connected to different circuit modules. This means that each pin may be located in a different position in the schematic diagram and each is connected to a different circuit connection (net). In order to simplify circuit design and representation, it is generally chosen to combine these pins with the same prefix but different address bits into a bus pin. At present, designers generally use manual operation to synthesize pins, that is, rename the pins and signal lines in Schematic and Symbol one by one. However, as the number of pins increases, when manually processing a large number of pins, designers not only need to spend a lot of time, which seriously affects the design efficiency, but also may greatly increase the probability of error. Summary of the invention

[0004] Based on this, it is necessary to provide an integrated circuit pin design method based on Virtuoso to address the above technical problems.

[0005] In a first aspect, the present application provides a method for designing integrated circuit pins based on Virtuoso, the method comprising:

[0006] Using the Skill program interface of the Virtuoso software, a program script file is written according to predetermined execution steps, and the program script file is configured in the Virtuoso software environment. When the Virtuoso software is started, the program script file is automatically loaded, and in response to a call request of the program script file, the pin names and connection names of the target integrated circuit in the form of a bus in the unit view are extracted and displayed;

[0007] The predetermined execution steps implemented by writing the program script file include:

[0008] Extracting and storing pin names of pins in a unit view of the target integrated circuit, wherein the pin names include at least a prefix and an address bit, and the unit view includes at least one of a Schematic view and a Symbol view;

[0009] Modify the extracted pin name of each pin into a bus format in which each prefix corresponds to a plurality of address bits;

[0010] Modify the connection name of the circuit connection corresponding to the pin according to the pin name of the bus form.

[0011] In one embodiment, extracting and storing the pin names of the pins in the unit view of the target integrated circuit includes:

[0012] Traversing the pin terminals in the Schematic view of the target integrated circuit, and extracting the pin name of each pin terminal;

[0013] The name of each pin terminal is split into a prefix and an address bit, and the prefixes are deduplicated and stored in a preset first dictionary, and the address bits are combined and stored in a value list corresponding to the prefix in the preset first dictionary.

[0014] In one embodiment, the method further comprises:

[0015] Traversing the pin terminals in the Schematic view of the target integrated circuit, and extracting the graphical ID of each pin terminal;

[0016] Remove duplicate prefixes from each pin terminal and store them in the preset second dictionary mytable3;

[0017] Store the pin names of the pin terminals with non-repeated prefixes in the preset second dictionary into the preset first list;

[0018] The pin names of the pin terminals with repeated prefixes in the preset second dictionary are stored in a preset second list, and the graphical IDs of the pin terminals are stored in a value list corresponding to the prefix in the preset second dictionary.

[0019] In one embodiment, the step of modifying the extracted pin name of each pin into a bus format in which each prefix corresponds to a plurality of address bits comprises:

[0020] Traversing the pin instances in the Schematic view of the target integrated circuit, and extracting the pin name of each pin instance;

[0021] Parsing the pin names of the pin instances that hit the first list to obtain a target prefix;

[0022] Retrieving a value list corresponding to the target prefix in the preset first dictionary, and extracting the maximum and minimum values ​​in the value list;

[0023] The pin name of the pin instance is modified according to the maximum and minimum values ​​to a bus format in which the target prefix corresponds to a plurality of address bits.

[0024] In one embodiment, the method further comprises:

[0025] Traversing all graphic IDs in the value list corresponding to the prefix of the pin terminal in the preset second dictionary, and deleting the pin instance corresponding to the graphic ID from the design database;

[0026] Traversing circuit connections in a Schematic view of the target integrated circuit;

[0027] The graphical ID of the circuit connection whose connection name hits the preset second list is read, and the connection object corresponding to the graphical ID is deleted from the design database.

[0028] In one embodiment, extracting and storing the pin names of the pins in the unit view of the target integrated circuit includes:

[0029] Traversing the pin graphics in the Symbol view of the target integrated circuit, and extracting the pin name and coordinate information of each pin graphic;

[0030] The name of each pin graphic is split into a prefix and an address bit, and the prefixes are deduplicated and stored in a preset third dictionary and a preset fourth dictionary, and the address bits are combined and stored in a value list corresponding to the prefix in the preset third dictionary.

[0031] In one embodiment, the method further comprises:

[0032] Traversing the pin graphics in the Symbol view of the target integrated circuit, and extracting the coordinate information of each pin graphic;

[0033] Store the pin names of the pin graphics with non-repeated prefixes in the preset fourth dictionary into the preset third list;

[0034] The coordinate information of the pin graphics with repeated prefixes in the preset fourth dictionary is stored in a preset fourth list, and the graphical ID of the pin graphics is stored in a value list corresponding to the prefix in the preset fourth dictionary.

[0035] In one embodiment, the method further comprises:

[0036] Traversing all graphic IDs in the value list corresponding to the prefix of the pin graphic in the preset fourth dictionary, and deleting the pin graphic corresponding to the graphic ID from the design database;

[0037] Traversing shape elements in the Symbol view of the target integrated circuit;

[0038] The boundary coordinate value is read to hit the shape element in the preset fourth list, and the shape element is deleted from the design database.

[0039] In one embodiment, the step of modifying the extracted pin name of each pin into a bus format in which each prefix corresponds to a plurality of address bits comprises:

[0040] Parsing the pin names of the pin graphics that hit the preset third list to obtain a target prefix;

[0041] Retrieving a value list corresponding to the target prefix in the preset third dictionary, and extracting the maximum and minimum values ​​in the value list;

[0042] The pin names of the pin graphics are modified according to the maximum and minimum values ​​into a bus format in which the target prefix corresponds to a plurality of address bits.

[0043] In one embodiment, after modifying the connection name of the circuit connection corresponding to the pin according to the pin name of the bus form, the method further includes:

[0044] Traversing the pin graphics in the Symbol view of the target integrated circuit, and extracting the type and first coordinate information of each pin graphic;

[0045] For pin graphics of the same type, delete the pin graphics with the same first coordinate information;

[0046] According to the first coordinate information of the remaining pin patterns, the first coordinate information of the remaining pin patterns and the corresponding circuit connections are adjusted.

[0047] The Virtuoso-based integrated circuit pin design method disclosed in the present application is adopted, and a skill program is used to write a program script file. The program script file can automatically modify the pin name and connection name in the unit view of the integrated circuit to a bus form, and then the program script file is configured in the Virtuoso software environment, so that the program script file is automatically loaded when the Virtuoso software is started, and the program script file is responded to the call request of the program script file, and the bus form of the pin name and connection name of the target integrated circuit in the unit view is extracted and displayed. In this way, compared with the traditional manual operation method, by using the Skill program interface of the Virtuoso software to automatically generate scripts, batch quick processing of pin names and connection names is realized, which can significantly reduce manual operations and improve the efficiency of integrated circuit design. At the same time, the accuracy of the operation can be ensured through consistent logic and processes, thereby reducing human errors and improving the reliability of integrated circuit design. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Figure 1 is a flowchart of a method for designing integrated circuit pins based on Virtuoso in one embodiment;

[0049] Figure 2 The figure is a flowchart of a method for designing integrated circuit pins based on Virtuoso in one embodiment. DETAILED DESCRIPTION

[0050] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0051] When designing integrated circuits using Virtuoso software, the Schematic and Symbol usually contain a large number of pins. Each pin may be located at a different position in the schematic and connected to a different circuit connection (net). In order to simplify the integrated circuit, it is currently common to combine multiple pins with the same prefix but different address bits into a bus pin. For example, there is a group of pins with the same prefix, but each pin corresponds to a different address bit. For example: prefix <5> 、prefix <4> 、prefix <3> 、prefix <2> 、prefix <1> 、prefix <0> These pins belong to the same functional group (such as data bus or address bus) and correspond to different bits. <5> Represents the fifth position, prefix <4> represents the 4th bit, and so on. In the prior art, designers need to manually delete all pins with the same prefix name but different address bits, retain only one pin, and modify the pin name to prefix<5:0>. At the same time, each original pin is connected to a circuit connection (net) in the circuit diagram. Designers need to manually find these circuit connections and uniformly modify the connection name (netName) to the name of the circuit connection connected to the new bus pin name prefix<5:0>. If the address bits involved (i.e. the number of pins) are large, such as from prefix <31> to prefix <0> With 32 pins in total, doing this manually would be tedious and time consuming.

[0052] In view of the above problems, the present application provides an integrated circuit pin design method based on Virtuoso, such as Figure 1 As shown, the following steps may be included:

[0053] Step 110, using the Skill program interface of the Virtuoso software, write a program script file according to the predetermined execution steps.

[0054] Among them, Virtuoso software is part of the Cadence design system, an environment for integrated circuit design, especially analog, RF, mixed signal design, etc. Skill language is Cadence's proprietary scripting language, used to write automated programs. Skill provides in-depth access to the Virtuoso database and design tools, allowing users to automate and customize the design process through programming.

[0055] In practice, when writing a program script file, the library functions and tools provided by the Skill language can be used to access the design database, perform graphical user interface (GUI) programming, process text and data, etc. The predetermined execution steps in the program script file may include: accessing the database of integrated circuit design, searching and extracting the bus form pin names and connection names in a specific unit view, and displaying or outputting the extracted information in a user-friendly manner, etc.

[0056] For details, please refer to Figure 2 As shown, the predetermined execution steps implemented by writing a program script file include the following:

[0057] Step 111 : extract and store pin names of pins in the unit view of the target integrated circuit.

[0058] The pin name includes at least a prefix and an address bit. The prefix usually indicates the type or function of the signal, and the address bit indicates the specific location or number of the signal. For example, in DATA[0], DATA is the prefix and 0 is the address bit.

[0059] In implementation, the program script file can traverse the unit view of the target integrated circuit, find all pins, and extract the pin names of these pins. Afterwards, the extracted pin names can be stored in a data structure, such as a list or an array, so as to be processed and modified in subsequent steps.

[0060] Step 112, modifying the extracted pin name of each pin into a bus format in which each prefix corresponds to a plurality of address bits.

[0061] In implementation, the program script file can convert the format of the extracted pin names, first identify which pin names share the same prefix and whose address bits are continuous, and then merge these pin names into a bus-format pin name. For example, if the extracted multiple pin names include ADDR[0], ADDR[1], ADDR[2], they can be converted into a bus-format pin name ADDR[0:2].

[0062] Step 113, modify the connection name of the circuit connection corresponding to the pin according to the pin name in the bus form.

[0063] In Virtuoso software, circuit connections usually have a unique connection name to identify the path of the connection in the design. The connection name is usually associated with the connected pins to facilitate identification and tracking in design and simulation.

[0064] In implementation, the program script file can modify the connection names of the circuit connections connected to the pin names that have been modified to the bus form, thereby ensuring that the naming of the circuit connections is consistent with the naming of the pins in the bus form. For example, if pins ADDR[0], ADDR[1], and ADDR[2] have been merged into ADDR[0:2], then the connection names corresponding to the three pins can also be synchronously modified to ADDR[0:2].

[0065] Considering that the unit view of the target integrated circuit includes at least one of a Schematic view and a Symbol view, in this embodiment, the processing of step 111 to step 113 will be described based on the Schematic view and the Symbol view respectively.

[0066] 1. Schematic view

[0067] The processing of step 111 may include the following processing: traversing the pin terminals in the Schematic view of the target integrated circuit, extracting the pin name of each pin terminal; splitting the name of each pin terminal into a prefix and an address bit, and deduplicating the prefix and storing it in a preset first dictionary, and merging the address bits and storing them in a value list corresponding to the prefix in the preset first dictionary.

[0068] In practice, the above process can be broken down into the following steps:

[0069] 111-1a. Traverse the pin terminals of the Schematic view and extract the pin name (and graphical ID) of each pin terminal, including the following:

[0070] 1a-1: Select the main function Schematic_pin_bus as the main entry point of the program script file, which is responsible for processing the library and cell provided by the user and operating the pins in the Schematic view.

[0071] 1a-2: Get the library name and cell name input by the user, where the library name and cell name specify the specific objects to be operated in the design.

[0072] 1a-3: Set the Schematic view of the specified cell in the library to be opened in append mode through the dbOpenCellViewByType function, where the dbOpenCellViewByType function is a Skill function used to open the cell view of the specified library, cell and view type; opening the cell view in append mode means that the program script file will not create or overwrite the existing view, but read the existing data for processing.

[0073] 1a-4: Store the access address of the Schematic view in the cvId variable, where the cvId variable is a reference to the currently operated view (similar to a pointer or handle), through which the data in the view can be accessed and operated.

[0074] 1a-5: Use makeTable to create two empty dictionaries: myTable1 (i.e., the first preset dictionary) and myTable2 (i.e., the second preset dictionary) to store pin-related data in subsequent operations. Dictionaries (i.e., hash tables) allow fast lookup of data based on key values, so they are suitable for storing and managing a large amount of pin information.

[0075] 1a-6: Create two empty lists: piname_list1 (i.e. the preset first list) and netname_list (i.e. the preset second list) to store the pin names (pinname) and wire names involved later.

[0076] 1a-7: Use the foreach function to iterate over each terminal (i.e., pin terminal) in the cvId variable. The foreach function is an iteration function in the Skill language that is used to loop over each element in a collection; the terminals in the cvId variable are the pin terminals in the Schematic view.

[0077] 1a-8: Use the operator ~> to read and write variables in the environment, where ~> is an operator in the Skill language, similar to the dot operator in object-oriented languages, used to access the properties of an object.

[0078] Using the code expression terminal~>name, the ~> operator can be used to read the name attribute of each pin terminal, that is, the pin name, and store the pin name in the corresponding variable for subsequent operations.

[0079] Using the code expression terminal~>figId, the ~> operator can be used to read the figId attribute of each pin terminal, that is, the graphical ID, which represents the representation object of the pin on the graphical interface (such as a graphic symbol or graphic position), and assign the graphical ID to the delid variable for use in subsequent operations.

[0080] The processing of the above steps 1a-1 to 1a-8 is the basis for the subsequent synthesis, deletion or connection modification of the pin terminals.

[0081] 111-2a. Identify pin terminals with the same function but different position numbers, including the following:

[0082] 2a-1: Check whether the pin name matches the regular expression. You can use the rexMatchp function to check whether the pinname (i.e., the pin name) matches the given regular expression pattern to identify the pin name that conforms to the bus format, that is, the pin terminal whose name contains the bit number. Specifically, you can check whether the pinname string contains the identifier "<". For example, pinname may be prefix <5> The program uses "<" to identify that this is a bus pin with a bit number.

[0083] 2a-2: Remove the trailing identifier ">" in the pin name. If pinname contains "<", you can use the substring function to remove the trailing identifier ">" in the pin name, retain the previous part, and get the subpin variable for subsequent processing of the bit number part in the pin name and separation of the pin name and bit number. For example, you can use prefix <5> Processed as prefix<5.

[0084] 2a-3: Split the pin name into prefix and address bit. Specifically, you can use the parseString function to split subpin into two parts according to the identifier "<": the part before "<" is the prefix of the pin, which is assigned to the variable prepin; that is, the part after "<" is the address bit of the pin, which is assigned to the variable num. For example, if subpin is prefix<5, the prepin after the split will be prefix, and num will be 5. By splitting the pin name, the functional part (prefix) of the pin and its bit number (address bit) can be processed separately, so that when the bus pins are subsequently synthesized, they can be classified and combined based on this information.

[0085] The above processing from 2a-1 to 2a-3 can identify and process pin terminals with the same function but different bit numbers, providing a basis for subsequent pin terminal synthesis and optimization.

[0086] 111-3a. Classify and synthesize the prefix of the pin name of the pin terminal and its address bit, including the following:

[0087] 3a-1: Determine whether the prefix name prepin of the current pin terminal already exists in the key of the dictionary myTable1.

[0088] 3a-2: If prepin does not exist in myTable1, you can store prepin as a new key in the myTable1 dictionary and set its corresponding value to an empty list to initialize the prepin key so that its corresponding value list can be used to store all address bits related to the prefix.

[0089] 3a-3: Use the rexMatchp function to determine whether the address bit num of the current pin terminal contains the ":" identifier to identify which pin terminals belong to the bus form (i.e., pin terminals containing multiple address bits). The ":" identifier is usually used to represent an address range (such as 5:0 represents from 5 to 0).

[0090] 3a-4: If the address bit num contains ":", you can use the parseString function to split num into two parts, the high address and the low address, and assign the high address to the variable maxnum and the low address to the variable minnum. Next, you can use the cons function to add all the address bits between minnum and maxnum to the value list corresponding to the prepin key in myTable1. In this way, a group of continuous address bits (such as 5:0) can be managed as a whole to ensure that these address bits are recorded for subsequent pin synthesis and optimization.

[0091] 3a-5: If the address bit num does not contain ":", then num is directly added to the value list corresponding to the prepin key in myTable1.

[0092] 3a-6: If prepin already exists in myTable1, it means that there are other pins that share the same prefix name. The program can directly add the new address bits to the existing list and execute the processing from 3a-3 to 3a-5.

[0093] Based on the processing of 3a-1 to 3a-6, it can be understood that the role of myTable1 is to classify, collect and organize all address bits with the same prefix name. Regardless of whether these pin terminals are single or bus-shaped, the program script file can obtain all address bits related to a certain prepin and process or synthesize these address bits in subsequent steps.

[0094] Based on the above processing, the following processing may also be included between step 111 and step 112: traverse the pin terminals in the Schematic view of the target integrated circuit, and extract the graphical ID of each pin terminal; deduplicate the prefix of each pin terminal and store it in a preset second dictionary; store the pin names of the pin terminals with non-repeated prefixes in the preset second dictionary into the preset first list; store the pin names of the pin terminals with repeated prefixes in the preset second dictionary into the preset second list, and store the graphical ID of the pin terminal into the value list corresponding to the prefix in the preset second dictionary.

[0095] In practice, the above process can be broken down into the following steps:

[0096] 111-4a. Identify the pin terminals that require name modification and deletion, including the following:

[0097] 4a-1: Use the member function to determine whether the prefix prepin of the current pin terminal already exists in the key of myTable2.

[0098] 4a-2: If prepin is not in the key of myTable2, use the append1 function to add the name of the current pin terminal, pinname, to piname_list1, and store prepin as a new key in myTable2, and set an empty value list for the key.

[0099] Among them, piname_list1 is used to collect all the pin names that need to be modified. Adding pinname to this list indicates that the pin name of the current pin terminal will be modified in the subsequent steps.

[0100] 4a-3: If prepin already exists in myTable2, use the append1 function to add the pin name pinname of the current pin terminal to netname_list, and store the data in the variable delid (that is, the graphical ID of the current pin terminal) in the value list corresponding to the prepin key in myTable2.

[0101] Among them, netname_list is used to collect the net names of the connection pins that need to be deleted (that is, the connection names of the circuit connections). Adding pinname to this list indicates that the circuit connection of the current pin terminal will be deleted in the subsequent steps.

[0102] myTable2 is used to collect the graphical IDs of all pin terminals with different address bits that have the same prefix name. By collecting these graphical IDs together, these redundant pin terminals can be deleted in batches in subsequent steps.

[0103] Based on the above processing, the following processing may also be included before step 112: traverse all graphical IDs in the value list corresponding to the prefix of the pin terminal in the preset second dictionary, and delete the pin instance corresponding to the graphical ID from the design database; traverse the circuit connections in the Schematic view of the target integrated circuit; read the graphical ID of the circuit connection whose connection name hits the preset second list, and delete the connection object corresponding to the graphical ID from the design database.

[0104] In practice, the above process can be broken down into the following steps:

[0105] 111-5a. Delete unnecessary pin terminals and circuit connections, including the following:

[0106] 5a-1: Use the foreach function to iterate over each key in myTable2, i.e. prepin (prefix of the pin terminal).

[0107] 5a-2: For each prepin, use the foreach function again to iterate over all graphical IDs in its corresponding value list. These graphical IDs represent the graphical identifiers of the pins associated with the prepin, representing the pin objects that need to be deleted. By iterating over these IDs, each pin instance can be deleted one by one.

[0108] 5a-3: For each graphical ID traversed, use the dbDeleteObject function to delete its corresponding pin instance from the design database to ensure that only the required pin instances are retained in the design and redundant pin instances are deleted.

[0109] 5a-4: Use the foreach function to iterate over all net objects (i.e., connection objects) in cvId (pointing to the Schematic view). Each net object represents a circuit connection that connects pins in the Schematic view.

[0110] 5a-5: For each net object, check whether its name is in the netname_list list to identify which connections need to be deleted.

[0111] 5a-6: If the name of the net object is in netname_list, read the graphical ID of the net through the operator ~>.

[0112] 5a-7: Use the dbDeleteObject function to delete the net object corresponding to the graphical ID from the design database.

[0113] It can be understood that the main function of steps 5a-1 to 5a-3 is to clean up the redundant pin terminals in the design, and to simplify the circuit design, reduce unnecessary complexity, and ensure that the final circuit diagram contains only valid pins by deleting the pin terminals that have been marked as no longer needed in the previous steps. The main function of steps 5a-4 to 5a-7 is to clean up the wires that are no longer needed in the design. By deleting these wire objects, it can be ensured that only necessary wires are included in the final circuit diagram, avoiding redundancy and possible wire errors, and maintaining the simplicity and accuracy of the design.

[0114] Based on the above processing, the processing of step 112 can be specifically as follows: traverse the pin instances in the Schematic view of the target integrated circuit, and extract the pin name of each pin instance; parse the pin names of the pin instances that hit the first list to obtain the target prefix; retrieve the value list corresponding to the target prefix in the preset first dictionary, and extract the maximum and minimum values ​​in the value list; modify the pin name of the pin instance to a bus form in which the target prefix corresponds to multiple address bits according to the maximum and minimum values.

[0115] In practice, the above process can be broken down into the following steps:

[0116] 112-6a. Change the pin name of the pin instance to bus format, including the following:

[0117] 6a-1: Use the foreach function to iterate over all instances of cvId, that is, all device instances in the Schematic view.

[0118] 6a-2: For each instance, check whether its environment variable purpose is equal to "pin" to identify whether the instance is a pin instance, ensure that only pin instances are processed, and filter out other non-pin devices.

[0119] 6a-3: Check whether the pin name of instance is in piname_list1 to determine whether the pin instance needs to be renamed. If so, execute 6a-4 and subsequent processing; if not, skip the current pin instance and select the next pin instance.

[0120] 6a-4: Use the parseString function to split the pin name (i.e. subpin) into two parts according to the identifier "<". The first part is the prefix of the pin name, which is assigned to the variable prepin, and the second part is the address of the pin, which is assigned to the variable num.

[0121] 6a-5: Use the member function to check whether prepin is in the key of myTable1.

[0122] 6a-6: If prepin exists in myTable1, use the sort function to sort the address bits in the value list corresponding to prepin in myTable1, assign the maximum value after sorting to the variable maxnum, and assign the minimum value to the variable minnum.

[0123] 6a-7: Use the strcat function to combine strings to form prepin <maxnum:minnum>In this way, the format of the range of all address bits corresponding to the prefix is ​​assigned to the variable newname.

[0124] 6a-8: Use the schReplaceProperty function to replace the pin name of the original pin instance with the newly generated newname, which is the pin name in bus form.

[0125] Through the processing of steps 6a-1 to 6a-8, the pin names in the Schematic view can be modified to simplify the design and reduce redundancy. Combining multiple pins with the same function into a bus format pin can make the Schematic view clearer and easier to understand while reducing complexity.

[0126] In other embodiments, scripts such as Python or Perl may be used to interact with the Virtuoso software through external APIs or tools to implement the logical steps of the above program script files.

[0127] 2. Symbol view

[0128] The processing of step 111 may include the following processing: traversing the pin graphics in the Symbol view of the target integrated circuit, extracting the pin name and coordinate information of each pin graphics; splitting the name of each pin graphics into a prefix and an address bit, and deduplicating the prefix and storing it in a preset third dictionary and a preset fourth dictionary, merging the address bits and storing them in a value list corresponding to the prefix in the preset third dictionary; storing the pin names of the pin graphics with non-repeated prefixes in the preset fourth dictionary in the preset third list; storing the coordinate information of the pin graphics with repeated prefixes in the preset fourth dictionary in the preset fourth list, and storing the graphical ID of the pin graphics in the value list corresponding to the prefix in the preset fourth dictionary.

[0129] In practice, the above process can be broken down into the following steps:

[0130] 111-1b. Traverse the pin graphics of the Symbol view and extract the pin name and coordinate information of each pin graphic, including the following:

[0131] 1b-1: Select the main function Symbol_pin_bus as this function is the main entry of the program script file. It is responsible for processing the library and cell provided by the user and operating the pins in the Symbol view.

[0132] 1b-2: Get the library name and cell name input by the user, where the library name and cell name specify the specific objects to be operated in the design.

[0133] 1b-3: Set the Symbol view of the specified cell in the library to be opened in append mode through the dbOpenCellViewByType function, where the dbOpenCellViewByType function is a Skill function used to open the cell view of the specified library, cell and view type; opening the cell view in append mode means that the program script file will not create or overwrite the existing view, but read the existing data for processing.

[0134] 1b-4: Store the access address of the Symbol view in the cvId variable, where the cvId variable is a reference to the currently operated view (similar to a pointer or handle), through which the data in the view can be accessed and operated.

[0135] 1b-5: Use makeTable to create two empty dictionaries: myTable3 (i.e., the third preset dictionary) and myTable4 (i.e., the fourth preset dictionary) to store pin-related data in subsequent operations. Dictionaries (i.e., hash tables) allow fast lookup of data based on key values, so they are suitable for storing and managing a large amount of pin information.

[0136] 1b-6: Create two empty lists: piname_list2 (i.e. the preset third list) and point_list (i.e. the preset fourth list) to store the pin names (pinname) and connection names involved later.

[0137] 1b-7: Use the foreach function to iterate over each shape in cvId, and select the shape' (i.e., the pin graphic) whose objType environment variable value is "rect". This allows you to identify the rectangular shape representing the pin graphic and filter out other shapes (such as lines, text, etc.) in the Symbol view.

[0138] 1b-8: Read the pin name of each shape' binding through the operator ~> and assign it to the variable name.

[0139] 1b-9: Use the ~> operator to read the boundary coordinate values ​​of shape's bBox (bounding box), assign the coordinate point of the lower left corner to the variable lowerpoint, and the coordinate point of the upper right corner to the variable upperpoint.

[0140] 1b-10: Use the centerBox function to calculate the center coordinates of lowerpoint and upperpoint to determine the center coordinates of each pin graphic, so as to facilitate the subsequent determination of pin positions, drawing bus connections, or other graphic processing.

[0141] The processing of the above steps 1b-1 to 1b-10 is the basis for the subsequent synthesis, deletion or connection modification of the pin graphics.

[0142] 111-2b. Identify pin patterns with the same function but different position numbers, including the following:

[0143] 2b-1: Check whether the pin name matches the regular expression. You can use the rexMatchp function to check whether the pinname (i.e. the pin name) matches the given regular expression pattern to identify the pin name that conforms to the bus format, that is, the pin graphics that contain the bit number in the name. Specifically, you can check whether the pinname string contains the identifier "<". For example, pinname may be prefix <5> The program uses "<" to identify that this is a bus pin with a bit number.

[0144] 2b-2: Remove the trailing identifier ">" in the pin name. If pinname contains "<", you can use the substring function to remove the trailing identifier ">" in the pin name, retain the previous part, and get the subpin variable for subsequent processing of the bit number part in the pin name and separation of the pin name and bit number. For example, you can use prefix <5> Processed as prefix<5.

[0145] 2b-3: Split the pin name into prefix and address bit. Specifically, you can use the parseString function to split subpin into two parts according to the identifier "<": the part before "<" is the prefix of the pin, which is assigned to the variable prepin; that is, the part after "<" is the address bit of the pin, which is assigned to the variable num. For example, if subpin is prefix<5, the prepin after the split will be prefix, and num will be 5. By splitting the pin name, the functional part (prefix) of the pin and its bit number (address bit) can be processed separately, so that when the bus pins are subsequently synthesized, they can be classified and combined based on this information.

[0146] The above processing from 2b-1 to 2b-3 can identify and process pin graphics with the same function but different position numbers, providing a basis for subsequent pin graphic synthesis and optimization.

[0147] 111-3b. Classify and synthesize the prefix of the pin name of the pin diagram and its address bit, including the following:

[0148] 3b-1: Determine whether the prefix name prepin of the current pin graphic already exists in the key of the dictionary myTable3.

[0149] 3b-2: If prepin does not exist in myTable3, you can store prepin as a new key in the myTable3 dictionary and set its corresponding value to an empty value list to initialize the key of prepin so that its corresponding value list can be used to store all address bits related to the prefix.

[0150] 3b-3: Use the rexMatchp function to determine whether the address bit num of the current pin pattern contains the ":" identifier to identify which pin patterns belong to the bus form (i.e., pin patterns containing multiple address bits). The ":" identifier is usually used to represent an address range (such as 5:0 represents from 5 to 0).

[0151] 3b-4: If the address bit num contains ":", you can use the parseString function to split num into two parts, the high address and the low address, and assign the high address to the variable maxnum and the low address to the variable minnum. Next, you can use the cons function to add all the address bits between minnum and maxnum to the value list corresponding to the prepin key in myTable3. In this way, a group of continuous address bits (such as 5:0) can be managed as a whole to ensure that these address bits are recorded for subsequent pin synthesis and optimization.

[0152] 3b-5: If the address bit num does not contain ":", then directly add num to the list of values ​​corresponding to the prepin key in myTable3.

[0153] 3b-6: If prepin already exists in myTable3, it means that there are other pins that share the same prefix name. The program can directly add the new address bits to the existing list and execute the processing from 3b-3 to 3b-5.

[0154] Based on the processing of 3b-1 to 3b-6, it can be understood that the role of myTable3 is to classify, collect and organize all address bits with the same prefix name. Regardless of whether these pin terminals are single or bus-shaped, the program script file can obtain all address bits related to a certain prepin and process or synthesize these address bits in subsequent steps.

[0155] 111-4b. Identify the pin graphics that require name modification and deletion, including the following:

[0156] 4b-1: Use the member function to determine whether the prefix prepin of the current pin graphic is in the key of myTable4.

[0157] 4b-2: If prepin is not in myTable4, use append1(piname_list,pinname) to add the current pin's name pinname to the list piname_list2, and store prepin as the key in myTable4, and set its value to an empty value list.

[0158] Among them, piname_list2 is used to collect all pins whose pin names need to be modified. By adding pinname to this list, these pin names can be processed and modified in subsequent steps.

[0159] 4b-3: If prepin already exists in the key of myTable4, store the coordinate information point of the current pin graphic in the point_list list, and store the graphical ID of the pin in the value list corresponding to the key prepin in myTable4.

[0160] Among them, point_list is used to collect the coordinate information of the circuit connection (net) related to the pin. Through this coordinate information, the location of the net can be determined and deleted later.

[0161] myTable4 is used to collect the graphical IDs of all pin graphics with different address bits that have the same prefix name. When encountering multiple pins with the same prefix name prepin, the graphical IDs of these pins can be collected so that the redundant pins can be deleted in subsequent steps, leaving only one for modifying the name.

[0162] Based on the above processing, the following processing may also exist between step 111 and step 112: traverse all graphical IDs in the value list corresponding to the prefix of the pin graphic in the preset fourth dictionary, and delete the pin graphic corresponding to the graphical ID from the design database; traverse the shape elements in the Symbol view of the target integrated circuit; read the boundary coordinate value to hit the shape element in the preset fourth list, and delete the shape element from the design database.

[0163] In practice, the above process can be broken down into the following steps:

[0164] 111-5b. Delete redundant pin graphics and circuit connections, including the following:

[0165] 5b-1: Use foreach(keymyTable3) to iterate over each key in myTable4, which is the prefix prepin of the pin pattern.

[0166] 5b-2: For each prepin, use the foreach function again to iterate over all the graphical IDs in its corresponding value list. These graphical IDs represent the graphical identifiers of the pins associated with the prepin, representing the pin objects that need to be deleted. By iterating over these graphical IDs, each pin graphic can be deleted one by one.

[0167] 5b-3: For each graphical ID traversed, use the dbDeleteObject function to delete its corresponding pin graphic from the design database to ensure that only one pin graphic for name modification is retained in the design and to delete redundant pin graphics.

[0168] 5b-4: Use foreach(shapecvId~>shapes) to traverse all shapes in cvId (pointing to the Symbol view), that is, shape elements, and obtain the shape of the device whose value is the environment variable objType to identify all devices in the circuit, so as to find the net (connection) connected to the pin.

[0169] 5b-5: For each shape, check whether one of the two coordinate points of its bounding box (bBox) is in point_list. Here, because the point_list list contains the coordinate points of all the nets that need to be deleted, it can be determined whether the current shape is connected to the pin that needs to be deleted.

[0170] 5b-6: If the bBox coordinate point of shape is in point_list, it means that the shape is connected to the pin that needs to be deleted, so you can call the schDelete(shape) function to delete the shape, that is, delete the net connected to the pin.

[0171] It can be understood that the main function of steps 5b-1 to 5b-3 is to clean up the redundant pin graphics in the design, and to simplify the circuit design, reduce unnecessary complexity, and ensure that the final circuit diagram contains only valid pins by deleting the pin graphics that have been marked as no longer needed in the previous steps. The main function of steps 5b-4 to 5b-7 is to clean up the shape objects that are no longer needed in the design. By deleting these shape objects, the redundant wires in the circuit diagram are cleaned up, which ensures that only the necessary wires are in the final circuit diagram, avoiding redundancy and possible wire errors, and maintaining the simplicity and accuracy of the design.

[0172] Based on the above processing, the processing of step 112 can be specifically as follows: parse the pin name of the pin graphic that hits the preset third list to obtain the target prefix; retrieve the value list corresponding to the target prefix in the preset third dictionary, and extract the maximum and minimum values ​​in the value list; modify the pin name of the pin graphic to a bus form of multiple address bits corresponding to the target prefix according to the maximum and minimum values.

[0173] In practice, the above process can be broken down into the following steps:

[0174] 112-6b. Change the pin names of the pin diagram to bus format, including the following:

[0175] 6b-1: Use the schGetMatchingObjects("pin") function to get the object IDs of all pins in the Symbol view and store these object IDs in a temporary list pinNet_ids.

[0176] 6b-2: Use foreach(pinNet_idpinNet_ids) to loop through each object ID in pinNet_ids.

[0177] 6b-3: Use pinNet_id~>name to access the pin name corresponding to the current pinNet_id and store it in the variable pinname.

[0178] 6b-4: Use member(pinnamepinname_list) to determine whether the current pinname is in the previously collected pinname_list2 to determine whether the current pin needs to be renamed. If pinname is in pinname_list2, it means that the name of the pin needs to be modified.

[0179] 6b-5: Use parseString(pinname"<") to split pinname into two parts according to the identifier "<", and store the prefix of the first part of the pin name after the split into the variable prepin, and the address of the second part of the pin into the variable num.

[0180] 6b-6: Use member(prepinmyTable) to determine whether prepin is in the key of myTable3.

[0181] 6b-7: If prepin is in the key of myTable, use sort(myTable[prepin]) to sort the address bit list corresponding to the key prepin in myTable3 from small to large, assign the maximum value after sorting to the variable maxnum, and assign the minimum value to the variable minnum.

[0182] 6b-8: Use strcat(prepin"<"maxnum":"minnum">") to combine the prefix prepin and the address range maxnum:minnum into a new pin name and store it in the variable newname.

[0183] 6b-9: Use the schReplaceProperty(pinNet_id "name" newname) function to replace the pin name corresponding to the current pinNet_id with newname, which is the pin name in bus form.

[0184] By processing steps 6b-1 to 6b-9, the pin names in the Symbol view can be modified to simplify the design and reduce redundancy. Combining multiple pins with the same function into a bus-format pin can make the Schematic view clearer and easier to understand while reducing complexity.

[0185] Generally, the pins of the Symbol view are surrounded by a long frame representing the instance. Before the above-mentioned Symbol view processing, the pins are evenly arranged on the upper, lower, left and right borders. After the above-mentioned Symbol view processing, the spacing between some adjacent pins is too large, and the spacing between some adjacent pins is too small. This irregular spacing is particularly intuitive, causing the Symbol view to look irregular and not beautiful enough. The arrangement of the pins in the Schematic view is not consistent with the Symbol view. Figure 1 Therefore, after processing the Schematic view, the need to rearrange the pin graphics is not very meaningful. Therefore, based on the above processing for the Symbol view, the following processing can also be performed after step 113: traverse the pin graphics in the Symbol view of the target integrated circuit, extract the type and first coordinate information of each pin graphic; for pin graphics of the same type, delete the pin graphics with the same first coordinate information; according to the first coordinate information of the remaining pin graphics, adjust the first coordinate information of the remaining pin graphics and the corresponding circuit connections.

[0186] In practice, the above process can be broken down into the following steps:

[0187] 114-7b. Traverse the pin graphics in the Symbol view of the target integrated circuit, extract the type and first coordinate information of each pin graphic, including the following:

[0188] 7b-1: Select the main function Symbol_pin_bus as this function is the main entry of the program script file. It is responsible for processing the library and cell provided by the user and operating the pins in the Symbol view.

[0189] 7b-2: Get the library name and cell name input by the user, where the library name and cell name specify the specific objects to be operated in the design.

[0190] 7b-3: Set the dbOpenCellViewByType function to open the Symbol view of the specified cell in the library in an additional way.

[0191] 7b-4: Store the access address of the Symbol view in the cvId variable.

[0192] 7b-5: Create empty lists input_list and output_list to store the center coordinate points of the input and output pins respectively.

[0193] 7b-6: Create a dictionary myTable5 to store the center coordinate point of the pin as the key and the corresponding shape ID as the value.

[0194] 7b-7: Traverse each shape object (shape element) in cvId, and take the value of the objType environment variable as "rect" (rectangle) and the shape' (i.e., the pin graphic) whose layerName is "pin".

[0195] 7b-8: Use the operator ~> to get the direction of each shape' (input or output) and assign it to the variable direction. Use the centerBox function to pass in the lower left and upper right coordinates of each shape's bounding box bBox to calculate and return the center coordinate point of each shape'.

[0196] 7b-9: Use the center coordinate point of shape' as the key of the dictionary myTable5 and the ID of shape' as the corresponding value.

[0197] 7b-10: Store point according to the direction of the pin. If direction is "input", store point in input_list; if direction is "output", store point in output_list.

[0198] The processing of the above steps 7b-1 to 7b-10 is to identify and classify pin objects in the Symbol view of the target circuit diagram, providing basic data for subsequent operations such as pin name modification and net connection management.

[0199] 114-8b. Filter the pin graphics with the same first coordinate information, including the following:

[0200] 8b-1: Create two empty lists remove_list1 and remove_list2 to store the duplicate points in input_list and output_list that need to be removed respectively.

[0201] 8b-2: Use the foreach function to traverse the points in input_list, and use the yCoord function to extract the y coordinate (i.e., the first coordinate information) of the current point. It is worth mentioning that each point is actually a two-dimensional coordinate (x, y). This embodiment chooses to use the y coordinate as the first coordinate information for illustration. Alternatively, only the x coordinate can be extracted as the first coordinate information through xCoord.

[0202] 8b-3: Use the setof function to find all points in input_list whose y coordinates are equal to y_value. If there are multiple points with the same y coordinates, all points after the second point can be stored in remove_list1.

[0203] 8b-4: Use the setof function to find all points in output_list whose y coordinates are equal to y_value. If there are multiple points with the same y coordinates, all points after the second point can be stored in remove_list2.

[0204] In the above steps 8b-1 to 8b-4, by traversing input_list and output_list, duplicate points on the same y coordinate are found, and these duplicate points are stored in their respective remove_list or remove_list2, so that points with overlapping pin y coordinates in the circuit diagram can be identified and collected, providing a data basis for subsequent processing (such as deletion or further operation).

[0205] 114-9b. Delete the pin graphics with the same first coordinate information, that is, traverse each element in remove_list1 and remove_list2 respectively through the foreach function, and delete the elements in remove_list1 from input_list, and delete the elements in remove_list2 from output_list.

[0206] 114-10b. Matching point with pin and net may include the following:

[0207] 10b-1: Use the foreach function to traverse all shapes objects whose layerName is device in cvId. It can be understood that the shapes object of the device layer defines the area or outline of the actual physical device.

[0208] 10b-2: For each shape object of the device layer obtained, get the lower left corner coordinate point leftpoint and the upper right corner coordinate point rightpoint of its bounding box (bBox).

[0209] 10b-3: Determine whether leftpoint is in input_list. If it exists, it means that the pin of the shape is an input pin, and it is necessary to record the id of the net it is connected to, so that leftpoint can be used as the key to add the id of this shape to the value list corresponding to leftpoint in the dictionary myTable5.

[0210] 10b-4: Determine whether rightpoint is in output_list. If it exists, it means that the pin of the shape is an output pin, and it is necessary to record the id of the net it is connected to, so that rightpoint can be used as the key to add the id of this shape to the value list corresponding to rightpoint in the dictionary myTable5.

[0211] It can be understood that in steps 10b-3 and 10b-4, it is determined whether leftpoint is in input_list and whether rightpoint is in output_list because in the current circuit design field, circuit signals in circuit diagrams generally flow from left to right, corresponding to flowing from the input end to the output end.

[0212] 10b-5: Sort the coordinate points in input_list and output_list by y coordinate from small to large, so that these coordinate points can be processed sequentially in subsequent operations to ensure the synchronous movement of pin and net in the vertical direction.

[0213] 114-11b. Adjust the positions of the pins and nets corresponding to input_list in the Symbol view so that they are evenly distributed in the y-axis direction. This may include the following:

[0214] 11b-1: Initialize the variables lastpoint and ypoi, which are used to store the coordinates of the last traversed point and the y coordinate of the previously traversed point, respectively.

[0215] 11b-2: Use the foreach function to iterate over each point in input_list.

[0216] 11b-3: Use the yCoord function to extract the y coordinate of the current traversal point and assign it to the variable ypoint.

[0217] 11b-4: Calculate the distance between the y coordinates of the current point and the previous point, assign it to yspace, then calculate the difference between the standard spacing of the pin and yspace to get the actual distance move_distance required.

[0218] 11b-5: Get the id list corresponding to the current point as the key from myTable, call the schStretch function, and adjust the first coordinate information corresponding to the pin and net ids according to the calculated move_distance.

[0219] 11b-6: After each traversal, save the current point as lastpoint for reference in the next calculation.

[0220] 114-12b. Adjust the positions of the pins and nets corresponding to output_list in the Symbol view so that they are evenly distributed in the y-axis direction. For details, please refer to the processing of 114-11b.

[0221] Step 120, configuring the program script file into the Virtuoso software environment.

[0222] When configuring a program script file, you can place the written Skill script file in a directory accessible to the Virtuoso software, and write the command to load the program script file in the .cdsinit file, so that the Virtuoso software can automatically load the program script file when it starts up through the .cdsinit file. The .cdsinit file is the initialization file of the Virtuoso software, which is usually used to configure environment variables, load scripts, and set the default behavior when the software starts up.

[0223] Of course, you can also choose not to modify the startup configuration of the Virtuoso software, but manually load the script file through the command line of the Virtuoso software when needed. This method is more flexible, but it requires manual loading after each startup, which may not be suitable for frequently used automated scripts.

[0224] Step 130: When the Virtuoso software is started, the program script file is automatically loaded.

[0225] After configuring the script files, Virtuoso can automatically load these scripts each time it starts. Of course, you can also choose to delay the loading of scripts, that is, load and execute script files only under certain conditions, which can reduce the startup time and reduce resource usage.

[0226] Step 140 , in response to the calling request of the program script file, extract and display the pin names and connection names of the target integrated circuit in the form of a bus in the unit view.

[0227] Among them, the unit view is a graphical representation of a unit (such as a gate circuit, a module) in a circuit, and the unit view may include a layout view, a schematic view, a symbol view, etc.

[0228] When the user performs a predetermined operation in the Virtuoso software (such as clicking a menu item or entering a command) to trigger a call request for the program script file, the program script file will be called, which can access the design database, extract the pin and connection names of all buses in the unit view, and display the extracted information in the message window of the Virtuoso software, or display it to the user through GUI elements (such as dialog boxes or tables).

[0229] For the Schematic view, type the main function Schematic_pin_bus("libname", "cellname") in the CIW window, and fill in the custom variables in the brackets, that is, the library name and cell name in double quotes. After the program script file is run, the user can see the synthesized bus-style pins in the Schematic view;

[0230] For the Symbol view, after typing the main function Symbol_pin_bus("libname", "cellname") in the CIW window, fill in the custom variables in the brackets, that is, the library name and cell name in double quotes. After the program script file is run, the user can see the synthesized bus-style pins in the Symbol view. Further, the user enters the main function Symbol_pin_move("libname" "cellname") in the CIW window. After the program script file is run, the user can see the rearranged pins and nets in the Symbol view.

[0231] In addition to displaying the information, you can also set it to export to a file (such as CSV or XML format) for further analysis or documentation.

[0232] In this embodiment, a skill program is used to write a program script file, which can automatically modify the pin names and connection names in the unit view of the integrated circuit to the bus form, and then configure the program script file in the Virtuoso software environment, so that the program script file is automatically loaded when the Virtuoso software is started, and responds to the call request of the program script file, extracts and displays the pin names and connection names in the bus form of the target integrated circuit in the unit view. In this way, compared with the traditional manual operation method, by using the Skill program interface of the Virtuoso software to automatically generate scripts and realize batch quick processing of pin names and connection names, manual operations can be significantly reduced, and the efficiency of integrated circuit design can be improved. At the same time, the accuracy of the operation can be ensured through consistent logic and processes, thereby reducing human errors and improving the reliability of integrated circuit design.

[0233] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0234] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.< / maxnum:minnum>

Claims

1. A method for designing integrated circuit pins based on Virtuoso, characterized in that: The method comprises: Using the Skill program interface of the Virtuoso software, a program script file is written according to predetermined execution steps, and the program script file is configured in the Virtuoso software environment. When the Virtuoso software is started, the program script file is automatically loaded, and in response to a call request of the program script file, the pin names and connection names of the target integrated circuit in the form of a bus in the unit view are extracted and displayed; The predetermined execution steps implemented by writing the program script file include: Extracting and storing pin names of pins in a unit view of the target integrated circuit, wherein the pin names include at least a prefix and an address bit, and the unit view includes at least one of a Schematic view and a Symbol view; Modify the extracted pin name of each pin into a bus format in which each prefix corresponds to a plurality of address bits; Modify the connection name of the circuit connection corresponding to the pin according to the pin name of the bus form; The extracting and storing the pin names of the pins in the unit view of the target integrated circuit comprises: Traversing the pin terminals in the Schematic view of the target integrated circuit, and extracting the pin name of each pin terminal; Split the name of each pin terminal into a prefix and an address bit, remove duplicates from the prefix and store them in a preset first dictionary, merge the address bits and store them in a value list corresponding to the prefix in the preset first dictionary; The method further comprises: Traversing the pin terminals in the Schematic view of the target integrated circuit, and extracting the graphical ID of each pin terminal; Remove duplicate prefixes from each pin terminal and store them in the preset second dictionary mytable3; Store the pin names of the pin terminals with non-repeated prefixes in the preset second dictionary into the preset first list; The pin names of the pin terminals with repeated prefixes in the preset second dictionary are stored in a preset second list, and the graphical IDs of the pin terminals are stored in a value list corresponding to the prefix in the preset second dictionary.

2. The method according to claim 1, characterized in that The step of modifying the extracted pin name of each pin into a bus format in which each prefix corresponds to a plurality of address bits comprises: Traversing the pin instances in the Schematic view of the target integrated circuit, and extracting the pin name of each pin instance; Parsing the pin names of the pin instances that hit the first list to obtain a target prefix; Retrieving a value list corresponding to the target prefix in the preset first dictionary, and extracting the maximum and minimum values ​​in the value list; The pin name of the pin instance is modified according to the maximum and minimum values ​​to a bus format in which the target prefix corresponds to a plurality of address bits.

3. The method according to claim 1, characterized in that The method further comprises: Traversing all graphic IDs in the value list corresponding to the prefix of the pin terminal in the preset second dictionary, and deleting the pin instance corresponding to the graphic ID from the design database; Traversing circuit connections in a Schematic view of the target integrated circuit; The graphical ID of the circuit connection whose connection name hits the preset second list is read, and the connection object corresponding to the graphical ID is deleted from the design database.

4. The method according to claim 1, characterized in that The extracting and storing the pin names of the pins in the unit view of the target integrated circuit comprises: Traversing the pin graphics in the Symbol view of the target integrated circuit, and extracting the pin name and coordinate information of each pin graphic; The name of each pin graphic is split into a prefix and an address bit, and the prefixes are deduplicated and stored in a preset third dictionary and a preset fourth dictionary, and the address bits are combined and stored in a value list corresponding to the prefix in the preset third dictionary.

5. The method according to claim 4, characterized in that The method further comprises: Traversing the pin graphics in the Symbol view of the target integrated circuit, and extracting the coordinate information of each pin graphic; Store the pin names of the pin graphics with non-repeated prefixes in the preset fourth dictionary into the preset third list; The coordinate information of the pin graphics with repeated prefixes in the preset fourth dictionary is stored in a preset fourth list, and the graphical ID of the pin graphics is stored in a value list corresponding to the prefix in the preset fourth dictionary.

6. The method according to claim 5, characterized in that The method further comprises: Traversing all graphic IDs in the value list corresponding to the prefix of the pin graphic in the preset fourth dictionary, and deleting the pin graphic corresponding to the graphic ID from the design database; Traversing shape elements in the Symbol view of the target integrated circuit; The boundary coordinate value is read to hit the shape element in the preset fourth list, and the shape element is deleted from the design database.

7. The method according to claim 5, characterized in that The step of modifying the extracted pin name of each pin into a bus format in which each prefix corresponds to a plurality of address bits comprises: Parsing the pin names of the pin graphics that hit the preset third list to obtain a target prefix; Retrieving a value list corresponding to the target prefix in the preset third dictionary, and extracting the maximum and minimum values ​​in the value list; The pin names of the pin graphics are modified according to the maximum and minimum values ​​into a bus format in which the target prefix corresponds to a plurality of address bits.

8. The method according to claim 7, characterized in that After modifying the connection name of the circuit connection corresponding to the pin according to the pin name of the bus form, the method further includes: Traversing the pin graphics in the Symbol view of the target integrated circuit, and extracting the type and first coordinate information of each pin graphic; For pin graphics of the same type, delete the pin graphics with the same first coordinate information; According to the first coordinate information of the remaining pin patterns, the first coordinate information of the remaining pin patterns and the corresponding circuit connections are adjusted.

Images