Method for improving etching selectivity ratio of silicon nitride and silicon oxide and mask layer etching method

By doping silicon nitride layer with carbon source in the substrate and silicon oxide layer using porous silicon oxide, and using microwave heating technology, the problem of high cost and high pollution when the etching selection ratio of silicon nitride and silicon oxide in the prior art is solved, and an efficient and low-cost etching selection ratio is achieved.

CN118899218BActive Publication Date: 2025-03-11NEXCHIP SEMICON CO LTD
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Patent Information

Application Number
CN202411397328.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-10-09
Publication Date
2025-03-11
Estimated Expiration
2044-10-09

AI Technical Summary

Technical Problem

The prior art has problems of high costs and high pollution when improving the etching ratio of silicon nitride and silicon oxide, especially in monolithic equipment with advanced wet process.

Method used

The etch selection ratio is increased by doping a silicon nitride layer with a carbon source in the substrate and a silicon oxide layer using porous silicon oxide, and heating the phosphoric acid solution using microwave during the etching process, thereby increasing the dielectric constant difference between the silicon nitride layer and the silicon oxide layer.

Benefits of technology

This achieves improved silicon nitride and silicon oxide etch selection ratio without the need to introduce expensive additives, reduces costs and reduces pollution, and is suitable for advanced wet processes.

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Abstract

The present application discloses a method for improving the etching selectivity of silicon nitride and silicon oxide and a mask layer etching method, wherein the method for improving the etching selectivity of silicon nitride and silicon oxide comprises: providing a substrate, wherein the substrate comprises a silicon nitride layer and a silicon oxide layer; etching the silicon nitride layer with a phosphoric acid solution, and heating the phosphoric acid solution and the silicon nitride layer and the silicon oxide layer by microwaves during the etching process, wherein the silicon nitride layer is doped with a carbon source, and / or the silicon oxide layer comprises porous silicon oxide, thereby achieving the purpose of improving the etching selectivity of the silicon nitride layer and the silicon oxide layer. Since there is no need to introduce expensive additives into the phosphoric acid solution during the entire etching process to achieve the improvement of the etching selectivity of the silicon nitride layer and the silicon oxide layer, the technical problems of high cost and large pollution existing in the existing methods are solved.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a method for improving the etching selectivity ratio of silicon nitride and silicon oxide and a mask layer etching method. Background Art

[0002] Shallow Trench Isolation (STI) is a commonly used isolation technology in advanced semiconductor manufacturing processes. It uses insulating materials to fill the trenches between the active areas of the device to form a Figure 1a The shallow trench isolation structure 11 shown in the figure, the trench formation process includes the following steps: Figure 1a As shown in the figure, a patterned mask layer 13 is formed on the substrate 12 and the substrate 12 is etched using the mask layer 13. In order to protect the substrate 12, a protective layer 14 needs to be formed on the substrate 12 before the mask layer 13 is formed. The mask layer 13 formed later needs to be wet etched after the shallow trench isolation structure 11 is formed. Figure 1b As shown, it is removed. The material used for the mask layer 13 is silicon nitride (Si3N4), and the material used for the protective layer 14 is silicon oxide (SiO2). Therefore, the above-mentioned wet etching process often uses a high-temperature phosphoric acid solution, and maintaining a high etching selectivity of silicon nitride and silicon oxide is the key to the wet etching process. At present, the etching selectivity of silicon nitride and silicon oxide is improved by introducing expensive additives, but this method has the problems of high cost and large pollution. The cost burden may not be obvious in the circulating liquid tank of the tank-type equipment, but the cost burden will increase linearly when it comes to the single-chip equipment of the advanced wet process. Summary of the invention

[0003] In view of the above problems, the present application provides a method for improving the etching selectivity ratio of silicon nitride and silicon oxide and a mask layer etching method.

[0004] According to a first aspect of the present invention, there is provided a method for improving the etching selectivity ratio of silicon nitride and silicon oxide, comprising:

[0005] Providing a substrate, the substrate comprising a silicon nitride layer and a silicon oxide layer;

[0006] The silicon nitride layer is etched by using a phosphoric acid solution, and during the etching process, the phosphoric acid solution, the silicon nitride layer and the silicon oxide layer are heated by microwaves;

[0007] Wherein, the silicon nitride layer is doped with a carbon source, and / or the silicon oxide layer is made of porous silicon oxide.

[0008] Optionally, the carbon source is carbon nanotubes and the carbon nanotubes account for 0.1%-10% in the silicon nitride layer.

[0009] Optionally, the method for improving the etching selectivity ratio of silicon nitride and silicon oxide further comprises: preheating the phosphoric acid solution before etching the silicon nitride layer with the phosphoric acid solution, wherein the temperature of the preheated phosphoric acid solution is greater than 40° C.;

[0010] The silicon nitride layer is etched by using a phosphoric acid solution, comprising: allowing the preheated phosphoric acid solution to contact the silicon nitride layer to etch the silicon nitride layer.

[0011] Optionally, the temperature of the preheated phosphoric acid solution is 60° C.-100° C., and the preheated phosphoric acid solution is further heated by microwaves to 120° C.-180° C. during the process of etching the silicon nitride layer.

[0012] According to a second aspect of the present invention, a mask layer etching method is provided, wherein the mask layer covers a protective layer, and the method comprises:

[0013] The mask layer is etched by using a phosphoric acid solution, and during the etching process, the phosphoric acid solution, the mask layer and the protective layer are heated by microwaves;

[0014] Wherein, the mask layer comprises a silicon nitride layer doped with a carbon source, and / or the protective layer comprises a silicon oxide layer using porous silicon oxide.

[0015] Optionally, the carbon source is carbon nanotubes and the carbon nanotubes account for 0.1%-10% of the silicon nitride layer doped with the carbon source.

[0016] Optionally, the mask layer etching method further comprises: preheating the phosphoric acid solution before etching the mask layer with the phosphoric acid solution, wherein the temperature of the preheated phosphoric acid solution is greater than 40° C.;

[0017] The mask layer is etched by using a phosphoric acid solution, comprising: allowing the preheated phosphoric acid solution to contact the mask layer to etch the mask layer.

[0018] Optionally, the temperature of the preheated phosphoric acid solution is 60° C.-100° C., and the preheated phosphoric acid solution is further heated by microwaves to 120° C.-180° C. during the process of etching the mask layer.

[0019] Optionally, the mask layer further includes an undoped silicon nitride layer, and the undoped silicon nitride layer covers the silicon nitride layer doped with the carbon source.

[0020] Optionally, the protective layer further comprises a silicon oxide layer made of non-porous silicon oxide, and the silicon oxide layer made of porous silicon oxide covers the silicon oxide layer made of non-porous silicon oxide.

[0021] The unexpected technical effects of this application are:

[0022] According to the method for improving the etching selectivity of silicon nitride and silicon oxide provided in the embodiment of the present application, the method comprises: providing a substrate, the substrate comprising a silicon nitride layer and a silicon oxide layer; etching the silicon nitride layer using a phosphoric acid solution, and heating the phosphoric acid solution and the silicon nitride layer and the silicon oxide layer by microwaves during the etching process, wherein the silicon nitride layer is doped with a carbon source to increase the dielectric constant, and / or the silicon oxide layer uses porous silicon oxide to reduce the dielectric constant, so that the difference in dielectric constant between the silicon nitride layer and the silicon oxide layer increases. Since the silicon nitride layer and the silicon oxide layer are selectively heated due to their different dielectric constants during the microwave heating of the phosphoric acid solution and the silicon nitride layer and the silicon oxide layer, and the heating efficiency of the layer with a larger dielectric constant is high, and thus the etching rate is high, the difference in etching rate between the silicon nitride layer and the silicon oxide layer increases due to the increase in the difference in dielectric constant, thereby achieving the purpose of improving the etching selectivity of the silicon nitride layer and the silicon oxide layer. Since there is no need to introduce expensive additives into the phosphoric acid solution during the entire etching process to improve the etching selectivity of the silicon nitride layer and the silicon oxide layer, the technical problems of high cost and high pollution in the existing method are solved.

[0023] According to the mask layer etching method provided in an embodiment of the present application, the mask layer covers the protective layer, and the mask layer etching method includes: etching the mask layer with a phosphoric acid solution, and heating the phosphoric acid solution and the mask layer and the protective layer during the etching process, wherein the mask layer includes a silicon nitride layer doped with a carbon source, and / or the protective layer includes a silicon oxide layer using porous silicon oxide, so that the etching selectivity of the mask layer and the protective layer is improved, so that the mask layer can be etched away when the covering protective layer suffers less damage, and the entire etching process of the mask layer has the advantages of lower cost and less pollution because there is no need to introduce expensive additives into the phosphoric acid solution. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The above and other objects, features and advantages of the present application will become more apparent through the following description of the embodiments of the present application with reference to the accompanying drawings, in which:

[0025] Figure 1a A cross-sectional schematic diagram showing a shallow trench isolation structure formed by using a mask layer in the prior art;

[0026] Figure 1b A cross-sectional schematic diagram showing a shallow trench isolation structure in the prior art after the mask layer is removed after the structure is formed;

[0027] Figure 2 The etching rates of silicon nitride and silicon oxide in a semiconductor structure by the same pool of phosphoric acid solution are shown in a case where an additive is introduced into the phosphoric acid solution in the prior art;

[0028] Figure 3 A flow chart showing a method for improving the etching selectivity ratio of silicon nitride and silicon oxide according to an embodiment of the present application;

[0029] Figure 4 A schematic diagram showing dielectric constants of various materials according to an embodiment of the present application;

[0030] Figure 5 A flowchart showing a mask layer etching method according to another embodiment of the present application is shown;

[0031] Figure 6a A schematic cross-sectional view of a portion of a protective layer formed according to another embodiment of the present application is shown;

[0032] Figure 6b A cross-sectional schematic diagram showing a mask layer formed on a protective layer according to another embodiment of the present application;

[0033] Figure 6c A cross-sectional schematic diagram showing etching a mask layer using a phosphoric acid solution according to another embodiment of the present application is shown.

[0034] Explanation of the reference numerals: 11- shallow trench isolation structure; 12- substrate; 13- mask layer; 14- protective layer; 21- substrate; 22- protective layer; 22a- silicon oxide layer using porous silicon oxide; 22b- silicon oxide layer using non-porous silicon oxide; 23- mask layer; 23a- silicon nitride layer doped with a carbon source; 23b- undoped silicon nitride layer. DETAILED DESCRIPTION

[0035] The present application will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements are represented by similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale. In addition, some well-known parts may not be shown.

[0036] This application may be presented in a variety of forms, some examples of which are described below.

[0037] In semiconductor manufacturing technology, a silicon nitride layer is often formed on a silicon oxide layer to realize the manufacture of various semiconductor structures, such as the manufacture of shallow trench isolation structures, in which the silicon oxide layer is used as a protective layer and the silicon nitride layer is used as a mask layer. After the semiconductor structure is manufactured, the silicon nitride layer must be removed. A high-temperature phosphoric acid solution is often used to remove the silicon nitride layer. When the silicon nitride layer is removed, part of the silicon oxide layer is also etched by the high-temperature phosphoric acid solution. Therefore, maintaining a high silicon nitride and silicon oxide etching selectivity is the key to the silicon nitride layer removal process.

[0038] At present, in order to maintain a high etching selectivity of silicon nitride and silicon oxide, additives are introduced into phosphoric acid solution. It should be noted that phosphoric acid is used as a catalyst in the process of phosphoric acid etching silicon nitride, and the chemical reaction equation is: Si3N4+6H2O=3SiO2+4NH3. As the etching amount of silicon nitride increases, the byproducts generated will gradually increase and the byproduct silicon oxide generated will react with phosphoric acid so that the silicon oxide in the semiconductor structure is not etched by phosphoric acid. Therefore, in order to improve the etching selectivity of silicon nitride and silicon oxide and make the etching selectivity of silicon nitride and silicon oxide more stable, additives such as silicon nitride or silicon oxide can be introduced into the phosphoric acid solution, thereby significantly reducing the etching rate of silicon oxide in the semiconductor structure without substantially affecting the etching rate of silicon nitride in the semiconductor structure.

[0039] Figure 2 The figure shows the etching rates of silicon nitride and silicon oxide in a semiconductor structure by the same pool of phosphoric acid solution in a case where an additive is introduced into the phosphoric acid solution, wherein the etching rate of silicon nitride is based on the horizontal axis and the vertical axis on the left and is represented by the black filled diamond blocks in the figure, and the etching rate of silicon oxide is based on the horizontal axis and the vertical axis on the right and is represented by the unfilled rectangular blocks in the figure. Figure 2 The horizontal axis in the figure represents the cumulative depth of silicon nitride etched by a pool of phosphoric acid solution. For example, if the cumulative depth of silicon nitride etched by a pool of phosphoric acid solution in each use is 100 angstroms, then the cumulative depth of silicon nitride etched after 16 cycles is 1600 angstroms. Of course, the depth of silicon nitride etched in each cycle is not necessarily the same. Figure 2 The discrete values ​​of silicon nitride etching rate and silicon oxide etching rate at eight different cumulative etched silicon nitride depths are given. Figure 2 It can be seen that: if the cumulative depth of silicon nitride etched by the etchant is different, the amount of phosphoric acid used as a catalyst in the silicon nitride etching process will change, and the by-product silicon oxide produced will change, so that the etching rate of silicon nitride fluctuates with the cumulative depth of silicon nitride etched by a pool of etchant, but the etching rate of silicon nitride is always about 50 angstroms / minute; similarly, the etching rate of silicon oxide fluctuates with the cumulative depth of silicon nitride etched by a pool of etchant, but the etching rate of silicon oxide is always about 0 angstroms / minute, so the etching selectivity of silicon nitride and silicon oxide is relatively considerable.

[0040] However, the above method of introducing additives into the phosphoric acid solution has the problems of high cost and large pollution due to the high cost of the additives.

[0041] In view of this, an embodiment of the present application provides a method for improving the etching selectivity ratio of silicon nitride and silicon oxide. Figure 3 FIG. 1 is a flow chart of a method for improving the etching selectivity ratio of silicon nitride and silicon oxide provided in an embodiment of the present application. Figure 3As shown, the method for improving the etching selectivity ratio of silicon nitride and silicon oxide includes:

[0042] Step S110, providing a substrate, the substrate comprising a silicon nitride layer and a silicon oxide layer, wherein the silicon nitride layer is doped with a carbon source, and / or the silicon oxide layer is made of porous silicon oxide;

[0043] In step S120, the silicon nitride layer is etched using a phosphoric acid solution, and during the etching process, the phosphoric acid solution, the silicon nitride layer, and the silicon oxide layer are heated by microwaves.

[0044] Specifically, the silicon nitride layer doped with a carbon source can be understood as a composite material of a carbon source and silicon nitride, and the composite material has a larger dielectric constant than undoped silicon nitride, that is, silicon nitride is carbon doped by introducing a carbon source to increase the dielectric constant. Exemplarily, the carbon source doped in the silicon nitride layer can be carbon nanotubes (CNTs) and the proportion of carbon nanotubes in the silicon nitride layer is 0.1%-10%, thereby forming a composite material such as Figure 4 As shown, the dielectric constant is about 11, while the dielectric constant of undoped silicon nitride is less than 4, that is, the composite material has a larger dielectric constant than undoped silicon nitride. The porous silicon oxide described in this application is a material different from non-porous silicon oxide. Compared with non-porous silicon oxide, the porous silicon oxide material has a large number of voids distributed so that the structure is loose and Figure 4 As shown, it has a dielectric constant of about 1, while the dielectric constant of non-porous silicon oxide is about 2, that is, the dielectric constant of the silicon oxide material is reduced by loosening the structure. Of course, the substances in non-porous silicon oxide and porous silicon oxide are the same. Figure 4 The dielectric constants of various materials in the equation are relative dielectric constants, that is, dielectric constants relative to vacuum, and the relative dielectric constant of vacuum is considered to be 1. Figure 4 As shown, the silicon nitride layer is doped with a carbon source and / or the silicon oxide layer uses porous silicon oxide, both of which can increase the difference in dielectric constants between the silicon nitride layer and the silicon oxide layer.

[0045] It should be noted that the embodiments of the present application do not limit the relative positions of the silicon nitride layer and the silicon oxide layer in the substrate. The silicon nitride layer can cover the silicon oxide layer so that the phosphoric acid solution can contact the silicon oxide layer only after the silicon nitride layer is etched away. The silicon nitride layer can also surround the silicon oxide layer so that the phosphoric acid solution can contact the silicon oxide layer only after the silicon nitride layer is etched away. In other suitable application scenarios, the silicon nitride layer and the silicon oxide layer can also be arranged side by side in a contacting or non-contacting manner so that they will contact the phosphoric acid solution at the same time, but the thickness of the silicon oxide layer etched is much smaller than that of the silicon nitride layer. In other words, the method for improving the etching selectivity of silicon nitride and silicon oxide provided in the embodiments of the present application does not limit specific application scenarios. Existing semiconductor manufacturing technologies or semiconductor manufacturing technologies to be developed in the future can all be based on the embodiments of the present application so that the silicon nitride layer is doped with a carbon source and / or the silicon oxide layer uses porous silicon oxide to achieve a higher etching selectivity of the silicon nitride layer and the silicon oxide layer.

[0046] Since etching silicon nitride requires hot phosphoric acid above 40°C, the phosphoric acid solution needs to be heated to above 40°C before etching the silicon nitride layer. In some examples, the phosphoric acid solution is preheated and the preheating is stopped when the temperature is greater than 40°C. The execution process of step S120 includes: contacting the preheated phosphoric acid solution with the silicon nitride layer to etch the silicon nitride layer. Further, the phosphoric acid solution can be preheated to 60°C-100°C, and the preheated phosphoric acid solution is continuously heated by microwaves to 120°C-180°C during the etching of the silicon nitride layer. For example, the phosphoric acid solution is preheated to one of 60°C, 80°C and 100°C and is no longer preheated. After that, the substrate is placed in the preheated phosphoric acid solution for etching and the phosphoric acid solution is heated to one of 120°C, 150°C and 180°C by microwaves during the etching process and is no longer heated. The temperature of the phosphoric acid solution continues to rise during the etching process, thereby ensuring that the etching of the silicon nitride layer proceeds quickly; the phosphoric acid solution is preheated to a temperature greater than 40°C before contacting the substrate to etch the silicon nitride layer, so that the phosphoric acid solution can react with the silicon nitride layer in the substrate upon contacting the substrate, thereby avoiding the temperature of the silicon nitride layer and the silicon oxide layer being consistent due to long-term heat conduction before the phosphoric acid solution reacts with the silicon nitride, thereby reducing the etching rate difference between the silicon nitride layer and the silicon oxide layer during the etching process.

[0047] It should be understood that during the etching process, the silicon nitride layer and the silicon oxide layer will be heated by microwaves at the same time during the period when the phosphoric acid solution is heated by microwaves, and the temperature will be increased mainly due to the microwave heating. Since the heating efficiency is high for a dielectric constant, the silicon nitride layer with a larger dielectric constant will have a larger temperature difference with the silicon oxide layer with a smaller dielectric constant after a period of microwave heating. That is, the dielectric constant difference between the silicon nitride layer and the silicon oxide layer is utilized to achieve a larger temperature difference between the silicon nitride layer and the silicon oxide layer during the microwave heating period, thereby affecting the etching rate of the silicon nitride layer and the silicon oxide layer. The overall manifestation is that the heating efficiency is high for a dielectric constant and thus the etching rate is high, thereby achieving an improvement in the etching selectivity ratio of the silicon nitride layer and the silicon oxide layer.

[0048] Table 1 shown below exemplarily lists the etching rates of various materials by hot phosphoric acid without microwave heating during the etching process and the etching rates by hot phosphoric acid with microwave heating during the etching process, wherein the phosphoric acid solution is heated to a temperature between 120°C and 180°C in the case of microwave heating, and the composite material in the table is a composite material of carbon nanotubes and silicon nitride and the proportion of carbon nanotubes in the composite material is a value between 0.1% and 10%.

[0049] Table 1

[0050] Non-porous silica Porous silica Silicon Nitride Composite Materials No microwave heating 5 angstroms / minute 4.5 angstroms / minute 50 angstroms / minute 45 angstroms / minute Microwave heating 3 angstroms / minute 2 angstroms / minute 50 angstroms / minute 70 angstroms / minute

[0051] Referring to Table 1, in the absence of microwave heating, the composite material is etched by hot phosphoric acid at a rate of 45 angstroms / minute, while the undoped silicon nitride is etched by hot phosphoric acid at a rate of 50 angstroms / minute, so the etching rate of the composite material is not increased compared to the undoped silicon nitride; in addition, in the absence of microwave heating, the porous silicon oxide is etched by hot phosphoric acid at a rate of 4.5 angstroms / minute, while the non-porous silicon oxide is etched by hot phosphoric acid at a rate of 5 angstroms / minute, so the etching rate of the porous silicon oxide is only reduced by 0.5 angstroms / minute compared to the non-porous silicon oxide.

[0052] Continuing to refer to Table 1, in the case of microwave heating, the rate at which the composite material is etched by hot phosphoric acid is 70 angstroms / minute, while the rate at which the undoped silicon nitride is etched by hot phosphoric acid is 50 angstroms / minute, that is, the rate at which the undoped silicon nitride is etched by hot phosphoric acid does not change due to microwave heating, but the rate at which the composite material is etched by hot phosphoric acid is significantly increased due to microwave heating, so that the etching rate of the composite material under microwave heating is significantly increased compared to that of the undoped silicon nitride. In addition, in the case of microwave heating, the rate at which the porous silicon oxide is etched by hot phosphoric acid is 2 angstroms / minute, while the rate at which the non-porous silicon oxide is etched by hot phosphoric acid is 3 angstroms / minute, that is, the etching rates of the porous silicon oxide and the non-porous silicon oxide are both reduced due to microwave heating, and the porous silicon oxide is reduced more, so that the etching rate of the porous silicon oxide under microwave heating is significantly lower than that of the non-porous silicon oxide.

[0053] The etching rates of silicon nitride and porous silicon oxide in Table 1 with microwave heating are compared, and the difference in etching rate is 48 angstroms / minute; the etching rates of the composite material and non-porous silicon oxide in Table 1 with microwave heating are compared, and the difference in etching rate is 67 angstroms / minute; the etching rates of the composite material and porous silicon oxide in Table 1 with microwave heating are compared, and the difference in etching rate is 68 angstroms / minute. In addition, the etching rates of silicon nitride and non-porous silicon oxide in Table 1 without microwave heating are compared, and the difference in etching rate is 45 angstroms / minute. It can be seen that: in the case of microwave heating, the silicon nitride layer doped with carbon nanotubes and / or the silicon oxide layer using porous silicon oxide can significantly improve the etching selectivity of the silicon nitride layer and the silicon oxide layer in the phosphoric acid solution.

[0054] The method for improving the etching selectivity of silicon nitride and silicon oxide provided in the embodiment of the present application can improve the etching selectivity of silicon nitride layer and silicon oxide layer without introducing expensive additives into the phosphoric acid solution, thus solving the technical problems of high cost and high pollution in the existing method.

[0055] Another embodiment of the present application further provides a mask layer etching method. Figure 5 FIG. 1 is a flow chart of a mask layer etching method provided in an embodiment of the present application. Figure 5 As shown, the mask layer etching method includes:

[0056] Step S210, providing a mask layer, the mask layer covers the protective layer, wherein the mask layer includes a silicon nitride layer doped with a carbon source, and / or the protective layer includes a silicon oxide layer using porous silicon oxide;

[0057] In step S220, the mask layer is etched using a phosphoric acid solution, and during the etching process, the phosphoric acid solution, the mask layer, and the protective layer are heated by microwaves.

[0058] Specifically, the carbon source doped in the silicon nitride layer can be carbon nanotubes and the proportion of carbon nanotubes in the silicon nitride layer doped with the carbon source is 0.1%-10%, so that the silicon nitride layer doped with the carbon source has a larger dielectric constant than undoped silicon nitride. In addition, the phosphoric acid solution can be preheated and stopped when the temperature is greater than 40°C. The execution process of step S220 includes: contacting the preheated phosphoric acid solution with the mask layer to etch the mask layer. In some examples, the phosphoric acid solution is preheated to 60°C-100°C, and the preheated phosphoric acid solution is continued to be heated by microwaves during the etching of the mask layer and heated to 120°C-180°C.

[0059] Furthermore, the mask layer also includes an undoped silicon nitride layer, and the undoped silicon nitride layer covers the silicon nitride layer doped with a carbon source. Since the undoped silicon nitride layer has better corrosion resistance than the silicon nitride layer doped with a carbon source, the pattern on the mask layer will not be damaged when the mask layer is used as a mask to etch the protective layer and the semiconductor structure covered by the protective layer after patterning, which is conducive to the precise patterning of the semiconductor structure.

[0060] Furthermore, the protective layer also includes a silicon oxide layer made of non-porous silicon oxide, and the silicon oxide layer made of porous silicon oxide covers the silicon oxide layer made of non-porous silicon oxide. Since the silicon oxide layer made of non-porous silicon oxide has better density than the silicon oxide layer made of porous silicon oxide, it can ensure that the semiconductor structure covered by the protective layer is better protected.

[0061] Figures 6a to 6c A schematic diagram of each step in a method for etching a mask layer in an embodiment of the present application is shown.

[0062] like Figure 6a As shown, a silicon oxide layer 22b using non-porous silicon oxide is formed on the surface of the substrate 21 as a pad silicon oxide layer.

[0063] Then, if Figure 6b As shown, a silicon oxide layer 22a using porous silicon oxide is formed on the surface of a silicon oxide layer 22b using non-porous silicon oxide, and then a composite film layer of carbon nanotubes and silicon nitride is deposited on the surface of the silicon oxide layer 22a using porous silicon oxide to form a silicon nitride layer 23a doped with a carbon source, and undoped silicon nitride is deposited on the surface of the silicon nitride layer 23a doped with a carbon source to form an undoped silicon nitride layer 23b, wherein the silicon oxide layer 22a using porous silicon oxide and the silicon oxide layer 22b using non-porous silicon oxide are used together as a protective layer 22, and the silicon nitride layer 23a doped with a carbon source and the undoped silicon nitride layer 23b are used together as a mask layer 23.

[0064] In the example where the mask layer 23 is used to manufacture a shallow trench isolation structure, after the undoped silicon nitride layer 23b is formed, a patterning step is performed to transfer the pattern on the mask plate to the mask layer 23. Thereafter, the patterned mask layer 23 is used to form a groove in the substrate 21, and an insulating material such as silicon oxide is filled in the formed groove. A grinding process such as chemical mechanical polishing (CMP) is used to flatten the surface to form a shallow trench isolation structure.

[0065] After the mask layer 23 is used as a mask to form a corresponding semiconductor structure, Figure 6c As shown, the undoped silicon nitride layer 23b and the silicon nitride layer 23a doped with a carbon source are removed by a phosphoric acid solution, and the etching stops at the silicon oxide layer 22a using porous silicon oxide, so the silicon oxide layer 22a using porous silicon oxide is used as an etching stop layer under the etching of the phosphoric acid solution. In the process of removing the undoped silicon nitride layer 23b and the silicon nitride layer 23a doped with a carbon source by using a phosphoric acid solution, the phosphoric acid solution, the mask layer 23 and the protective layer 22 are heated by microwaves, so that the silicon nitride layer 23a doped with a carbon source and the silicon oxide layer 22a using porous silicon oxide have a large difference in etching rate as shown in Table 1.

[0066] The thickness of the silicon oxide layer 22b made of non-porous silicon oxide can be set according to the thickness of the existing protective layer in the semiconductor structure manufacturing process, for example, set to a value between 1 angstrom and 100 angstroms.

[0067] Compared to Figure 1a The mask layer 13 shown is made of undoped silicon nitride. Figure 6b The mask layer 23 shown also includes a silicon nitride layer 23a doped with a carbon source; Figure 1a The protective layer 14 shown is made of non-porous silicon oxide. Figure 6b The protective layer 22 shown also includes a silicon oxide layer 22a made of porous silicon oxide. Figure 1a The mask layer 13 and the protective layer 14 shown, Figure 6b The main difference between the mask layer 23 and the protective layer 22 shown is that a silicon nitride layer 23a doped with a carbon source and a silicon oxide layer 22a using porous silicon oxide are inserted between the silicon oxide layer 22b using non-porous silicon oxide and the undoped silicon nitride layer 23b, thereby utilizing the difference in etching rate of the silicon nitride layer 23a doped with a carbon source and the silicon oxide layer 22a using porous silicon oxide under microwave heating to achieve a higher etching selectivity ratio between the mask layer 23 and the protective layer 22.

[0068] The mask layer etching method provided in the embodiment of the present application has a high etching selectivity ratio between the mask layer 23 and the protective layer 22, so that the mask layer 23 can be etched away when the covering protective layer 22 suffers minor damage. In particular, since it is not necessary to introduce expensive additives into the phosphoric acid solution during the entire etching process of the mask layer 23, it has the advantages of lower cost and less pollution while ensuring that the protective layer 22 suffers minor damage.

[0069] The embodiments of the present application are described above, and these embodiments do not describe all the details in detail, nor do they limit the application to the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that those skilled in the art can make good use of the present application and the modifications based on the present application. The present application is only limited by the claims and their full scope and equivalents.

Claims

1. A method for improving the etching selectivity ratio of silicon nitride and silicon oxide, comprising: Providing a substrate, the substrate comprising a silicon nitride layer and a silicon oxide layer; Preheating the phosphoric acid solution, wherein the temperature of the preheated phosphoric acid solution is 60° C.-100° C.; The preheated phosphoric acid solution is brought into contact with the silicon nitride layer to etch the silicon nitride layer, and during the etching process, the phosphoric acid solution, the silicon nitride layer, and the silicon oxide layer are heated by microwaves; The preheated phosphoric acid solution is further heated by microwaves to 120° C.-180° C. during the etching of the silicon nitride layer; The silicon nitride layer is doped with a carbon source, and / or the silicon oxide layer is made of porous silicon oxide.

2. The method for improving the etching selectivity ratio of silicon nitride and silicon oxide according to claim 1, wherein: The carbon source is carbon nanotubes, and the proportion of carbon nanotubes in the silicon nitride layer is 0.1%-10%.

3. A mask layer etching method, wherein the mask layer covers a protective layer, the mask layer is a silicon nitride layer, and the protective layer is a silicon oxide layer, the method comprising: Preheating the phosphoric acid solution, wherein the temperature of the preheated phosphoric acid solution is 60° C.-100° C.; The preheated phosphoric acid solution is brought into contact with the mask layer to etch the mask layer, and during the etching process, the phosphoric acid solution, the mask layer, and the protective layer are heated by microwaves; The preheated phosphoric acid solution is further heated by microwaves to 120° C.-180° C. during the etching of the mask layer; The mask layer includes a silicon nitride layer doped with a carbon source, and / or the protective layer includes a silicon oxide layer using porous silicon oxide.

4. The mask layer etching method according to claim 3, wherein: The carbon source is carbon nanotubes, and the proportion of carbon nanotubes in the silicon nitride layer doped with the carbon source is 0.1%-10%.

5. The mask layer etching method according to claim 3, wherein: The mask layer further includes an undoped silicon nitride layer, and the undoped silicon nitride layer covers the silicon nitride layer doped with a carbon source.

6. The mask layer etching method according to claim 3, wherein: The protective layer further comprises a silicon oxide layer made of non-porous silicon oxide, and the silicon oxide layer made of porous silicon oxide covers the silicon oxide layer made of non-porous silicon oxide.

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