Peak current sampling circuit, switching power supply controller and switching power supply

Abstract

The invention discloses a peak current sampling circuit, a switching power supply controller and a switching power supply. The switching power supply adopts a power switch tube to control electric energy transmission from an input end to an output end so as to generate an output voltage according to an input voltage, and the peak current sampling circuit comprises a voltage sampling module, an output voltage sampling module and a peak current sampling module, the sampling module is used for synchronously sampling the drain-source voltage difference of the power switch tube according to the turn-on and turn-off actions of the power switch tube so as to obtain a first sampling signal with a positive temperature coefficient; and the temperature compensation module is used for performing temperature compensation on the first sampling signal to obtain a second sampling signal with a zero temperature coefficient, and the second sampling signal carries peak current information of the switching power supply. Peak current sampling can be realized without arranging a sampling resistor in the switching power supply, so that the power consumption and the cost of the circuit can be reduced, and the sampling precision of the circuit can be ensured not to be influenced at the same time.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and more specifically, to a peak current sampling circuit, a switching power supply controller and a switching power supply. Background Art

[0002] With the demand for power electronic products and the development of semiconductor technology, power management chips are more widely used in portable computers, mobile phones, personal digital assistants and other portable or non-portable electronic devices. The switching power converter uses a power switch tube to control the transmission of power from the input to the output, thereby providing a constant output voltage and / or output current at the output. In order to achieve efficient and stable output, it is usually necessary to monitor and adjust the working state of the converter. Peak current control is a common control method that adjusts the output voltage by monitoring the peak current of the power switch tube. However, if Figure 1 As shown in the figure, the traditional peak current sampling method usually requires a sampling resistor Rcs to be connected in series at the source end of the power switch tube in order to measure the current. Although this method is simple, it has some disadvantages. First, the sampling resistor will introduce additional power loss and reduce the overall efficiency of the system. Secondly, the presence of the sampling resistor will increase the complexity of the circuit, especially in high-power applications, where the power level requirements of the sampling resistor are high, and the volume and cost also increase accordingly. In addition, the sampling resistor may also introduce noise and interference, affecting the accuracy of current sampling. Summary of the invention

[0003] In view of this, an object of the present invention is to provide a peak current sampling circuit, a switching power supply controller and a switching power supply, which can improve the sampling accuracy of the circuit while saving sampling resistors, improve circuit efficiency and reduce costs.

[0004] According to one aspect of the present invention, a peak current sampling circuit is provided, comprising: a voltage sampling module, wherein an input end of the voltage sampling module is coupled to a first end of a power switch tube, a second end of the power switch tube is coupled to a first reference ground, and the voltage sampling module samples a voltage difference between the first end and the second end of the power switch tube during a conduction period of the power switch tube to obtain a first sampling signal; and a temperature compensation module, configured to perform temperature compensation on the first sampling signal to obtain a second sampling signal with a zero temperature coefficient.

[0005] Optionally, the second sampling signal represents peak current information of the switching power supply.

[0006] Optionally, the first sampling signal has a positive temperature coefficient.

[0007] Optionally, the voltage sampling module includes: a first transistor and a second transistor connected in series between an input end of an input voltage and an output end of the first sampling signal, wherein the first transistor is in a normally-on state; a third transistor connected between the output end of the first sampling signal and a first reference ground; and a logic unit for controlling the on and off of the second transistor and the third transistor according to a switch control signal and / or a switch drive signal, wherein the second transistor and the third transistor are turned on alternately, and the second transistor is used to be turned on when the power switch tube is turned on, and the third transistor is used to be turned on when the power switch tube is turned on.

[0008] Optionally, when the logic unit controls the on and off of the second transistor and the third transistor according to the switch control signal and the switch drive signal, the logic unit controls the turn-on moment of the second transistor and the turn-off moment of the third transistor according to the switch drive signal, and the voltage sampling module starts to sample the voltage difference between the first end and the second end of the power switch tube; the logic unit controls the turn-off moment of the second transistor and the turn-on moment of the third transistor according to the switch control signal, and the voltage sampling module ends sampling the voltage difference between the first end and the second end of the power switch tube.

[0009] Optionally, the logic unit includes: a buffer, an input end of the buffer is used to receive the switch drive signal; a NAND gate, a first input end of the NAND gate is connected to the output end of the buffer, a second input end of the NAND gate is used to receive the switch control signal, and an output end of the NAND gate is connected to the control end of the third transistor; and an inverter, an input end of the inverter is connected to the output end of the NAND gate, and an output end of the inverter is connected to the control end of the second transistor.

[0010] Optionally, the temperature compensation module includes: a voltage-to-current conversion unit, used to convert the first sampling signal in voltage form into a first current signal; a current mirror unit, the current mirror unit including a first current end and a second current end, the first current end and the voltage-to-current conversion unit are connected at a first node, and the current mirror unit is used to mirror the first current signal into a second current signal; and a first resistor, the first resistor and the second current end of the current mirror unit are connected at a second node, and the first resistor is used to convert the second current signal into the second sampling signal in voltage form.

[0011] Optionally, it also includes: a dynamic acceleration module connected to the first node and the second node, and the dynamic acceleration module is used to make the transistor in the current mirror unit in a normally-on state to improve the conversion speed of the temperature compensation module.

[0012] Optionally, the voltage-to-current conversion unit includes: a first current source and a fourth transistor connected in series between a power supply voltage and a first reference ground, the control end of the fourth transistor being connected to the first sampling signal; and a fifth transistor and a sixth transistor connected in series between the first node and the first reference ground, the control end of the fifth transistor being connected to a third node between the first current source and the fourth transistor, and the control end of the sixth transistor being connected to the power supply voltage.

[0013] Optionally, the current mirror unit includes: a seventh transistor and an eighth transistor, the first ends of the seventh transistor and the eighth transistor are connected to the power supply voltage, the control ends of the seventh transistor and the eighth transistor are connected to the second end of the seventh transistor, the second end of the seventh transistor is connected to the first node as the first current end, and the second end of the eighth transistor is connected to the second node as the second current end.

[0014] Optionally, the dynamic acceleration module includes: a second current source connected between the first node and a first reference ground; and a third current source connected between the second node and the first reference ground, wherein a current ratio between the second current source and the third current source is equal to a mirror ratio of the current mirror unit.

[0015] Optionally, the first transistor is a depletion-type NMOS transistor, and a control terminal of the first transistor is connected to the first reference ground.

[0016] Optionally, the first transistor is a high-voltage junction field effect transistor.

[0017] Optionally, the second transistor is an enhancement-type NMOS transistor, and the third transistor is an enhancement-type NMOS transistor.

[0018] According to another aspect of the present invention, there is provided a switching power supply controller for controlling a power conversion circuit, wherein the power conversion circuit is used to convert an input voltage into an output voltage, wherein the switching power supply controller comprises: a switching control circuit, used to generate a switching control signal for controlling the switching action of a power switch tube; a driving circuit, connected to a gate of the power switch tube, used to generate a switching driving signal according to the switching control signal to drive the power switch tube to be turned on or off; and a peak current sampling circuit, comprising: a voltage sampling module, wherein an input end of the voltage sampling module is coupled to a drain of the power switch tube, a source end of the power switch tube is coupled to a first reference ground, and the voltage sampling module samples a drain-source voltage difference of the power switch tube during a conduction period of the power switch tube to obtain a first sampling signal; and a temperature compensation module, used to perform temperature compensation on the first sampling signal to obtain a second sampling signal with a zero temperature coefficient.

[0019] Optionally, the second sampling signal represents peak current information of the switching power supply.

[0020] Optionally, the first sampling signal has a positive temperature coefficient.

[0021] Optionally, the voltage sampling module includes: a first transistor and a second transistor connected in series between an input end of an input voltage and an output end of the first sampling signal, wherein the first transistor is in a normally-on state; a third transistor connected between the output end of the first sampling signal and a first reference ground; and a logic unit for controlling the on and off of the second transistor and the third transistor according to a switch control signal and / or a switch drive signal, wherein the second transistor and the third transistor are turned on alternately, and the second transistor is used to be turned on when the power switch tube is turned on, and the third transistor is used to be turned on when the power switch tube is turned on.

[0022] Optionally, when the logic unit controls the on and off of the second transistor and the third transistor according to the switch control signal and the switch drive signal, the logic unit controls the turn-on moment of the second transistor and the turn-off moment of the third transistor according to the switch drive signal, and the voltage sampling module starts to sample the voltage difference between the first end and the second end of the power switch tube; the logic unit controls the turn-off moment of the second transistor and the turn-on moment of the third transistor according to the switch control signal, and the voltage sampling module ends sampling the voltage difference between the first end and the second end of the power switch tube.

[0023] Optionally, the logic unit includes: a buffer, an input end of the buffer is used to receive the switch drive signal; a NAND gate, a first input end of the NAND gate is connected to the output end of the buffer, a second input end of the NAND gate is used to receive the switch control signal, and an output end of the NAND gate is connected to the control end of the third transistor; and an inverter, an input end of the inverter is connected to the output end of the NAND gate, and an output end of the inverter is connected to the control end of the second transistor.

[0024] Optionally, the temperature compensation module includes: a voltage-to-current conversion unit, used to convert the first sampling signal in voltage form into a first current signal; a current mirror unit, the current mirror unit including a first current end and a second current end, the first current end and the voltage-to-current conversion unit are connected at a first node, and the current mirror unit is used to mirror the first current signal into a second current signal; and a first resistor, the first resistor and the second current end of the current mirror unit are connected at a second node, and the first resistor is used to convert the second current signal into the second sampling signal in voltage form.

[0025] Optionally, the peak current sampling circuit further includes: a dynamic acceleration module connected to the first node and the second node, the dynamic acceleration module being used to keep the transistor in the current mirror unit in a normally-on state to increase the conversion speed of the temperature compensation module.

[0026] Optionally, the voltage-to-current conversion unit includes: a first current source and a fourth transistor connected in series between a power supply voltage and a first reference ground, the control end of the fourth transistor being connected to the first sampling signal; and a fifth transistor and a sixth transistor connected in series between the first node and the first reference ground, the control end of the fifth transistor being connected to a third node between the first current source and the fourth transistor, and the control end of the sixth transistor being connected to the power supply voltage.

[0027] Optionally, the current mirror unit includes: a seventh transistor and an eighth transistor, the first ends of the seventh transistor and the eighth transistor are connected to the power supply voltage, the control ends of the seventh transistor and the eighth transistor are connected to the second end of the seventh transistor, the second end of the seventh transistor is connected to the first node as the first current end, and the second end of the eighth transistor is connected to the second node as the second current end.

[0028] Optionally, the dynamic acceleration module includes: a second current source connected between the first node and a first reference ground; and a third current source connected between the second node and the first reference ground, wherein a current ratio between the second current source and the third current source is equal to a mirror ratio of the current mirror unit.

[0029] Optionally, the first transistor is a depletion-type NMOS transistor, and a control terminal of the first transistor is connected to the first reference ground.

[0030] Optionally, the first transistor is a high-voltage junction field effect transistor.

[0031] Optionally, the second transistor is an enhancement-type NMOS transistor, and the third transistor is an enhancement-type NMOS transistor.

[0032] Optionally, it also includes: a power supply circuit, used to provide a power supply voltage to the switch control circuit according to the input voltage.

[0033] Optionally, the power conversion circuit includes a floating Buck-Boost topology, a floating Buck topology, a Boost topology and a flyback topology.

[0034] According to another aspect of the present invention, a switching power supply is provided, comprising: a power conversion circuit, which uses a power switch tube to control the transmission of electric energy from the input end of the power conversion circuit to the output end of the power conversion circuit, thereby generating an output voltage according to the input voltage; and the above-mentioned switching power supply controller.

[0035] In summary, the peak current sampling circuit for a switching power supply proposed in the present application directly samples the drain-source voltage difference of the power switch tube to obtain the peak current information of the switching power supply. Compared with the prior art, peak current control can be achieved without setting a sampling resistor in the switching power supply, which can not only reduce the power consumption of the circuit and reduce the heat generation, improve the overall efficiency of the power supply, reduce the circuit cost and improve the thermal management of the circuit, but also avoid the influence of the accuracy and temperature coefficient of the sampling resistor on the accuracy of the current measurement, thereby improving the sampling accuracy of the circuit.

[0036] In addition, since the on-resistance of the power switch tube in the switching power supply varies greatly with temperature, which leads to a larger sampling deviation, the peak current sampling circuit of the present application uses a temperature compensation module to perform temperature compensation on the output of the voltage sampling module, thereby solving the problem in the prior art that the temperature change causes the on-resistance deviation of the power switch tube to increase, thereby causing a large deviation in sampling accuracy, thereby reducing the circuit cost while ensuring that the sampling accuracy of the circuit is not affected.

[0037] In addition, the peak current sampling circuit of the present application also uses a dynamic acceleration module to provide bias current to the transistors in the temperature compensation module to increase the conversion speed of the temperature compensation module, thereby avoiding the situation where the output signal and input signal of the temperature compensation module are out of sync. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings.

[0039] Figure 1 A schematic diagram of the structure of a switching power supply in the prior art is shown.

[0040] Figure 2 A schematic structural diagram of a switching power supply of a flyback topology without an auxiliary winding according to a first embodiment of the present invention is shown.

[0041] Figure 3 A schematic structural diagram of a switching power supply controller according to an embodiment of the present invention is shown.

[0042] Figure 4 A schematic structural diagram of a peak current sampling circuit according to an embodiment of the present invention is shown.

[0043] Figure 5 Show Figure 4 Circuit diagram of the voltage sampling module in .

[0044] Figure 6 Show Figure 5 Working timing diagram of the voltage sampling module in .

[0045] Figure 7 Show Figure 4 Circuit diagram of the temperature compensation module and dynamic acceleration module.

[0046] Figure 8 A schematic structural diagram of a flyback topology switching power supply with an auxiliary winding according to a second embodiment of the present invention is shown.

[0047] Fig. 9 A schematic structural diagram of a buck topology switching power supply according to a third embodiment of the present invention is shown. DETAILED DESCRIPTION

[0048] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements are represented by the same or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0049] Many specific details of the present invention are described below, such as component structures, materials, dimensions, processing techniques and technologies, in order to more clearly understand the present invention. However, as those skilled in the art will appreciate, the present invention may be implemented without following these specific details.

[0050] It should be understood that in the following description, "circuit" refers to a conductive loop composed of at least one element or subcircuit through electrical connection or electromagnetic connection. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be an intermediate element, and the connection between the elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0051] In the present application, the transistor may include one selected from a bipolar transistor or a field effect transistor, the first end and the second end of the transistor are respectively a high potential end and a low potential end on the current path, and the control end is used to receive a control signal to control the on and off of the transistor. MOSFET (Metal-Oxide-Semiconductor Field-EffectTransistor) includes a first end, a second end and a control end. In the on state of the MOSFET, the current flows from the first end to the second end. The first end, the second end and the control end of the PMOS tube are respectively the source, the drain and the gate, and the first end, the second end and the control end of the NMOS tube are respectively the drain, the source and the gate.

[0052] The present invention may be embodied in various forms, some examples of which will be described below.

[0053] Figure 2 FIG. 2 is a schematic diagram showing the structure of a switching power supply of a flyback topology without an auxiliary winding according to a first embodiment of the present invention. Figure 2 As shown, the switching power supply 200 includes a power conversion circuit 210, a switching power supply controller 220 and a feedback circuit 230. The power conversion circuit 210 is used to provide an output current Iout to a load Ro according to an input voltage Vin, and the switching power supply controller 220 is used to control the working state of the power conversion circuit 210.

[0054] For example, the first embodiment of the present invention provides a switching power supply of a flyback topology without an auxiliary winding, and the power conversion circuit 210 includes a power switch tube Q1, a transformer T1 (including a primary winding L1 and a secondary winding L2), a freewheeling diode D1 and an output capacitor Co.

[0055] The drain of the power switch tube Q1 (such as a transistor, a field effect tube, a thyristor, etc.) is connected to the input voltage Vin, the source is connected to the reference ground VS (for example, the reference ground VS is a floating ground), and the gate is connected to the driving pin of the switching power supply controller 220 to receive the switch drive signal DRV. The power switch tube Q1 is used to control the power transmission from the input end to the output end according to the switch drive signal DRV. The first end of the primary winding L1 is connected to the reference ground VS, and the second end is connected to the reference ground GND1. The anode of the diode D1 is connected to the first end of the secondary winding L2, the cathode of the diode D1 is connected to the first end of the output capacitor Co and the load Ro, and the second end of the output capacitor Co is connected to the second end of the secondary winding L2 and the reference ground GND2.

[0056] The feedback circuit 230 is connected between the reference ground VS and the reference ground GND1, and is used to divide the output voltage Vout to obtain the feedback signal FB. For example, the feedback circuit 230 includes resistors R1 and R2 connected in series between the reference ground VS and the reference ground GND1, and the middle node of the resistors R1 and R2 is used to provide the feedback signal FB.

[0057] The switching power supply controller 220 is connected to the gate of the power switch tube Q1 and is used to generate a switch driving signal DRV applied to the power switch tube Q1 according to the feedback signal FB of the output voltage Vout, so as to control the on and off of the power switch tube Q1.

[0058] Figure 3 FIG. 2 is a schematic diagram showing the structure of a switching power supply controller according to an embodiment of the present invention. Figure 3 As shown, the switching power supply controller 220 includes a peak current sampling circuit 201 , a switch control circuit 202 , a power supply circuit 203 and a drive circuit 204 .

[0059] The peak current sampling circuit 201 is connected to the drain of the power switch tube Q1, and is used to obtain a sampling signal CS representing the peak current information of the power conversion circuit 210 according to the drain-source voltage difference of the power switch tube Q1. Specifically, the peak current sampling circuit 201 synchronously samples the drain-source voltage difference of the power switch tube Q1 according to the on and off actions of the power switch tube Q1 to obtain the sampling signal CS.

[0060] The switch control circuit 202 is used to generate a switch control signal PWM for controlling the switching action of the power switch tube Q1 according to the feedback signal FB and the sampling signal CS, so as to stabilize the output voltage Vout at a set value. In an exemplary embodiment, for a switching power supply controller in a constant off-time control (COT, Constant Off-Time Control) mode, the switch control circuit 202 controls the turn-on moment of the power switch tube Q1 according to a set clock signal, and controls the turn-off moment of the power switch tube Q1 according to the feedback signal FB and the sampling signal CS.

[0061] The power supply circuit 203 is connected to the input voltage Vin and is used to provide a normal working power supply voltage Vcc to the switch control circuit 202 according to the input voltage Vin. In addition, the switch power supply controller 220 also includes an input capacitor Cin connected between the power supply terminal of the switch control circuit 202 and the reference ground VS.

[0062] The input end of the driving circuit 204 is connected to the output of the switch control circuit 202, and the output end of the driving circuit 204 is connected to the gate of the power switch tube Q1. The driving circuit 204 is used to generate a switch driving signal DRV applied to the gate of the power switch tube Q1 according to the output signal PWM of the switch control circuit 202 to control the conduction and shutdown of the power switch tube Q1.

[0063] Figure 4 FIG. 2 is a schematic diagram showing a structure of a peak current sampling circuit according to an embodiment of the present invention. Figure 4 As shown, the peak current sampling circuit 300 includes a voltage sampling module 310 and a temperature compensation module 320 .

[0064] The input end of the voltage sampling module 310 is connected to the drain of the power switch tube Q1, and is used to synchronously sample the drain-source voltage difference of the power switch tube Q1 according to the switching action of the power switch tube Q1 to obtain a first sampling signal CS1 with a positive temperature coefficient.

[0065] The temperature compensation module 320 is used to perform temperature compensation on the first sampling signal CS1 output by the voltage sampling module 310 to obtain a second sampling signal CS2 with a zero temperature coefficient, wherein the second sampling signal CS2 carries the peak current information of the switching power supply.

[0066] It can be seen that the peak current sampling circuit 300 of the present invention uses the temperature compensation module 320 to perform temperature compensation on the output of the voltage sampling module 310, thereby solving the problem in the prior art that temperature changes cause the on-resistance deviation of the power switch tube to increase, thereby causing a large deviation in sampling accuracy.

[0067] In an optional embodiment, the peak current sampling circuit 300 further includes a dynamic acceleration module 330. The dynamic acceleration module 330 improves the conversion speed of the temperature compensation module 320 by providing a bias current to the transistor in the temperature compensation module 320, thereby avoiding the situation where the output signal of the temperature compensation module 320 is out of sync with the input signal.

[0068] Figure 5 Show Figure 4 The circuit diagram of the voltage sampling module in Figure 6 Show Figure 5 The working timing diagram of the voltage sampling module in FIG. Figure 5 As shown, the voltage sampling module 310 includes: a transistor Q2, a transistor Q3, a transistor Q4 and a logic unit 311. Among them, the transistor Q2 and the transistor Q3 are connected in series between the input end of the input voltage Vin and the output end of the first sampling signal CS1, the first end of the transistor Q4 is connected to the output end of the first sampling signal CS1, and the second end of the transistor Q4 is connected to the floating ground VS. The logic unit 311 is used to control the conduction or shutoff of the transistor Q3 and the transistor Q4 according to the switch control signal PWM and / or the switch drive signal DRV.

[0069] Among them, transistor Q2 is a high-voltage MOS tube, which is in a "normally on state" and can be equivalent to a protection resistor, transistor Q3 is a medium-voltage MOS tube, and transistor Q4 is a low-voltage MOS tube. It should be noted that in this embodiment, the MOS tube is divided into a high-voltage MOS tube, a medium-voltage MOS tube and a low-voltage MOS tube based on the rated value of the maximum drain-source voltage (Vds) of the MOS tube. In an exemplary embodiment, the operating voltage range of the low-voltage MOS tube is generally between 0V and 5V, the operating voltage range of the medium-voltage MOS tube is between 0V and 30V, and the operating voltage range of the high-voltage MOS tube is above 200V.

[0070] Further, the transistor Q2 of the present embodiment is a depletion-type NMOS transistor, such as a JEFT transistor (Junction Field-Effect Transistor), the transistor Q3 is an enhancement-type NMOS transistor, the transistor Q4 is an enhancement-type NMOS transistor, the drain of the transistor Q2 is connected to the input voltage Vin, the source of the transistor Q2 is connected to the drain of the transistor Q3, the gate of the transistor Q2 is connected to the floating ground VS, the source of the transistor Q3 is connected to the output end of the first sampling signal CS1, the drain of the transistor Q4 is connected to the output end of the first sampling signal CS1, the source of the transistor Q4 is connected to the floating ground VS, and the gate of the transistor Q3 and the gate of the transistor Q4 are connected to the logic unit 311.

[0071] It should be noted that since the switch drive signal DRV is obtained by amplifying the switch control signal PWM, the waveforms of the two are similar, so the logic unit 311 of this embodiment can also control the on and off of the transistor Q3 and the transistor Q4 only according to the switch control signal PWM or the switch drive signal DRV. In the first exemplary implementation, the logic unit 311 controls the on and off of the transistor Q3 and the transistor Q4 according to the switch control signal PWM; in the second exemplary implementation, the logic unit 311 controls the on and off of the transistor Q3 and the transistor Q4 according to the switch drive signal DRV; in the third exemplary implementation, the logic unit 311 controls the on and off of the transistor Q3 and the transistor Q4 according to both the switch control signal PWM and the switch drive signal DRV. Moreover, when the logic unit 311 controls the on and off of the transistor Q3 and the transistor Q4 according to the switch control signal PWM and the switch drive signal DRV at the same time, the on time of the transistor Q3 and the off time of the transistor Q4 are controlled according to the switch drive signal DRV, and the off time of the transistor Q3 and the on time of the transistor Q4 are controlled according to the switch control signal PWM.

[0072] The circuit structure of the logic unit 311 of this embodiment is described below by taking the third exemplary implementation as an example. Specifically, the logic unit 311 includes a buffer G1, a NAND gate G2 and an inverter G3. Among them, the input end of the buffer G1 is used to receive the switch drive signal DRV, the first input end of the NAND gate G2 is connected to the output end of the buffer G1, the second input end of the NAND gate G2 is used to receive the switch control signal PWM, the output end of the NAND gate G2 is connected to the gate of the transistor Q4 and the input end of the inverter G3, and the output end of the inverter G3 is connected to the gate of the transistor Q3. It can be seen that the gates of the transistors Q3 and Q4 of this embodiment are applied with control signals of opposite phases to each other, so in actual operation, the transistors Q3 and Q4 are non-overlappingly turned on.

[0073] It should be noted that, for the first or second exemplary implementation described above, it is only necessary that the input end of the buffer G1 and the second input end of the NAND gate G2 simultaneously receive the switch control signal PWM or the switch drive signal DRV.

[0074] refer to Figure 6, wherein the switch control signal PWM is a logic signal for controlling the power switch tube to be turned on and off, the switch drive signal DRV is an output signal of the drive circuit, Vin is the input voltage of the switch power supply, and CS1 is the output of the voltage sampling module 310. When the power switch tube Q1 is turned off, the switch control signal PWM is at a low level, the switch drive signal DRV is also at a low level, the NAND gate G2 outputs a high level, controls the transistor Q4 to be turned on, and the inverter G3 outputs a low level, controls the transistor Q3 to be turned off, thereby realizing the signal isolation between the input voltage Vin and the first sampling signal CS1, and the first sampling signal CS1 is pulled down to the ground through the transistor Q4. When the power switch tube Q1 is turned on, the switch control signal PWM and the switch drive signal DRV are both at a high level, and after a delay of a period of time through the buffer G1, the NAND gate G2 is controlled to output a low level, the transistor Q4 is turned off, and the inverter G3 outputs a high level, the transistor Q3 is turned on, so the first sampling signal CS1 is pulled up to a level equal to the input voltage Vin.

[0075] Figure 7 Show Figure 4 The circuit diagram of the temperature compensation module and dynamic acceleration module in FIG. Figure 7 As shown, the temperature compensation module 320 of this embodiment includes a voltage-current conversion unit 321, a current mirror unit 322 and a resistor R3. The voltage-current conversion unit 321 is used to convert the first sampling signal CS1 in the form of a voltage into a first current signal Iq1, and the current mirror unit 322 includes a first current end and a second current end, wherein the first current end and the voltage-current conversion unit 321 are connected to a node A1, and the current mirror unit 322 is used to proportionally mirror the first current signal Iq1 into a second current signal Iq2 on the second current end. One end of the resistor R3 is connected to the second current end of the current mirror unit 322 at a node A2, and the other end of the resistor R3 is connected to the floating ground VS, and is used to convert the second current signal Iq2 into a second sampling signal CS2 in the form of a voltage.

[0076] Specifically, the voltage-current conversion unit 321 includes a current source I1, transistors T1 and T2, and a transistor Q7. Among them, the transistor T1 is a PNP tube (PNP bipolar junction transistor), the transistor T2 is an NPN tube (NPN bipolar junction transistor), and the transistor Q7 is an NMOS tube. The first end of the current source I1 is connected to the power supply voltage VDD, the second end of the current source I1 is connected to the emitter of the transistor T1 and the base of the transistor T2, the base of the transistor T1 is connected to the first sampling signal CS1, and the collector of the transistor T1 is connected to the floating ground VS. The collector of the transistor T2 is connected to the node A1, the emitter of the transistor T2 is connected to the drain of the transistor Q7, the gate of the transistor Q7 is connected to the power supply voltage VDD, and the source of the transistor Q7 is connected to the floating ground VS. Among them, transistors T1 and T2 form a voltage follower circuit, the current source I1 provides a fixed bias current for the transistor T1, the emitter voltage of the transistor T2 is approximately equal to the voltage value of the first sampling signal CS1, the emitter of the transistor T2 is connected to the drain of the transistor Q7, and the voltage signal is converted into a current signal Iq1, wherein the gate of the transistor Q7 is connected to the power supply voltage VDD, and works in a deep linear region, and its impedance presents a positive temperature coefficient.

[0077] The current mirror unit 322 includes transistors Q5 and Q6. The transistors Q5 and Q6 are, for example, PMOS tubes. The sources of the transistors Q5 and Q6 are connected to the power supply voltage VDD. The drain of the transistor Q5 is connected to the node A1 as the first current end of the current mirror unit 322. The drain of the transistor Q6 is connected to the node A2 as the second current end of the current mirror unit 322. The gates of the transistors Q5 and Q6 are connected to the drain of the transistor Q5. The mirror circuit formed by the transistors Q5 and Q6 mirrors the first current signal Iq1 into a second current signal Iq2 in proportion, and then converts the second current signal Iq2 into a second sampling signal CS2 in the form of a voltage through the resistor R3. Assuming that the mirror ratio of the transistors Q5 and Q6 is K, then Iq2=K*Iq1, and then CS2=Iq2*R3=K*Iq1*R3=(CS1 / R Q7 )*K*R3. Among them, R Q7 Since the first sampling signal CS1 has a positive temperature coefficient, the on-resistance of the transistor Q7 has a positive temperature coefficient, the resistor R3 and the mirror ratio K have a zero temperature coefficient, the second sampling signal CS2 can have a zero temperature coefficient that is independent of temperature.

[0078] The dynamic acceleration module 330 includes constant current sources I2 and I3 connected to nodes A1 and A2 respectively, the current source I2 is connected between node A1 and floating ground, and the current source I3 is connected between node A2 and floating ground. The current sources I2 and I3 are used to provide bias to transistors Q5 and Q6 in the current mirror unit 322, so that transistors Q5 and Q6 are in a normally on state. When the input of the temperature compensation module 320 changes, the gate potential of transistors Q5 and Q6 can change rapidly, avoiding extra time consumption from the cut-off state to the on state, so that the output of the temperature compensation module 320 can be quickly established. Furthermore, the current ratio of the current sources I2 and I3 is equal to the mirror ratio of the current mirror unit 322, that is, I3=K*I2, so that the sampling accuracy of the circuit will not be affected.

[0079] Figure 8 FIG. 2 is a schematic diagram showing the structure of a switch power supply of a flyback topology with an auxiliary winding according to a second embodiment of the present invention. Figure 8 ,exist Figure 8 In the switching power supply of the second embodiment shown, the switching power supply controller 220 and the peak current sampling circuit 300 of the above embodiment are applied to a switching power supply of a flyback topology with an auxiliary winding, and the switching power supply 400 includes a power conversion circuit 410, a switching power supply controller 420 and a feedback circuit 430. Similarly, the power conversion circuit 410 is used to provide an output current Iout to a load Ro according to an input voltage Vin, and the switching power supply controller 420 is used to control the working state of the power conversion circuit 410.

[0080] The switching power supply 400 is substantially the same as the switching power supply 200 of the first embodiment, except that: in the switching power supply 400, the transformer T1 is located at the high side, the switching power supply controller 420 and the power switch tube Q1 are located at the low side, and the first end of the primary winding L1 is connected to the input voltage Vin, the second end of the primary winding L1 is connected to the DRAIN end of the switching power supply controller 420 and the drain of the power switch tube Q1, and the source of the power switch tube Q1 is connected to the reference ground VS. In addition, the transformer T1 of this embodiment further includes an auxiliary winding L3, the first end of the auxiliary winding L3 is connected to the power supply end Vcc of the switching power supply controller 420 via the diode D2, the second end of the auxiliary winding L3 is connected to the reference ground GND1, and the feedback circuit 430 is used to divide the voltage of the auxiliary winding L3 to obtain the feedback signal FB. In addition, the switching power supply controller 420 of this embodiment is substantially the same as the switching power supply controller 220 of the first embodiment, and will not be described in detail here.

[0081] Fig. 9 FIG. 4 is a schematic diagram showing the structure of a buck topology switching power supply according to a third embodiment of the present invention. Fig. 9 ,exist Fig. 9In the switching power supply of the second embodiment shown, the switching power supply controller 220 and the peak current sampling circuit 300 of the above embodiment are applied to a switching power supply of a buck topology, and the switching power supply 500 includes a power conversion circuit 510, a switching power supply controller 520 and a feedback circuit 530. Similarly, the power conversion circuit 510 is used to provide an output current Iout to a load Ro according to an input voltage Vin, and the switching power supply controller 520 is used to control the working state of the power conversion circuit 510.

[0082] The switching power supply 500 is different from the switching power supply 200 of the first embodiment in that the power conversion circuit 510 includes a power switch tube Q1, an inductor L1, a freewheeling diode D1 and an output capacitor Co. The drain of the power switch tube Q1 (such as a transistor, a field effect tube, a thyristor, etc.) is connected to the input voltage Vin, the source is connected to the reference ground VS (for example, the reference ground VS is a floating ground), and the gate is connected to the driving pin of the switching power supply controller 520 to receive the switch drive signal DRV. The power switch tube Q1 is used to control the power transmission from the input end to the output end according to the switch drive signal DRV. The first end of the inductor L1 is connected to the reference ground VS, the second end is connected to the output capacitor Co and the first end of the load Ro, the cathode of the diode D1 is connected to the reference ground VS and the first end of the inductor L1, and the anode of the diode D1 is connected to the second end of the output capacitor Co and the load Ro and the reference ground GND1. The feedback circuit 530 is connected between the two ends of the inductor L1, and is used to divide the voltage of the inductor L1 to obtain the feedback signal FB. In addition, the switching power supply controller 520 of this embodiment is substantially the same as the switching power supply controller 220 of the first embodiment, and will not be described in detail herein.

[0083] It should be noted that, although the present invention is described with reference to switching power supplies of buck topology and flyback topology in the above embodiments, the present invention is not limited thereto, and those skilled in the art can apply the peak current sampling circuit and switching power supply controller of the present invention to switching power supplies of floating Buck-Boost topology, floating Buck topology, Boost topology, and flyback topology as needed.

[0084] In an optional embodiment, the peak current sampling circuit, the switching power supply controller and the switching power supply in the above embodiments can be applied in an Ethernet power supply system to perform power conversion and regulation functions.

[0085] In summary, the peak current sampling circuit for a switching power supply proposed in the present application directly samples the drain-source voltage difference of the power switch tube to obtain the peak current information of the switching power supply. Compared with the prior art, peak current control can be achieved without setting a sampling resistor in the switching power supply, which can not only reduce the power consumption of the circuit and reduce the heat generation, improve the overall efficiency of the power supply, reduce the circuit cost and improve the thermal management of the circuit, but also avoid the influence of the accuracy and temperature coefficient of the sampling resistor on the accuracy of the current measurement, thereby improving the sampling accuracy of the circuit.

[0086] In addition, since the temperature of the power switch tube in the switching power supply varies greatly, the on-resistance deviation of the power switch tube will increase. The peak current sampling circuit of the present application uses a temperature compensation module to perform temperature compensation on the output of the voltage sampling module, thereby solving the problem in the prior art that the temperature change causes the on-resistance deviation of the power switch tube to increase, thereby causing a large deviation in sampling accuracy, thereby reducing the circuit cost while ensuring that the sampling accuracy of the circuit is not affected.

[0087] In addition, the peak current sampling circuit of the present application also uses a dynamic acceleration module to provide bias current to the transistor in the temperature compensation module to increase the conversion speed of the temperature compensation module, thereby avoiding the situation where the output signal and input signal of the temperature compensation module are out of sync.

[0088] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0089] According to the embodiments of the present invention as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A peak current sampling circuit, comprising: a voltage sampling module, wherein an input end of the voltage sampling module is coupled to a first end of the power switch tube, a second end of the power switch tube is coupled to a first reference ground, and the voltage sampling module samples a voltage difference between the first end and the second end of the power switch tube during a conduction period of the power switch tube to obtain a first sampling signal; as well as The temperature compensation module is used to perform temperature compensation on the first sampling signal to obtain a second sampling signal with a zero temperature coefficient.

2. The peak current sampling circuit according to claim 1, wherein: The second sampling signal represents peak current information of the switching power supply.

3. The peak current sampling circuit according to claim 1, wherein: The first sampling signal has a positive temperature coefficient.

4. The peak current sampling circuit according to claim 1, wherein: The voltage sampling module comprises: a first transistor and a second transistor connected in series between an input terminal of an input voltage and an output terminal of the first sampling signal, wherein the first transistor is in a normally-on state; a third transistor connected between the output terminal of the first sampling signal and the first reference ground; and a logic unit, configured to control the on and off of the second transistor and the third transistor according to a switch control signal and / or a switch drive signal, The second transistor and the third transistor are turned on alternately, and the second transistor is used to be turned on when the power switch tube is turned on, and the third transistor is used to be turned on when the power switch tube is turned off.

5. The peak current sampling circuit according to claim 4, wherein: When the logic unit controls the on and off of the second transistor and the third transistor according to the switch control signal and the switch drive signal, The logic unit controls the turn-on time of the second transistor and the turn-off time of the third transistor according to the switch drive signal, and the voltage sampling module starts to sample the voltage difference between the first end and the second end of the power switch tube; The logic unit controls the turn-off moment of the second transistor and the turn-on moment of the third transistor according to the switch control signal, and the voltage sampling module ends sampling the voltage difference between the first end and the second end of the power switch tube.

6. The peak current sampling circuit according to claim 5, wherein: The logic unit comprises: a buffer, wherein an input end of the buffer is used to receive the switch driving signal; A NAND gate, wherein a first input terminal of the NAND gate is connected to an output terminal of the buffer, a second input terminal of the NAND gate is used to receive the switch control signal, and an output terminal of the NAND gate is connected to a control terminal of the third transistor; and An inverter, wherein the input end of the inverter is connected to the output end of the NAND gate, and the output end of the inverter is connected to the control end of the second transistor.

7. The peak current sampling circuit according to claim 1, wherein: The temperature compensation module comprises: A voltage-to-current conversion unit, used for converting the first sampling signal in the form of a voltage into a first current signal; a current mirror unit, the current mirror unit comprising a first current terminal and a second current terminal, the first current terminal and the voltage-to-current conversion unit being connected at a first node, the current mirror unit being used to mirror the first current signal into a second current signal; and A first resistor, wherein the first resistor and the second current end of the current mirror unit are connected to a second node, and the first resistor is used for converting the second current signal into the second sampling signal in a voltage form.

8. The peak current sampling circuit according to claim 7, further comprising: A dynamic acceleration module is connected to the first node and the second node, and is used to make the transistor in the current mirror unit be in a normally-on state to improve the conversion speed of the temperature compensation module.

9. The peak current sampling circuit according to claim 7, wherein: The pressure-flow conversion unit comprises: a first current source and a fourth transistor connected in series between a power supply voltage and a first reference ground, wherein a control terminal of the fourth transistor is connected to the first sampling signal; and A fifth transistor and a sixth transistor are connected in series between the first node and the first reference ground, the control end of the fifth transistor is connected to a third node between the first current source and the fourth transistor, and the control end of the sixth transistor is connected to the power supply voltage.

10. The peak current sampling circuit according to claim 7, wherein: The current mirror unit comprises: A seventh transistor and an eighth transistor, wherein the first ends of the seventh transistor and the eighth transistor are connected to a power supply voltage, the control ends of the seventh transistor and the eighth transistor are connected to the second end of the seventh transistor, the second end of the seventh transistor is connected to the first node as the first current end, and the second end of the eighth transistor is connected to the second node as the second current end.

11. The peak current sampling circuit according to claim 8, wherein: The dynamic acceleration module comprises: a second current source connected between the first node and a first reference ground; and a third current source connected between the second node and the first reference ground, The current ratio between the second current source and the third current source is equal to the mirror ratio of the current mirror unit.

12. The peak current sampling circuit according to claim 4, wherein: The first transistor is a depletion-type NMOS transistor, and a control terminal of the first transistor is connected to the first reference ground.

13. The peak current sampling circuit according to claim 12, wherein: The first transistor is a high voltage junction field effect transistor.

14. The peak current sampling circuit according to claim 4, wherein: The second transistor is an enhancement-type NMOS transistor, and the third transistor is an enhancement-type NMOS transistor.

15. A switching power supply controller for controlling a power conversion circuit, wherein the power conversion circuit is used to convert an input voltage into an output voltage, wherein: The switching power supply controller comprises: A switch control circuit, used to generate a switch control signal for controlling the switching action of the power switch tube; A driving circuit connected to the gate of the power switch tube, and used to generate a switch driving signal according to the switch control signal to drive the power switch tube to be turned on or off; and Peak current sampling circuit, including: a voltage sampling module, wherein an input terminal of the voltage sampling module is coupled to the drain of the power switch tube, a source terminal of the power switch tube is coupled to a first reference ground, and the voltage sampling module samples the drain-source voltage difference of the power switch tube during the conduction period of the power switch tube to obtain a first sampling signal; and The temperature compensation module is used to perform temperature compensation on the first sampling signal to obtain a second sampling signal with a zero temperature coefficient.

16. The switching power supply controller according to claim 15, wherein: The second sampling signal represents peak current information of the switching power supply.

17. The switching power supply controller according to claim 15, wherein: The first sampling signal has a positive temperature coefficient.

18. The switching power supply controller according to claim 15, wherein: The voltage sampling module comprises: a first transistor and a second transistor connected in series between an input terminal of an input voltage and an output terminal of the first sampling signal, wherein the first transistor is in a normally-on state; a third transistor connected between the output terminal of the first sampling signal and the first reference ground; and a logic unit, configured to control the on and off of the second transistor and the third transistor according to a switch control signal and / or a switch drive signal, The second transistor and the third transistor are turned on alternately, and the second transistor is used to be turned on when the power switch tube is turned on, and the third transistor is used to be turned on when the power switch tube is turned off.

19. The switching power supply controller according to claim 18, wherein: When the logic unit controls the on and off of the second transistor and the third transistor according to the switch control signal and the switch drive signal, The logic unit controls the turn-on time of the second transistor and the turn-off time of the third transistor according to the switch drive signal, and the voltage sampling module starts to sample the voltage difference between the first end and the second end of the power switch tube; The logic unit controls the turn-off moment of the second transistor and the turn-on moment of the third transistor according to the switch control signal, and the voltage sampling module ends sampling the voltage difference between the first end and the second end of the power switch tube.

20. The switching power supply controller according to claim 19, wherein: The logic unit comprises: a buffer, wherein an input end of the buffer is used to receive the switch driving signal; A NAND gate, wherein a first input terminal of the NAND gate is connected to an output terminal of the buffer, a second input terminal of the NAND gate is used to receive the switch control signal, and an output terminal of the NAND gate is connected to a control terminal of the third transistor; and An inverter, wherein the input end of the inverter is connected to the output end of the NAND gate, and the output end of the inverter is connected to the control end of the second transistor.

21. The switching power supply controller according to claim 15, wherein: The temperature compensation module comprises: A voltage-to-current conversion unit, used for converting the first sampling signal in the form of a voltage into a first current signal; a current mirror unit, the current mirror unit comprising a first current terminal and a second current terminal, the first current terminal and the voltage-to-current conversion unit being connected at a first node, the current mirror unit being used to mirror the first current signal into a second current signal; and A first resistor, wherein the first resistor and the second current end of the current mirror unit are connected to a second node, and the first resistor is used for converting the second current signal into the second sampling signal in a voltage form.

22. The switching power supply controller according to claim 21, wherein the peak current sampling circuit further comprises: A dynamic acceleration module is connected to the first node and the second node, and is used to make the transistor in the current mirror unit be in a normally-on state to improve the conversion speed of the temperature compensation module.

23. The switching power supply controller according to claim 21, wherein: The pressure-flow conversion unit comprises: a first current source and a fourth transistor connected in series between a power supply voltage and a first reference ground, wherein a control terminal of the fourth transistor is connected to the first sampling signal; and A fifth transistor and a sixth transistor are connected in series between the first node and the first reference ground, the control end of the fifth transistor is connected to a third node between the first current source and the fourth transistor, and the control end of the sixth transistor is connected to the power supply voltage.

24. The switching power supply controller according to claim 21, wherein: The current mirror unit comprises: A seventh transistor and an eighth transistor, wherein the first ends of the seventh transistor and the eighth transistor are connected to a power supply voltage, the control ends of the seventh transistor and the eighth transistor are connected to the second end of the seventh transistor, the second end of the seventh transistor is connected to the first node as the first current end, and the second end of the eighth transistor is connected to the second node as the second current end.

25. The switching power supply controller according to claim 22, wherein: The dynamic acceleration module comprises: a second current source connected between the first node and a first reference ground; and a third current source connected between the second node and the first reference ground, The current ratio between the second current source and the third current source is equal to the mirror ratio of the current mirror unit.

26. The switching power supply controller according to claim 18, wherein: The first transistor is a depletion-type NMOS transistor, and a control terminal of the first transistor is connected to the first reference ground.

27. The switching power supply controller according to claim 26, wherein: The first transistor is a high voltage junction field effect transistor.

28. The switching power supply controller according to claim 18, wherein: The second transistor is an enhancement-type NMOS transistor, and the third transistor is an enhancement-type NMOS transistor.

29. The switching power supply controller of claim 15, further comprising: A power supply circuit is used to provide a power supply voltage to the switch control circuit according to the input voltage.

30. The switching power supply controller according to claim 15, wherein: The power conversion circuit includes a floating Buck-Boost topology, a floating Buck topology, a Boost topology and a flyback topology.

31. A switching power supply comprising: A power conversion circuit, using a power switch tube to control the transmission of electric energy from the input end of the power conversion circuit to the output end of the power conversion circuit, thereby generating an output voltage according to the input voltage; as well as A switching power supply controller as claimed in any one of claims 15 to 30.

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