Hybrid decoding method and device for LDPC (Low Density Parity Check) code close to maximum likelihood
By adopting a hybrid decoding method close to the maximum likelihood in the LDPC code, using iterative confidence propagation algorithm and algorithm parameter configuration list, combined with pulse flip processing, the high decoding performance and low complexity of the LDPC code short code are achieved. , solves the high reliability requirement for LDPC code in 6G ubiquitous connection scenarios, and provides a suitable channel encoding solution.
Patent Information
- Application Number
- CN202411176969.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-26
- Publication Date
- 2024-12-06
AI Technical Summary
In the prior art, the decoding performance and complexity of LDPC codes in 6G ubiquitous connection scenarios are difficult to balance, and it is impossible to provide a suitable channel encoding solution, especially in the balance between high reliability and low complexity. There are challenges.
Using the close maximum likelihood hybrid decoding method for LDPC code, the preset iterative confidence propagation algorithm and algorithm parameter configuration list is achieved by combining pulse flip processing and iterative confidence propagation decoding to achieve linear growth of list complexity to achieve closeness. ML decoding performance.
It realizes the high decoding performance and low complexity of LDPC codes under short codes, solves the high reliability requirements for LDPC codes in 6G ubiquitous connection scenarios, provides a suitable channel encoding solution, and reduces the complexity of decoding Degree and error platform issues.
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Figure CN119093944A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of digital information transmission, and in particular to a hybrid decoding method and device close to maximum likelihood for LDPC codes, which has high decoding performance close to maximum likelihood and low decoding complexity close to iterative confidence propagation. Background Art
[0002] Traditional LDPC codes (Low Density Parity Check Code) are usually designed and constructed for iterative belief propagation algorithms, which have the advantage of low decoding complexity, but the decoding performance is limited. In the related art, a type of quasi-ML (Quasi-Maximum Likelihood) decoding method can be applied to LDPC decoding, including Ordered Statistics Decoding (OSD), which uses the original soft information of the coded bits to directly construct a list of legal codewords and screen the decoding results. The decoding performance can reach the ML decoding performance, but the complexity is too high and is only applicable to LDPC short codes, such as information bit length not greater than 96; a type of decoding method close to maximum likelihood can also be used for LDPC decoding, including Augmented Belief Propagation Decoding and Saturated Min-Sum Decoding, which uses the original soft information of the coded bits to indirectly obtain candidate legal codewords. The decoding performance can approach the ML decoding performance, but the decoding performance is limited by the complexity. The list complexity that grows linearly with the code length is also only applicable to LDPC short codes, such as information bit length not greater than 192.
[0003] In contrast, Polar codes are designed directly for ML decoding methods, with the advantage of medium-complexity decoding, and the decoding performance can reach ML decoding performance. A quasi-ML decoding method, Successive Cancellation List Decoding, has been successfully applied to CRC-Polar cascade composite codes, or CRC-Polar nested composite codes, where CRC (Cyclic-Redundancy-Code). The decoding complexity of this quasi-ML decoding method is determined by the list size, which can be adjusted according to the storage capacity and computing power of the decoder to achieve an effective compromise between decoding performance and complexity.
[0004] However, in the related technologies, the decoding performance and complexity of LDPC codes cannot be achieved simultaneously to meet the demand for high reliability of LDPC medium and short codes in scenarios such as 6G ubiquitous connectivity. For example, if both low complexity and high performance of decoding are required, both the signal-to-noise ratio threshold performance and error platform performance of decoding need to be taken into account. It cannot provide a channel coding solution for the enhanced new air interface of 6G, and improvement is urgently needed. Summary of the invention
[0005] The present application provides a hybrid decoding method and device for LDPC codes that is close to maximum likelihood, in order to solve the problems in the related technology such as the demand for high reliability of LDPC short codes in scenarios such as 6G ubiquitous connectivity, the inability to achieve both decoding performance and complexity of LDPC codes, and the inability to provide channel coding solutions for the enhanced new air interface of 6G.
[0006] The first aspect of the present application provides a hybrid decoding method for LDPC codes that is close to maximum likelihood, comprising the following steps: determining at least one preset iterative confidence propagation algorithm according to a target code, and obtaining an algorithm parameter configuration list corresponding to all preset iterative confidence propagation algorithms based on the at least one preset iterative confidence propagation algorithm, wherein the target code is an LDPC code or a CRC-LDPC cascade composite code; obtaining an original coding bit soft information vector of a target decoding, and determining a corresponding list of coding bit soft information vectors according to the original coding bit soft information vector; obtaining a serial decoding output corresponding to the list of coding bit soft information vectors according to the algorithm parameter configuration list and the list of coding bit soft information vectors.
[0007] Optionally, in one embodiment of the present application, determining the list of corresponding coding bit soft information vectors based on the original coding bit soft information vector includes: constructing a list of coding bit position combinations based on the code length parameters of the target code, the perforation characteristics of the target code and the pulse flipping parameters; and performing pulse flipping processing on the original coding bit soft information vector based on the list of coding bit position combinations to obtain the list of coding bit soft information vectors.
[0008] Optionally, in one embodiment of the present application, each element of the list of coding bit soft information vectors is a coding bit soft information vector. Compared with the original coding bit soft information vector, each element of the list of coding bit soft information vectors has (NP) dimensions that are the same as the original coding bit soft information vector, and has P dimensions that are the P dimensions corresponding to the original coding bit soft information vector after pulse flipping processing, wherein N is the coding bit length, and P is the pulse flip parameter, which is a non-negative integer less than N.
[0009] Optionally, in one embodiment of the present application, the serial decoding output corresponding to the list of coding bit soft information vectors obtained according to the algorithm parameter configuration list and the list of coding bit soft information vectors includes: initializing i and j, i=0, j=0, and marking the decoding as unsuccessful, wherein i is the i-th coding bit soft information vector in the list of coding bit soft information vectors, and j is the j-th algorithm parameter configuration in the algorithm parameter configuration list; i=i+1, selecting the i-th coding bit soft information vector in the list of coding bit soft information vectors as the current coding bit soft information vector; j=j+1, selecting the j-th algorithm parameter configuration in the algorithm parameter configuration list as the current algorithm parameter configuration; based on the current algorithm parameter configuration, performing iterative confidence propagation decoding on the current coding bit soft information vector to obtain a current decoding output, wherein the current decoding output is a coded bit posterior soft information vector that has been successfully verified, Or it is a coded bit a posteriori soft information vector that fails to be verified but reaches the maximum number of iterations; if the current decoding output is the coded bit a posteriori soft information vector that succeeds in the verification, the decoding mark is modified to success, and the current decoding output is set to the serial decoding output, that is, the serial decoding output corresponding to the list of the coded bit soft information vectors, and the serial iterative confidence propagation decoding is terminated; if the current decoding output is the unsuccessful verification, it is determined whether j reaches the maximum value; if j reaches the maximum value, j=0, and it is determined whether i reaches the maximum value, otherwise, if j does not reach the maximum value, it returns to step j=j+1; if i reaches the maximum value, the current decoding output is set to the serial decoding output, that is, the serial decoding output corresponding to the list of the coded bit soft information vectors, and the serial iterative confidence propagation decoding is terminated, otherwise, if i does not reach the maximum value, it returns to step i=i+1.
[0010] Optionally, in one embodiment of the present application, the current decoding output is a successfully verified coded bit a posteriori soft information vector, including: when the target code is an LDPC code, the successful verification is a successful LDPC code verification or a partial successful verification; when the target code is a CRC-LDPC cascade composite code, the successful verification is a successful LDPC code verification or a partial successful verification, and a successful CRC code verification.
[0011] The second aspect of the present application provides a hybrid decoding device for LDPC codes that is close to maximum likelihood, including: a preprocessing module, which determines at least one preset iterative confidence propagation algorithm according to a target code, and obtains an algorithm parameter configuration list corresponding to all preset iterative confidence propagation algorithms based on the at least one preset iterative confidence propagation algorithm, wherein the target code is an LDPC code or a CRC-LDPC cascade composite code; a decoding input processing module, which obtains the original coding bit soft information vector of the target decoding, and determines a corresponding list of coding bit soft information vectors based on the original coding bit soft information vector; a serial iterative confidence propagation decoding module, which obtains a serial decoding output corresponding to the list of coding bit soft information vectors based on the algorithm parameter configuration list and the list of coding bit soft information vectors.
[0012] Optionally, in one embodiment of the present application, the decoding input processing module includes: a construction unit, used to construct a list of coding bit position combinations according to the code length parameters of the target code, the perforation characteristics of the target code and the pulse flipping parameters; a pulse flipping processing unit, used to perform pulse flipping processing on the original coding bit soft information vector based on the list of coding bit position combinations to obtain the list of coding bit soft information vectors.
[0013] Optionally, in one embodiment of the present application, each element of the list of coding bit soft information vectors is a coding bit soft information vector. Compared with the original coding bit soft information vector, each element of the list of coding bit soft information vectors has (NP) dimensions that are the same as the original coding bit soft information vector, and has P dimensions that are the P dimensions corresponding to the original coding bit soft information vector after pulse flipping processing, wherein N is the coding bit length, and P is the pulse flip parameter, which is a non-negative integer less than N.
[0014] Optionally, in one embodiment of the present application, the serial iterative confidence propagation decoding module includes: an initialization unit, used to initialize i and j, i=0, j=0, and the decoding is marked as unsuccessful, wherein i is the i-th coded bit soft information vector in the list of the coded bit soft information vectors, and j is the j-th algorithm parameter configuration in the algorithm parameter configuration list; a first selection unit, used for i=i+1, to select the i-th coded bit soft information vector in the list of coded bit soft information vectors as the current coded bit soft information vector; a second selection unit, used for j=j+1, to select the j-th algorithm parameter configuration in the algorithm parameter configuration list as the current algorithm parameter configuration; an iterative confidence propagation decoding unit, used to perform iterative confidence propagation decoding on the current coded bit soft information vector based on the current algorithm parameter configuration to obtain a current decoding output, wherein the current decoding output is a coded bit a posteriori soft information vector that has been successfully verified, or a coded bit a posteriori soft information vector that has been successfully verified but has reached a coded bit a posteriori soft information vector for the maximum number of iterations; a first generating unit, used to modify the decoding mark to success when the current decoding output is the coded bit a posteriori soft information vector for the verification success, and set the current decoding output to a serial decoding output, that is, a serial decoding output corresponding to the list of the coded bit soft information vectors, and end the serial iterative confidence propagation decoding, and if the current decoding output is the verification failure, determine whether j reaches a maximum value; a determining unit, used to set j=0 when j reaches a maximum value, and determine whether i reaches a maximum value, otherwise, if j does not reach a maximum value, return to the second selecting unit; a second generating unit, used to set the current decoding output to a serial decoding output when i reaches a maximum value, that is, a serial decoding output corresponding to the list of the coded bit soft information vectors, and end the serial iterative confidence propagation decoding, otherwise, if i does not reach a maximum value, return to the first selecting unit.
[0015] Optionally, in one embodiment of the present application, the iterative confidence propagation decoding unit includes: a first check subunit, used for, when the target code is an LDPC code, the check success is a LDPC code check success or a partial check success; a second check subunit, used for, when the target code is a CRC-LDPC cascade composite code, the check success is a LDPC code check success or a partial check success, and the CRC code check is successful.
[0016] The third aspect of the present application provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the near-maximum-likelihood hybrid decoding method for LDPC codes as described in the above embodiment.
[0017] The fourth aspect of the present application provides a computer-readable storage medium, which stores a computer program. When the program is executed by a processor, it implements the near-maximum-likelihood hybrid decoding method for LDPC codes as described in the above embodiment.
[0018] The fifth aspect of the present application provides a computer program product, including a computer program, which, when executed, implements the near-maximum-likelihood hybrid decoding method for LDPC codes as described in the above embodiments.
[0019] The embodiments of the present application can make full use of the iterative confidence propagation algorithm and the algorithm parameter configuration list in the decoding process of LDPC code or CRC-LDPC cascade composite code, determine the corresponding list of coded bit soft information vectors according to the original coded bit soft information vector, and then obtain the corresponding serial decoding output, adopt innovative and diversified decoding input processing, combined with diversified algorithm parameter configuration, and obtain decoding performance close to ML with linearly growing list complexity, give full play to the sparse check matrix advantages of LDPC medium and short codes over traditional channel coding and the low complexity advantages of iterative confidence propagation decoding algorithms, and take into account both high decoding performance and low complexity. As a result, the problems in the related technology such as the demand for high reliability of LDPC medium and short codes for scenarios such as 6G ubiquitous connection, the inability to achieve both decoding performance and complexity of LDPC codes, and the inability to provide channel coding solutions for 6G's enhanced new air interface are solved.
[0020] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:
[0022] Figure 1 A flowchart of a hybrid decoding method close to maximum likelihood for LDPC codes provided according to an embodiment of the present application;
[0023] Figure 2 A flowchart of generating a serial decoding output according to an embodiment of the present application;
[0024] Figure 3 A plurality of performance curves obtained by using a SPA (Sum Product Algorithm) and a hybrid decoding method according to an original lifting matrix of a 5G NR-LDPC (New Radio Low Density Parity Check Code) provided in accordance with an embodiment of the present application;
[0025] Figure 4 A plurality of performance curves obtained by a hybrid decoding method using an AQNMSA algorithm (Adaptive Quantized and Normalized Min-Sum Algorithm) and a 5GNR-LDPC original lifting matrix provided in an embodiment of the present application;
[0026] Figure 5 A plurality of performance curves obtained by using a SPA algorithm and a hybrid decoding method according to a 5GNRlike2-LDPC new lifting matrix provided in an embodiment of the present application;
[0027] Figure 6 A plurality of performance curves obtained by using a SPA algorithm and a hybrid decoding method according to a 5GNRlike3-LDPC new base matrix and a boosting matrix provided in an embodiment of the present application;
[0028] Figure 7 A block diagram of a hybrid decoding device close to maximum likelihood for LDPC codes provided according to an embodiment of the present application;
[0029] Figure 8 It is a schematic diagram of the structure of an electronic device provided according to an embodiment of the present application. DETAILED DESCRIPTION
[0030] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.
[0031] The following describes the hybrid decoding method and device for LDPC codes close to maximum likelihood in the embodiment of the present application with reference to the accompanying drawings. In view of the demand for high reliability of LDPC medium and short codes for scenarios such as 6G ubiquitous connection mentioned in the above background technology, the decoding performance and complexity of LDPC codes cannot be achieved at the same time, and the channel coding solution cannot be provided for the enhanced new air interface of 6G. The present application provides a hybrid decoding method close to maximum likelihood for LDPC codes, in which the iterative confidence propagation algorithm and the algorithm parameter configuration list can be fully utilized in the decoding process of LDPC codes or CRC-LDPC cascade composite codes, and the corresponding list of coding bit soft information vectors is determined according to the original coding bit soft information vector, and then the corresponding serial decoding output is obtained. Innovative and diversified decoding input processing is adopted, combined with diversified algorithm parameter configuration, and decoding performance close to ML is obtained with a linearly growing list complexity, giving full play to the sparse check matrix advantages of LDPC medium and short codes over traditional channel coding and the low complexity advantages of iterative confidence propagation decoding algorithms, taking into account both high decoding performance and low complexity. As a result, the problems in related technologies such as the demand for high reliability of LDPC medium and short codes for scenarios such as 6G ubiquitous connectivity, the inability to achieve both decoding performance and complexity of LDPC codes, and the inability to provide channel coding solutions for 6G's enhanced new air interface are solved.
[0032] Before introducing the near-maximum likelihood hybrid decoding method for LDPC codes proposed in the embodiment of the present application, the relevant technologies involved in the embodiment of the present application are first explained.
[0033] It can be understood by those skilled in the art that the embodiments of the present application relate to a decoding method for channel coding, in particular, a decoding method for LDPC code. The main decoding method and its simple explanation are as follows:
[0034] Iterative belief propagation decoding method: For globally constrained channel coding, the decoding result is obtained by iterative external information transmission between component codes (i.e., local constraints). Its complexity is mainly determined by the belief propagation decoding algorithm of the component codes. Its decoding performance (including signal-to-noise ratio threshold performance and error platform performance) is inferior to ML decoding performance. For short codes, the gap from ML decoding performance is obvious.
[0035] ML decoding method: Maximum likelihood decoding method selects the legal codeword with the highest forward transmission probability as the decoding result. Facing the global constraints of channel coding, the decoding result is optimal and the decoding performance is also optimal (called optimal ML performance, or ML performance for short). ML decoding method is a general term for different ML decoding algorithms.
[0036] Quasi-ML decoding method: The quasi-maximum likelihood decoding method first constructs a subset (sublist) of legal codewords, and selects the legal codeword with the highest forward transmission probability as the decoding result in the subset (sublist) of legal codewords. The decoding result is quasi-optimal. As the subset space increases, the quasi-ML decoding performance can reach the ML decoding performance.
[0037] Close to ML decoding method: Close to maximum likelihood decoding method, usually with iterative belief propagation decoding algorithm or its variant as the core decoding algorithm, based on diversified decoding input, algorithm parameter configuration, or / and decoding output processing, close to ML decoding performance is obtained, which is better than the traditional iterative belief propagation decoding method. With the increase of decoding input list, algorithm parameter configuration list, and decoding output list, the close to ML decoding performance will gradually improve, but it cannot guarantee to reach ML decoding performance.
[0038] Hybrid decoding method: Different decoding methods are used at different stages of the decoding process, including but not limited to iterative belief propagation decoding method, quasi-ML decoding method, and near-ML decoding method.
[0039] LDPC code is a type of linear block code based on a sparse check matrix, usually described by a check matrix H or a bipartite graph called a Tanner graph, and the zero space of the check matrix H is the codeword space of the LDPC code. Thanks to the sparse check matrix, LDPC codes have decoding performance close to the channel capacity and a low-complexity iterative belief propagation (BP) decoding algorithm with a linear relationship between complexity and code length. For LDPC codes, the iterative belief propagation decoding method usually adopts the sum-product algorithm (SPA) of iterative belief propagation, and adopts flooding scheduling or hierarchical scheduling. Since the sum-product algorithm involves complex exponential and logarithmic operations, in practice, a lower-complexity approximate iterative belief propagation algorithm is usually used, such as the minimum sum algorithm and its variants. The embodiments of this application are collectively referred to as iterative belief propagation decoding algorithms. The complexity of the iterative belief propagation decoding method is low, but the performance is subject to many limitations, especially for medium and short codes.
[0040] Channel coding is a core technology in the field of digital information transmission technology. Its decoding performance and decoding complexity directly affect the overall performance and complexity of the transmission system and communication system. The decoding performance and complexity of channel coding depend on the decoding method and decoding algorithm. Among them, the ML decoding method has the best performance but the highest complexity. In practice, quasi-ML or near-ML decoding methods are usually used. Traditional channel coding includes linear block codes with better code weight distribution (such as Hamming code, BCH code (Bose Ray-Chaudhuri Hocquenghem code, BCH code) and RS code (Reed-Solomon codes)) and convolutional codes with trellis structure but poor code weight distribution. Channel coding with better code weight distribution has excellent ML decoding performance, but the complexity of ML decoding methods and algorithms is too high to be applied in practice. In practice, quasi-ML or near-ML decoding methods and algorithms are usually used, but there is still a problem of high complexity. Convolutional codes with trellis structures (and some linear block codes, such as CRC codes) can use the optimal ML decoding methods and algorithms, such as the Viterbi algorithm or the BCJR (Bahl-Cocke-Jelinek-Raviv, which is used to maximize the symbol-by-symbol posterior probability of error correction coding on a trellis diagram) algorithm. However, due to the limitation of poor code redistribution, the ML decoding performance is poor, and there is still a significant gap from the theoretical community of information theory. The core idea of modern channel coding is to use iterative belief propagation decoding methods and algorithms, including widely used convolutional codes, parallel cascaded Turbo codes (such as Turbo codes in the 4G standard specification), and LDPC codes (such as LDPC codes in the 5G standard new air interface specification). Among them, the component codes of Turbo codes are relatively complex convolutional codes, and convolutional codes need to use a relatively complex BCJR algorithm with belief propagation capabilities to effectively transmit external information between component codes; the component codes of LDPC codes are repetition codes and parity check codes. Thanks to the low complexity of the component codes, the belief propagation decoding algorithm of LDPC codes is relatively simple. Therefore, compared with ML decoding, the decoding method and algorithm of iterative belief propagation have typical "low complexity" characteristics. However, iterative belief propagation decoding is not ML decoding, so the decoding performance is inferior to ML decoding performance. For LDPC codes, the decoding performance loss of iterative belief propagation mainly comes from two aspects: on the one hand, in order to improve the signal-to-noise ratio threshold performance of iterative belief propagation, irregular codes are usually used, which affects the code weight distribution of LDPC codes and deteriorates the ML decoding performance; on the other hand, affected by the trap set of the check matrix, the iterative belief propagation decoding may have a higher signal-to-noise ratio threshold and error platform than ML decoding. Table 1 gives a comparison of the ML decoding method and the iterative belief decoding method. It can be seen that neither the ML decoding method nor the iterative belief propagation decoding method of LDPC codes can take into account both decoding performance and complexity. This is one of the problems that the application embodiment intends to solve.Among them, Table 1 is a comparison table of the ML decoding method and the iterative confidence decoding method provided according to an embodiment of the present application.
[0041] Table 1
[0042]
[0043]
[0044] Furthermore, according to the classification of code length, in the embodiments of the present application, there are two different fields of channel coding, the medium-long code field and the medium-short code field. In the embodiments of the present application, the channel coding of information bits of 1024 bits and above is called medium-long code, and the channel coding of information bits of 1024 bits and below is called medium-short code. Obviously, information bits of about 1024 bits are medium code lengths. In the field of medium-long codes, due to the high degree of design freedom, the code weight distribution and trap set optimization of LDPC codes can be taken into account while optimizing the signal-to-noise ratio threshold performance of iterative confidence propagation. Therefore, the decoding of iterative confidence propagation has both low decoding complexity and high decoding performance, especially the decoding performance close to the theoretical community of information theory. In actual broadcast, deep space communication and mobile communication transmission standards, irregular LDPC codes based on iterative belief propagation decoding methods and algorithms have performance close to the channel capacity, lower decoding complexity and higher throughput than traditional Turbo codes, and have been widely used. Among them, quasi-cyclic LDPC codes have been successfully applied in broadcast and communication standards such as DTMB-A, DVB-T2, ATSC3.0, CCSDS deep space remote control and telemetry, 5G new air interface and Wifi5 / 6 / 7. In the field of medium and short codes, due to the limited design freedom, it is difficult to balance the decoding performance of iterative belief propagation and ML decoding performance. In addition, due to the limited code length, the asymptotic characteristics on which iterative belief propagation decoding depends disappear, resulting in the decoding performance of iterative belief propagation being significantly inferior to that of ML. Table 2 shows the comparison of LDPC long codes and short codes, and the emphasis of the two is significantly different. Therefore, if only the traditional iterative belief propagation decoding method is used, the decoding performance of the short code in LDPC cannot be guaranteed, or the signal-to-noise ratio threshold performance cannot be guaranteed, or the error platform performance cannot be guaranteed, which is the second problem to be solved by the embodiment of the present application. Among them, Table 2 is a comparison table of LDPC long codes and short codes provided according to an embodiment of the present application.
[0045] Table 2
[0046]
[0047]
[0048] In addition, for LDPC medium and short codes, due to the limitation of limited code length, there is a trade-off between iterative belief propagation decoding performance and ML decoding performance. Among them, LDPC medium and short codes with better code weight distribution have better ML decoding performance, but the complexity of ML decoding methods and algorithms is too high to be applied in practice. In practice, quasi-ML or near-ML decoding methods that are easy to implement are usually adopted. There are currently two main technical routes. The first technical route is called quasi-ML decoding method, which is characterized in that the decoding method and algorithm are independent of the specific construction method of the code. For example, the OSD (Ordered Statistics Decoding) method, also known as the MRB (Most Reliable Based / Basis) method, has an underlying decoding algorithm based on the enumeration and re-encoding operation of the test error pattern (TEP for short), directly constructing candidate legal codewords with a small Euclidean distance (i.e., a large likelihood probability) with the received sequence, which is suitable for traditional channel coding and also for LDPC medium and short codes. However, its decoding complexity is closely related to the minimum code weight and has nothing to do with the sparse check matrix of the LDPC code. From the relevant research results, typical quasi-ML decoding is only applicable to the maximum information bit length of 64 or 96, and the decoding complexity is already very high, so it is not considered in the embodiments of this application. The second technical route is called a near-ML decoding method, which is characterized in that its underlying decoding algorithm directly depends on the specific structure of the LDPC code, especially the sparsity of the check matrix, and usually adopts a low-complexity iterative confidence propagation decoding algorithm or its variants. The embodiments of this application only consider a near-ML decoding method for LDPC codes, and its underlying decoding algorithm is a SPA algorithm or a minimum sum algorithm and its variants. Table 3 gives a comparison between a quasi-ML decoding method and a near-ML decoding method, and the decoding complexity advantage of the near-ML decoding method is obvious. Among them, Table 3 is a comparison table of a quasi-ML decoding method and a near-ML decoding method provided according to an embodiment of the present application.
[0049] Table 3
[0050]
[0051]
[0052] The traditional iterative belief propagation decoding algorithm of LDPC codes is determined by the check matrix, and due to the non-asymptotic characteristics of trap sets and short and medium codes, the decoding results are random. LDPC codes can be uniquely determined by the check matrix, but the check matrix of the same LDPC code is not unique. For example, the new matrix obtained by elementary transformation of the check matrix of the LDPC code is still the check matrix of the code. There are many documents proposing close to ML decoding methods based on the diversification of the check matrix, and their underlying decoding algorithm is still the iterative belief propagation algorithm, collectively referred to as the multiple-basis belief propagation decoding method (Multiple-Basis BeliefPropagation). This type of decoding method helps to reduce the randomness of the iterative belief propagation decoding results and improve the consistency of the iterative belief propagation decoding performance. There are also documents proposing close to ML decoding methods based on the diversification of decoding inputs, and their underlying decoding algorithm is also the iterative belief propagation algorithm. Similar to the typical quasi-ML decoding method, the near-ML decoding method based on the diversification of decoding input also belongs to a type of list decoding with adjustable complexity. The difference is that the typical quasi-ML decoding method directly constructs a list of candidate legal codewords by enumerating and re-encoding the test error pattern, while the near-ML decoding method based on the diversification of decoding input obtains diversified decoding inputs through changes and enumeration, and obtains one or more diversified decoding outputs (equivalent to indirectly constructing a list of candidate decoding results) through a serial or parallel iterative belief propagation decoding algorithm. The core of this type of decoding method lies in how to construct diversified decoding inputs, how to select the algorithm parameter configuration of iterative belief propagation decoding, and how to post-process the diversified decoding outputs. From the existing research results, the existing near-ML decoding method can significantly improve the decoding performance for short codes with a maximum information bit length of 64 or 96 when using a medium-sized list (such as a list length of 2^10=1024), and even approach the ML decoding performance, achieving a better compromise between decoding complexity and performance. However, there is no relevant literature on the ML decoding performance or even the finite code length theoretical approach to the ML decoding method for LDPC medium and short codes with the maximum information bit length of 256 or 512. Therefore, the third problem to be solved by the embodiment of the present application is: how to utilize the randomness of the decoding results of the iterative confidence propagation of LDPC medium and short codes, and even amplify the randomness of the decoding results, to obtain a decoding performance that is truly close to ML, to achieve a stable improvement in decoding performance with a list complexity that grows linearly with the code length N, and to give full play to the sparse check matrix advantages of LDPC medium and short codes over traditional channel coding and the low complexity advantages of the iterative confidence propagation decoding algorithm.
[0053] At present, Polar channel coding technology has been successfully applied. Polar code is directly designed and constructed for low-complexity ML decoding, which basically solves the complexity problem of ML decoding algorithm. Its decoding operation efficiency is high and the complexity is controllable. However, limited by the polarization method of Polar code, traditional Polar code has two problems. One is the lack of low-complexity iterative belief propagation decoding algorithm, which leads to its high average decoding complexity. The second is that the code weight distribution or minimum code weight performance is poor, the ML decoding performance is limited, and there is an error platform problem. In order to overcome the error platform problem of traditional Polar code, the method of nesting or cascading CRC code (Cyclic-Redundant-Code) of Polar code is actually adopted, which is referred to as CRC-Polar cascade composite code. Thanks to the high-density check feature of CRC, the code weight distribution of CRC-Polar cascade composite code is greatly improved. Combined with quasi-ML decoding methods (such as Successive Cancellation List Decoding), the error platform problem of Polar code itself is well solved. There are documents that apply the idea of CRC cascade to traditional convolutional codes, Turbo codes and LDPC codes, which can effectively improve the code weight distribution of the cascade composite code, and then improve the error platform performance. Combined with the idea of CRC cascade composite code, the construction of the LDPC code itself can be simplified, and it can focus on the asymptotic performance of the signal-to-noise ratio threshold of iterative confidence propagation, while taking into account the optimization of code weight distribution or minimum code weight. The shortcomings of code weight distribution or minimum code weight are compensated by the CRC-LDPC cascade composite code. However, the CRC-LDPC cascade composite code still has a contradiction between decoding performance and complexity. Therefore, the fourth problem to be solved by the embodiment of the present application is: how to achieve a stable improvement in the decoding performance of the CRC-LDPC cascade composite code with a list complexity that grows linearly with the code length N, and solve the error platform problem of short codes in LDPC.
[0054] Specifically, Figure 1 The present invention is a flowchart of a hybrid decoding method close to maximum likelihood for LDPC codes provided according to an embodiment of the present application.
[0055] like Figure 1 As shown, the hybrid decoding method close to maximum likelihood for LDPC codes includes the following steps:
[0056] In step S101, at least one preset iterative belief propagation algorithm is determined according to the target code, and based on the at least one preset iterative belief propagation algorithm, an algorithm parameter configuration list corresponding to all preset iterative belief propagation algorithms is obtained, wherein the target code is an LDPC code or a CRC-LDPC cascade composite code.
[0057] It can be understood that each element of the algorithm parameter configuration list of the embodiment of the present application represents an algorithm parameter configuration of a certain iterative confidence propagation algorithm. Among them, in the embodiment of the present application, the algorithm parameter configuration may include, but is not limited to, the selection of iterative confidence propagation algorithm, such as the sum-product algorithm and its variants, the minimum sum algorithm and its variants, etc., which are not specifically limited in the present application; decoding order, such as the decoding order of flooding scheduling, the decoding order of hierarchical scheduling, etc., which are not specifically limited in the present application; check matrix and its variants, the normalization factor of the minimum sum algorithm, the quantization parameter of the minimum sum algorithm, etc., which can be specifically set by technicians in this field according to actual conditions, and are not specifically limited in the present application.
[0058] In some embodiments, the embodiments of the present application can pre-process the target LDPC code used by the coding modulation system to obtain one or more certain iterative confidence propagation algorithms, and obtain an algorithm parameter configuration list corresponding to all certain iterative confidence propagation algorithms based on the relevant iterative confidence propagation algorithms, wherein the certain iterative confidence propagation algorithm can be set by a technician in this field according to actual conditions, and this application does not make any specific restrictions.
[0059] In some embodiments, the embodiments of the present application can pre-process the target CRC-LDPC cascade composite code adopted by the coding modulation system to obtain one or more certain iterative confidence propagation algorithms, and obtain an algorithm parameter configuration list corresponding to all certain iterative confidence propagation algorithms based on the relevant iterative confidence propagation algorithms.
[0060] In step S102, the original coded bit soft information vector of the target decoding is obtained, and the corresponding list of coded bit soft information vectors is determined according to the original coded bit soft information vector. Wherein, each element of the list of coded bit soft information vectors is a coded bit soft information vector, and compared with the original coded bit soft information vector, each element of the list of coded bit soft information vectors has (NP) dimensions that are the same as the original coded bit soft information vector, and has P dimensions that are obtained by pulse flipping processing of the P dimensions corresponding to the original coded bit soft information vector, wherein N is the coded bit length, and P is the pulse flip parameter, which is a non-negative integer less than N.
[0061] As a possible implementation method, the embodiment of the present application can obtain the original coded bit soft information vector of the target decoding, perform decoding input processing, and obtain a list of corresponding coded bit soft information vectors.
[0062] It should be noted that the original coded bit soft information vector of the embodiment of the present application is usually a log-likelihood ratio sequence of the coded bits, which is obtained by performing symbol detection on the received symbol sequence and its channel state information (such as symbol-by-symbol single-user constellation demapping or multi-user joint detection), and is not within the scope of discussion of the embodiment of the present application.
[0063] In some embodiments, each element of the list of coded bit soft information vectors in the embodiments of the present application is a coded bit soft information vector. Compared with the original coded bit soft information vector, both are N-dimensional vectors, but only the P dimension is different, where N is the coded bit length and P is the pulse flip parameter, which is a non-negative integer less than N, that is, each element of the list of coded bit soft information vectors has (NP) dimensions, the same as the original coded bit soft information vector.
[0064] It can be understood that the embodiment of the present application performs pulse flipping processing on any P dimension of the N-dimensional original coded bit soft information vector to obtain a new N-dimensional coded bit soft information vector, where P is a non-negative integer less than N.
[0065] Optionally, in one embodiment of the present application, a list of corresponding coding bit soft information vectors is determined based on the original coding bit soft information vector, including: constructing a list of coding bit position combinations based on the code length parameters of the target code, the perforation characteristics of the target code and the pulse flipping parameters; based on the list of coding bit position combinations, performing pulse flipping processing on the original coding bit soft information vector to obtain a list of coding bit soft information vectors.
[0066] Specifically, the embodiment of the present application may perform pulse flipping processing on the original coded bit soft information vector to obtain a list of coded bit soft information vectors. The process may be:
[0067] First, it can be understood that the embodiment of the present application does not need to perform confidence-based sorting operations on the original coded bit soft information vector; secondly, the embodiment of the present application does not have pulse flipping processing for P=0, and still obtains the original coded bit soft information vector; then, the embodiment of the present application has C(N,P)=N possibilities for P=1, P coded bit position combinations; then, the embodiment of the present application has C(N,P)=N*(N-1) / 2 possibilities for P=2, P coded bit position combinations, and so on. Among them, in the embodiment of the present application, C(N,P) is the size of the set space of P elements arbitrarily selected from N different elements, that is, there are C(N,P) different P-dimensional element combinations.
[0068] In addition, in the embodiment of the present application, due to the different confidence levels of the coded bit soft information, the pulse flipping of the soft information corresponding to each coded bit position will also be different.
[0069] In some embodiments, the pulse flipping of the soft information corresponding to each coding bit (especially non-punctured bit) position in the embodiments of the present application is specifically: for the i-th coding bit position, assuming that the coding bit soft information is LLR(i), then the result of the pulse flipping is specifically LLR_inv(i)=-sign(LLR(i))*LLR_max, where sign() represents the sign function and LLR_max represents the maximum value of the soft information.
[0070] Furthermore, the result of the pulse flipping of the soft information corresponding to each coding bit position in the embodiment of the present application is the positive or negative maximum value of the soft information, which is called saturation in some documents.
[0071] In some other embodiments, the present application embodiment has a punctured bit LDPC code, such as a 5GNR-LDPC code, wherein, if the LDPC code with punctured bits in the present application embodiment adopts variable node puncturing technology, the coded bits corresponding to V variable nodes of the N coded bits do not participate in the transmission, which is called a punctured bit. Therefore, at the receiving end, the initial confidence of the soft information of the V punctured bits is constant to zero. Then in the application embodiment, the pulse flipping of the soft information corresponding to each punctured bit position is specifically: for the jth punctured bit position, the initial coded bit soft information is constant to LLR(j)=0, then there are two results of the pulse flipping, LLR_pos(j)=+LLR_max and LLR_neg(j)=-LLR_max, wherein LLR_max represents the maximum value of the soft information. Obviously, the "pulse flipping" in the present application embodiment is approximately equivalent to superimposing pulses of opposite signs on the coded bit soft information, thereby obtaining a "pulse flipping result" with opposite signs and saturated soft information.
[0072] In summary, the specific steps of the embodiment of the present application for pulse flipping the original coding bit soft information vector are as follows: first, select a pulse flip parameter P to obtain a combination of P selected coding bit positions from N coding bit positions; second, for each combination, only the soft information corresponding to the P selected coding bit positions is pulse flipped, and the soft information corresponding to other coding bit positions remains unchanged, and the soft information corresponding to each selected non-punctured bit position is pulse flipped to obtain a pulse flip result, and the soft information corresponding to each selected punctured bit position is pulse flipped to obtain two pulse flip results; again, traverse all possibilities of pulse flipping the P selected bit positions to obtain one or more coding bit soft information vectors of the current combination, with a minimum of 1 vector and a maximum of 2^P vectors; finally, traverse all combinations of parameters P and all P coding bit positions to obtain a list of coding bit soft information vectors.
[0073] Specifically, if there is no puncturing bit in the embodiment of the present application, then for P=0 and P=1, the list set size of the coding bit soft information vector is N+1, including the original coding bit soft information vector and the coding bit soft information vector in which only the soft information corresponding to the i-th coding bit is pulse-flipped, i=1, 2,…, N, where N is the code length.
[0074] If there are V punctured bits in the embodiment of the present application, corresponding to the first V bits of the coded bits, then for P=0 and P=1, the list set size of the coded bit soft information vector is N+V+1, including the original coded bit soft information vector, the coded bit soft information vector in which only the soft information corresponding to the j-th punctured bit position is pulse-flipped, and the coded bit soft information vector in which only the soft information corresponding to the i-th non-punctured bit position is pulse-flipped, j=1,2,…,V, i=V+1,V+2,…,N, where N is the code length.
[0075] It should be noted that the pulse flipping processing in the embodiment of the present application can also be applied to the decoding process of iterative confidence propagation, and the present application does not impose any specific restrictions.
[0076] It should be noted that the list obtained by the pulse flipping processing in the embodiment of the present application can be sorted, and the present application does not impose any specific restrictions. For example, the coded bit soft information vector corresponding to the punctured bit pulse flipping in the embodiment of the present application has a high priority, and the coded bit soft information vector corresponding to the non-punctured bit pulse flipping with a column weight of 1 has a low priority.
[0077] It should be pointed out that some literature has proposed to sort the N coded bit soft information according to the confidence (i.e., the absolute value of the bit soft information), and perform combinatorial exhaustive decoding input processing on the S bits with the lowest confidence, which can be called the traditional LRB (Least Reliable Based / Basis, based on the least reliable element or part) decoding input processing. Its characteristics are: (1) It requires operations based on confidence sorting; (2) It only performs combinatorial exhaustive enumeration on the S bit positions of the N coded bits; (3) The S bit soft information takes the positive and negative maximum values (i.e., Saturation) respectively; (4) A list of 2^S coded bit soft information vectors is obtained.
[0078] It should be pointed out that the list of coded bit soft information vectors obtained by the pulse flipping process in the embodiment of the present application is a deterministic operation, but after decoding by the iterative confidence propagation algorithm, the decoding result has a strong randomness. Therefore, the deterministic pulse flipping process proposed in the embodiment of the present application is compared with the random pulse flipping process of the traditional minimum code weight (code weight distribution) detection algorithm. The basic idea is the same, but the goals are completely opposite. The embodiment of the present application is based on deterministic pulse flipping processing and is limited to decoding input processing, so as to obtain a larger decoding input space (intuitively speaking, the coded bit soft information vector of the decoding input is expanded in N-dimensional space), which is used to obtain diversified decoding results with strong randomness, improve the probability of the existence of correct decoding results, and approximate ML decoding performance with limited list complexity. In contrast, the minimum code weight and code weight distribution detection algorithm is based on random pulse flipping processing to obtain a random receiving sequence that deviates from the all-zero code, which is used to obtain a non-all-zero legal codeword with a smaller code weight of the non-all-zero code, and the random pulse flipping process continues until the entire decoding process of the iterative confidence propagation algorithm. Both pulse flipping-based methods effectively expand the signal space of the decoding input and effectively utilize the randomness of the iterative belief propagation algorithm (especially the error propagation characteristics caused by the trap set and ring distribution of the check matrix).
[0079] In step S103, a serial decoding output corresponding to the list of coded bit soft information vectors is obtained according to the algorithm parameter configuration list and the list of coded bit soft information vectors.
[0080] In the actual execution process, the embodiment of the present application can perform serial iterative confidence propagation decoding through the algorithm parameter configuration list and the list of coded bit soft information vectors to obtain a serial decoding output.
[0081] Optionally, in one embodiment of the present application, a serial decoding output corresponding to a list of coding bit soft information vectors is obtained according to an algorithm parameter configuration list and a list of coding bit soft information vectors, including: initializing i and j, i=0, j=0, and marking the decoding as unsuccessful, wherein i is the i-th coding bit soft information vector in the list of coding bit soft information vectors, and j is the j-th algorithm parameter configuration in the algorithm parameter configuration list; i=i+1, selecting the i-th coding bit soft information vector in the list of coding bit soft information vectors as the current coding bit soft information vector; j=j+1, selecting the j-th algorithm parameter configuration in the algorithm parameter configuration list as the current algorithm parameter configuration; based on the current algorithm parameter configuration, performing iterative confidence propagation decoding on the current coding bit soft information vector to obtain a current decoding output, wherein the current decoding output is a coded bit posterior soft information vector that has been successfully verified, Or it is a coded bit a posteriori soft information vector that failed to be verified but reached the maximum number of iterations; if the current decoding output is a coded bit a posteriori soft information vector that successfully verified, the decoding mark is modified to success, and the current decoding output is set to the serial decoding output, that is, the serial decoding output corresponding to the list of coded bit soft information vectors, and the serial iterative confidence propagation decoding is terminated; if the current decoding output is a verification failure, it is determined whether j reaches the maximum value; if j reaches the maximum value, j=0, and it is determined whether i reaches the maximum value, otherwise, if j does not reach the maximum value, it returns to step j=j+1; if i reaches the maximum value, the current decoding output is set to the serial decoding output, that is, the serial decoding output corresponding to the list of coded bit soft information vectors, and the serial iterative confidence propagation decoding is terminated, otherwise, if i does not reach the maximum value, it returns to step i=i+1.
[0082] Optionally, in one embodiment of the present application, the current decoding output is a coded bit a posteriori soft information vector of successful verification, including: when the target code is an LDPC code, the successful verification is a successful verification of the LDPC code or a partial successful verification; when the target code is a CRC-LDPC cascade composite code, the successful verification is a successful verification of the LDPC code or a partial successful verification, and a successful CRC code verification.
[0083] Those skilled in the art will appreciate that the process of generating a serial decoded output in the embodiment of the present application can be as follows: Figure 2 As shown, the process can be:
[0084] Step S201: Initialization.
[0085] That is to say, the embodiment of the present application can mark i=0, j=0, and the decoding as unsuccessful, where i is the i-th coded bit soft information vector in the list of coded bit soft information vectors, and j is the j-th algorithm parameter configuration in the algorithm parameter configuration list.
[0086] Step S202: Select a coding bit soft information vector.
[0087] That is to say, in the embodiment of the present application, i=i+1, that is, the i-th coded bit soft information vector in the list of coded bit soft information vectors is selected as the current coded bit soft information vector.
[0088] Step S203: Select an algorithm parameter configuration.
[0089] That is to say, the embodiment of the present application can select j=j+1, that is, the jth algorithm parameter configuration in the algorithm parameter configuration list as the current algorithm parameter configuration.
[0090] Step S204: perform iterative belief propagation decoding to obtain the current decoding output.
[0091] That is to say, the embodiments of the present application can perform iterative confidence propagation decoding on the current coded bit soft information vector based on the current algorithm parameter configuration to obtain the current decoding output, wherein the current decoding output is a coded bit a posteriori soft information vector that has been successfully verified, or a coded bit a posteriori soft information vector that has not been successfully verified but has reached the maximum number of iterations.
[0092] Step S205: Determine whether the current decoding output is a coded bit a posteriori soft information vector that has been successfully verified.
[0093] Among them, in an embodiment of the present application, if the current decoding output is a coded bit a posteriori soft information vector that has been successfully verified, the decoding mark is modified to success and the process goes to step S208; otherwise, if the current decoding output is a coded bit a posteriori soft information vector that has not been successfully verified, the process goes to step S206.
[0094] Step S206: Determine whether j reaches a maximum value.
[0095] In this embodiment of the present application, if j reaches the maximum value, j=0, and the process goes to step S207; otherwise, the process goes to step S203.
[0096] Step S207: Determine whether i reaches a maximum value.
[0097] In this embodiment of the present application, if i reaches the maximum value, then go to step S208, otherwise, go to step S202.
[0098] Step S208: End the serial iterative belief propagation decoding.
[0099] That is to say, the embodiment of the present application sets the current decoding output to the serial decoding output, that is, the serial decoding output corresponding to the list of coded bit soft information vectors, ends the serial iterative confidence propagation decoding, and gives the decoding marking result.
[0100] Optionally, in an embodiment of the present application, the serial iterative belief propagation decoding is limited by the available computing resources. When the computing resources are exhausted, the serial iterative belief propagation decoding is also terminated, the current decoding output is set to the serial decoding output, and the decoding marking result is given, which is not repeated.
[0101] Based on the above, it can be seen that in the embodiment of the present application (1), the serial iterative belief propagation decoding has a lower complexity because the decoding process may end early, but the decoding delay is large; (2) the first iterative belief propagation decoding of the serial iterative belief propagation decoding is preferably a traditional iterative belief propagation decoding method (i.e., a traditional iterative belief propagation decoding algorithm, a traditional algorithm parameter configuration, and the original coded bit soft information vector). The greater the success probability of the first iterative belief propagation decoding, the lower the average complexity, the smaller the average decoding delay, and the higher the decoding throughput; (3) the serial iterative belief propagation decoding may succeed in decoding (i.e., obtain a legal codeword that has been successfully verified), or it may fail in decoding (i.e., fail to obtain a legal codeword that has been successfully verified).
[0102] In addition, in the embodiments of the present application, since the target code may be an LDPC code or a CRC-LDPC cascade composite code, the embodiments of the present application can be discussed separately.
[0103] In some embodiments, if the target code is an LDPC code, the verification success in step S204 is a successful verification of the LDPC code or a partial successful verification.
[0104] It can be understood that the embodiment of the present application performs serial iterative confidence propagation decoding on the current coding bit soft information vector and the current algorithm parameter configuration to obtain the current LDPC decoding output, wherein the current LDPC decoding output is a coded bit a posteriori soft information vector for a successful LDPC code verification, or a coded bit a posteriori soft information vector for an unsuccessful LDPC code verification but reaching the maximum number of iterations.
[0105] In some other embodiments, if the target code is a CRC-LDPC cascade composite code in the embodiments of the present application, the successful verification in step S204 means that the LDPC code verification is successful or partially successful, and the CRC code verification is successful.
[0106] It should be added that the CRC code (Cyclic-Redundant-Code) in the embodiment of the present application is a linear block code with high-density check, which usually has fewer check bits and is mainly used for error detection (referred to as "error detection") of hard decision decoding results. It can also perform ML decoding or simplified ML decoding (referred to as "ML decoding") on the a posteriori soft information decoding results according to the grid characteristics of the check matrix.
[0107] It can be understood that the embodiment of the present application performs serial iterative confidence propagation decoding on the current coded bit soft information vector and the current algorithm parameter configuration to obtain the current LDPC decoding output, wherein the current LDPC decoding output is a coded bit a posteriori soft information vector for which the LDPC code verification succeeds, or a coded bit a posteriori soft information vector for which the LDPC code verification fails but reaches the maximum number of iterations;
[0108] Furthermore, the embodiment of the present application performs ML decoding and error detection of the CRC code on the current LDPC decoding output. If the current decoding output is a successful CRC code check, the current decoding output is set to the serial decoding output, the decoding is marked as successful, and the serial iterative confidence propagation decoding is ended. If the current decoding output is an unsuccessful CRC code check, the iterative confidence propagation decoding configured by the next coding bit soft information vector and algorithm parameter is continued; if the decoding success is not marked at the end of the traversal of the list of coding bit soft information vectors and the list of algorithm parameter configurations, the serial decoding output is the last coding bit soft information vector and the last algorithm parameter configuration in the last iterative decoding The coded bit a posteriori soft information vector obtained; otherwise, the serial decoding output is a coded bit posteriori soft information vector with a successful or partially successful LDPC code check and a successful CRC code check.
[0109] It should be added that the embodiments of the present application can also adopt parallel iterative confidence propagation decoding, perform multiple iterative confidence propagation decoding in parallel, process one or more coded bit soft information vectors and one or more algorithm parameter configurations at the same time, obtain multiple decoding outputs, and merge multiple decoding outputs; by proposing a hybrid decoding method close to maximum likelihood, adopting innovative and diversified decoding input processing, combined with diversified algorithm parameter configurations, it is possible to obtain decoding performance close to ML with a linearly growing list complexity. It can be seen that the embodiments of the present application (1) parallel decoding starts multiple decoding processes at the same time, with high complexity, but small decoding delay; (2) the average decoding complexity is relatively fixed, which is the average decoding complexity of the traditional iterative confidence propagation decoding method of O(N^P). It should be noted that when the hybrid decoding method of the embodiments of the present application is specifically implemented, a flexible combination of parallel and serial decoding processes can be adopted as needed, and special cases include traditional hybrid iterative confidence propagation decoding and traditional methods close to ML decoding. In addition, the embodiments of the present application can also improve the error platform performance of LDPC decoding by combining the error detection capability of CRC verification when the target code is a CRC-LDPC cascade composite code.
[0110] The working principle of the near-maximum-likelihood hybrid decoding method for LDPC codes proposed in the embodiments of the present application is described in detail below in conjunction with multiple embodiments.
[0111] Embodiment 1:
[0112] In the embodiment of the present application, for the 5GNR-LDPC code, the base matrix BG2 is selected, the base matrix size is (mz, kz) = (10, 8), the lifting factor z = 32, and the original lifting matrix is shown in Table 4 below, including the code length of the punctured bit N = (mz + kz) * z = 576, wherein the punctured bit length is V = vz * z = 64, and the code rate is rate = kz / (mz + kz - vz) = 1 / 2. Furthermore, for the 5GNR-LDPC code defined by the above parameters, the code weight detection in the embodiment of the present application shows that its minimum code weight dmin1 = 14 is much smaller than the Gilbert lower bound of the minimum code weight dmin lowerbound = 60, and an error platform is expected to exist. Among them, Table 4 is a schematic table of the original lifting matrix of the 5GNR-LDPC provided according to an embodiment of the present application (mz = 10, kz = 8, z = 32).
[0113] Table 4
[0114] 9 21 12 26 -1 -1 29 -1 0 0 -1 -1 -1 -1 -1 -1 -1 -1 7 -1 -1 6 29 29 2 28 -1 0 0 -1 -1 -1 -1 -1 -1 -1 17 18 -1 12 20 -1 -1 -1 1 -1 0 0 -1 -1 -1 -1 -1 -1 -1 8 26 -1 30 8 17 22 0 -1 -1 0 -1 -1 -1 -1 -1 -1 19 22 -1 -1 -1 -1 -1 -1 -1 7 -1 -1 0 -1 -1 -1 -1 -1 7 9 -1 -1 -1 2 -1 31 -1 7 -1 -1 -1 0 -1 -1 -1 -1 27 -1 -1 -1 -1 4 -1 13 -1 30 -1 -1 -1 -1 0 -1 -1 -1 -1 1 -1 -1 -1 19 -1 12 -1 3 -1 20 -1 -1 -1 0 -1 -1 14 30 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 -1 -1 -1 0 -1 -1 11 -1 -1 -1 -1 -1 -1 29 23 -1 -1 -1 -1 -1 -1 -1 0
[0115] Furthermore, if the target code of the embodiment of the present application is a CRC-LDPC cascade composite code, the specific implementation content may be:
[0116] Assuming that CRC has ideal error detection capability, ML decoding of CRC is not considered.
[0117] The iterative belief propagation algorithm is selected as the sum-product algorithm, and the algorithm parameter configuration includes hierarchical scheduling and a maximum number of iterations of 60 times.
[0118] The decoding input processing selects pulse flip processing, and the parameter P is selected as 0 and 1. When P=1, the pulse flip processing obtains a list of (N+V) coded bit soft information vectors.
[0119] Serial iterative belief propagation decoding is adopted, and the decoding result is either a successful CRC code check, or an unsuccessful CRC code check but a successful or partially successful LDPC code check (called an undetectable error of the check matrix), or an unsuccessful LDPC and CRC check, etc.
[0120] The discrete baseband equivalent channel model is a BI-AWGN channel. The hybrid decoding method proposed in the embodiment of the present application is used to obtain multiple (SNR, BLER) decoding performance curves as shown in FIG. Figure 3 As shown, where SNR is the signal-to-noise ratio and BLER is the LDPC codeword error probability.
[0121] from Figure 3It can be seen that, compared with the traditional iterative belief propagation decoding method (curve 3), the hybrid decoding method for 5GNR-LDPC code (curve 4) in embodiment (1) of the present application effectively improves the signal-to-noise ratio threshold performance and the error platform performance, and is close to the ML decoding performance. However, due to the code weight distribution and minimum code weight of the 5GNR-LDPC code (curve 2 gives the approximation of the ML decoding performance, truncated joint bound), there is an error platform; (2) When the target code is a CRC-LDPC cascade composite code, the hybrid decoding method (curve 5) proposed in the embodiment of the present application breaks through the code weight distribution and minimum code weight restrictions of the 5GNR-LDPC code itself, and there is no obvious error platform; (3) Limited by the limited O(N) list complexity and the influence of the trap set on the iterative belief propagation algorithm, the CRC-assisted hybrid decoding method is still far from the finite code length theoretical bound (curve 1).
[0122] Embodiment 2:
[0123] In order to further demonstrate the implementation effect, the embodiment of the present application replaces the sum-product algorithm and selects the iterative belief propagation algorithm as AQNMSA. In the embodiment of the present application, the lookup table of adaptive quantization and normalization parameters can refer to relevant papers, such as "X.An, C.Zhang, K.Peng, Z.He, and J.Song, "Adaptive Quantized and NormalizedMSABased on Modified MET-DE and Its Application for 5G-NR LDPC Codes," IEEE Access. vol. 11. pp. 101 123-101133, 2023." (wherein the external information bit width between the variable node and the check node is 5 bits), etc., and this application does not make specific limitations.
[0124] For the 5GNR-LDPC original lifting matrix, the (SNR, BLER) decoding performance curve obtained by the embodiment of the present application is as follows: Figure 4 As shown. Figure 4 It can be seen that the embodiments of the present application can solve the problem of the error platform, and the signal-to-noise ratio threshold performance is basically the same, which shows that the method and device of the embodiments of the present application are suitable for the iterative confidence decoding algorithm AQNMSA for hardware implementation, and can meet the requirements of high reliability of LDPC medium and short codes in scenarios such as 6G ubiquitous connection.
[0125] Embodiment three:
[0126] As a comparison of the original lifting matrix of 5GNR-LDPC, under the condition of the same base matrix parameters, by optimizing the lifting parameters, a new lifting matrix of 5GNRlike2-LDPC is obtained, as shown in Table 5, the code weight detection shows that its minimum code weight dmin2=18, and it is expected that the ML decoding performance and the error platform performance will be improved. Further, the embodiment of the present application obtains a new base matrix and lifting matrix of 5GNRlike3-LDPC by collaboratively optimizing the base matrix and lifting parameters, as shown in Table 6, the code weight detection shows that its minimum code weight dmin3=22, and it is expected that the ML decoding performance and the error platform performance can be further improved. Among them, Table 5 is a schematic table of a new lifting matrix of 5GNRlike2-LDPC (mz=10, kz=8, z=32) provided according to an embodiment of the present application; Table 6 is a schematic table of a new base matrix lifting matrix of 5GNRlike3-LDPC (mz=10, kz=8, z=32) provided according to an embodiment of the present application.
[0127] Table 5
[0128] 0 0 0 0 -1 -1 0 -1 0 0 -1 -1 -1 -1 -1 -1 -1 -1 31 -1 -1 2 0 0 5 0 -1 0 0 -1 -1 -1 -1 -1 -1 -1 4 11 -1 17 19 -1 -1 -1 22 -1 0 0 -1 -1 -1 -1 -1 -1 -1 2 31 -1 20 25 29 22 16 -1 -1 0 -1 -1 -1 -1 -1 -1 10 19 -1 -1 -1 -1 -1 -1 -1 0 -1 -1 0 -1 -1 -1 -1 -1 13 2 -1 -1 -1 18 -1 27 -1 0 -1 -1 -1 0 -1 -1 -1 -1 22 -1 -1 -1 -1 6 -1 26 -1 0 -1 -1 -1 -1 0 -1 -1 -1 -1 5 -1 -1 -1 22 -1 12 -1 23 -1 0 -1 -1 -1 0 -1 -1 1 29 -1 -1 -1 -1 -1 -1 -1 -1 0 -1 -1 -1 -1 -1 0 -1 -1 17 -1 -1 -1 -1 -1 -1 26 0 -1 -1 -1 -1 -1 -1 -1 0
[0129] Table 6
[0130] 0 0 0 0 -1 0 0 -1 0 0 -1 -1 -1 -1 -1 -1 -1 -1 20 9 10 3 0 15 -1 0 -1 0 0 -1 -1 -1 -1 -1 -1 -1 21 -1 24 22 5 -1 27 28 18 -1 0 0 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 24 13 16 18 20 31 25 0 -1 -1 -1 -1 -1 -1 0 4 -1 -1 -1 -1 -1 25 -1 -1 -1 -1 0 -1 -1 -1 -1 -1 -1 19 23 -1 -1 -1 14 -1 -1 -1 0 -1 -1 0 -1 -1 -1 -1 0 23 -1 -1 19 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 -1 -1 -1 1 -1 -1 -1 -1 29 -1 19 -1 -1 0 -1 -1 -1 -1 0 -1 -1 21 3 -1 -1 -1 -1 -1 -1 0 -1 -1 -1 -1 -1 -1 -1 0 -1 -1 15 -1 -1 -1 -1 -1 -1 -1 25 0 -1 -1 -1 -1 -1 -1 0
[0131] In addition, in order to further demonstrate the implementation effect, the embodiment of the present application replaces the original 5GNR-LDPC boost matrix and adopts 5GNRlik e 2-LDPC New Boosting Matrix and 5GNRlik e 3-LDPC new base matrix and lifting matrix, and then the multiple (SNR, BLER) decoding performance curves obtained by the embodiment of the present application are as follows Figure 5 and Figure 6 It should be noted that after the code redistribution is improved in the embodiment of the present application, the gap between the truncated joint bound (curve 2) and the actual ML decoding performance is too large, and it can be considered that the ML decoding performance is close to the finite code length bound (curve 1). Therefore, without CRC assistance, hybrid decoding requires higher complexity to approach the ML decoding performance.
[0132] from Figure 5 and Figure 6 It can be seen that the near-maximum-likelihood hybrid decoding method for LDPC codes proposed in the embodiment of the present application is applicable to a variety of LDPC codes or CRC-LDPC cascade composite codes, which helps to solve the error platform problem. This shows that the method and device of the embodiment of the present application can guide the design and construction of LDPC short and medium codes for scenarios such as 6G ubiquitous connectivity.
[0133] According to the hybrid decoding method close to maximum likelihood for LDPC codes proposed in the embodiment of the present application, the iterative confidence propagation algorithm and the algorithm parameter configuration list can be fully utilized in the decoding process of LDPC codes or CRC-LDPC cascade composite codes, and the corresponding list of coded bit soft information vectors can be determined according to the original coded bit soft information vectors, thereby obtaining the corresponding serial decoding output, and adopting innovative and diversified decoding input processing, combined with diversified algorithm parameter configurations, to obtain decoding performance close to ML with a linearly growing list complexity, giving full play to the sparse check matrix advantages of LDPC medium and short codes over traditional channel coding and the low complexity advantages of iterative confidence propagation decoding algorithms, taking into account both high decoding performance and low complexity. As a result, the problems in the related technology such as the demand for high reliability of LDPC medium and short codes for scenarios such as 6G ubiquitous connection, the inability to achieve both decoding performance and complexity of LDPC codes, and the inability to provide channel coding solutions for the enhanced new air interface of 6G are solved.
[0134] Next, a hybrid decoding device close to maximum likelihood for LDPC codes proposed in accordance with an embodiment of the present application will be described with reference to the accompanying drawings.
[0135] Figure 7 A block diagram of a near-maximum-likelihood hybrid decoding device for LDPC codes provided according to an embodiment of the present application.
[0136] like Figure 7 As shown, the near-maximum-likelihood hybrid decoding device 10 for LDPC codes includes: a preprocessing module 100 , a decoding input processing module 200 , and a serial iterative belief propagation decoding module 300 .
[0137] Among them, the preprocessing module 100 determines at least one preset iterative confidence propagation algorithm according to the target code, and obtains an algorithm parameter configuration list corresponding to all preset iterative confidence propagation algorithms based on at least one preset iterative confidence propagation algorithm, wherein the target code is an LDPC code or a CRC-LDPC cascade composite code.
[0138] The decoding input processing module 200 obtains the original coded bit soft information vector of the target decoding, and determines a list of corresponding coded bit soft information vectors according to the original coded bit soft information vector.
[0139] The serial iterative belief propagation decoding module 300 obtains a serial decoding output corresponding to the list of coded bit soft information vectors according to the algorithm parameter configuration list and the list of coded bit soft information vectors.
[0140] Optionally, in one embodiment of the present application, the decoding input processing module 200 includes: a construction unit and a pulse flip processing unit.
[0141] Among them, the construction unit is used to construct a list of coding bit position combinations according to the code length parameter of the target code, the puncturing characteristics of the target code and the pulse flipping parameters.
[0142] The pulse flipping processing unit is used to perform pulse flipping processing on the original coded bit soft information vector based on the list of coded bit position combinations to obtain a list of coded bit soft information vectors.
[0143] Optionally, in one embodiment of the present application, each element of the list of coding bit soft information vectors is a coding bit soft information vector. Compared with the original coding bit soft information vector, each element of the list of coding bit soft information vectors has (NP) dimensions that are the same as the original coding bit soft information vector, and has P dimensions that are the P dimensions corresponding to the original coding bit soft information vector after pulse flipping processing, wherein N is the coding bit length, and P is the pulse flipping parameter, which is a non-negative integer less than N.
[0144] Optionally, in one embodiment of the present application, the serial iterative confidence propagation decoding module 300 includes: an initialization unit, a first selection unit, a second selection unit, an iterative confidence propagation decoding unit, a first generation unit, a judgment unit and a second generation unit.
[0145] Among them, the initialization unit is used to initialize i and j, i=0, j=0, and the decoding is marked as unsuccessful, wherein i is the i-th coded bit soft information vector in the list of coded bit soft information vectors, and j is the j-th algorithm parameter configuration in the algorithm parameter configuration list.
[0146] The first selection unit is used for i=i+1 to select the i-th coded bit soft information vector in the list of coded bit soft information vectors as the current coded bit soft information vector.
[0147] The second selection unit is used for j=j+1, and selects the jth algorithm parameter configuration in the algorithm parameter configuration list as the current algorithm parameter configuration.
[0148] The iterative confidence propagation decoding unit is used to perform iterative confidence propagation decoding on the current coded bit soft information vector based on the current algorithm parameter configuration to obtain the current decoding output, wherein the current decoding output is a coded bit a posteriori soft information vector of a successfully verified code, or a coded bit a posteriori soft information vector of an unsuccessful verification but reaching the maximum number of iterations.
[0149] The first generation unit is used to modify the decoding mark to success when the current decoding output is a coded bit a posteriori soft information vector with successful verification, and set the current decoding output to a serial decoding output, that is, a serial decoding output corresponding to a list of coded bit soft information vectors, and end the serial iterative confidence propagation decoding. If the current decoding output is a verification failure, it is determined whether j reaches a maximum value.
[0150] The judging unit is used to set j=0 when j reaches the maximum value, and judge whether i reaches the maximum value; otherwise, if j does not reach the maximum value, return to the second selecting unit.
[0151] The second generation unit is used to set the current decoding output to the serial decoding output when i reaches the maximum value, that is, the serial decoding output corresponding to the list of coded bit soft information vectors, and end the serial iterative confidence propagation decoding, otherwise, if i does not reach the maximum value, return to the first selection unit.
[0152] Optionally, in one embodiment of the present application, the iterative confidence propagation decoding unit includes: a first syndrome unit and a second syndrome unit.
[0153] The first check subunit is used for, when the target code is an LDPC code, the successful check is a successful LDPC code check or a partial successful check.
[0154] The second check subunit is used for, when the target code is a CRC-LDPC cascade composite code, the successful check is the successful check of the LDPC code or the successful check of part of the LDPC code, and the successful check of the CRC code.
[0155] It should be noted that the above explanation of the embodiment of the hybrid decoding method for LDPC codes close to maximum likelihood is also applicable to the hybrid decoding device for LDPC codes close to maximum likelihood of this embodiment, which will not be repeated here.
[0156] According to the hybrid decoding device close to maximum likelihood for LDPC codes proposed in the embodiment of the present application, the iterative confidence propagation algorithm and the algorithm parameter configuration list can be fully utilized in the decoding process of LDPC codes or CRC-LDPC cascade composite codes, and the corresponding list of coded bit soft information vectors can be determined according to the original coded bit soft information vectors, thereby obtaining the corresponding serial decoding output, and adopting innovative and diversified decoding input processing, combined with diversified algorithm parameter configurations, to obtain decoding performance close to ML with a linearly growing list complexity, giving full play to the sparse check matrix advantages of LDPC medium and short codes over traditional channel coding and the low complexity advantages of iterative confidence propagation decoding algorithms, and taking into account both high decoding performance and low complexity. As a result, the problems in the related technology such as the demand for high reliability of LDPC medium and short codes for scenarios such as 6G ubiquitous connection, the inability to achieve both decoding performance and complexity of LDPC codes, and the inability to provide channel coding solutions for the enhanced new air interface of 6G are solved.
[0157] Figure 8 This is a schematic diagram of the structure of an electronic device provided according to an embodiment of the present application. The electronic device may include:
[0158] A memory 801 , a processor 802 , and a computer program stored in the memory 801 and executable on the processor 802 .
[0159] When the processor 802 executes the program, the near-maximum-likelihood hybrid decoding method for LDPC codes provided in the above embodiment is implemented.
[0160] Furthermore, the electronic device further comprises:
[0161] The communication interface 803 is used for communication between the memory 701 and the processor 802 .
[0162] The memory 801 is used to store computer programs that can be executed on the processor 802 .
[0163] The memory 801 may include a high-speed RAM memory, and may also include a non-volatile memory (non-volatile memory), such as at least one disk memory.
[0164] If the memory 801, the processor 802 and the communication interface 803 are implemented independently, the communication interface 803, the memory 801 and the processor 802 can be connected to each other through a bus and communicate with each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 8 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.
[0165] Optionally, in a specific implementation, if the memory 801, the processor 802 and the communication interface 803 are integrated on a chip, the memory 801, the processor 802 and the communication interface 803 can communicate with each other through an internal interface.
[0166] The processor 802 may be a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application.
[0167] An embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the near-maximum-likelihood hybrid decoding method for LDPC codes as described in the above embodiment.
[0168] An embodiment of the present application also provides a computer program product, including a computer program, which, when executed, implements the near-maximum-likelihood hybrid decoding method for LDPC codes as described in the above embodiment.
[0169] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or N embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.
[0170] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0171] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or N executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.
[0172] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purpose of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or N wirings (electronic devices), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically by optically scanning the paper or other medium and then editing, interpreting or processing in other suitable ways as necessary and then storing it in a computer memory.
[0173] It should be understood that the various parts of the present application can be implemented by hardware, software, firmware or a combination thereof. In the above embodiment, the N steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. If implemented by hardware, as in another embodiment, it can be implemented by any one or a combination of multiple of the following technologies known in the art: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.
[0174] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.
[0175] In addition, each functional unit in each embodiment of the present application may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.
[0176] The storage medium mentioned above may be a read-only memory, a magnetic disk or an optical disk, etc. Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limiting the present application. A person of ordinary skill in the art may change, modify, replace and modify the above embodiments within the scope of the present application.
Claims
1. A hybrid decoding method close to maximum likelihood for LDPC codes, characterized in that: The following steps are involved: Determine at least one preset iterative belief propagation algorithm according to the target code, and obtain an algorithm parameter configuration list corresponding to all preset iterative belief propagation algorithms based on the at least one preset iterative belief propagation algorithm, wherein the target code is an LDPC code or a CRC-LDPC cascade composite code; Obtaining an original coded bit soft information vector of a target decoding, and determining a list of corresponding coded bit soft information vectors according to the original coded bit soft information vector; A serial decoding output corresponding to the list of coded bit soft information vectors is obtained according to the algorithm parameter configuration list and the list of coded bit soft information vectors.
2. The method according to claim 1, characterized in that The determining, according to the original coded bit soft information vector, a list of corresponding coded bit soft information vectors, comprises: Constructing a list of coding bit position combinations according to a code length parameter of the target code, a puncturing feature of the target code, and a pulse flipping parameter; Based on the list of coding bit position combinations, pulse flipping processing is performed on the original coding bit soft information vector to obtain the list of coding bit soft information vectors.
3. The method according to claim 1, characterized in that Each element of the list of coding bit soft information vectors is a coding bit soft information vector. Compared with the original coding bit soft information vector, each element of the list of coding bit soft information vectors has (NP) dimensions which are the same as the original coding bit soft information vector, and has P dimensions which are the P dimensions corresponding to the original coding bit soft information vector after pulse flipping processing, wherein N is the coding bit length, and P is the pulse flipping parameter, which is a non-negative integer less than N.
4. The method according to claim 1, characterized in that: The obtaining, according to the algorithm parameter configuration list and the list of coded bit soft information vectors, a serial decoding output corresponding to the list of coded bit soft information vectors comprises: Initialize i and j, i=0, j=0, and mark the decoding as unsuccessful, wherein i is the i-th coded bit soft information vector in the list of the coded bit soft information vectors, and j is the j-th algorithm parameter configuration in the list of the algorithm parameter configurations; i=i+1, select the i-th coded bit soft information vector in the list of coded bit soft information vectors as the current coded bit soft information vector; j=j+1, select the jth algorithm parameter configuration in the algorithm parameter configuration list as the current algorithm parameter configuration; Based on the current algorithm parameter configuration, performing iterative confidence propagation decoding on the current coded bit soft information vector to obtain a current decoding output, wherein the current decoding output is a coded bit a posteriori soft information vector that succeeds in verification, or a coded bit a posteriori soft information vector that fails in verification but reaches a maximum number of iterations; If the current decoding output is the coded bit a posteriori soft information vector of the successful verification, the decoding flag is modified to success, and the current decoding output is set as the serial decoding output, that is, the serial decoding output corresponding to the list of the coded bit soft information vectors, and the serial iterative confidence propagation decoding is terminated. If the current decoding output is the unsuccessful verification, it is determined whether j reaches a maximum value; If j reaches the maximum value, set j=0 and determine whether i reaches the maximum value. Otherwise, if j does not reach the maximum value, return to step j=j+1; If i reaches the maximum value, the current decoding output is set to the serial decoding output, that is, the serial decoding output corresponding to the list of the coded bit soft information vector, and the serial iterative confidence propagation decoding is ended. Otherwise, if i does not reach the maximum value, it returns to step i=i+1.
5. The method according to claim 4, characterized in that The current decoding output is a coded bit a posteriori soft information vector that has been successfully verified, including: In the case where the target code is an LDPC code, the successful verification is a successful verification of the LDPC code or a partial successful verification; In the case where the target code is a CRC-LDPC cascade composite code, the successful verification means that the LDPC code verification is successful or partially successful, and the CRC code verification is successful.
6. A hybrid decoding device close to maximum likelihood for LDPC codes, characterized in that: include: A preprocessing module, determining at least one preset iterative belief propagation algorithm according to a target code, and obtaining an algorithm parameter configuration list corresponding to all preset iterative belief propagation algorithms based on the at least one preset iterative belief propagation algorithm, wherein the target code is an LDPC code or a CRC-LDPC cascade composite code; A decoding input processing module, which obtains an original coding bit soft information vector of a target decoding, and determines a list of corresponding coding bit soft information vectors according to the original coding bit soft information vector; A serial iterative confidence propagation decoding module obtains a serial decoding output corresponding to the list of coded bit soft information vectors according to the algorithm parameter configuration list and the list of coded bit soft information vectors.
7. The device according to claim 6, characterized in that Each element of the list of coding bit soft information vectors is a coding bit soft information vector. Compared with the original coding bit soft information vector, each element of the list of coding bit soft information vectors has (NP) dimensions which are the same as the original coding bit soft information vector, and has P dimensions which are the P dimensions corresponding to the original coding bit soft information vector after pulse flipping processing, wherein N is the coding bit length, and P is the pulse flipping parameter, which is a non-negative integer less than N.
8. The device according to claim 6, characterized in that The serial iterative confidence propagation decoding module comprises: an initialization unit, used to initialize i and j, i=0, j=0, and the decoding is marked as unsuccessful, wherein i is the i-th coded bit soft information vector in the list of the coded bit soft information vectors, and j is the j-th algorithm parameter configuration in the algorithm parameter configuration list; A first selection unit, for i=i+1, selects the i-th coded bit soft information vector in the list of coded bit soft information vectors as the current coded bit soft information vector; A second selection unit, for j=j+1, selects the jth algorithm parameter configuration in the algorithm parameter configuration list as the current algorithm parameter configuration; an iterative confidence propagation decoding unit, configured to perform iterative confidence propagation decoding on the current coded bit soft information vector based on the current algorithm parameter configuration to obtain a current decoding output, wherein the current decoding output is a coded bit a posteriori soft information vector of a successfully verified coded bit, or a coded bit a posteriori soft information vector of a successfully verified coded bit but reaching a maximum number of iterations; a first generating unit, configured to modify the decoding flag to success when the current decoding output is the coded bit a posteriori soft information vector of the successful verification, and set the current decoding output as a serial decoding output, that is, a serial decoding output corresponding to the list of coded bit soft information vectors, and terminate serial iterative confidence propagation decoding, and if the current decoding output is the unsuccessful verification, determine whether j reaches a maximum value; A judging unit, used for setting j=0 when j reaches a maximum value, and judging whether i reaches a maximum value, otherwise, if j does not reach a maximum value, returning to a second selecting unit; The second generation unit is used to set the current decoding output as the serial decoding output when i reaches the maximum value, that is, the serial decoding output corresponding to the list of the coded bit soft information vector, and end the serial iterative confidence propagation decoding; otherwise, if i does not reach the maximum value, return to the first selection unit.
9. An electronic device, characterized in that: include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the near-maximum-likelihood hybrid decoding method for LDPC codes as described in any one of claims 1 to 5.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that: The program is executed by a processor to implement the near-maximum-likelihood hybrid decoding method for LDPC codes as described in any one of claims 1 to 5.
11. A computer program product, characterized in that The invention comprises a computer program, which, when executed, is used to implement the near-maximum-likelihood hybrid decoding method for LDPC codes as claimed in any one of claims 1 to 5.
