N-type TOPCon battery and preparation method thereof

Through rapid heat treatment technology and the method of phosphorus doped polysilicon layer, the problems of P-type emitter time and low battery efficiency in N-type TOPCon batteries are solved, and the efficiency and performance of the battery are improved.

CN119153574APending Publication Date: 2024-12-17DAS SOLAR CO LTD
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Patent Information

Application Number
CN202310706761.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-06-14
Publication Date
2024-12-17

AI Technical Summary

Technical Problem

In the prior art, the P-type emitter of the N-type TOPCon battery takes a long time and the battery efficiency is low.

Method used

The N-type silicon wafer is subjected to boron diffusion treatment by using rapid heat treatment technology, and a silicon oxide layer and a polysilicon layer are formed on the back of the silicon wafer for phosphorus doping. Then, a passivation layer and electrode are formed on the front of the silicon wafer and on the surface of the phosphorus doped polysilicon layer.

Benefits of technology

The boron diffusion time is shortened, the carrier composite and body resistance are reduced, the battery's minus number life and filling factor are improved, and the battery efficiency is increased by 0.03 to 0.05%.

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Abstract

The embodiment of the invention provides an N-type TOPCon battery and a preparation method thereof, and the preparation method of the N-type TOPCon battery provided by the embodiment of the invention comprises the steps: carrying out the boron diffusion processing of the front surface of an N-type silicon wafer through employing a rapid heat treatment technology; forming a silicon oxide layer and a polycrystalline silicon layer on the back surface of the silicon wafer subjected to boron diffusion treatment, and performing phosphorus doping on the polycrystalline silicon layer to form a phosphorus-doped polycrystalline silicon layer; and sequentially forming a passivation layer and an electrode on the front surface of the silicon wafer and the surface of the phosphorus-doped polycrystalline silicon layer to prepare the N-type TOPCon battery. The preparation method provided by the invention can effectively solve the problems of long time consumption and low efficiency of the prepared battery in the preparation of the P-type emitter in the N-type TOPCon battery in the prior art.
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Description

Technical Field

[0001] The present invention relates to the technical field of crystalline silicon solar cell manufacturing, and in particular to an N-type TOPCon cell and a preparation method thereof. Background Art

[0002] Currently, TOPCon cells among crystalline silicon solar cells are widely used due to their small attenuation, obvious advantages in overall cell efficiency and power generation.

[0003] TOPCON is a battery that uses N-type silicon wafers as its substrate. Its front side is generally made using tubular boron diffusion technology to form a P-type emitter. The above method is not only time-consuming, but also the efficiency of the prepared battery is low. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide an N-type TOPCon battery and a preparation method thereof, so as to solve the problem that the preparation of a P-type emitter in an N-type TOPCon battery in the prior art takes a long time and the efficiency of the prepared battery is low.

[0005] In order to solve the above problems, the present invention is achieved through the following technical solutions:

[0006] The present invention provides a method for preparing an N-type TOPCon battery, which comprises:

[0007] Rapid thermal processing technology is used to perform boron diffusion treatment on N-type silicon wafers;

[0008] forming a silicon oxide layer and a polysilicon layer on the back of the silicon wafer after the boron diffusion treatment, and doping the polysilicon layer with phosphorus to form a phosphorus-doped polysilicon layer;

[0009] A passivation layer and an electrode are sequentially formed on the front side of the silicon wafer and on the surface of the phosphorus-doped polysilicon layer to obtain an N-type TOPCon cell.

[0010] Furthermore, in the preparation method, a rapid thermal processing technique is used to perform boron diffusion treatment on the front side of the N-type silicon wafer, comprising:

[0011] The silicon wafer is subjected to heating, boron deposition, oxidation and cooling treatments in sequence, wherein the heating rate of the heating treatment is 200-250°C / s, the temperature of the boron deposition treatment is 800-900°C, the temperature of the oxidation is 930-1000°C, and the total time of the rapid thermal treatment is 30-60 minutes.

[0012] Furthermore, in the preparation method, during the boron deposition process, BCl 3 With O 2 The flow ratio is 1:3~1:5.

[0013] Furthermore, after the N-type silicon wafer is subjected to boron diffusion treatment, the method further comprises:

[0014] A laser doping process is performed on a first area on the front side of the silicon wafer, where the first area is used for contacting the positive gate line.

[0015] Furthermore, in the preparation method, the laser power of the laser doping treatment is 5 to 10 watts, the frequency is 280 to 300 kHz, and the scanning speed is 10,000 to 15,000 mm / s.

[0016] Furthermore, after the laser doping process is performed on the first area on the front side of the silicon wafer, the method further comprises:

[0017] The front side of the silicon wafer is subjected to oxidation treatment.

[0018] Furthermore, in the preparation method, the temperature of the oxidation treatment is 600 to 1200° C. and the treatment time is 30 to 60 minutes.

[0019] Furthermore, before forming the silicon oxide layer and the polysilicon layer on the back side of the silicon wafer after the boron diffusion treatment, the method further comprises:

[0020] Chain pickling is used to remove the borosilicate glass layer on the back of the silicon wafer, and then alkaline polishing is performed.

[0021] Furthermore, before sequentially forming a passivation layer and an electrode on the front side of the silicon wafer and the surface of the phosphorus-doped polysilicon layer, the method further comprises:

[0022] Chain pickling is used to remove the phosphosilicate glass layer on the front side of the silicon wafer, and then alkaline polishing is performed.

[0023] The present invention also provides an N-type TOPCon battery, which is prepared by the method as described above.

[0024] Compared with the prior art, the embodiments of the present invention have the following advantages:

[0025] In the embodiment of the present invention, the preparation method of the N-type TOPCon battery provided is to firstly perform boron diffusion treatment on the front side of the N-type silicon wafer by using rapid thermal processing technology; then form a silicon oxide layer and a polysilicon layer on the back side of the silicon wafer after the boron diffusion treatment, and dope the polysilicon layer with phosphorus to form a phosphorus-doped polysilicon layer; then sequentially form a passivation layer and an electrode on the front side of the silicon wafer and the surface of the phosphorus-doped polysilicon layer to obtain an N-type TOPCon battery. Because the rapid thermal processing can heat the silicon wafer to 500-1500°C in a relatively short time, it can not only effectively reduce the boron diffusion time, but also reduce the impurity movement during the boron diffusion process, reduce the carrier recombination and body resistance of the silicon wafer, so that the prepared battery has a higher minority carrier lifetime and fill factor, and the battery efficiency can be increased by 0.03-0.05%. Therefore, the preparation method provided by the present invention can effectively solve the problem that the preparation of the P-type emitter in the N-type TOPCon battery in the prior art takes a long time, and the prepared battery has low efficiency.

[0026] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a flow chart of a method for preparing an N-type TOPCon battery provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0028] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0029] Compared with P-type PERC cells, TOPCon cells require 1-2nm ultra-thin silicon oxide and 150-200nm phosphorus-doped polysilicon layers on the back to achieve passivation contact and selective carrier passage, avoiding the damage layer caused by laser grooving on the back of the cell, which can greatly improve the open circuit voltage and fill factor of the cell and has a greater efficiency advantage.

[0030] The applicant of the present invention has found that when preparing an N-type TOPCon cell, it is necessary to form a P-type emitter on the front side of an N-type silicon wafer using tubular boron diffusion technology. However, the above method is not only time-consuming, but also produces a low efficiency cell.

[0031] In order to solve the above problems, the present invention provides a method for preparing an N-type TOPCon battery. Figure 1 As shown, it includes steps 101 to 103:

[0032] Step 101: Perform boron diffusion treatment on the front side of the N-type silicon wafer using rapid thermal processing technology.

[0033] In the above step 101, the silicon wafer can be heated to 500-1500°C in a very short time by rapid thermal processing, and the boron diffusion process can be completed quickly. The impurity movement during the diffusion process is small, which reduces the carrier recombination and body resistance of the silicon wafer, and can make the battery have a higher minority carrier lifetime and fill factor.

[0034] Step 102: forming a silicon oxide layer and a polysilicon layer on the back side of the silicon wafer that has been subjected to boron diffusion treatment, and doping the polysilicon layer with phosphorus to form a phosphorus-doped polysilicon layer.

[0035] In the above step 102, after the boron diffusion treatment is performed on the front side of the silicon wafer, a layer of ultra-thin silicon oxide layer is first prepared on the surface of the battery by low-pressure chemical vapor deposition (LPCVD technology), and then a layer of polycrystalline silicon thin layer is deposited on the ultra-thin silicon oxide layer to form a passivation contact structure, wherein the thickness of the ultra-thin silicon oxide layer is 1-2 nm, and the thickness of the polycrystalline silicon thin layer is 150-200 nm, and then the POCl is thermally decomposed by a tubular 3 The technology performs phosphorus diffusion treatment on the polysilicon thin layer to form a battery passivation contact structure and carrier selective passage, thereby reducing the battery surface recombination and metal contact resistance; optionally, the phosphorus diffusion treatment temperature is 500-1000°C and the time is 5-7 minutes. Optionally, in some embodiments, the phosphorus diffusion treatment temperature is 900-1000°C and the time is 5-7 minutes.

[0036] Step 103: forming a passivation layer and an electrode on the front side of the silicon wafer and the surface of the phosphorus-doped polysilicon layer in sequence to obtain an N-type TOPCon cell.

[0037] In the above step 103, an atomic layer deposition (ALD) process is used to plate a passivation layer on the entire front and back of the product to form field passivation; after the passivation layer is formed, an anti-reflection layer can be first plated on the front of the battery, and then on the back to further improve the passivation effect of the battery cell; finally, a metallization slurry is printed by screen printing or other methods to form an electrode and sintered, thereby obtaining an N-type TOPCon battery.

[0038] Optionally, the passivation layer may be an aluminum oxide layer with a thickness of 3 to 5 nm, an ALD process temperature of 200 to 300° C., and a deposition time of 8 to 10 min.

[0039] Optionally, the anti-reflection layer may be SiN x Specifically, SiN can be deposited on the front and back of the battery using PECVD technology. xThe thickness of the layer is 75-80nm, the PECVD process temperature is 500-600℃, and the deposition time is 4-6min. The setting of the anti-reflection layer can passivate the dangling bonds inside the battery and enhance the reflection of the incident light.

[0040] Optionally, metallic silver-aluminum paste can be used as metallization paste to prepare the above-mentioned battery electrode using screen printing technology, and then sintered and annealed at a high temperature of 780-900°C to form metal grid lines to collect and transmit current, form a silver-aluminum alloy layer and a good ohmic connection, and improve the fill factor.

[0041] Optionally, in some implementations, the metal gate line is formed by sintering and annealing at a high temperature of 780-800° C.

[0042] In the preparation method of the N-type TOPCon battery provided in the embodiment of the present invention, the front side of the silicon wafer is subjected to boron diffusion treatment by rapid thermal processing (RTP), because the rapid thermal processing can heat the silicon wafer to 500-1500°C in a relatively short time, which can not only effectively reduce the boron diffusion time, but also reduce the movement of impurities during the boron diffusion process, thereby reducing the carrier recombination and body resistance of the silicon wafer, so that the prepared battery has a higher minority carrier lifetime and fill factor, and the battery efficiency can be improved by 0.03-0.05%. Therefore, the preparation method provided by the present invention can effectively solve the problem that the preparation of the P-type emitter in the N-type TOPCon battery in the prior art takes a long time, and the prepared battery has a low efficiency.

[0043] In the above step 101, the above silicon wafer is an N-type silicon wafer after texturing. Through the texturing process, a double-surface pyramid structure can be formed on the silicon wafer.

[0044] Optionally, in one implementation, before the above step 101, step 100 is further included:

[0045] Step 100: Place the N-type silicon wafer into a texturing tank for single crystal alkali texturing.

[0046] In this embodiment, an alkali texturing treatment is performed to remove the mechanical damage layer and metal ions on the surface of the single crystal N-type original silicon wafer, and a "pyramid" appearance is formed on the surface of the battery, thereby improving the light trapping effect of the battery.

[0047] Among them, the texturing liquid in the texturing tank mainly includes acid and alkali solutions, and the single crystal alkali texturing specifically includes: first using alkali solution for alkali texturing, and then using acid solution for pickling; wherein, the alkali solution includes NaOH or KOH, and the solution mass ratio is 0.5-1.2%; the acid solution is HCL or HF, and the solution mass ratio is 0.5-1.2%; the above-mentioned single crystal alkali texturing time is between 550 and 650 seconds.

[0048] In the above step 101, the single crystal N-type original silicon wafers need to be screened first, and the screening criteria are a resistivity of 0.2Ω·cm to 0.5Ω·cm, a minority carrier lifetime of 230 to 250us, a battery size of 182×182mm or 182×183mm, and a battery thickness of 170 to 180um.

[0049] Optionally, in one implementation, the above step 101 specifically includes:

[0050] The silicon wafer is subjected to heating, boron deposition, oxidation and cooling treatments in sequence, wherein the heating rate of the heating treatment is 200-250°C / s, the temperature of the boron deposition treatment is 800-900°C, the temperature of the oxidation is 930-1000°C, and the total time of the rapid thermal treatment is 30-60 minutes.

[0051] In this embodiment, the silicon wafer is heated at a heating rate of 200-250°C / s, then boron is deposited on the silicon wafer at 800-900°C, and then oxidation is performed on the silicon wafer at 930-1000°C. The entire rapid thermal treatment time is controlled to be 30-60 minutes, for example, 40-50 minutes, or 45 minutes, so that the boron diffusion treatment of the silicon wafer can be completed quickly.

[0052] Optionally, in a specific embodiment, in the above boron deposition process, BCl 3 With O 2 The flow ratio of BCl is 1:3 to 1:5. 3 As a boron source, the flow ratio of boron to oxygen is controlled to be 1:3 to 1:5, and then under the temperature condition of 800 to 900°C, the boron deposition process on the silicon wafer can be completed well.

[0053] Optionally, in one implementation, after the above step 101, the method provided in the embodiment of the present invention further includes step 104:

[0054] Step 104 , performing laser doping treatment on a first area on the front side of the silicon wafer, wherein the first area is used for contacting the positive gate line.

[0055] In this embodiment, by laser doping the first area on the front side of the silicon wafer that has been treated with boron diffusion and is in contact with the positive gate line, laser can be used to promote doping to form a P++ structure, forming high and low doping concentration areas, reducing the recombination rate on the battery surface, and improving contact resistance and short-circuit current.

[0056] Optionally, in a specific embodiment, the laser doping treatment has a laser power of 5 to 10 watts, a frequency of 280 to 300 kHz, and a scanning speed of 10,000 to 15,000 mm / s, which can effectively propel the boron atoms on the surface of the silicon wafer to form a P++ structure in a high-concentration boron-doped area.

[0057] Optionally, in some embodiments, the laser doping treatment has a laser power of 6 to 8 watts, a frequency of 285 to 295 kHz, and a scanning speed of 12000 to 13000 mm / s.

[0058] Optionally, a femtosecond laser is used to perform the above laser doping treatment. A femtosecond laser has the highest power and is more conducive to doping.

[0059] Optionally, in one implementation, after the above step 104, the method provided by the embodiment of the present invention further includes step 105:

[0060] Step 105: performing oxidation treatment on the front side of the silicon wafer.

[0061] In this embodiment, after laser doping the first area on the front side of the silicon wafer, a high-temperature furnace is used to oxidize and grow silicon dioxide on the front side of the silicon wafer. This not only promotes the entire front side doping, but the silicon dioxide layer grown by oxidation on the surface can also improve the short-wave utilization rate of the battery and inhibit the potential induced attenuation (PID) phenomenon of the later battery components.

[0062] Optionally, in a specific embodiment, the temperature of the oxidation treatment is 600-1200° C. and the treatment time is 30-60 min, which can effectively realize the oxidation growth of silicon dioxide on the front side of the silicon wafer.

[0063] Optionally, in some embodiments, the temperature of the oxidation treatment is 600-700° C. and the treatment time is 40-50 min.

[0064] Optionally, in some embodiments, the oxidation treatment is performed at a temperature of 625 to 675° C. and for a treatment time of 40 to 50 min.

[0065] Optionally, in one implementation manner, the method provided in the embodiment of the present invention further includes step 1021 before the above step 102:

[0066] Chain pickling is used to remove the borosilicate glass layer on the back of the silicon wafer, and then alkaline polishing is performed.

[0067] In this embodiment, since boron diffusion is only required on the front side of the silicon wafer, single-sided diffusion is required, and the borosilicate glass layer formed on the back side is removed from the non-diffused surface by chain pickling, and the silicon wafer is alkaline polished using a high-concentration alkaline solution to form a block-sized morphology structure, forming a polished surface with high reflectivity, thereby improving the surface flatness of the battery, increasing the reflection of long-wave light, promoting secondary absorption of light, increasing short-circuit current and reducing leakage current.

[0068] Optionally, the acid solution in the chain pickling is HF or HNO with a mass concentration of 3 to 10%. 3 The alkaline solution is 5-10% mass concentration of NaOH or KOH, and the alkali polishing reaction time is between 280 and 300 seconds, which can effectively improve the surface flatness of the battery, increase the reflection of long-wave light, promote the secondary absorption of light, increase the short-circuit current and reduce the leakage current.

[0069] Optionally, in one implementation manner, the method provided in the embodiment of the present invention further includes step 1031 before the above step 103:

[0070] Chain pickling is used to remove the phosphosilicate glass layer on the front side of the silicon wafer, and then alkaline polishing is performed.

[0071] In this embodiment, because a furnace tube is used for phosphorus doping, a phosphosilicate glass layer is generated on the front side of the silicon wafer. Therefore, it is necessary to remove the front phosphosilicate glass by single-sided etching, thereby reducing the recombination of electrons in the emission region and increasing the short-circuit current and open-circuit voltage.

[0072] In addition, if the polysilicon layer is prepared on both sides in step 102, before the passivation layer and the electrode are formed on the front side of the silicon wafer and the surface of the phosphorus-doped polysilicon layer in turn, the front polysilicon layer needs to be etched with alkali or alkali + additive to remove the front polysilicon layer and retain the back polysilicon structure.

[0073] The acid solution in the chain pickling is 3-10% mass concentration of HF or HNO 3 The alkaline solution is NaOH or KOH with a mass concentration of 5-10%, and the alkali polishing reaction time is between 280 and 300 seconds, which can effectively remove the phosphosilicate glass on the front side of the battery after phosphorus diffusion, reduce the recombination of electrons in the emission area, and increase the short-circuit current and open-circuit voltage.

[0074] The present invention also provides an N-type TOPCon battery, wherein the battery is prepared by the above-mentioned preparation method of the N-type TOPCon battery.

[0075] The present invention is described in detail below by way of examples.

[0076] Example 1

[0077] (1) Provide a single crystal N-type raw silicon wafer with a resistivity of 0.4Ω·cm, a minority carrier lifetime of 240us, a size of 182×182mm, and a thickness of 180um, and place it in a texturing tank for single crystal alkaline texturing. The alkaline solution in the texturing tank is NaOH with a mass concentration of 0.8%, and the acidic solution is HF with a mass concentration of 0.8%. The texturing time is controlled to be 600s.

[0078] (2) Send the texturized silicon wafer into the RTP equipment for boron diffusion. The RTP heating rate is 200℃ / s, the boron deposition temperature is 850℃, the forward oxidation temperature is 950℃, and the RTP process time is 50min.

[0079] (3) The silicon wafer after boron diffusion treatment is subjected to laser doping and oxidation treatment in sequence; wherein, during laser doping, the laser power is 9 watts, the frequency is 280 kHz, and the scanning speed is 10000 mm / s; the oxidation treatment temperature is 600°C, and the oxidation time is 55 min.

[0080] (4) The borosilicate glass layer is removed from the non-diffusion surface by single-sided etching with chain HF, and a square morphology structure is formed by alkali polishing; wherein the HF concentration is 5%, the solution used for the alkali polishing treatment is 8% by mass NaOH, and the reaction time is 280 s.

[0081] (5) First, grow an ultra-thin oxide layer with a thickness of 1.5 nm on the back side, and then prepare a polysilicon layer with a thickness of 150 nm on both sides; send the silicon wafer into a furnace tube for phosphorus doping treatment, the phosphorus doping temperature is 900°C, and the phosphorus doping time is 5 minutes.

[0082] (6) First, remove the front phosphosilicate glass by single-sided acid etching, and then remove the front polysilicon layer by alkaline etching; wherein the solution in the acid etching treatment is 5% by mass HF, and the solution in the alkaline etching treatment is 8% by mass NaOH, and the processing time is 280s.

[0083] (7) depositing an aluminum oxide layer and a SiNx layer on the front and back sides of the silicon wafer in sequence as a passivation layer and an anti-reflection layer, respectively, wherein the thickness of the aluminum oxide layer is 3 nm, and the thickness of the SiNx layer is 75 nm; the deposition temperature of the aluminum oxide layer is 250° C., and the deposition time is 8 min; the deposition temperature of the SiNx layer is 600° C., and the deposition time is 6 min;

[0084] (8) Prepare the front and back metal electrodes, use silver paste for the front and back main grids, and use silver paste for the front and back fine grids. The thickness of the front fine grid is 19um and the thickness of the back fine grid is 17um. Then sinter at 780°C to obtain an N-type TOPCon battery.

[0085] Comparative Example 1

[0086] (1) Provide a single crystal N-type raw silicon wafer with a resistivity of 0.4Ω·cm, a minority carrier lifetime of 240us, a size of 182×182mm, and a thickness of 180um, and place it in a texturing tank for single crystal alkaline texturing. The alkaline solution in the texturing tank is NaOH with a mass concentration of 0.8%, and the acidic solution is HF with a mass concentration of 0.8%. The texturing time is controlled to be 600s.

[0087] (2) The silicon wafer after texturing is sent into the diffusion furnace tube, and conventional boron diffusion treatment is carried out according to the steps of heating the diffusion tube, boron deposition, and high-temperature oxidation. The furnace tube temperature is 950°C, the boron deposition time is 5 minutes, and the high-temperature oxidation time is 60 minutes.

[0088] (3) The borosilicate glass layer is removed from the non-diffusion surface by single-sided etching with chain HF, and a square morphology structure is formed by alkali polishing; wherein the HF concentration is 5%, the solution used for the alkali polishing treatment is 8% by mass NaOH, and the reaction time is 280 s.

[0089] (4) First, an ultra-thin oxide layer with a thickness of 1.5 nm is grown on the back side, and then a polysilicon layer with a thickness of 150 nm is prepared on both sides; the silicon wafer is sent into a furnace tube for phosphorus doping treatment, the phosphorus doping temperature is 900°C, and the phosphorus doping time is 5 minutes.

[0090] (5) First, remove the front phosphosilicate glass by single-sided acid etching, and then remove the front polysilicon layer by alkaline etching; wherein the solution in the acid etching treatment is 5% by mass HF, and the solution in the alkaline etching treatment is 8% by mass NaOH, and the processing time is 280s.

[0091] (6) depositing an aluminum oxide layer and a SiNx layer on the front and back sides of the silicon wafer, respectively, as a passivation layer and an anti-reflection layer, wherein the thickness of the aluminum oxide layer is 3 nm, and the thickness of the SiNx layer is 75 nm; the deposition temperature of the aluminum oxide layer is 250° C., and the deposition time is 8 min; the deposition temperature of the SiNx layer is 600° C., and the deposition time is 6 min;

[0092] (7) Prepare the front and back metal electrodes, use silver paste for the front and back main grids, and use silver paste for the front and back fine grids. The thickness of the front fine grid is 19um and the thickness of the back fine grid is 17um. Then sinter at 780°C to obtain an N-type TOPCon battery.

[0093] The N-type TOPCon batteries prepared in Example 1 and Comparative Example 1 were subjected to electrical performance IV tests, respectively, and the results are shown in Table 1.

[0094] According to Table 1, compared with the N-type TOPCon cells prepared by traditional laser doping boron diffusion, the overall efficiency of the cells prepared by RTP boron diffusion is increased by about 0.03%, showing a higher efficiency advantage.

[0095] Table 1

[0096]

[0097] In summary, in this embodiment, the preparation method of the N-type TOPCon battery provided is to firstly perform boron diffusion treatment on the front side of the N-type silicon wafer using rapid thermal processing technology; then form a silicon oxide layer and a polysilicon layer on the back side of the silicon wafer after the boron diffusion treatment, and dope the polysilicon layer with phosphorus to form a phosphorus-doped polysilicon layer; then sequentially form a passivation layer and an electrode on the front side of the silicon wafer and the surface of the phosphorus-doped polysilicon layer to obtain an N-type TOPCon battery. Because the rapid thermal processing can heat the silicon wafer to 500-1500°C in a relatively short time, it can not only effectively reduce the boron diffusion time, but also reduce the impurity movement during the boron diffusion process, reduce the carrier recombination and body resistance of the silicon wafer, so that the prepared battery has a higher minority carrier lifetime and fill factor, and the battery efficiency can be increased by 0.03-0.05%. Therefore, the preparation method provided by the present invention can effectively solve the problem that the preparation of the P-type emitter in the N-type TOPCon battery in the prior art takes a long time, and the prepared battery has a low efficiency.

[0098] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they are aware of the basic creative concept. Therefore, the claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0099] The above is a detailed introduction to an N-type TOPCon battery and a preparation method thereof provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A method for preparing an N-type TOPCon battery, It is characterized in that include: The front side of the N-type silicon wafer is subjected to boron diffusion treatment using rapid thermal processing technology; forming a silicon oxide layer and a polysilicon layer on the back of the silicon wafer after the boron diffusion treatment, and doping the polysilicon layer with phosphorus to form a phosphorus-doped polysilicon layer; A passivation layer and an electrode are sequentially formed on the front side of the silicon wafer and on the surface of the phosphorus-doped polysilicon layer to obtain an N-type TOPCon cell.

2. The preparation method according to claim 1, It is characterized in that The rapid thermal processing technology is used to perform boron diffusion treatment on N-type silicon wafers, including: The silicon wafer is subjected to heating, boron deposition, oxidation and cooling treatments in sequence, wherein the heating rate of the heating treatment is 200-250°C / s, the temperature of the boron deposition treatment is 800-900°C, the temperature of the oxidation is 930-1000°C, and the total time of the rapid thermal treatment is 30-60 minutes.

3. The preparation method according to claim 1, It is characterized in that In the boron deposition process, BCl 3 With O 2 The flow ratio is 1:3~1:

5.

4. The preparation method according to claim 1, It is characterized in that After the N-type silicon wafer is subjected to boron diffusion treatment, the method further comprises: A laser doping process is performed on a first area on the front side of the silicon wafer, where the first area is used for contacting the positive gate line.

5. The preparation method according to claim 4, It is characterized in that The laser power of the laser doping treatment is 5-10 watts, the frequency is 280-300 KHz, and the scanning speed is 10000-15000 mm / s.

6. The preparation method according to claim 4, It is characterized in that After performing laser doping on the first area on the front side of the silicon wafer, the method further comprises: The front side of the silicon wafer is subjected to oxidation treatment.

7. The preparation method according to claim 6, It is characterized in that The oxidation treatment temperature is 600-1200° C. and the treatment time is 30-60 minutes.

8. The preparation method according to claim 1, It is characterized in that Before forming a silicon oxide layer and a polysilicon layer on the back side of the silicon wafer after the boron diffusion treatment, the method further comprises: Chain pickling is used to remove the borosilicate glass layer on the back of the silicon wafer, and then alkaline polishing is performed.

9. The preparation method according to claim 1, It is characterized in that Before sequentially forming a passivation layer and an electrode on the front side of the silicon wafer and on the surface of the phosphorus-doped polysilicon layer, the method further comprises: Chain pickling is used to remove the phosphosilicate glass layer on the front side of the silicon wafer, and then alkaline polishing is performed.

10. An N-type TOPCon battery, It is characterized in that The method is prepared by any one of claims 1 to 9.