Large dynamic range logarithmic amplifier with extensible dynamic range

The integration of resistor attenuators and limiting detectors in a logarithmic amplifier structure expands the dynamic range while addressing noise and stability issues, ensuring high accuracy and bandwidth in logarithmic amplification.

CN119154810APending Publication Date: 2024-12-17NO 24 RES INST OF CETC
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Patent Information

Application Number
CN202411314844.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-20
Publication Date
2024-12-17

AI Technical Summary

Technical Problem

Existing large dynamic range logarithmic amplifiers face issues such as narrow frequency band, large noise, and large logarithmic consistency errors due to excessive number of limiting amplifier units or high gain, which hinder the expansion of dynamic range.

Method used

A logarithmic amplifier design incorporating cascaded limiting amplifier units, resistor attenuators, and limiting detectors with an L-type voltage divider resistor network structure, expanding the dynamic range without increasing the number of stages or gain.

Benefits of technology

The design achieves a broader dynamic range with reduced noise and improved stability, maintaining logarithmic accuracy and frequency bandwidth, suitable for bipolar and CMOS processes.

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Abstract

The invention belongs to the field of integrated circuits, and particularly relates to a large-dynamic-range logarithmic amplifier with an extensible dynamic range. Comprising cascaded N-stage amplitude limiting amplification units, M-stage resistance attenuators, N + M + 1-stage amplitude limiting detectors and an adder, the output end of each stage of amplitude limiting amplification unit is connected with the input end of a first-stage wave detector, the output end of each stage of resistance attenuator is connected with the input end of a first-stage amplitude limiting wave detector, and the input end of the first-stage amplitude limiting amplification unit and the input end of the first-stage resistance attenuator are connected with the input end of the first-stage amplitude limiting wave detector; the output end of the (N + M + 1)-stage amplitude limiting detector is connected with the input end of the adder; n > = 2, M > = 2; according to the logarithmic amplifier, the problems that when an external circuit is built around the logarithmic amplifier to enlarge the input dynamic range, the temperature characteristic of separated components is poor, and the circuit is unstable are solved, and the monolithic design of the logarithmic amplifier with the large dynamic range is achieved.
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Description

Technical Field

[0001] The invention belongs to the field of integrated circuits, and in particular relates to a large dynamic range logarithmic amplifier with expandable dynamic range. Background Art

[0002] The existing implementation methods of large dynamic range logarithmic amplifiers are mainly divided into series cascade baseband logarithmic amplifiers and series cascade demodulation logarithmic amplifiers. Figure 1 As shown, N-stage limiting amplifier units are connected in series, and the output voltage V is obtained by summing the outputs of each stage of limiting amplifier units. OUT With input voltage V IN It is logarithmically related to the input power P IN The transmission characteristics of the limiting amplifier unit are as follows: Figure 2 As shown, when the input signal strength does not exceed a certain threshold (V in ≤E k ), the output signal strength is proportional to the input signal strength (V out =A·V in ), the limiting amplifier unit is in a linear amplification state with a gain of A; and when the input signal strength reaches a certain threshold (V in >E k ), the output signal strength remains unchanged (V out =A·E k ), the limiting amplifier unit is in the limiting state. Therefore, Figure 1 The series-cascaded baseband logarithmic amplifier shown produces a logarithmic characteristic for the following reasons:

[0003] When the input V IN When it is very small, V IN ≤E k / A N-1 , the limiting amplifier units 1 to N are all in the linear amplification state, and the output V OUT for:

[0004] V OUT =A·V IN +A 2 ·V IN +A 3 ·V IN +…+A N-1 ·V IN +A N ·V IN (1)

[0005] With V IN Increase, when E k / A N-1 <V IN ≤Ek / A N-2 When the limiting amplifier units 1 to N-1 are in the linear amplification state, the limiting amplifier unit N is in the limiting state, V OUT for:

[0006] V OUT =A·V IN +A 2 ·V IN +A 3 ·V IN +…+A N-1 ·V IN +A·E k (2)

[0007] When E k / A N-2 <V IN ≤E k / A N-3 When the limiting amplifier units 1 to N-2 are in a linear amplification state, the limiting amplifier units N-1 and N are in a limiting state, V OUT for:

[0008] V OUT =A·V IN +A 2 ·V IN +A 3 ·V IN +…+A N-2 ·V IN +2A·E k (3)

[0009] With V IN Continue to increase, when E k / A 2 <V IN ≤E k / A 1 When the limiting amplifier unit 1 and the limiting amplifier unit 2 are in the linear amplification state, the limiting amplifier units 3 to N are in the limiting state, V OUT for:

[0010] V OUT =A·V IN +A 2 ·V IN +(N-2)·A·E k (4)

[0011] When E k / A <V IN ≤E k When the limiting amplifier unit 1 is in the linear amplification state, the limiting amplifier units 2 to N are in the limiting state, V OUT for:

[0012] V OUT =A·V IN +(N-1)·A·E k (5)

[0013] When E k <V IN When the limiting amplifier units 1 to N are all in the limiting state, V OUT for:

[0014] V OUT =N·A·E k (6)

[0015] It can be seen that within a certain range, as V IN As the amplitude of the limiting amplifier increases, the number of limiting amplifier units in the circuit in the limiting state increases. IN Each interval range corresponds to a different number of limiting amplifier units in the limiting state in the circuit. For the sake of explanation, let the number of units in the limiting state be S, 1≤S≤N-1, and the corresponding input signal at this time be V IS , the output signal is V OS , then V IS The value range of can be expressed as:

[0016]

[0017] The corresponding V OS It can be expressed as:

[0018] V OS =A·V IS +A 2 ·V IS +A 3 ·V IS +…+A N-S ·V IS +S·A·E k (8)

[0019] If the input signal increases by A times, it becomes A·V IS At this time, there are S+1 limiting amplifier units in the limiting state, and the corresponding output V OS+1 It can be expressed as:

[0020] V OS+1 =A 2 ·V IS +A 3 ·V IS +…+A N-S ·V IS +(S+1)·A·E k (9)

[0021] Subtracting equation (9) from equation (8), we can get the output change ΔV when the input increases by A times. O It can be expressed as:

[0022] ΔV O =V OS+1 -V OS =A·E k -A.V. IS (10)

[0023] According to formula (7), when S is very small, the number of limiting amplifier units in the limiting state is small, and several units in the previous stage of the series cascade chain are in the linear amplification state, which means that the input of limiting amplifier unit 1 is very small, that is, V IS Very small, at this time V IS With E k Compared with, it can be ignored, then there is:

[0024] ΔV O ≈A·E k (11)

[0025] At this time, every time the input signal strength increases by A times, the output signal will increase by A·E k , thus realizing the logarithmic property with base A.

[0026] According to formula (7), as S gradually increases, V IS is also increasing and can no longer be ignored, but according to formula (10), ΔV O It is also gradually decreasing, that is to say, as the input signal strength continues to increase, the output increment continues to decrease, thus showing a large gain for small signals and a small gain for large signals. This performance is in line with the original design intention of the logarithmic amplifier. The purpose of the logarithmic amplifier is not to pursue strict logarithmic characteristics, but to require amplification for small signals and limiting for large signals.

[0027] Let’s discuss the case of S=0. According to formula (1), we know that V IN =E k / A N-1 The output and V IN =E k / A N The difference in output is about A·E k , the logarithmic characteristic still exists, when V IN <E k / A N When the output gradually deviates from the logarithmic characteristic, that is, E k / A Nis the lower limit of the dynamic range of the series cascaded baseband logarithmic amplifier. When S=N, the limiting amplifier units 1 to N are all in the limiting state, the output no longer increases with the increase of input, and the logarithmic characteristic disappears, that is, E k is the upper limit of the dynamic range of the series cascaded baseband logarithmic amplifier. Without considering the influence of other factors, the dynamic range is [E k / A N , E k ].

[0028] and Figure 3 The architecture of the series cascade demodulation logarithmic amplifier is shown in Figure 1 Compared with the series cascade baseband logarithmic amplifier shown in the figure, it also uses N stages of limiting amplifier units in series cascade. The difference is that a detector is connected after each stage of limiting amplifier unit. The output voltage V is obtained by summing the outputs of each stage of detectors. OUT Similarly, the input voltage V IN It is logarithmically related to the input power P IN It can be found that the principles of constructing logarithmic characteristics of the two are very similar, and both are obtained by using piecewise linear approximation of logarithmic functions, except that for the series cascade demodulation logarithmic amplifier, A·E in formula (11) k will be replaced by the corresponding detection output. More importantly, the information of the input modulation can be obtained from the output. Similarly, the dynamic range of the cascaded demodulation logarithmic amplifier is also [E k / A N , E k ].

[0029] It can be seen that for a large dynamic range logarithmic amplifier using a series cascade of multiple limiting amplifier units, the more series connected, the larger the input dynamic range; the greater the gain of each stage, the larger the input dynamic range. However, the more series connected, the narrower the frequency band and the greater the noise; the greater the gain, the lower the logarithmic conversion accuracy, the greater the logarithmic consistency error, the more unstable the circuit, and the easier it is to self-oscillate. Therefore, for series cascaded baseband logarithmic amplifiers and series cascaded demodulation logarithmic amplifiers, blindly increasing the number of limiting amplifier units or the linear gain of limiting amplifier units is not a good strategy to achieve a large dynamic range. Summary of the invention

[0030] In order to overcome the shortcomings of the above-mentioned large dynamic range logarithmic amplifier, such as narrow frequency band, large noise and large logarithmic consistency error caused by excessively increasing the number of limiting amplifier units or the linear gain of the limiting amplifier units when achieving a larger target dynamic range, the present invention proposes a large dynamic range logarithmic amplifier with expandable dynamic range, which can expand the dynamic range. Figure 3On the basis of the traditional series cascade demodulation logarithmic amplifier shown in the figure, the present invention introduces several levels of resistor attenuators, whose attenuation is consistent with the gain of the limiting amplifier unit, and similarly connects a detector with a limiting function after each level of resistor attenuator, so that the dynamic range of the original series cascade demodulation logarithmic amplifier can be expanded. This technology avoids the poor temperature characteristics and circuit instability of discrete components when building an external circuit around the logarithmic amplifier to increase the input dynamic range, and realizes the monolithic design of a large dynamic range logarithmic amplifier.

[0031] In order to achieve the above-mentioned object of the invention, the present invention provides the following technical solutions:

[0032] A large dynamic range logarithmic amplifier with expandable dynamic range comprises cascaded N-stage limiting amplifier units, M-stage resistor attenuators, N+M+1-stage limiting detectors and an adder; the output end of each stage limiting amplifier unit is connected to the input end of a first-stage detector, the output end of each stage resistor attenuator is connected to the input end of the first-stage limiting detector, and the input end of a first-stage limiting amplifier unit and the input end of a first-stage resistor attenuator are connected to the input end of the first-stage limiting detector; the output end of the N+M+1-stage limiting detector is connected to the input end of the adder; N≥2, M≥2.

[0033] Furthermore, the input end of the first-stage limiting amplifier unit, the input end of the first-stage resistor attenuator, and the input end of the first-stage limiting detector input signal V IN The output of the adder outputs a signal V through the resistor R OUT .

[0034] Furthermore, the attenuation of the resistance attenuator is consistent with the gain of the limiting amplifier unit.

[0035] Furthermore, the resistance attenuator adopts an L-type voltage divider resistance network structure.

[0036] Furthermore, the L-type voltage-dividing resistor network structure includes a plurality of identical resistors connected in series or in parallel.

[0037] Furthermore, the logarithmic amplifier adopts a bipolar process and a CMOS process. The beneficial effects of the present invention are:

[0038] (1) The large dynamic range logarithmic amplifier with expandable dynamic range involved in the present invention effectively avoids the disadvantages of too narrow frequency band, too large noise and too large logarithmic consistency error caused by too many stages of limiting amplifier units or too large single-stage gain by introducing a resistor attenuator and a detector with limiting function;

[0039] (2) In a large dynamic range logarithmic amplifier with expandable dynamic range involved in the present invention, the resistor attenuator adopts an L-type voltage divider resistor network structure, and multiple identical resistors are connected in series or in parallel, and a reasonable layout is added to avoid the influence of the deviation in the manufacturing process on the attenuation amount and its temperature characteristics;

[0040] (3) The present invention has strong versatility and is applicable to bipolar processes and CMOS processes, and is particularly suitable for series cascade demodulation logarithmic amplifiers. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to make the purpose, technical solution and beneficial effects of the present invention clearer, the present invention provides the following drawings for illustration:

[0042] Figure 1 The main architecture diagram of the existing series cascade baseband logarithmic amplifier;

[0043] Figure 2 It is a transmission characteristic diagram of a limiting amplifier unit in an existing series cascade baseband logarithmic amplifier;

[0044] Figure 3 This is the main architecture diagram of the existing series cascade demodulation logarithmic amplifier;

[0045] Figure 4 This is a structural diagram of a large dynamic range logarithmic amplifier with expandable dynamic range according to an embodiment of the present invention;

[0046] Figure 5 A circuit diagram of an implementation scheme of a limiting detector according to an embodiment of the present invention. DETAILED DESCRIPTION

[0047] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0048] It should be noted that since the embodiments of the present invention focus on current or voltage, the current or voltage input / output of each module / unit / device is used for description herein. Those skilled in the art should understand that, in fact, what is input / output by each module / unit / device is a signal.

[0049] like Figure 4As shown, a large dynamic range logarithmic amplifier with expandable dynamic range includes cascaded N-stage limiting amplifier units, M-stage resistor attenuators, N+M+1-stage limiting detectors and an adder; the output end of each stage limiting amplifier unit is connected to the input end of the first-stage detector, the output end of each stage resistor attenuator is connected to the input end of the first-stage limiting detector, and the input end of the first-stage limiting amplifier unit and the input end of the first-stage resistor attenuator are connected to the input end of the first-stage limiting detector; the output end of the N+M+1-stage limiting detector is connected to the input end of the adder; N≥2, M≥2.

[0050] In the embodiment of the present invention, the input end of the first-stage limiting amplifier unit, the input end of the first-stage resistor attenuator, and the input end of the first-stage limiting detector input signal V IN The output of the adder outputs a signal V through the resistor R OUT .

[0051] In the embodiment of the present invention, the attenuation of the resistance attenuator is consistent with the gain of the limiting amplifier unit.

[0052] In an embodiment of the present invention, the resistance attenuator adopts an L-type voltage-dividing resistor network structure. The L-type voltage-dividing resistor network structure includes a plurality of identical resistors connected in series or in parallel. For example, the L-type voltage-dividing resistor network structure can be composed of only two pure resistance elements connected in series to form a simple voltage-dividing network. This structure is very basic and easy to understand and implement, without the need for complex circuit design and components.

[0053] In the embodiment of the present invention, the present invention is applicable to bipolar process and CMOS process, and is particularly applicable to a series cascade demodulation logarithmic amplifier; the limiting amplifier unit can be designed to provide a limiting function by using a device such as a tunnel diode, a bipolar transistor or a metal-semiconductor field effect transistor (MESFET) and stimulating it to a saturation state. When the input signal amplitude exceeds a certain threshold, the amplifier enters a saturation state, and the output signal amplitude is limited to a constant or approximately constant level.

[0054] Furthermore, the input signal V INThe input terminal of the limiting amplifier unit 1 is connected to the input terminal of the resistor attenuator 1, the input terminal of the limiting amplifier unit 1 and the input terminal of the detector 0, the output terminal of the limiting amplifier unit 1 is connected to the input terminal of the limiting amplifier unit 2 and the input terminal of the detector 1, the output terminal of the limiting amplifier unit 2 is connected to the input terminal of the limiting amplifier unit 3 and the input terminal of the detector 2, and so on, the output terminal of the limiting amplifier unit N-1 is connected to the input terminal of the limiting amplifier unit N and the input terminal of the detector N-1, the output terminal of the limiting amplifier unit N is connected to the input terminal of the detector N, the output terminal of the resistor attenuator 1 is connected to the input terminal of the resistor attenuator 2 and the detector N+1, the output terminal of the resistor attenuator 2 is connected to the input terminal of the resistor attenuator 3 and the detector N+2, and so on, the output terminal of the resistor attenuator M-1 is connected to the input terminal of the resistor attenuator M and the detector N+M-1, the output terminal of the resistor attenuator M is connected to the detector N+M, and the sum of the outputs of the N+M+1 level detectors 0 to N+M constitutes the output V of the large dynamic range logarithmic amplifier. OUT .

[0055] The working principle of the embodiment of the present invention is as follows:

[0056] For a detector with a limiting function, its input-output relationship can be expressed as:

[0057]

[0058] Among them, I out Represents the output current of the limit detector, V in Indicates the input voltage of the limit detector; U L Indicates the inflection point voltage of the limiting detector; I P represents the limiting current of the limiting detector; f represents the limiting function.

[0059] Assume that the linear gain of limiting amplifier units 1 to N is A, and the gain of resistor attenuators 1 to M is A. -1 , A>1, let U L =A·E k The input of the entire circuit is represented by V IN , the output is expressed as V OUT ,but:

[0060] When the input signal V IN When it is very small, V IN ≤E k / A N-1 , all limiting amplifier units are in linear amplification state, resistor attenuators 1 to M work normally, all detectors are in non-limiting state, and the output V OUT for:

[0061]

[0062] With V INIncrease, when E k / A N-1 <V IN ≤E k / A N-2 When the limiting amplifier unit N is in the limiting state, the other limiting amplifier units are in the linear amplification state, the resistor attenuators 1 to M work normally, the detector N is in the limiting state, and the other detectors are in the non-limiting state, and the output V OUT for:

[0063]

[0064] When E k / A N-2 <V IN ≤E k / A N-3 When the limiting amplifier unit N-1 and limiting amplifier unit N are both in the limiting state, the other limiting amplifier units are in the linear amplification state, the resistor attenuators 1 to M work normally, the detectors N-1 and N are in the limiting state, and the other detectors are in the non-limiting state, and the output V OUT for:

[0065]

[0066] It is not difficult to see that with the V IN Continue to increase, when E k / A 2 <V IN ≤E k / A 1 When the limiting amplifier units 3 to N are all in the limiting state, only limiting amplifier unit 1 and limiting amplifier unit 2 are in the linear amplification state, the resistor attenuators 1 to M work normally, the detectors 3 to N are in the limiting state, and the other detectors are in the non-limiting state, and the output V OUT for:

[0067]

[0068] When E k / A <V IN ≤E k When the limiting amplifier units 2 to N are in the limiting state, the limiting amplifier unit 1 is in the linear state, the resistor attenuators 1 to M work normally, the detectors 2 to N are in the limiting state, and the other detectors are in the non-limiting state, and the output V OUT for:

[0069]

[0070] When E k <V IN ≤A·E kWhen , all the limiting amplifier units are in the limiting state, the resistor attenuators 1 to M work normally, the detectors 1 to N are in the limiting state, and the other detectors are in the non-limiting state, and the output V OUT for:

[0071]

[0072] When A·E k <V IN ≤A 2 ·E k When , all the limiting amplifier units are in the limiting state, the resistor attenuators 1 to M work normally, the detectors 0 to N are in the limiting state, and the other detectors are in the non-limiting state, and the output V OUT for:

[0073]

[0074] The input signal continues to increase. M ·E k <V IN ≤A M+1 ·E k When , all the limiting amplifier units are in the limiting state, the resistor attenuators 1 to M work normally, the detectors 0 to N+M-1 are in the limiting state, the detector N+M is in the non-limiting state, and the output V OUT for:

[0075]

[0076] When V IN >A M+1 ·E k When all limiting amplifier units are in limiting state, the resistor attenuators 1 to M work normally, the detectors 0 to N+M are in limiting state, and the output V OUT for:

[0077] V OUT =(N+M+1)·I P R (21)

[0078] It can be seen that within a certain range, as the input signal continues to increase, the number of detectors in the circuit in the limiting state increases, and the number of detectors in the limiting state corresponds to different intervals of the input signal. Assuming that the number of detectors in the limiting state is S, 1≤S≤N+M, the corresponding input signal at this time is V IS , the output signal is V OS , then V IS The value range of can be expressed as:

[0079]

[0080] The corresponding V OS It can be expressed as:

[0081]

[0082] Assume that the input signal is increased by A times, that is, it becomes A·V IS , then there will be S+1 detectors in the limiting state, and the corresponding output V OS+1 It can be expressed as:

[0083]

[0084] Compared to the input increasing by A times, the output changes by ΔV O It can be expressed as:

[0085]

[0086] According to formula (22), when S is very small, the number of detectors in the limiting state is very small, indicating that several preceding units in the cascade chain of limiting amplifier units are in the linear amplification state, which means that V IS Very small, at this time V IS / A M The generated detection output and I P Compared with R, it can be ignored, then there exists:

[0087] ΔV O ≈I P R(26)

[0088] In other words, this circuit structure can realize the logarithmic characteristic with base A, that is, when the input signal strength increases by A times, the output will increase by one I. P R.

[0089] According to formula (22), as S gradually increases, V IS is also increasing and can no longer be ignored, but according to formula (25), ΔV O It is also gradually decreasing, that is to say, as the input signal strength continues to increase, the output increment continues to decrease, thereby achieving large gain for small signals and small gain for large signals, which is in line with the original design intention of the logarithmic amplifier.

[0090] In addition, according to formula (13), when E k / A N ≤V IN ≤E k / A N-1 When , although all detectors are not saturated, the input and output still have logarithmic characteristics, and when the input signal is smaller, it will deviate from the logarithmic characteristics. When all detectors are in the limiting state, the output no longer increases with the increase of input, and the logarithmic characteristic disappears. This shows Figure 4 The demodulation logarithmic amplifier shown in the figure adopts the dynamic range extension technology. Without considering the influence of other factors, the dynamic range is [E k / A N , A M +1 E k ], compared with the dynamic range of traditional technology [E k / A N , E k ], the present invention effectively improves the dynamic range of the logarithmic amplifier by designing an M-level resistor attenuator and an N+M+1-level limiting detector.

[0091] In the embodiment of the present invention, the number of stages M of the resistor attenuator is limited by the maximum input voltage allowed by the input device in the circuit, and of course also by the attenuation A and the inflection point voltage E. k In the circuit, when A M+1 E k When it is already very close to the power supply voltage, increasing M will only increase the static power consumption. Therefore, the number of resistor attenuators satisfies:

[0092]

[0093] The above design method can ensure that the dynamic range of the logarithmic amplifier is widened as much as possible without increasing the static power consumption.

[0094] In some embodiments of the present application, a circuit diagram of a limiting detector is shown in FIG. Figure 5 As shown, it includes a differential mode input pair tube and a common mode input tube; the differential mode input pair tube and the common mode input tube share a common emitter; by making the differential mode input pair tube and the common mode input tube share a common emitter, the difference current formed has the limiting function relationship with the differential mode input, then:

[0095]

[0096] Among them, I1, I2, and I3 represent the input currents of transistors Q1, Q2, and Q3 respectively. Transistors Q1 and Q2 are used as differential input pairs, and transistor Q3 is used as a common-mode input pair. ΔI represents the differential current, and V ID Represents the differential mode voltage, V CM Represents the common mode voltage, V T It represents the thermal voltage, which refers to the voltage generated by the thermal motion of carriers in semiconductor devices. It can be 26mV at room temperature. At this time, the corresponding limiting function f is a hyperbolic tangent square relationship, and the inflection point voltage U of the limiting detector is L =AE k , the limiting current I of the limiting detector P =I TAIL , which corresponds to the previous formula (12).

[0097] In some embodiments, if the function of the limit detector is to be realized by using CMOS technology, the input tube of the limit detector should be limited to the subthreshold region, which means that when the gate-source voltage is less than the threshold voltage, the transistor is not completely cut off, but there is a weak current, which is called subthreshold current. In this region, there are inversion carriers in the channel of the transistor, so that the current is not zero but very small.

[0098] Therefore, the dynamic range expansion technology involved in the present invention realizes the expansion of the dynamic range of the logarithmic amplifier without changing the number of stages and gain of the limiting amplifier unit, and is very suitable for the design of a large dynamic range logarithmic amplifier, and has the advantages of broadband, high stability, and strong versatility.

[0099] In the description of the present invention, it is necessary to understand that the orientation or positional relationship indicated by the terms "input end", "output end" and the like is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0100] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A large dynamic range logarithmic amplifier with expandable dynamic range, characterized in that: It comprises cascaded N-stage limiting amplifier units, M-stage resistor attenuators, N+M+1-stage limiting detectors and an adder; the output end of each stage limiting amplifier unit is connected to the input end of the first-stage detector, the output end of each stage resistor attenuator is connected to the input end of the first-stage limiting detector, and the input end of the first-stage limiting amplifier unit and the input end of the first-stage resistor attenuator are connected to the input end of the first-stage limiting detector; the output end of the N+M+1-stage limiting detector is connected to the input end of the adder; N≥2, M≥2.

2. A large dynamic range logarithmic amplifier with expandable dynamic range according to claim 1, characterized in that: The input end of the first-stage limiting amplifier unit, the input end of the first-stage resistor attenuator, and the input end of the first-stage limiting detector input signal V IN The output of the adder outputs a signal V through the resistor R OUT .

3. A large dynamic range logarithmic amplifier with expandable dynamic range according to claim 1, characterized in that: The attenuation of the resistance attenuator is consistent with the gain of the limiting amplifier unit.

4. The large dynamic range logarithmic amplifier with expandable dynamic range according to claim 1, characterized in that: The resistance attenuator adopts an L-type voltage-dividing resistance network structure.

5. A large dynamic range logarithmic amplifier with expandable dynamic range according to claim 4, characterized in that: The L-type voltage-dividing resistor network structure includes a plurality of identical resistors connected in series or in parallel.

6. The large dynamic range logarithmic amplifier with expandable dynamic range according to claim 1, characterized in that: The upper limit of the number of resistance attenuators M is determined by the maximum input voltage V allowed by the input device. imax , threshold voltage E k and attenuation A.

7. A large dynamic range logarithmic amplifier with expandable dynamic range according to claim 6, characterized in that: The calculation formula corresponding to the upper limit of the number of stages M of the resistance attenuator is expressed as: Among them, V imax Indicates the maximum input voltage allowed by the input device, E k represents the threshold voltage, and A represents the attenuation amount.

8. The large dynamic range logarithmic amplifier with expandable dynamic range according to claim 1, characterized in that: The limiting detector includes a differential mode input pair of tubes and a common mode input tube; the differential mode input pair of tubes and the common mode input tube share a common emitter; by making the differential mode input pair of tubes and the common mode input tube share a common emitter, the differential current formed has a limiting function relationship with the differential mode input tube.

9. A large dynamic range logarithmic amplifier with expandable dynamic range according to claim 1 or 8, characterized in that: The input-output relationship of the limiting detector is expressed as: Among them, I out Represents the output current of the limit detector, V in Indicates the input voltage of the limit detector; U L Indicates the inflection point voltage of the limiting detector; I P represents the limiting current of the limiting detector; f represents the limiting function.

10. The large dynamic range logarithmic amplifier with expandable dynamic range according to claim 1, characterized in that: The logarithmic amplifier adopts bipolar technology and CMOS technology.

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