Photovoltaic cell back surface processing method, TOPCon cell and preparation method thereof, and photovoltaic module

Abstract

The invention belongs to the technical field of solar cells, and provides a photovoltaic cell back surface processing method, a TOPCon cell, a preparation method and a photovoltaic module. According to the photovoltaic cell back surface treatment method, through polishing treatment of the back surface of a silicon substrate, oxidation treatment is carried out on a doped polycrystalline silicon layer in a non-metallization area in sequence, the oxidation treatment depth is controlled to reach the tail of a doped polycrystalline silicon band so as to form a silicon oxide layer in the non-metallization area, and subsequent acid pickling is carried out. The reflectivity of the back surface of the doped polycrystalline silicon band tail in the non-metallization region is higher than that of the back surface of the doped polycrystalline silicon layer in the metallization region; therefore, the back metal electrode adhesion performance and the metal contact performance of the metallization region on the back of the cell can be further improved, the passivation effect and the light secondary reflection absorption effect of the non-metallization region on the back of the cell can be further improved, and parasitic absorption can be reduced, so that the photoelectric conversion efficiency of the cell can be greatly improved.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and in particular to a method for processing the back of a photovoltaic cell, a TOPCon cell and a preparation method thereof, and a photovoltaic module. Background Art

[0002] Tunnel Oxide Passivated Contact (TOPCon) is a technology based on the principle of selective carrier passivation to reduce surface recombination and improve metal contact. At present, the existing TOPCon cells, as shown in CN118380496A, usually deposit an ultra-thin tunnel oxide layer (usually 1 to 2 nm thick) and a doped polysilicon layer (such as a phosphorus-doped polysilicon layer) on the polished surface of the back of the crystalline silicon substrate (usually alkaline polishing is used to obtain the polished surface) in sequence. Studies have found that the flatness of the polished surface on the back of the crystalline silicon substrate has an important influence on the passivation effect of the back of the TOPCon cell and the secondary absorption effect of light. Generally, the higher the flatness of the polished surface, the greater the reflectivity of the polished surface, the better the passivation effect on the back of the TOPCon cell, and the more light is reflected back to the inside of the TOPCon cell.

[0003] However, for TOPCon cells, the reflectivity of the polished surface on the back of the crystalline silicon substrate is not the greater the better. This is because: if the reflectivity of the polished surface is too large, the flatness of the polished surface will be too high, which will reduce the adhesion performance of the back metal electrode to the doped polysilicon layer in the metallization area (that is, the metal contact area of ​​the back metal electrode) and reduce the metal contact performance between the back metal electrode and the doped polysilicon layer in the metallization area. Therefore, the setting of the reflectivity of the polished surface also needs to take into account the metallization area on the back of the battery to have a better back metal electrode adhesion performance and metal contact performance. Therefore, in actual operation, researchers often choose to obtain a polished surface with moderate reflectivity on the back of the crystalline silicon substrate, that is, the entire polished surface has only a moderate reflectivity (as shown in CN118073475A, the reflectivity of the polished surface is 36%), so that the TOPCon battery can take into account both the metal contact performance and the passivation contact effect; this will inevitably lead to a decrease in the passivation effect and the secondary reflection and absorption effect of light in the non-metallized area on the back of the TOPCon battery, thereby affecting the overall passivation effect and light absorption rate of the TOPCon battery, making it difficult to further improve the photoelectric conversion efficiency of the battery. Summary of the invention

[0004] The purpose of the present invention is to provide a method for processing the back side of a photovoltaic cell, a TOPCon cell and a preparation method, and a photovoltaic module in view of the deficiencies in the prior art.

[0005] Based on this, the present invention discloses a method for processing the back side of a photovoltaic cell, comprising the following steps:

[0006] S1, polishing the back side of the silicon substrate to obtain a flat polished surface;

[0007] S2, depositing a tunneling oxide layer and an intrinsic amorphous silicon layer on the polished surface in sequence to obtain a passivation contact structure;

[0008] S3, doping and heat treating the intrinsic amorphous silicon layer to form a doped polysilicon layer; and allowing part of the doping source to pass through the doped polysilicon layer and the tunnel oxide layer and then enter the silicon substrate to form a doped polysilicon tail;

[0009] S4, performing oxidation treatment on the doped polysilicon layer in the non-metallized area to form a silicon oxide layer in the non-metallized area; wherein the oxidation depth reaches near the tail of the doped polysilicon band;

[0010] S5. Pickling to remove the silicon oxide layer to expose the doped polysilicon tail in the non-metallized area, so that the doped polysilicon tail in the non-metallized area forms a back surface with a reflectivity higher than that of the metallized area.

[0011] Preferably, in step S1, the polishing is performed by a wet process, and the wet process is alkali polishing and / or acid polishing.

[0012] Further preferably, in step S1, the polishing treatment is an alkali polishing treatment, the alkali polishing liquid is a KOH solution or a NaOH solution, the concentration is 5-8wt%, the alkali polishing temperature is 50-70°C, and the alkali polishing time is 100-300s. Thus, through the above-mentioned alkali polishing treatment process, the reflectivity of the back surface of the doped polysilicon layer in the metallization area can reach 31-34%, so as to improve the back metal electrode tension.

[0013] Preferably, in step S2, the thickness of the tunneling oxide layer is 0.5-2 nm; the preparation method of the tunneling oxide layer is one of thermal oxygen oxidation, wet oxygen oxidation, nitric acid oxidation, ozone oxidation or vapor deposition.

[0014] Preferably, in step S2, the thickness of the intrinsic amorphous silicon layer is 60-150 nm; the intrinsic amorphous silicon layer is prepared by one of low-pressure chemical vapor deposition, plasma enhanced chemical vapor deposition or physical vapor deposition.

[0015] Preferably, in step S3, the doping source of the doping diffusion is a boron source or a phosphorus source.

[0016] Further preferably, in step S3, the doped polysilicon layer is a phosphorus heavily doped polysilicon layer;

[0017] The doping concentration of the doped polysilicon layer is 2×10 20 ~1×10 21 cm -3 , thickness is 50-120nm, junction depth is 80-150nm;

[0018] The doping concentration of the doped polysilicon tail is 1×10 17 ~4×10 20 cm -3 .

[0019] Preferably, in step S4, the oxidation treatment is preferably oxygen ion implantation to form an oxygen-implanted polysilicon layer in the non-metallized area, and then annealing is performed to convert the oxygen-implanted polysilicon layer in the non-metallized area into the silicon oxide layer. The oxidation treatment is preferably oxygen ion implantation, which can accurately control the implantation depth of the oxygen ions and can control the implanted oxygen ions to be exactly located on the same horizontal surface, which can effectively promote the doped polysilicon tail in the non-metallized area after subsequent pickling to obtain a smoother back surface with a higher reflectivity.

[0020] Further preferably, in step S4, the implantation dose of oxygen ions is 1×10 15 ~1×10 18 atoms / cm 2 , the injection energy is 10-100 keV, the injection temperature is 20-200°C; the injection depth of the oxygen ions exceeds the total thickness of the tunnel oxide layer and the doped polysilicon layer, and reaches the vicinity of the doped polysilicon tail, and the injection depth of the oxygen ions is 65-150nm (more preferably 90-120nm). In this way, the doped polysilicon tail in the non-metallized area can be retained, which is conducive to the lateral transmission of current; moreover, the precise control of the injection depth of the oxygen ions can also make the exposed doped polysilicon tail in the non-metallized area obtain a smoother and more reflective back surface after the acid washing in step S5 (while the reflectivity of the doped polysilicon layer in the metallized area is still small), so the photoelectric conversion efficiency of the battery can be further improved. This selective oxygen ion implantation can be patterned by inserting a shadow mask on the ion beam.

[0021] The present invention further optimizes parameters such as oxygen ion injection energy to precisely control the oxygen ion injection depth to near the tail of the doped polysilicon band, so that the non-metallized area obtains a smoother back surface, thereby obtaining a higher reflectivity on the back of the non-metallized area, and the battery obtains a better photoelectric conversion efficiency.

[0022] Further preferably, in step S4, the annealing atmosphere is nitrogen, the annealing temperature is 800-950° C., and the annealing time is 60-120 min.

[0023] Preferably, in step S5, the pickling solution is one or more of HF solution, HCl solution or H3PO4 solution, the concentration of the pickling solution is 3-10wt%, and the pickling time is 30-150s.

[0024] The present invention also discloses a method for preparing a TOPCon battery, comprising the following preparation steps:

[0025] Step 1: Cleaning and texturing the silicon substrate to form pyramid texturing surfaces on the front and back sides of the silicon substrate;

[0026] Step 2: doping the silicon substrate after texturing with boron diffusion to form a p+ emitter and borosilicate glass on the front side of the silicon substrate in sequence;

[0027] Step 3: Remove the borosilicate glass on the back and edge of the silicon substrate by single-sided etching;

[0028] Step 4: using the above-mentioned method for processing the back side of a photovoltaic cell to expose the doped polysilicon tail in the non-metallized area, so that the reflectivity of the doped polysilicon tail surface in the non-metallized area is higher than the reflectivity of the doped polysilicon layer surface in the metallized area;

[0029] Step 5, depositing a front Al2O3 film and a back Al2O3 film on the front of the p+ emitter and the entire back of the silicon substrate respectively;

[0030] Step 6, depositing a front silicon nitride layer and a back silicon nitride layer on the front Al2O3 film and the back Al2O3 film respectively;

[0031] Step 7: Metallize the front and back sides of the silicon substrate to obtain front metal electrodes and back metal electrodes respectively.

[0032] The present invention also discloses a TOPCon battery, which is prepared by using the preparation method of the TOPCon battery described above in the present invention.

[0033] The present invention also discloses a photovoltaic module, which comprises the TOPCon cell described above in the present invention.

[0034] Compared with the prior art, the present invention has at least the following beneficial effects:

[0035] The invention discloses a method for processing the back side of a photovoltaic cell. The method comprises the following steps: polishing the back side of a silicon substrate, oxidizing a doped polysilicon layer in a non-metallized area, controlling the oxidation depth to the doped polysilicon tail, and subsequent pickling, so that the reflectivity of the back surface of the doped polysilicon tail in the non-metallized area is different from that of the back surface of the doped polysilicon layer in the metallized area (specifically, the reflectivity of the back surface of the doped polysilicon tail in the non-metallized area is higher than that of the back surface of the doped polysilicon layer in the metallized area. The reflectivity of the back surface of the doped polysilicon tail in the non-metallized area is greater than 36% and less than or equal to 40%; while the reflectivity of the back surface of the doped polysilicon layer in the metallized area is 31-34%). In this way, the series resistance of the metallized area on the back of the battery can be further reduced and the tension of the back metal electrode can be improved, thereby further improving the back metal electrode adhesion performance and metal contact performance of the metallized area on the back of the battery; and further improving the passivation effect and secondary light reflection absorption effect of the non-metallized area on the back of the battery; removing the doped polysilicon layer in the non-metallized area can also reduce parasitic absorption; therefore, the photoelectric conversion efficiency of the battery can be greatly improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 This is a schematic diagram of the cross-sectional structure of the back side of the silicon substrate in Example 1 after step 7.

[0037] Figure 2 This is a schematic diagram of the cross-sectional structure of the back side of the silicon substrate in Example 1 after step 8.

[0038] Figure 3 This is a schematic diagram of the cross-sectional structure of the back side of the silicon substrate in Example 1 after step 9.

[0039] Description of the accompanying drawings: silicon substrate 1; tunneling oxide layer 2; doped polysilicon layer 3; oxygen-implanted polysilicon layer 4; silicon oxide layer 5; doped polysilicon tail 6. DETAILED DESCRIPTION

[0040] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below in conjunction with specific implementation methods.

[0041] Example 1

[0042] A method for preparing a TOPCon battery in this embodiment is shown in Figure 1-3 , comprising the following preparation steps:

[0043] Step 1: Use heated alkaline solution to clean and texture the front and back sides of a crystalline silicon substrate (referred to as silicon substrate 1) to remove surface damage on the front and back sides and form pyramid texture surfaces on the front and back sides of the crystalline silicon substrate.

[0044] The crystalline silicon substrate is preferably an N-type single crystal silicon substrate, the thickness is preferably 120 to 160 μm (such as 130 μm), the resistivity is preferably 0.5 to 2.5 Ω·cm (such as 1.1 Ω·cm), and the size is preferably 182 mm×182 mm. The alkaline solution is a NaOH solution or a KOH solution (such as a KOH solution), and the heating temperature is 60 to 80° C. (preferably 75° C.).

[0045] Step 2: insert the textured crystalline silicon substrate into a quartz boat in a double insertion manner, and perform boron diffusion doping through a diffusion-push-oxidation process to form a p+ emitter on the front side of the crystalline silicon substrate.

[0046] Wherein, the boron diffusion source is BCl3 or BBr3 (such as BCl3), the diffusion temperature is 800-870°C (preferably 850-870°C, such as 860°C), the push temperature is 850-950°C (preferably 900-950°C, such as 930°C), and the oxidation temperature is 900-1000°C (preferably 960-1000°C, such as 980°C). The diffusion square resistance of the p+ emitter is 200-300Ω / □ (preferably 220-250Ω / □, such as 240Ω / □), and the doping concentration of the p+ emitter is 1×10 20 cm -3 ~1×10 21 cm -3 (preferably 2×10 20 cm -3 ~5×10 20 cm -3 , such as 3×10 20 cm -3 ), the diffusion junction depth of the p+ emitter is 0.4-0.8μm (preferably 0.6-0.8μm, such as 0.7μm).

[0047] After being processed in step 2, borosilicate glass is formed on the back side of the silicon substrate 1 and the front side of the p+ emitter.

[0048] Step 3: acid-wash to remove the borosilicate glass on the back and surrounding of the silicon substrate 1, while retaining the borosilicate glass on the front of the p+ emitter as a front protection layer.

[0049] The pickling solution is preferably an HF solution, and its concentration is 5-20 wt % (eg 10 wt %).

[0050] Step 4: Perform alkali polishing on the back side of the silicon substrate 1 to obtain a flat polished surface on the back side of the silicon substrate 1.

[0051] Among them, the alkaline polishing liquid is KOH solution or NaOH solution (such as KOH solution), its concentration is 5-8wt% (such as 5wt%), the alkali polishing temperature is 50-70°C (such as 60°C), and the alkali polishing time is 100-300s (such as 150s).

[0052] After being processed in step 4, the average reflectivity of the polished surface on the back side of the silicon substrate 1 is 33.8%.

[0053] Step 5: depositing a tunneling oxide layer 2 and an intrinsic amorphous silicon layer in sequence on the polished surface at the back of the silicon substrate 1.

[0054] The tunneling oxide layer 2 is ultra-thin silicon dioxide with a thickness of 0.5 to 2 nm (e.g., 1 nm), and the deposition method thereof may be thermal oxygen oxidation, wet oxygen oxidation, nitric acid oxidation, ozone oxidation, or vapor deposition (e.g., thermal oxygen oxidation). The thickness of the intrinsic amorphous silicon layer is 60 to 150 nm (e.g., 120 nm), and the deposition method thereof may be low-pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, or physical vapor deposition (e.g., plasma enhanced chemical vapor deposition).

[0055] Step 6: doping and heat treating the intrinsic amorphous silicon layer (high-temperature doping diffusion is preferred in this embodiment) so that the intrinsic amorphous silicon layer after high-temperature doping diffusion forms a doped polysilicon layer 3 (such as a heavily doped polysilicon layer); moreover, during the high-temperature doping diffusion process, part of the doping source passes through the doped polysilicon layer 3 and the tunnel oxide layer 2, and then enters the silicon substrate 1 to form a doped polysilicon tail 6.

[0056] Wherein, the doping source is POCl3 or PH3 (such as POCl3), and the doping temperature is 850-950°C (preferably 850-890°C, such as 880°C). After high-temperature doping, the diffusion square resistance of the doped polysilicon layer 3 is 20-60Ω / □ (such as 45Ω / □), and the doping concentration of the doped polysilicon layer 3 is 2×10 20 cm -3 ~1×10 21 cm -3 (such as 4×10 20 cm -3 ), the thickness of the doped polysilicon layer 3 is 50 to 120 nm (e.g., 80 nm), the diffusion junction depth of the doped polysilicon layer 3 is 80 to 150 nm (e.g., 120 nm), and the doping concentration of the doped polysilicon tail 6 is 1×10 17 ~4×10 20 cm -3 .

[0057] After being processed in step 6, phosphorus silicon glass will also be formed on the back side of the doped polysilicon layer 3 .

[0058] Step 7: The doped polysilicon layer 3 in the non-metallized area is oxidized (preferably by oxygen ion implantation in this embodiment) to form an oxygen-implanted polysilicon layer 4 in the non-metallized area (see Figure 1 ).

[0059] The oxygen ion implantation dose is 1×10 15 ~1×10 18 atoms / cm 2 (preferably 1×10 17 ~1×10 18 atoms / cm 2 , such as 1×10 17 atoms / cm 2 ); the energy range of oxygen ion implantation is 10-100 keV (preferably 10-50 keV, such as 30 keV); the temperature of oxygen ion implantation is 20-200°C (preferably 50-100°C, such as 60°C); the depth of oxygen ion implantation exceeds the total thickness of the tunneling oxide layer 2 and the doped polysilicon layer 3, and then reaches the vicinity of the doped polysilicon tail 6 (the depth of oxygen ion implantation is preferably 65-150 nm, more preferably 90-120 nm, such as 95 nm).

[0060] Step 8: high temperature annealing to convert the oxygen-implanted polysilicon layer 4 in the non-metallized area into a silicon oxide layer 5 (see Figure 2 ).

[0061] The annealing atmosphere is nitrogen, the annealing temperature is 800-950° C. (preferably 850-900° C., such as 870° C.), and the annealing time is 60-120 min (preferably 80-100 min, such as 90 min).

[0062] Step 9: acid wash to remove the silicon oxide layer 5 in the non-metallized area, the phosphosilicate glass on the back and the borosilicate glass on the front, so as to expose the doped polysilicon tail 6 in the non-metallized area (see Figure 3 ).

[0063] The pickling solution is selected from one or more of HF solution, HCl solution or H3PO4 solution (such as HF solution), the concentration of the pickling solution is 3-10wt% (such as 5wt%), and the pickling time is 30-150s (such as 60s).

[0064] The above steps 4 to 9 are a method for processing the back side of a photovoltaic cell in this embodiment. After processing in step 9, the average reflectivity of the back side of the exposed non-metallized doped polysilicon tail 6 is relatively large (e.g., its average reflectivity is greater than or equal to 39.2%), while the average reflectivity of the doped polysilicon layer 3 in the metallized area is still relatively small (e.g., its average reflectivity is less than or equal to 33.8%); thus, after processing in step 9, the average reflectivity of the entire back side of the silicon substrate 1 is 36.5%. In practice, when a film is coated on the polished surface (e.g., a tunneling oxide layer or a doped polysilicon layer is deposited), the reflectivity of the back side of the doped polysilicon layer is usually slightly lower than the reflectivity on the polished surface.

[0065] Step 10, use tubular atomic layer deposition (ALD) method to deposit Al2O3 film on the front side of the p+ emitter and the entire back side of the silicon substrate 1 (the entire back side of the silicon substrate 1 includes the back side of the doped polysilicon tail 6 in the non-metallized area and the back side of the doped polysilicon layer 3 in the metallized area) (the thickness of the front Al2O3 film and the back Al2O3 film are preferably 2 to 10 nm, such as 3 nm).

[0066] Step 11: Use plasma enhanced chemical vapor deposition (PECVD) to deposit silicon nitride layers as anti-reflection layers on both the front Al2O3 film and the back Al2O3 film. The thickness of the front silicon nitride layer and the back silicon nitride layer are both 60 to 80 nm (eg, 75 nm).

[0067] Step 12, prepare the front metal electrode and the back metal electrode respectively; so that the front metal electrode passes through the front silicon nitride layer and the front Al2O3 film to contact the p+ emitter; and the back metal electrode passes through the back silicon nitride layer and the back Al2O3 film to contact the doped polysilicon layer 3 of the metallization area.

[0068] Example 2

[0069] The preparation method of a TOPCon battery in this embodiment has the preparation steps specifically referred to in Example 1, and the main difference between the method and Example 1 is that:

[0070] In step 7, the oxygen ion implantation depth of the doped polysilicon layer in the non-metallized area is 105 nm.

[0071] Example 3

[0072] The preparation method of a TOPCon battery in this embodiment has the preparation steps specifically referred to in Example 1, and the main difference between the method and Example 1 is that:

[0073] In step 7, the oxygen ion implantation depth of the doped polysilicon layer in the non-metallized area is 115 nm.

[0074] Comparative Example 1

[0075] The preparation method of a TOPCon battery in this comparative example has specific preparation steps referring to Example 1, and the main difference between the method and Example 1 is:

[0076] After completing step 6, directly proceed to step 9 of Example 1 (at this time, the back side of the silicon substrate is a whole-surface tunnel oxide layer passivation contact structure). The remaining preparation steps of this comparative example are all referred to Example 1.

[0077] Comparative Example 2

[0078] The preparation method of a TOPCon battery in this comparative example has specific preparation steps referring to Example 1, and the main difference between the method and Example 1 is:

[0079] In step 7, oxygen ions are implanted into the entire back surface of the doped polysilicon layer, so after the acid wash in step 9, there is no tunneling oxide layer passivation contact structure on the back of the silicon substrate, and only a high reflectivity back surface remains. The remaining preparation steps of this comparative example are all referred to Example 1.

[0080] Comparative Example 3

[0081] The preparation method of a TOPCon battery in this comparative example has specific preparation steps referring to Example 1, and the main difference between the method and Example 1 is:

[0082] In step 7, the oxygen ion implantation depth of the doped polysilicon layer in the non-metallized area is 125 nm; that is, the oxygen ion implantation depth exceeds the total thickness of the tunnel oxide layer, the doped polysilicon layer and the doped polysilicon tail. The remaining preparation steps of this comparative example are all referred to Example 1.

[0083] Comparative Example 4

[0084] The preparation method of a TOPCon battery in this comparative example has specific preparation steps referring to Example 1, and the main difference between the method and Example 1 is:

[0085] In step 7, the oxygen ion implantation depth of the doped polysilicon layer in the non-metallized area is 80 nm; that is, the oxygen ion implantation depth does not exceed the total thickness of the tunnel oxide layer and the doped polysilicon layer. The remaining preparation steps of this comparative example are all referred to Example 1.

[0086] Comparative Example 5

[0087] The preparation method of a TOPCon battery in this comparative example has specific preparation steps referring to Example 1, and the main difference between the method and Example 1 is:

[0088] In step 7, the oxygen ion implantation depth of the doped polysilicon layer in the non-metallized area is 70 nm; that is, the oxygen ion implantation depth does not exceed the thickness of the doped polysilicon layer. The remaining preparation steps of this comparative example are all referred to Example 1.

[0089] Performance Testing

[0090] The performance tests were performed on the TOPCon batteries of Examples 1-3 and Comparative Examples 1-5, and the test results are shown in Tables 1-3 below.

[0091] Table 1

[0092]

[0093]

[0094] In Table 1, R is the average reflectivity of the entire back surface of the silicon substrate after the treatment in step 9; Eta is the photoelectric conversion efficiency; Uoc is the open circuit voltage; and FF is the fill factor.

[0095] From Table 1 we can see that:

[0096] In the doped polysilicon layer in the non-metallized area of ​​step 7, the oxygen ion implantation energy is large, and the oxygen ion implantation depth is deep, but the uniformity of the oxygen ion implantation will be relatively poor, so the average reflectivity (R) of the entire back surface of the silicon substrate after the treatment in step 9 will be relatively small. Therefore, the oxygen ion implantation depth of the doped polysilicon layer in the non-metallized area of ​​step 7 is not the greater the better.

[0097] Further, after completing step 9, the greater the average reflectivity of the entire back surface of the silicon substrate, the greater the average reflectivity of the back surface of the doped polysilicon tail in the exposed non-metallized area, and thus the better the passivation effect and the secondary absorption effect of light on the back of the TOPCon battery in Example 1 (wherein, the secondary absorption effect of light can be fed back from the R value of the data in Table 1, and the larger the R value, the greater the secondary absorption of light. The passivation effect can be reflected from Uoc, and the change in Uoc value is consistent with the change in passivation effect), and thus the photoelectric conversion efficiency of the TOPCon battery in Example 1 is correspondingly improved.

[0098] Table 2

[0099] Example Minority carrier lifetime (μs) Dark voltage(V) Example 1 1578 0.7306 Comparative Example 1 1380 0.7267 Comparative Example 2 1692 0.7330

[0100] From Table 2 we can see that:

[0101] The back passivation effect of the TOPCon battery is from large to small, which is Comparative Example 2 > Example 1 > Comparative Example 1.

[0102] Among them, Comparative Example 2 is obtained by sequentially depositing a back Al2O3 film and a back silicon nitride layer on the back polished surface of a high-reflectivity silicon substrate. Therefore, Comparative Example 2 can reflect the passivation effect of the non-metallized area on the back of the TOPCon cell.

[0103] Comparative Example 1 is obtained by sequentially depositing a tunneling oxide layer, a doped polysilicon layer, a back Al2O3 film and a back silicon nitride layer on the back polished surface of a low-reflectivity silicon substrate. Therefore, Comparative Example 1 can reflect the passivation effect of the metallization area on the back of the TOPCon cell.

[0104] The passivation effect of the back side of the TOPCon battery in Example 1 is between that of Comparative Example 2 and Comparative Example 1, indicating that the passivation of the metallized area and the non-metallized area on the back side of the TOPCon battery in Example 1 is balanced.

[0105] Table 3

[0106]

[0107] In Table 3, Rser is the series resistance. The smaller the series resistance value is, the better the metal contact performance is. The explanation of the remaining characters in Table 3 refers to Table 1.

[0108] From Table 3 we can see that:

[0109] Compared with Example 1, in the doped polysilicon layer in the non-metallized area of ​​step 7, the oxygen ion injection energy of Comparative Example 3 is larger, the oxygen ion injection depth is deeper, and the oxygen ion injection depth exceeds the total thickness of the tunneling oxide layer, the doped polysilicon layer and the doped polysilicon tail; this results in a significant decrease in the FF of the TOPCon battery of Comparative Example 3, a deterioration in the lateral transmission current, and a decrease in the photoelectric conversion efficiency.

[0110] Compared with Example 1, in the doped polysilicon layer in the non-metallized area of ​​step 7, the oxygen ion implantation depths of comparative examples 4-5 did not exceed the total thickness of the tunneling oxide layer and the doped polysilicon layer, and therefore did not reach the vicinity of the doped polysilicon band tail, so the R values ​​of comparative examples 4-5 were relatively low; this indicates that in step 7, controlling the oxygen ion implantation depth to exceed the total thickness of the tunneling oxide layer and the doped polysilicon layer and then reaching the vicinity of the doped polysilicon band tail can indeed obtain a smoother back surface, thereby obtaining a higher R value, and thereby enabling the TOPCon cell to obtain a better photoelectric conversion efficiency.

[0111] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0112] The technical solution provided by the present invention is introduced in detail above. Specific examples are used in this article to illustrate the principle and implementation mode of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation mode and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A method for processing the back side of a photovoltaic cell, characterized in that: The steps include: S1, polishing the back side of the silicon substrate to obtain a flat polished surface; S2, depositing a tunneling oxide layer and an intrinsic amorphous silicon layer on the polished surface in sequence to obtain a passivation contact structure; S3, doping and heat treating the intrinsic amorphous silicon layer to form a doped polysilicon layer; and allowing part of the doping source to pass through the doped polysilicon layer and the tunnel oxide layer and then enter the silicon substrate to form a doped polysilicon tail; S4, performing oxidation treatment on the doped polysilicon layer in the non-metallized area to form a silicon oxide layer in the non-metallized area; wherein the oxidation depth reaches near the tail of the doped polysilicon band; S5. Pickling to remove the silicon oxide layer to expose the doped polysilicon tail in the non-metallized area, so that the doped polysilicon tail in the non-metallized area forms a back surface with a reflectivity higher than that of the metallized area.

2. A method for processing the back side of a photovoltaic cell according to claim 1, characterized in that: In step S1, the polishing treatment is an alkali polishing treatment, the alkali polishing liquid is a KOH solution or a NaOH solution, the concentration is 5-8wt%, the alkali polishing temperature is 50-70°C, and the alkali polishing time is 100-300s.

3. A method for processing the back side of a photovoltaic cell according to claim 1, characterized in that: In step S3, the doping source is a boron source or a phosphorus source; In step S5, the pickling solution is one or more of HF solution, HCl solution or H3PO4 solution, the concentration of the pickling solution is 3-10wt%, and the pickling time is 30-150s.

4. A method for processing the back side of a photovoltaic cell according to claim 1 or 3, characterized in that: In step S3, the doped polysilicon layer is a phosphorus heavily doped polysilicon layer; The doping concentration of the doped polysilicon layer is 2×10 20 ~1×10 21 cm -3 , thickness is 50-120nm, junction depth is 80-150nm; The doping concentration of the doped polysilicon tail is 1×10 17 ~4×10 20 cm -3 .

5. A method for processing the back side of a photovoltaic cell according to claim 1, characterized in that: In step S4, the oxidation treatment is oxygen ion implantation to form an oxygen-implanted polysilicon layer in the non-metallized area, and then annealing is performed to convert the oxygen-implanted polysilicon layer in the non-metallized area into the silicon oxide layer.

6. A method for processing the back side of a photovoltaic cell according to claim 5, characterized in that: In step S4, the implantation dose of oxygen ions is 1×10 15 ~1×10 18 atoms / cm 2 The injection energy is 10-100 keV, and the injection temperature is 20-200°C; the injection depth of the oxygen ions exceeds the total thickness of the tunneling oxide layer and the doped polysilicon layer, and reaches near the tail of the doped polysilicon band, and the injection depth of the oxygen ions is 65-150nm.

7. A method for processing the back side of a photovoltaic cell according to claim 5, characterized in that: In step S4, the annealing atmosphere is nitrogen, the annealing temperature is 800-950° C., and the annealing time is 60-120 min.

8. A method for preparing a TOPCon battery, characterized in that: The method comprises the following preparation steps: Step 1: Cleaning and texturing the silicon substrate to form pyramid texturing surfaces on the front and back sides of the silicon substrate; Step 2: doping the silicon substrate after texturing with boron diffusion to form a p+ emitter and borosilicate glass on the front side of the silicon substrate in sequence; Step 3: Remove the borosilicate glass on the back and edge of the silicon substrate by single-sided etching; Step 4: using a method for processing the back side of a photovoltaic cell as described in any one of claims 1 to 7 to expose the doped polysilicon tail in the non-metallized area, so that the reflectivity of the doped polysilicon tail surface in the non-metallized area is higher than the reflectivity of the doped polysilicon layer surface in the metallized area; Step 5, depositing a front Al2O3 film and a back Al2O3 film on the front of the p+ emitter and the entire back of the silicon substrate respectively; Step 6, depositing a front silicon nitride layer and a back silicon nitride layer on the front Al2O3 film and the back Al2O3 film respectively; Step 7: Metallize the front and back sides of the silicon substrate to obtain front metal electrodes and back metal electrodes respectively.

9. A TOPCon battery, characterized in that: It is prepared by the preparation method of a TOPCon battery as described in claim 8.

10. A photovoltaic module, characterized in that: A TOPCon battery comprising the step of:

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