Display device and method of manufacturing same

Abstract

The invention relates to a display device and a method of manufacturing the same. The display device includes: a first substrate including an opening portion; a first barrier insulating layer disposed on the first substrate and including a first contact hole overlapping the opening portion; a first fan-out line disposed on the first barrier insulating layer; a pad member integrally formed with the first fan-out line and exposed through the opening portion; the second substrate is arranged on the first fan-out line; a connection member disposed on the second substrate and connected to the first fan-out line; a second fanout line disposed on a layer between the first fanout line and the connection member and connected to the connection member; a data line disposed on the same layer as the connection member and electrically connected to the second fan-out line; a flexible membrane including a guide electrode; and a contact member electrically connecting the lead electrode and the pad member.

Description

Technical Field

[0001] The present invention relates to a display device and a method of manufacturing the display device. Background Art

[0002] As the information society develops, the demand for display devices for displaying images is growing in various forms. For example, display devices have been applied to various electronic devices such as smart phones, digital cameras, laptop computers, navigation devices, and smart TVs. The display device may be a flat panel display device such as a liquid crystal display device, a field emission display device, or a light-emitting display device (e.g., an organic light-emitting display device). Among the plurality of flat panel display devices, the light-emitting display device may include a light-emitting element in which each of the plurality of pixels of the display panel can emit light by itself, thereby displaying an image without a backlight unit that provides light to the display panel. Summary of the invention

[0003] Aspects of the present invention provide a display device capable of reducing manufacturing time and manufacturing cost by minimizing the area of ​​a non-display region and simplifying a manufacturing process, and a method of manufacturing the display device.

[0004] The aspects of the present invention are not limited to those set forth herein. The above and other aspects of the present invention will become more apparent to those of ordinary skill in the art to which the present invention pertains by referring to the detailed description of the present disclosure given below.

[0005] According to an embodiment, a display device includes: a first substrate including an opening portion; a first barrier insulating layer disposed on the first substrate and including a first contact hole overlapping the opening portion; a first fan-out line disposed on the first barrier insulating layer; a pad part formed integrally with the first fan-out line and exposed through the opening portion by being inserted into (or disposed in) the first contact hole; a second substrate disposed on the first fan-out line; a connection part disposed on the second substrate and connected to the first fan-out line; a second fan-out line disposed on a layer between the first fan-out line and the connection part and connected to the connection part; a data line disposed on the same layer as the connection part and electrically connected to the second fan-out line to supply a data voltage; a flexible film disposed under the first substrate and including a guide electrode inserted into (or disposed in) the opening portion of the first substrate; and a contact part electrically connecting the guide electrode and the pad part by covering (or contacting) a lower surface of the guide electrode and a lower surface of the pad part.

[0006] In an embodiment, the guide electrode may protrude from one side of the flexible film, and the contact member covers (or contacts) the lower surface of the guide electrode protruding from the flexible film.

[0007] In an embodiment, the contact member may be formed by sintering a conductive ink, a metal paste, or a metal organic decomposition ink including silver (Ag), copper (Cu), aluminum (Al), or chromium (Cr).

[0008] In an embodiment, the display device may further include a display area for displaying an image and a non-display area surrounding the display area. The flexible film may be disposed in the display area.

[0009] In an embodiment, the display device may further include a transistor including a drain electrode, a semiconductor region and a source electrode included in an active layer disposed on the first fan-out line, and a gate electrode disposed on the active layer. The data line may supply a data voltage to the transistor.

[0010] In an embodiment, the display device may further include a power line disposed on the same layer as the data line to supply a power voltage to the transistor.

[0011] In an embodiment, the display device may further include: a connecting electrode disposed on the same layer as the data line and electrically connected to the transistor; and a pixel electrode disposed on the connecting electrode and connected to the connecting electrode to receive a driving current from the transistor.

[0012] In an embodiment, the display device may further include: a transistor layer, including a transistor electrically connected to the data line; a light-emitting element layer, arranged on the transistor layer and including a light-emitting element; and an encapsulation layer covering (or contacting) the upper surface and side surface of the light-emitting element layer.

[0013] In an embodiment, the first substrate and the second substrate each include polyimide or polymer resin.

[0014] According to an embodiment, a display device includes: a first substrate including an opening portion; a first barrier insulating layer disposed on the first substrate and including a first contact hole overlapping the opening portion; a pad part inserted into the first contact hole (or disposed in the first contact hole) and exposed through the opening portion; a first fan-out line disposed on the first barrier insulating layer and formed integrally with the pad part; a second substrate disposed on the first fan-out line; a second fan-out line disposed on the second substrate and electrically connected to the first fan-out line; a transistor disposed on the first fan-out line and electrically connected to the second fan-out line; a flexible film disposed under the first substrate and inserted into the opening portion of the first substrate (or disposed in the opening portion of the first substrate); and a guide electrode protruding from one side of the flexible film and including a portion that does not overlap with the flexible film.

[0015] In an embodiment, the display device may further include a contact member electrically connecting the guide electrode and the pad member by covering (or contacting) the portion of the guide electrode not overlapping the flexible film and one surface of the pad member.

[0016] In an embodiment, the contact member may be formed by sintering a conductive ink, a metal paste, or a metal organic decomposition ink including silver (Ag), copper (Cu), aluminum (Al), or chromium (Cr).

[0017] In an embodiment, the display device may further include: a data line disposed on the transistor to supply a data voltage to the transistor; and a power line disposed on the same layer as the data line to supply a power voltage to the transistor.

[0018] In an embodiment, the display device may further include: a connecting electrode disposed on the same layer as the data line and electrically connected to the transistor; and a pixel electrode disposed on the connecting electrode and connected to the connecting electrode to receive a driving current from the transistor.

[0019] According to an embodiment, a method for manufacturing a display device includes: preparing a first substrate; forming a first barrier insulating layer including a first contact hole on the first substrate; forming a first fan-out line arranged on the first barrier insulating layer and a pad component formed integrally with the first fan-out line and inserted into the first contact hole (or arranged in the first contact hole); forming a second substrate on the pad component; forming a second fan-out line arranged on the second substrate; forming a connecting component arranged on the second fan-out line to electrically connect the first fan-out line and the second fan-out line; forming an opening portion exposing the pad component by etching a lower portion of the first substrate; inserting a guide electrode of a flexible film into the opening portion and fixing the guide electrode to one surface of the pad component; and forming a contact component electrically connecting the pad component and the guide electrode by covering (or contacting) a portion of the pad component and a portion of the guide electrode.

[0020] In an embodiment, the forming of the contact component may include: printing at least one of a conductive ink, a metal paste and a metal organic decomposition ink including silver (Ag), copper (Cu), aluminum (Al) or chromium (Cr) in the opening portion of the first substrate; and sintering the at least one of the conductive ink, the metal paste and the metal organic decomposition ink to produce a corresponding one of a sintered conductive ink, a sintered metal paste and a sintered metal organic decomposition ink.

[0021] In an embodiment, the forming of the contact features further comprises separating the corresponding one of the sintered conductive ink, the sintered metal paste and the sintered metal-organic decomposition ink into a plurality of contact features via a laser patterning process.

[0022] In an embodiment, the sintering of the at least one of the conductive ink, the metal paste, and the metal organic decomposition ink may include agglomerating metal particles by applying heat generated by a light pulse or a laser.

[0023] In an embodiment, the forming of the contact part may include: printing conductive ink, metal paste or metal organic decomposition ink in the opening portion of the first substrate by performing an extrusion process using a mask including a plurality of holes; and sintering the conductive ink, the metal paste or the metal organic decomposition ink.

[0024] In an embodiment, the size and spacing of the plurality of holes may be determined by the size and spacing of the pad features.

[0025] According to an embodiment, a display device may include a flexible film and a display driver disposed on a lower side of a first substrate, a first fan-out line disposed on a lower side of a second substrate, and a second fan-out line disposed on the second substrate, thereby minimizing the area of ​​a non-display region. In addition, according to an embodiment, since a guide electrode and a pad part are fixed and electrically connected via a contact part using a metal paste, manufacturing time and manufacturing cost can be reduced by simplifying a manufacturing process without using ultrasonic bonding or thermocompression bonding.

[0026] However, the effects of the embodiments are not limited to only one embodiment described herein. The above and other effects of the embodiments will become more apparent to those of ordinary skill in the art to which the embodiments belong. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The above and other aspects and features of the present invention will become more apparent by describing the embodiments of the present invention in detail with reference to the accompanying drawings, in which:

[0028] Figure 1 is a plan view showing a display device according to an embodiment;

[0029] Figure 2 is a cross-sectional view showing a display device according to an embodiment;

[0030] Figure 3 According to the embodiment Figure 1 The display device is along Figure 1 A cross-sectional view taken along line II';

[0031] Figure 4 is a bottom view of a display device according to an embodiment;

[0032] Figure 5 is an enlarged bottom view of a portion of a display device according to an embodiment;

[0033] Figure 6 is a view showing a pad part, a fan-out line, a power line, and a data line in a display device according to an embodiment;

[0034] Figure 7 According to the embodiment Figure 1 The display device is along Figure 1 Another cross-sectional view taken along line II';

[0035] Figure 8 is a cross-sectional view showing an example of a process of manufacturing a display device according to an embodiment;

[0036] Fig. 9 is a cross-sectional view showing an example of a process of manufacturing a display device according to an embodiment;

[0037] Fig.10is a cross-sectional view showing an example of a process of manufacturing a display device according to an embodiment;

[0038] Fig.11 is a cross-sectional view showing an example of a process of manufacturing a display device according to an embodiment;

[0039] Fig.12 is a cross-sectional view showing another example of a process of manufacturing a display device according to the embodiment; and

[0040] Fig.13 The present invention is shown in the manufacturing process according to the embodiment. Fig.12 A plan view of a mask used in a process of a display device. DETAILED DESCRIPTION

[0041] In the following description, for the purpose of explanation, many specific details are set forth in order to provide a thorough understanding of various embodiments or implementations of the present invention. However, it is apparent that various embodiments may be practiced without these specific details or with one or more equivalent arrangements. In other examples, structures and devices are shown in block diagram form to avoid unnecessary confusion of various embodiments. In addition, various embodiments may be different, but need not be exclusive, nor limit the scope of the present invention. For example, without departing from the scope of the present invention, the specific shapes, configurations and features of the embodiments may be used or implemented in other embodiments.

[0042] Unless otherwise indicated, the embodiments shown will be understood as providing features of varying details of some ways in which the invention may be implemented in practice. Therefore, unless otherwise indicated, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter, individually or collectively referred to as "elements") of the various embodiments may be combined, separated, interchanged and / or rearranged without departing from the present disclosure.

[0043] The use of cross-hatching and / or shading in the drawings is generally provided to clarify the boundaries between adjacent elements. Thus, unless otherwise indicated, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for specific materials, material properties, sizes, proportions, commonalities between the elements shown, and / or any other features, attributes, characteristics, etc. of the elements.

[0044] In addition, in the accompanying drawings, the size and relative size of the elements may be exaggerated for clarity and / or descriptive purposes. When the embodiments can be implemented differently, the order of a particular process can be performed differently from the order described. For example, two processes described in succession can be performed substantially simultaneously or in an order opposite to the order described. In addition, the same reference numerals refer to the same elements.

[0045] When an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, the element or layer may be directly on, directly connected to, or directly coupled to another element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being "directly on," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers. For this purpose, the term "connected" may refer to a physical connection, an electrical connection, and / or a fluid connection with or without intervening elements.

[0046] In addition, the X-axis direction, the Y-axis direction, and the Z-axis direction are not limited to the three axes of the rectangular coordinate system, and thus the X-axis direction, the Y-axis direction, and the Z-axis direction can be interpreted in a broader sense. For example, the X-axis direction, the Y-axis direction, and the Z-axis direction can be perpendicular to each other, or can represent different directions that are not perpendicular to each other.

[0047] For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z (such as XYZ, XY, YZ, or XZ, etc.). As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0048] Furthermore, although the terms "first" and "second" etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the teachings of the present disclosure, the first element discussed below may be named as the second element.

[0049] Spatially relative terms such as "under," "below," "below," "down," "above," "up," "above (throughout)," "higher," and "side" (e.g., in a "sidewall") may be used herein for descriptive purposes, and thereby to describe the relationship between one element and another (or other) element(s) as shown in the accompanying drawings. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture other than the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the term "under" may include both "above" and "below" orientations. Additionally, the device may be oriented in other ways (e.g., at 90 degrees or oriented in other orientations), and, as such, the spatially relative descriptors used herein should be interpreted accordingly.

[0050] The terms used herein are for the purpose of describing specific embodiments and are not intended to be limiting. Unless the context clearly indicates otherwise, as used herein, the singular forms "a", "one (person / kind)" and "the (the)" are also intended to include the plural forms. In addition, when used in this specification, the terms "comprises, comprising" and / or "includes, including" specify the presence of the stated features, wholes, steps, operations, elements, components and / or their groups, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or their groups. It should also be noted that, as used herein, the terms "approximately" or "approximately" used herein include the stated values, and are expressed within an acceptable deviation range of a specific value determined by a person of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of a particular quantity (e.g., the limitations of the measurement system). For example, "approximately" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.

[0051] Various embodiments are described herein with reference to cross-sectional views and / or exploded views that are schematic diagrams of embodiments and / or intermediate structures. As such, variations in the shapes of the illustrations, for example due to manufacturing techniques and / or tolerances, are anticipated. Therefore, the embodiments disclosed herein need not be construed as limited to the particular shapes of the regions shown, but rather include shape deviations caused by, for example, manufacturing. In this manner, the regions shown in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and as such are not necessarily intended to be limiting.

[0052] In addition, some embodiments are described and shown from the perspective of functional blocks, units, components and / or modules in the accompanying drawings. It will be understood by those skilled in the art that these blocks, units, components and / or modules are physically implemented by electronic (or optical) circuits such as logic circuits, discrete components, microprocessors, hard-wired circuits, storage elements and wiring connections, etc., which can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. In the case of blocks, units, components and / or modules implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and can be optionally driven by firmware and / or software. It is also conceivable that each block, unit, component and / or module can be implemented by dedicated hardware, or implemented as a combination of dedicated hardware for performing some functions and processors (e.g., one or more programmed microprocessors and associated circuits) for performing other functions. Moreover, without departing from the scope of the present invention, each block, unit, component and / or module of some embodiments can be physically divided into two or more interacting and discrete blocks, units, components and / or modules. Furthermore, the blocks, units, components and / or modules of some embodiments may be physically combined into more complex blocks, units, components and / or modules without departing from the scope of the invention.

[0053] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the present disclosure belongs. It will also be understood that, unless explicitly defined as such herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant technical field and in the context of the present invention, and should not be interpreted in an ideal or overly formal sense.

[0054] Hereinafter, detailed embodiments are described with reference to the accompanying drawings.

[0055] Figure 1 is a plan view showing a display device according to an embodiment.

[0056] In the examples and with reference to Figure 1 , the display device 10 can be applied to portable electronic devices such as mobile phones, smart phones, tablet personal computers (PCs), mobile communication terminals, electronic notebooks, electronic books, portable multimedia players (PMPs), navigation devices, and ultra-mobile PCs (UMPCs). In another embodiment, the display device 10 can be applied to a display unit of a television, a laptop computer, a monitor, a billboard, or an Internet of Things (IOT) device. As yet another embodiment, the display device 10 can be applied to wearable devices such as smart watches, watch phones, glasses-type displays, and head-mounted displays (HMDs).

[0057] In an embodiment, the display device 10 may be formed to have a planar shape similar to a quadrilateral. For example, in the display device 10, a corner where one side pointing to the X-axis direction and one side pointing to the Y-axis direction intersect may be rounded to have a predetermined curvature, or may be formed to be a right angle. The planar shape of the display device 10 is not limited to a quadrilateral, and may be formed to be similar to other polygons, a circle, or an ellipse.

[0058] In an embodiment, the display device 10 may include a display area DA and a non-display area NDA. The display area DA may include a plurality of pixels to display an image. Each of the plurality of pixels may include an organic light emitting diode (LED) including an organic light emitting layer, a quantum dot LED including a quantum dot light emitting layer, an inorganic LED including an inorganic semiconductor, or a micro LED. Hereinafter, it will be mainly described that each of the plurality of pixels includes an organic light emitting diode, but the present invention is not limited thereto.

[0059] In an embodiment, a plurality of pixels may be arranged along a plurality of rows and columns in the display area DA. Each of the plurality of pixels may include a light emitting area EA defined by a pixel defining film or a dam, and may emit light having a predetermined peak wavelength via the light emitting area EA. The light emitting area EA may be an area in which light generated by a light emitting element of the display device 10 is emitted to the outside of the display device 10.

[0060] In an embodiment, the display area DA of the display device 10 may include a light blocking area BA surrounding the plurality of light emitting areas EA. The light blocking area BA may prevent light emitted from the light emitting areas EA from being mixed.

[0061] In an embodiment, the non-display area NDA may be arranged around the display area DA to surround the display area DA, and may not display an image. The non-display area NDA may include a scan driver SIC that supplies a scan signal to the display area DA. The scan driver SIC may be arranged on the left and right sides of the non-display area NDA. The scan driver SIC may generate a scan signal based on a scan control signal. The scan control signal may include a start signal, a clock signal, and a power supply voltage, but is not limited thereto. The scan driver SIC may supply a scan signal to a scan line of the display area DA according to a set order.

[0062] Figure 2 is a cross-sectional view showing a display device according to an embodiment.

[0063] In the examples and with reference to Figure 2The display panel 100 may include a display unit DU, a touch sensing unit TSU, and an optical member POL. The display unit DU may include a first substrate SUB1, a barrier insulating layer BIL, a second substrate SUB2, a transistor layer TRL, a light emitting element layer EML, and an encapsulation layer TFEL.

[0064] In an embodiment, the first substrate SUB1 may support the display device 10. The first substrate SUB1 may be a base substrate or a base member. The first substrate SUB1 may be a flexible substrate that may be bent, folded, or curled. For example, the first substrate SUB1 may include an insulating material such as a polymer resin such as polyimide (PI), but is not limited thereto. In another embodiment, the first substrate SUB1 may be a rigid substrate including a glass material.

[0065] In an embodiment, a barrier insulating layer BIL may be disposed on the first substrate SUB1. The barrier insulating layer BIL may include an inorganic film capable of preventing penetration of air or moisture. For example, the barrier insulating layer BIL may include at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, an aluminum oxide layer, and an amorphous silicon layer, but is not limited thereto.

[0066] In an embodiment, the second substrate SUB2 may be disposed on the barrier insulating layer BIL. The second substrate SUB2 may be a base substrate or a base member. The second substrate SUB2 may be a flexible substrate that can be bent, folded, or curled. For example, the second substrate SUB2 may include an insulating material such as a polymer resin such as polyimide (PI), but is not limited thereto.

[0067] In an embodiment, the transistor layer TRL may be disposed on the second substrate SUB2. The transistor layer TRL may include a plurality of transistors constituting a pixel circuit of a pixel. The transistor layer TRL may include a scan line, a data line, and a power line connected to the pixel. Each of the plurality of transistors may include a semiconductor region, a source electrode, a drain electrode, and a gate electrode. For example, when the scan driver SIC (see Figure 1 ) is formed on one side of the non-display area NDA of the display panel 100, the scan driver SIC may include transistors.

[0068] In an embodiment, the transistor layer TRL may be disposed in the display area DA and the non-display area NDA. The transistor of each of the plurality of pixels of the transistor layer TRL, the scan line of the transistor layer TRL, the data line of the transistor layer TRL, and the power line of the transistor layer TRL may be disposed in the display area DA. The transistor of the scan driver SIC may be disposed in the non-display area NDA.

[0069] In an embodiment, the light emitting element layer EML may be disposed on the transistor layer TRL. The light emitting element layer EML may include a plurality of light emitting elements in which a pixel electrode, a light emitting layer, and a common electrode are sequentially stacked to emit light, and a pixel defining film defining a pixel. The plurality of light emitting elements of the light emitting element layer EML may be disposed in the display area DA.

[0070] In an embodiment, the light-emitting layer may be an organic light-emitting layer including an organic material. The light-emitting layer may include a hole transport layer, an organic light-emitting layer, and an electron transport layer. When the pixel electrode receives a predetermined voltage via the transistor of the transistor layer TRL and the common electrode receives a cathode voltage, holes move to the organic light-emitting layer via the hole transport layer, and electrons move to the organic light-emitting layer via the electron transport layer, so that holes and electrons can recombine with each other in the organic light-emitting layer to emit light. In an embodiment, the pixel electrode may be an anode electrode, and the common electrode may be a cathode electrode, but the present invention is not limited thereto.

[0071] In another embodiment, the plurality of light emitting elements may include a quantum dot light emitting diode including a quantum dot light emitting layer, an inorganic light emitting diode including an inorganic semiconductor, or a micro light emitting diode.

[0072] In an embodiment, the encapsulation layer TFEL may cover the upper surface and the side surface of the light emitting element layer EML and may protect the light emitting element layer EML. The encapsulation layer TFEL may include at least one inorganic film and at least one organic film for encapsulating the light emitting element layer EML.

[0073] In an embodiment, the touch sensing unit TSU may be disposed on the encapsulation layer TFEL. The touch sensing unit TSU may include a plurality of touch electrodes for sensing a user's touch in a capacitive method and a touch line for supplying a touch drive signal to the plurality of touch electrodes. In an embodiment, the touch sensing unit TSU may sense a user's touch in a mutual capacitance method or a self-capacitance method.

[0074] In an embodiment, a plurality of touch electrodes of the touch sensing unit TSU may be disposed in a touch sensor area overlapping the display area DA. Touch lines of the touch sensing unit TSU may be disposed in a touch peripheral area overlapping the non-display area NDA.

[0075] In an embodiment, the optical member POL may be disposed on the touch sensing unit TSU. The optical member POL may be attached to the touch sensing unit TSU by using an optically clear adhesive (OCA) or an optically clear resin (OCR). For example, the optical member POL may include a linear polarizer and a phase delay film, wherein the phase delay film may be a λ / 4 plate (quarter wave plate). The phase delay film and the linear polarizer may be stacked on the touch sensing unit TSU in sequence. The optical member POL may prevent color distortion due to external light reflection by reducing reflected light from external light.

[0076] In an embodiment, the first substrate SUB1 may include an opening portion SOP. The opening portion SOP of the first substrate SUB1 may be etched from the lower surface of the first substrate SUB1 to penetrate the upper surface of the first substrate SUB1. For example, the width of the lower portion of the opening portion SOP may be greater than the width of the upper portion of the opening portion SOP. During the process of manufacturing the display device 10, the pad component provided on the barrier insulating layer BIL may be exposed by the opening portion SOP of the first substrate SUB1. The pad component may be electrically connected to the display driver DIC via the flexible film FPCB inserted into the opening portion SOP.

[0077] In an embodiment, the flexible film FPCB may be disposed on the lower side of the first substrate SUB1. A portion of the flexible film FPCB may be inserted into the opening portion SOP of the first substrate SUB1 and electrically connected to the pad part, and another portion of the flexible film FPCB may be connected to the pad part via the support member ( Figure 3 The support member ADM in the first substrate SUB1 is disposed on the lower surface of the first substrate SUB1. The flexible film FPCB may support the display driver DIC. The flexible film FPCB may transmit the signal and voltage of the display driver DIC to the transistor layer TRL. The flexible film FPCB may supply the scan control signal to the scan driver SIC.

[0078] In an embodiment, the display driver DIC may be mounted on the flexible film FPCB. The display driver DIC may be an integrated circuit (IC). The display driver DIC may convert digital video data into an analog data voltage based on a data control signal received from a timing controller (not shown), and may supply the analog data voltage to the data line of the display area DA via the flexible film FPCB. The display driver DIC may supply the power voltage received from the power supply unit (not shown) to the power line of the display area DA via the flexible film FPCB. The display device 10 may include a flexible film FPCB and a display driver DIC disposed in the display area DA on the lower side of the first substrate SUB1, thereby minimizing the area of ​​the non-display area NDA.

[0079] Figure 3 According to the embodiment Figure 1 The display device is along Figure 1 An example of a cross-sectional view taken along line II'.

[0080] In the examples and with reference to Figure 3 , the display area DA of the display device 10 may include a plurality of light emitting areas EA. Each of the plurality of light emitting areas EA may be a region in which light generated by the light emitting element ED is emitted to the outside of the display device 10.

[0081] In an embodiment, the display device 10 may include a first substrate SUB1, a first barrier insulating layer BIL1, a first metal layer MTL1, a second barrier insulating layer BIL2, a second substrate SUB2, a transistor layer TRL, a light emitting element layer EML, an encapsulation layer TFEL, a touch sensing unit TSU, an optical member POL, a flexible film FPCB and a display driver DIC.

[0082] In an embodiment, the first substrate SUB1 may support the display device 10. The first substrate SUB1 may be a base substrate or a base member. The first substrate SUB1 may be a flexible substrate that may be bent, folded, or curled. For example, the first substrate SUB1 may include an insulating material such as a polymer resin such as polyimide (PI), but is not limited thereto. In another embodiment, the first substrate SUB1 may be a rigid substrate including a glass material.

[0083] In an embodiment, the first substrate SUB1 may include an opening portion SOP. The opening portion SOP of the first substrate SUB1 may be etched from the lower surface of the first substrate SUB1 to penetrate the upper surface of the first substrate SUB1. For example, the width of the lower portion of the opening portion SOP may be greater than the width of the upper portion of the opening portion SOP. During the process of manufacturing the display device 10, the pad part PAD may be exposed by the opening portion SOP of the first substrate SUB1. The pad part PAD may be electrically connected to the display driver DIC via the guide electrode LDE inserted into the opening portion SOP of the flexible film FPCB.

[0084] In an embodiment, a first barrier insulating layer BIL1 may be disposed on the first substrate SUB1. The first barrier insulating layer BIL1 may include an inorganic film capable of preventing penetration of air or moisture. For example, the first barrier insulating layer BIL1 may include at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, an aluminum oxide layer, and an amorphous silicon layer, but is not limited thereto.

[0085] In an embodiment, the first barrier insulating layer BIL1 may include a first contact hole CNT1. The first contact hole CNT1 may overlap with the opening portion SOP of the first substrate SUB1. The first contact hole CNT1 may be etched from the upper surface of the first barrier insulating layer BIL1 to penetrate the lower surface of the first barrier insulating layer BIL1. In an embodiment, the width of the upper portion of the first contact hole CNT1 may be greater than the width of the lower portion of the first contact hole CNT1.

[0086] In an embodiment, a first metal layer MTL1 may be disposed on the first barrier insulating layer BIL1. The first metal layer MTL1 may include a pad part PAD and a first fan-out line FOL1. The first metal layer MTL1 may be formed as a single layer or multiple layers including at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), palladium (Pd), indium (In), neodymium (Nd), and copper (Cu).

[0087] In an embodiment, the pad part PAD may be integrally formed with the first fan-out line FOL1 and the pad part PAD may be inserted into the first contact hole CNT1. The pad part PAD may electrically connect the flexible film FPCB and the first fan-out line FOL1. The pad part PAD may be exposed by the opening portion SOP of the first substrate SUB1. A portion of the pad part PAD may be in direct contact with the guide electrode LDE of the flexible film FPCB, and another portion of the pad part PAD may be electrically connected to the guide electrode LDE of the flexible film FPCB via the contact part CTP.

[0088] In an embodiment, the first fan-out line FOL1 may electrically connect the pad part PAD and the connection part CWL. The first fan-out line FOL1 may be electrically connected to the data line DL or the power line VL of the display area DA or the scan driver SIC of the non-display area NDA via the connection part CWL and the second fan-out line FOL2 (see Figure 1 ). The data line DL and the power line VL of the display area DA may be electrically connected to the transistor TR, and the scan driver SIC may generate a scan signal. Therefore, the first fan-out line FOL1 may supply a data voltage or a power voltage received from the display driver DIC to the transistor TR of the pixel via the connection part CWL and the second fan-out line FOL2, and may supply a scan control signal received from the flexible film FPCB to the scan driver SIC via the connection part CWL and the second fan-out line FOL2. The display device 10 may include a first fan-out line FOL1 disposed on the lower side of the second substrate SUB2 and a second fan-out line FOL2 disposed on the second substrate SUB2, thereby minimizing the area of ​​the non-display area NDA.

[0089] In an embodiment, the second barrier insulating layer BIL2 may be disposed on the first barrier insulating layer BIL1 and the first metal layer MTL1. The second barrier insulating layer BIL2 may include an inorganic film capable of preventing penetration of air or moisture. For example, the second barrier insulating layer BIL2 may be formed to include silicon oxide (SiO x The second barrier insulating layer BIL2 may include amorphous silicon (a-Si), thereby increasing adhesion between upper and lower layers and improving peeling defects.

[0090] In an embodiment, the second substrate SUB2 may be disposed on the second barrier insulating layer BIL2. The second substrate SUB2 may be a base substrate or a base member. The second substrate SUB2 may be a flexible substrate that can be bent, folded, or curled. For example, the second substrate SUB2 may include an insulating material such as a polymer resin such as polyimide (PI), but is not limited thereto.

[0091] In an embodiment, the transistor layer TRL may be disposed on the second substrate SUB2. The transistor layer TRL includes a buffer layer BF, an active layer ACTL, a gate insulating layer GI, a second metal layer MTL2, an interlayer insulating layer ILD, a third metal layer MTL3, a passivation layer PAS, and a through layer VIA.

[0092] In an embodiment, a buffer layer BF may be disposed on the second substrate SUB2. The buffer layer BF may include an inorganic material capable of preventing penetration of air or moisture. The buffer layer BF may include a plurality of inorganic films alternately stacked. The buffer layer BF may include a contact hole into which the connection part CWL is inserted.

[0093] In an embodiment, the active layer ACTL may be disposed on the buffer layer BF. The active layer ACTL may include a semiconductor region ACT, a drain electrode DE, and a source electrode SE of the transistor TR. The semiconductor region ACT may overlap with the gate electrode GE in the thickness direction (Z-axis direction) and may be insulated from the gate electrode GE by the gate insulating layer GI. The drain electrode DE and the source electrode SE may be formed by making the material of the semiconductor region ACT conductive. The transistor TR may constitute a pixel circuit of each of the plurality of pixels.

[0094] In an embodiment, a gate insulating layer GI may be disposed on the active layer ACTL and the buffer layer BF. The gate insulating layer GI may insulate the semiconductor region ACT of the transistor TR from the gate electrode GE. The gate insulating layer GI may include a contact hole into which each of the connection part CWL, the connection electrode CNE, and the data line DL is inserted.

[0095] In an embodiment, the second metal layer MTL2 may be disposed on the gate insulating layer GI. The second metal layer MTL2 may include a gate electrode GE of the transistor TR and a second fan-out line FOL2. The gate electrode GE may overlap with the semiconductor region ACT, and the gate insulating layer GI is between the gate electrode GE and the semiconductor region ACT. The gate electrode GE may receive a scan signal from a scan line. For example, the second metal layer MTL2 may be formed as a single layer or a multilayer including at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), palladium (Pd), indium (In), neodymium (Nd), and copper (Cu).

[0096] In an embodiment, the second fan-out line FOL2 may be connected to the connection part CWL. The second fan-out line FOL2 may be electrically connected to the data line DL or the power line VL of the display area DA or the scan driver SIC of the non-display area NDA. The data line DL and the power line VL of the display area DA may be electrically connected to the transistor TR, and the scan driver SIC may generate a scan signal. Therefore, the second fan-out line FOL2 may supply the data voltage or the power voltage received via the pad part PAD and the first fan-out line FOL1 to the transistor TR of the pixel, and supply the scan control signal to the scan driver SIC. The display device 10 may include a first fan-out line FOL1 disposed on the lower side of the second substrate SUB2 and a second fan-out line FOL2 disposed on the second substrate SUB2, thereby minimizing the area of ​​the non-display area NDA.

[0097] In an embodiment, an interlayer insulating layer ILD may be disposed on the second metal layer MTL2. The interlayer insulating layer ILD may insulate the second metal layer MTL2 and the third metal layer MTL3. The interlayer insulating layer ILD may include a contact hole into which each of the connection part CWL, the connection electrode CNE, and the data line DL is inserted.

[0098] In an embodiment, the third metal layer MTL3 may be disposed on the interlayer insulating layer ILD. The third metal layer MTL3 may include a connection component CWL, a connection electrode CNE, a data line DL, and a power line VL. The connection component CWL, the connection electrode CNE, the data line DL, and the power line VL may be formed of the same material on the same layer. For example, the third metal layer MTL3 may be formed as a single layer or a multilayer including at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), palladium (Pd), indium (In), neodymium (Nd), and copper (Cu).

[0099] In an embodiment, a connection component CWL may electrically connect the first fan-out line FOL1 and the second fan-out line FOL2. The connection component CWL may be inserted into a contact hole penetrating the interlayer insulating layer ILD, the gate insulating layer GI, the buffer layer BF, the second substrate SUB2, and the second barrier insulating layer BIL2, and connected to the first fan-out line FOL1. The connection component CWL may be inserted into a contact hole penetrating the interlayer insulating layer ILD, and connected to the second fan-out line FOL2.

[0100] In an embodiment, the connection electrode CNE may electrically connect the source electrode SE of the transistor TR and the pixel electrode AE ​​of the light emitting element ED. The connection electrode CNE may be inserted into a contact hole penetrating the interlayer insulating layer ILD and the gate insulating layer GI and connected to the source electrode SE of the transistor TR. The connection electrode CNE may supply a driving current received from the pixel circuit to the light emitting element ED.

[0101] In an embodiment, the data line DL may extend in the Y-axis direction in the display area DA. The data line DL may be inserted into a contact hole penetrating the interlayer insulating layer ILD and the gate insulating layer GI and connected to the drain electrode DE of the transistor TR. The data line DL may supply a data voltage to the transistor TR.

[0102] In an embodiment, the power line VL may extend in the Y-axis direction in the display area DA. The power line VL may be electrically connected to the transistor TR or the light emitting element ED. For example, the power line VL may be a high potential line, a low potential line, or a sensing line, but is not limited thereto.

[0103] In an embodiment, a passivation layer PAS may be disposed on the third metal layer MTL3 and the interlayer insulating layer ILD. The passivation layer PAS may protect the transistor TR. The passivation layer PAS may include a contact hole into which the pixel electrode AE ​​is inserted.

[0104] In an embodiment, the through layer VIA may be disposed on the passivation layer PAS. The through layer VIA may planarize the upper end of the transistor layer TRL. The through layer VIA may include an organic insulating material such as polyimide (PI). The through layer VIA may include a contact hole into which the pixel electrode AE ​​is inserted.

[0105] In an embodiment, the light emitting element layer EML may be disposed on the transistor layer TRL. The light emitting element layer EML may include a light emitting element ED and a pixel defining layer PDL.

[0106] In an embodiment, the light emitting element ED may be arranged in the light emitting area EA on the through layer VIA. The light emitting element ED of each of the plurality of pixels may include a pixel electrode AE, a light emitting layer EL and a common electrode CE. The pixel electrode AE ​​may be arranged on the through layer VIA. The pixel electrode AE ​​may overlap with a corresponding one of the plurality of light emitting areas EA defined by the pixel defining film PDL. For example, the pixel electrode AE ​​may receive a driving current from the pixel circuit via the connecting electrode CNE.

[0107] In an embodiment, the light emitting layer EL may be disposed on the pixel electrode AE. For example, the light emitting layer EL may be an organic light emitting layer made of an organic material, but is not limited thereto. When the light emitting layer EL corresponds to the organic light emitting layer, the pixel circuit of the pixel applies a predetermined voltage to the pixel electrode AE, and when the common electrode CE receives a common voltage or a cathode voltage, holes may move to the light emitting layer EL via the hole transport layer, electrons may move to the light emitting layer EL via the electron transport layer, and holes and electrons may recombine with each other in the light emitting layer EL to emit light.

[0108] In an embodiment, a common electrode CE may be disposed on the light emitting layer EL. For example, the common electrode CE may be implemented in the form of an electrode common to all pixels without being divided for each of the plurality of pixels. The common electrode CE may be disposed on the light emitting layer EL in the plurality of light emitting regions EA, and may be disposed on the pixel defining film PDL in a region other than the plurality of light emitting regions EA.

[0109] In an embodiment, a pixel defining film PDL may be disposed on the through layer VIA in the light blocking area BA. The pixel defining film PDL may define a plurality of emission areas EA or a plurality of opening areas. The pixel defining film PDL may separate and insulate pixel electrodes AE of a plurality of pixels from each other.

[0110] In an embodiment, the encapsulation layer TFEL may be disposed on the common electrode CE to cover the plurality of light emitting elements ED. The encapsulation layer TFEL may include at least one inorganic film to prevent oxygen or moisture from penetrating into the plurality of light emitting elements ED. The encapsulation layer TFEL may include at least one organic film to protect the plurality of light emitting elements ED from foreign matter such as dust.

[0111] In an embodiment, the touch sensing unit TSU may be disposed on the encapsulation layer TFEL. The touch sensing unit TSU may include a touch electrode TE, a first insulating layer IL1, a bridge electrode BRG, and a second insulating layer IL2.

[0112] In an embodiment, the touch electrode TE may be disposed in the light blocking area BA on the encapsulation layer TFEL. The touch electrode TE may sense the touch of the user in a capacitive method. For example, the touch sensing unit TSU may sense the touch of the user in a mutual capacitance method formed between a plurality of touch electrodes TE or a self-capacitance method formed on each of the plurality of touch electrodes TE. The touch electrode TE may be formed as a single layer made of molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or indium tin oxide (ITO), or may be formed as a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an APC alloy, and a stacked structure of an APC alloy and ITO (ITO / APC / ITO).

[0113] In an embodiment, the first insulating layer IL1 may be disposed on the touch electrode TE and the encapsulation layer TFEL. The first insulating layer IL1 may have an insulating function and an optical function. In an embodiment, the first insulating layer IL1 may be an inorganic film including at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, an aluminum oxide layer, and an amorphous silicon layer. In another embodiment, the first insulating layer IL1 may include an organic film.

[0114] In an embodiment, the bridge electrode BRG may be disposed on the first insulating layer IL1 . The bridge electrode BRG may be disposed on a different layer from the touch electrode TE to electrically connect the touch electrodes TE disposed adjacent to each other.

[0115] In an embodiment, the second insulating layer IL2 may be disposed on the bridge electrode BRG and the first insulating layer IL1. The second insulating layer IL2 may have an insulating function and an optical function. The second insulating layer IL2 may be formed of a material included in the first insulating layer IL1.

[0116] In an embodiment, the optical member POL may be disposed on the second insulating layer IL2. The optical member POL may be attached to the touch sensing unit TSU by using an optically clear adhesive (OCA) or an optically clear resin (OCR). For example, the optical member POL may include a linear polarizer and a phase delay film, and the phase delay film may be a λ / 4 plate (quarter wave plate). The phase delay film and the linear polarizer may be stacked on the touch sensing unit TSU in sequence. The optical member POL may prevent color distortion due to external light reflection by reducing reflected light from external light.

[0117] In an embodiment, the flexible film FPCB may be disposed on the lower side of the first substrate SUB1. One side of the flexible film FPCB may be inserted into the opening portion SOP of the first substrate SUB1 and electrically connected to the pad part PAD, and the other side of the flexible film FPCB may be disposed on the lower surface of the first substrate SUB1 using a support member ADM. For example, the support member ADM may support the flexible film FPCB by including at least one of a patterned film and a cover panel. The flexible film FPCB may include a guide electrode LDE disposed on the upper surface of one side of the flexible film FPCB and inserted into the opening portion SOP. The guide electrode LDE may protrude from one side of the flexible film FPCB, and a portion of the guide electrode LDE may not overlap with the flexible film FPCB. In an embodiment, an adhesive layer (not shown) may be disposed between the guide electrode LDE and the pad part PAD to bond the upper surface of the guide electrode LDE to a portion of the pad part PAD, and a portion of the lower surface of the guide electrode LDE may be electrically connected to another portion of the pad part PAD via a contact part CTP. In another embodiment, an upper surface of the guide electrode LDE may directly contact a portion of the pad part PAD, and a portion of a lower surface of the guide electrode LDE may be electrically connected to another portion of the pad part PAD via the contact part CTP.

[0118] In an embodiment, the flexible film FPCB may support a display driver DIC disposed on a lower surface of the other side of the flexible film FPCB. The guide electrode LDE may be electrically connected to the display driver DIC via a lead (not shown) disposed on the lower surface of the flexible film FPCB. The other side of the flexible film FPCB may be connected to a source circuit board (not shown) on the lower side of the first substrate SUB1. The flexible film FPCB may transmit signals and voltages of the display driver DIC to the display device 10. The flexible film FPCB may supply a scan control signal to the scan driver SIC.

[0119] In an embodiment, the contact part CTP may cover the lower surface of the guide electrode LDE protruding from the flexible film FPCB and the lower surface of the pad part PAD exposed through the opening portion SOP. The contact part CTP may electrically connect the guide electrode LDE and the pad part PAD, and may stably fix the guide electrode LDE to the lower surface of the pad part PAD.

[0120] In an embodiment, the contact part CTP can be formed by low temperature sintering of a conductive ink including nanoparticles and a polymer. The nanoparticles may include nanoscale metal particles such as silver (Ag), copper (Cu), aluminum (Al) or chromium (Cr), and the polymer may include an acrylic resin or an epoxy resin, but the present invention is not limited thereto. The conductive ink may include a polymer as a binder for connecting the metal particles, and the nanoparticles may be aggregated in close contact with each other through a sintering process. The contact part CTP may have conductivity by including sintered nanoparticles.

[0121] In another embodiment, the contact part CTP may be formed by low temperature sintering of metal organic decomposition (MOD) ink including silver, copper, aluminum or chromium. The metal organic decomposition ink may include a liquid metal organic decomposition material smaller than nanoparticles, and the liquid metal organic decomposition material may be converted into a metal material via a sintering process. Therefore, the contact part CTP may have conductivity.

[0122] In an embodiment, the contact part CTP may be formed by printing conductive ink or a metal paste including silver, copper, aluminum or chromium on the opening portion SOP of the first substrate SUB1 using a silicon pad and then sintering the conductive ink or metal paste using an intense pulsed light (IPL) or laser. When metal particles are in close contact with each other and aggregated due to the heat of the light pulse or laser, the specific resistivity of the contact part CTP may be reduced in the sintering process.

[0123] In an embodiment, the display driver DIC may be mounted on the flexible film FPCB. The display driver DIC may be an integrated circuit (IC). The display driver DIC may convert digital video data into an analog data voltage based on a data control signal received from a timing controller (not shown), and may supply the analog data voltage to the data line DL of the display area DA via the flexible film FPCB. The display driver DIC may supply the power voltage received from the power supply unit (not shown) to the power line VL of the display area DA via the flexible film FPCB. The display device 10 may include a pad part PAD and a first fan-out line FOL1 disposed on a first substrate SUB1, a second fan-out line FOL2 disposed on a second substrate SUB2, and a flexible film FPCB and a display driver DIC disposed on the lower side of the first substrate SUB1, thereby minimizing the area of ​​the non-display area NDA.

[0124] Figure 4 is a bottom view showing a display device according to an embodiment, and Figure 5 is an enlarged bottom view showing a portion of the display device according to the embodiment.

[0125] In the embodiments, reference Figure 4 and Figure 5, the pad part PAD may be disposed in the non-display area NDA.

[0126] In an embodiment, an adhesive layer may be provided between the guide electrode LDE and the pad part PAD so that a portion of the pad part PAD contacts the guide electrode LDE of the flexible film FPCB, and another portion of the pad part PAD may be electrically connected to the guide electrode LDE of the flexible film FPCB via the contact part CTP. As another example, a portion of the pad part PAD may be in direct contact with the guide electrode LDE, and another portion of the pad part PAD may be electrically connected to the guide electrode LDE via the contact part CTP.

[0127] In an embodiment, the first fan-out line FOL1 may be formed integrally with the pad part PAD, and may extend from the pad part PAD to an edge of the display device 10. The second fan-out line FOL2 (see Figure 3 ) may be electrically connected to the first fan-out line FOL1 and extend into the display area DA. In an embodiment, the first fan-out line FOL1 may extend in the opposite direction of the Y axis, and the second fan-out line FOL2 may extend in the Y axis direction, but is not limited thereto. The first fan-out line FOL1 may intersect the second fan-out line FOL2, but is not limited thereto. The first fan-out line FOL1 may be connected to the display area DA via a connection member CWL (e.g., see Figure 3 ) and the second fan-out line FOL2 are electrically connected to the data line DL of the display area DA (eg, see Figure 3 ) and the power line VL (see, for example, Figure 3 ) or the scan driver SIC of the non-display area NDA (see Figure 1 ).

[0128] In an embodiment, the flexible film FPCB may be disposed on the lower side of the first substrate SUB1. The flexible film FPCB may be disposed on the edge of the lower surface of the display device 10. The flexible film FPCB may supply data voltage, power voltage, and scan control signal, but is not limited thereto. The display driver DIC may be mounted on the flexible film FPCB. The display driver DIC may supply data voltage, power voltage, and scan control signal to the display panel 100 (see FIG. 1 ) via the flexible film FPCB. Figure 2 ) supplies data voltage and power voltage.

[0129] In an embodiment, the sintered conductive ink or metal paste may cover a plurality of pad parts PAD and a plurality of guide electrodes LDE simultaneously inserted into one opening part SOP, and a plurality of cutting parts CUT formed in a laser patterning process may separate a plurality of contact parts CTP. The contact part CTP may be spaced apart from adjacent contact parts CTP by the plurality of cutting parts CUT, and one contact part CTP may electrically connect one pad part PAD and one guide electrode LDE.

[0130] In another embodiment, a plurality of contact parts CTP may be formed by performing an extrusion process on a conductive ink or a metal paste using a mask including a plurality of holes. In this case, the plurality of contact parts CTP may be spaced apart from each other according to the distance between the plurality of holes, and one contact part CTP may electrically connect one pad part PAD and one guide electrode LDE without a separate patterning process.

[0131] Figure 6 is a view showing a pad part, a fan-out line, a power line, and a data line in a display device according to an embodiment.

[0132] In the examples and with reference to Figure 6 , display area DA (for example, see Figure 3 ) may include a power line VL and a data line DL.

[0133] In an embodiment, the plurality of power lines VL may extend in the second direction (Y-axis direction) and may be spaced apart from each other in the first direction (X-axis direction). Figure 3 The power line VL may be disposed on the third metal layer MTL3 and extend in the second direction (Y-axis direction). The power line VL may be connected via the second metal layer MTL2 (see Figure 3 ) of the second fan-out line FOL2 and the first metal layer MTL1 (see Figure 3 ) is electrically connected to the pad part PAD. The power line VL may receive a power voltage via the pad part PAD. Here, the power voltage may be a high potential voltage, a low potential voltage, a driving voltage, an initialization voltage, a reference voltage, or a bias voltage, but is not limited thereto.

[0134] In an embodiment, the plurality of data lines DL may each include a first data line DL1, a second data line DL2, and a third data line DL3. The first data line DL1, the second data line DL2, and the third data line DL3 may each extend in the second direction (Y-axis direction), and the first data line DL1, the second data line DL2, and the third data line DL3 may be spaced apart from each other in the first direction (X-axis direction). The first data line DL1, the second data line DL2, and the third data line DL3 may supply a first data voltage, a second data voltage, and a third data voltage to a plurality of pixels, respectively. Figure 3 The data line DL may be disposed on the third metal layer MTL3 and extend in the second direction (Y-axis direction). The data line DL may be electrically connected to the pad part PAD via the second fan-out line FOL2 of the second metal layer MTL2 and the first fan-out line FOL1 of the first metal layer MTL1. The data line DL may receive a data voltage via the pad part PAD.

[0135] Figure 7 According to the embodiment Figure 1 The display device is along Figure 1 Another embodiment of the cross-sectional view taken along line II'. Figure 7 The display device 10 has Figure 3 The configuration of the display device 10 is different from the configuration of the fan-out line FOL, and the configurations that are the same as those described above will be briefly described or omitted.

[0136] In the examples and with reference to Figure 7 The display device 10 may include a first substrate SUB1, a first barrier insulating layer BIL1, a first metal layer MTL1, a second barrier insulating layer BIL2, a second substrate SUB2, a transistor layer TRL, a light emitting element layer EML, an encapsulation layer TFEL, a touch sensing unit TSU, an optical member POL, a flexible film FPCB and a display driver DIC.

[0137] In an embodiment, a first metal layer MTL1 may be disposed on the first barrier insulating layer BIL1. The first metal layer MTL1 may include a pad part PAD. The first metal layer MTL1 may be formed as a single layer or a multilayer including at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), palladium (Pd), indium (In), neodymium (Nd), and copper (Cu).

[0138] In an embodiment, the pad part PAD may be inserted into the first contact hole CNT1. The pad part PAD may electrically connect the flexible film FPCB and the fan-out line FOL. The pad part PAD may be exposed by the opening portion SOP of the first substrate SUB1. In an embodiment, an adhesive layer (not shown) may be provided between the guide electrode LDE and the pad part PAD to adhere a portion of the pad part PAD to the guide electrode LDE of the flexible film FPCB, and another portion of the pad part PAD may be electrically connected to the guide electrode LDE of the flexible film FPCB via the contact part CTP. In another embodiment, the upper surface of the guide electrode LDE may be in direct contact with a portion of the pad part PAD, and a portion of the lower surface of the guide electrode LDE may be electrically connected to another portion of the pad part PAD via the contact part CTP.

[0139] In an embodiment, the transistor layer TRL may be disposed on the second substrate SUB2. The transistor layer TRL includes a second metal layer MTL2, a buffer layer BF, an active layer ACTL, a gate insulating layer GI, a third metal layer MTL3, an interlayer insulating layer ILD, a fourth metal layer MTL4, a passivation layer PAS, and a through layer VIA.

[0140] In an embodiment, the second metal layer MTL2 may be disposed on the second substrate SUB2. The second metal layer MTL2 may include a fan-out line FOL. The second metal layer MTL2 may be formed as a single layer or multiple layers including at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), platinum (Pt), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), palladium (Pd), indium (In), neodymium (Nd), tungsten (W), and copper (Cu).

[0141] In an embodiment, the fan-out line FOL may be inserted into the second contact hole CNT2 and contact the pad part PAD. The fan-out line FOL may electrically connect the pad part PAD and the connection part CWL. The fan-out line FOL may be electrically connected to the data line DL or the power line VL of the display area DA or the scan driver SIC of the non-display area NDA via the connection part CWL (see Figure 1 ). The data line DL and the power line VL of the display area DA may be electrically connected to the transistor TR, and the scan driver SIC may generate a scan signal. Therefore, the fan-out line FOL may supply a data voltage or a power voltage received from the display driver DIC to the transistor TR of the pixel via the connection part CWL, and may supply a scan control signal received from the flexible film FPCB to the scan driver SIC via the connection part CWL.

[0142] In an embodiment, a third metal layer MTL3 may be disposed on the gate insulating layer GI. The third metal layer MTL3 may include a gate electrode GE of the transistor TR.

[0143] In an embodiment, a fourth metal layer MTL4 may be disposed on the interlayer insulating layer ILD. The fourth metal layer MTL4 may include a connection part CWL, a connection electrode CNE, a data line DL, and a power line VL.

[0144] In an embodiment, the connection component CWL may be inserted into a contact hole that penetrates the interlayer insulating layer ILD, the gate insulating layer GI, and the buffer layer BF, and is connected to the fan-out line FOL. For example, the connection component CWL may be electrically connected to the data line DL to supply a data voltage to the transistor TR. The connection component CWL may be electrically connected to the power line VL to supply a power voltage to the transistor TR. The connection component CWL may be electrically connected to the scan driver SIC to supply a scan control signal to the scan driver SIC. Therefore, the connection component CWL may supply a data voltage or a power voltage received from the display driver DIC to the transistor TR of the pixel via the fan-out line FOL, and may supply a scan control signal received from the flexible film FPCB to the scan driver SIC. In other embodiments, the connection component CWL may be omitted or formed integrally with the data line DL or the power line VL.

[0145] Figures 8 to 11 2 is a cross-sectional view showing an example of a process of manufacturing a display device according to an embodiment. Hereinafter, the same configurations as those described above will be briefly described or omitted.

[0146] In the examples and with reference to Figure 8 The first substrate SUB1 may support the display device 10 (eg, see Figure 2 ). The first substrate SUB1 may be a base substrate or a base member.

[0147] In an embodiment, a first barrier insulating layer BIL1 may be provided on the first substrate SUB1. The first barrier insulating layer BIL1 may include an inorganic film capable of preventing penetration of air or moisture. The first barrier insulating layer BIL1 may include a first contact hole CNT1. The first contact hole CNT1 may be etched from the upper surface of the first barrier insulating layer BIL1 to penetrate the lower surface of the first barrier insulating layer BIL1.

[0148] In an embodiment, a first metal layer MTL1 may be disposed on the first barrier insulating layer BIL1. The first metal layer MTL1 may include a pad part PAD and a first fan-out line FOL1. The pad part PAD may be integrally formed with the first fan-out line FOL1 and inserted into the first contact hole CNT1.

[0149] In an embodiment, a second barrier insulating layer BIL2 may be disposed on the first barrier insulating layer BIL1 and the first metal layer MTL1. The second barrier insulating layer BIL2 may include an inorganic film capable of preventing penetration of air or moisture.

[0150] In an embodiment, a second substrate SUB2 may be disposed on the second barrier insulating layer BIL2. The second substrate SUB2 may be a base substrate or a base member.

[0151] In an embodiment, a transistor layer TRL may be disposed on the second substrate SUB2 and includes a buffer layer BF, an active layer ACTL, a gate insulating layer GI, a second metal layer MTL2, an interlayer insulating layer ILD, a third metal layer MTL3, a passivation layer PAS, and a through layer VIA.

[0152] In an embodiment, a second metal layer MTL2 may be disposed on the gate insulating layer GI. The second metal layer MTL2 may include a gate electrode GE of the transistor TR and a second fan-out line FOL2. The third metal layer MTL3 may include a connection part CWL, a connection electrode CNE, a data line DL, and a power line VL.

[0153] In an embodiment, the second fan-out line FOL2 may be electrically connected to the first fan-out line FOL1 via a connection member CWL. The second fan-out line FOL2 may be electrically connected to the display area DA (eg, see Figure 3 ) of the data line DL or the power line VL or the non-display area NDA (for example, see Figure 3 ) of the scan driver SIC (see Figure 1 ).

[0154] In an embodiment, a light emitting element layer EML may be disposed on the transistor layer TRL. The light emitting element layer EML may include a light emitting element ED and a pixel defining layer PDL.

[0155] In an embodiment, an encapsulation layer TFEL may be disposed on the common electrode CE to cover the plurality of light emitting elements ED.

[0156] In the examples and with reference to Fig. 9 , the display device 10 being manufactured (for example, see Figure 2 ) can be inverted vertically to attach the flexible film FPCB (see Fig.10 ).

[0157] In an embodiment, one surface of the first substrate SUB1 may be etched to form an opening portion SOP. At least one of a wet etching process, a dry etching process, a plasma etching process, and a laser etching process may be performed on one surface of the first substrate SUB1. An opening portion SOP may be provided on the first substrate SUB1 to expose a pad part PAD. One opening portion SOP may expose a plurality of pad parts PAD, but is not limited thereto.

[0158] In the examples and with reference to Fig.10 , a flexible film FPCB may be disposed on one surface of the first substrate SUB1. The guide electrode LDE of the flexible film FPCB may be aligned on the pad part PAD via an alignment process. One side of the flexible film FPCB may be inserted into the opening portion SOP in the first substrate SUB1 and electrically connected to the pad part PAD, and the other side of the flexible film FPCB may be disposed on the lower surface of the first substrate SUB1 using a support member ADM. In an embodiment, the support member ADM may support the flexible film FPCB by including at least one of a patterned film and a cover panel. The guide electrode LDE may protrude from one side of the flexible film FPCB. For example, one surface of the guide electrode LDE may be fixed to one surface of the pad part PAD via an adhesive layer. In another embodiment, one surface of the guide electrode LDE may be in direct contact with one surface of the pad part PAD.

[0159] In the examples and with reference to Fig.11 The contact part CTP may cover a portion of the guide electrode LDE and a portion of the pad part PAD. A portion of the other surface of the guide electrode LDE may be electrically connected to another portion of the pad part PAD via the contact part CTP.

[0160] In an embodiment, the conductive ink may be spread on the guide electrode LDE and the pad part PAD (ink spreading). The conductive ink may include nanoparticles and polymers. The contact part CTP may be formed by low temperature sintering of the conductive ink.

[0161] In an embodiment, sintered conductive ink, metal paste or metal organic decomposition ink may cover a plurality of pad parts PAD and a plurality of guide electrodes LDE simultaneously inserted into one opening part SOP, and a plurality of cutting parts CUT formed in a laser patterning process may separate a plurality of contact parts CTP. The contact part CTP may be spaced apart from adjacent contact parts CTP by the plurality of cutting parts CUT, and one contact part CTP may electrically connect one pad part PAD and one guide electrode LDE.

[0162] Therefore, in the embodiment, in the display device 10 (for example, see Figure 2 ), by electrically connecting the guide electrode LDE and the pad part PAD via the contact part CTP, the guide electrode LDE of the flexible film FPCB can be electrically connected to the pad part PAD without using ultrasonic bonding or thermocompression bonding. In addition, the manufacturing time and manufacturing cost can be reduced by simplifying the process of manufacturing the display device 10.

[0163] Fig.12 is a cross-sectional view showing another example of a process of manufacturing a display device according to the embodiment, and Fig.13 The present invention is shown in the manufacturing process according to the embodiment. Fig.12 A plan view of a mask used in a process of a display device.

[0164] In the examples and with reference to Fig.12 and Fig.13 , a plurality of contact parts CTP can be formed by performing an extrusion process on a conductive ink, a metal paste, or a metal organic decomposition ink using a mask MSK including a plurality of holes HOL. The size and spacing of the plurality of holes HOL can be determined by the size and spacing of the pad part PAD. The conductive ink, the metal paste, or the metal organic decomposition ink can pass through the plurality of holes HOL via an extrusion process and can be printed on a plurality of pad parts PAD spaced apart from each other. A plurality of contact parts CTP can be formed by low temperature sintering of the printed ink. Therefore, a plurality of contact parts CTP can be spaced apart from each other according to the spacing between the plurality of holes HOL, and one contact part CTP can electrically connect one pad part PAD and one guide electrode LDE without a separate patterning process.

[0165] The present invention should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that the disclosure will be thorough and complete, and the present invention will be fully communicated to those skilled in the art. Although the present invention has been specifically shown and described with reference to the embodiments of the present invention, it will be appreciated by those of ordinary skill in the art that various changes in form and detail may be made therein without departing from the spirit or scope of the present invention. In addition, embodiments or a portion of embodiments may be combined in whole or in part without departing from the scope of the present invention.

Claims

1. A display device, wherein: The display device comprises: A first substrate including an opening portion; a first barrier insulating layer disposed on the first substrate and comprising a first contact hole partially overlapping the opening; A first fan-out line, disposed on the first barrier insulating layer; a pad component formed integrally with the first fan-out line, and the pad component is exposed through the opening portion by being disposed in the first contact hole; A second substrate, disposed on the first fan-out line; a connecting component, disposed on the second substrate and connected to the first fan-out line; a second fan-out line disposed on a layer between the first fan-out line and the connection component and connected to the connection component; a data line disposed on the same layer as the connection member and electrically connected to the second fan-out line to supply a data voltage; a flexible film disposed under the first substrate and including a guide electrode disposed in the opening portion of the first substrate; and The contact member electrically connects the lead electrode and the pad member by contacting the lower surface of the lead electrode and the lower surface of the pad member.

2. The display device according to claim 1, wherein: The guide electrode protrudes from one side of the flexible film, and wherein the contact member contacts the lower surface of the guide electrode protruding from the flexible film.

3. The display device according to claim 1, wherein: The contact member is formed by sintering a conductive ink, a metal paste or a metal organic decomposition ink including silver, copper, aluminum or chromium.

4. The display device according to claim 1, wherein: The display device further includes a display area for displaying an image and a non-display area surrounding the display area. Wherein, the flexible film is arranged in the display area.

5. The display device according to claim 1, wherein: The display device further includes a transistor, the transistor including a drain electrode, a semiconductor region, and a source electrode included in an active layer disposed on the first fan-out line, and a gate electrode disposed on the active layer. The data line supplies a data voltage to the transistor.

6. The display device according to claim 5, wherein: The display device further includes a power line disposed on the same layer as the data line to supply a power voltage to the transistor.

7. The display device according to claim 5, wherein: The display device further includes: a connection electrode disposed on the same layer as the data line and electrically connected to the transistor; and A pixel electrode is disposed on the connection electrode and connected to the connection electrode to receive a driving current from the transistor.

8. The display device according to claim 1, wherein: The display device further includes: a transistor layer including transistors electrically connected to the data lines; a light emitting element layer, disposed on the transistor layer and including a light emitting element; and The encapsulation layer contacts the upper surface and the side surface of the light emitting element layer.

9. The display device according to claim 1, wherein: The first substrate and the second substrate each include polyimide or polymer resin.

10. A display device, wherein: The display device comprises: A first substrate including an opening portion; a first barrier insulating layer disposed on the first substrate and comprising a first contact hole partially overlapping the opening; a pad component disposed in the first contact hole and exposed through the opening portion; a first fan-out line, disposed on the first barrier insulating layer and formed integrally with the pad component; A second substrate, disposed on the first fan-out line; a second fan-out line, disposed on the second substrate and electrically connected to the first fan-out line; a transistor, arranged on the first fan-out line and electrically connected to the second fan-out line; a flexible film disposed under the first substrate and disposed in the opening portion of the first substrate; and A guide electrode protrudes from one side of the flexible film and includes a portion that does not overlap with the flexible film.

11. The display device according to claim 10, wherein: The display device further includes a contact member electrically connecting the guide electrode and the pad member by contacting the portion of the guide electrode not overlapping the flexible film and one surface of the pad member.

12. The display device according to claim 11, wherein: The contact member is formed by sintering a conductive ink, a metal paste or a metal organic decomposition ink including silver, copper, aluminum or chromium.

13. The display device according to claim 10, wherein: The display device further includes: a data line disposed on the transistor to supply a data voltage to the transistor; and A power line is provided on the same layer as the data line to supply a power voltage to the transistor.

14. The display device according to claim 13, wherein: The display device further includes: a connection electrode disposed on the same layer as the data line and electrically connected to the transistor; and A pixel electrode is disposed on the connection electrode and connected to the connection electrode to receive a driving current from the transistor.

15. A method for manufacturing a display device, wherein: The method comprises: preparing a first substrate; forming a first barrier insulating layer including a first contact hole on the first substrate; forming a first fan-out line disposed on the first barrier insulating layer and a pad component integrally formed with the first fan-out line and disposed in the first contact hole; forming a second substrate on the pad component; forming a second fan-out line disposed on the second substrate; forming a connection component disposed on the second fan-out line to electrically connect the first fan-out line and the second fan-out line; forming an opening portion exposing the pad part by etching a lower portion of the first substrate; inserting a lead electrode of a flexible film into the opening portion and fixing the lead electrode to one surface of the pad member; and A contact part electrically connecting the pad part and the lead electrode is formed by contacting a part of the pad part and a part of the lead electrode.

16. The method according to claim 15, wherein: The forming of the contact feature comprises: printing at least one of a conductive ink including silver, copper, aluminum or chromium, a metal paste and a metal organic decomposition ink in the opening portion of the first substrate; and The at least one of the conductive ink, the metal paste, and the metal-organic decomposition ink is sintered to produce a corresponding one of a sintered conductive ink, a sintered metal paste, and a sintered metal-organic decomposition ink.

17. The method according to claim 16, wherein: The forming of the contact features further includes separating the corresponding one of the sintered conductive ink, the sintered metal paste, and the sintered metal-organic decomposition ink into a plurality of contact features via a laser patterning process.

18. The method according to claim 16, wherein: The sintering of the at least one of the conductive ink, the metal paste, and the metal organic decomposition ink includes agglomerating metal particles by applying heat generated by a light pulse or a laser.

19. The method according to claim 15, wherein: The forming of the contact feature comprises: printing conductive ink, metal paste, or metal-organic decomposition ink in the opening portion of the first substrate by performing an extrusion process using a mask including a plurality of holes; and The conductive ink, the metal paste or the metal organic decomposition ink is sintered.

20. The method according to claim 19, wherein: The size and spacing of the plurality of holes are determined by the size and spacing of the pad features.

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