High linearity low noise amplifier

Abstract

The invention relates to the technical field of wireless communication, and provides a high-linearity low-noise amplifier which comprises an input selection module, a first amplifier circuit module, a second amplifier circuit module, a first linear adjustment network, a second linear adjustment network, a first output matching adjustment module and a second output matching adjustment module. The input selection module comprises a first switch, a second switch, a third switch, a first capacitor and a second capacitor; the control end of the first switch serves as the input end of the input selection module, the output end of the first switch is used for being connected with the control end of the second switch or the control end of the third switch according to a received first control signal, and the output end of the second switch is grounded; the second output end of the first switch is connected with the control end of the third switch and the first end of the second capacitor. The output end of the third switch is grounded. The high-linearity low-noise amplifier provided by the invention can realize good power consumption, NF and linearity under different gain gears.

Description

Technical Field

[0001] The present invention relates to the technical field of wireless communication, and in particular to a high linearity low noise amplifier. Background Art

[0002] With the updating and iteration of electronic devices, their performance is constantly improving. In 4G and 5G networks, data transmission is completed through carrier channels. In the 5G era, due to the increase in spectrum resources and more advanced technology, carrier aggregation (CA) has become one of the key technologies to achieve high-speed data transmission.

[0003] Through carrier aggregation, operators can make full use of spectrum resources to provide higher data transmission rates and more stable network connections. As the first-level active device of the RF front-end system, the RF low noise amplifier (LNA) provides a channel for carrier aggregation. The multiplexer is followed by multiple LNAs. In order to meet the CA combination requirements between LNAs, there will be multiple LNAs that need to meet the same channel input. In the design, a certain gain is usually required to amplify the weak signal received from the antenna and have a certain noise suppression capability for the subsequent modules. It also needs to have very low noise to ensure the receiving sensitivity of the system, and there will not be too much difference between the inputs. Similarly, in order to ensure that the system is not distorted and does not cause damage to the subsequent active devices, there is a requirement that the LNA needs to have variable gain and the ability to expand the dynamic range. Therefore, in addition to the gain and noise meeting the system requirements, the high linearity design has also become a necessary point for the gain-adjustable low noise amplifier.

[0004] At present, there is area redundancy in the design of multiple LNAs with carrier aggregation CA function, and the performance of the same input for different LNAs is quite different, which will lead to targeted configuration in practical applications to reduce the differences. In addition, the linearity and noise factor of LNA are also core performance, especially the step-by-step linearity changes of different gain levels. Now many designs sacrifice too much noise factor to meet the linearity design, and for the lowest gain level, it is difficult to achieve good linearity under low current conditions, and the amplifier may enter the subthreshold region under low current, and its linearity improvement effect is poor. Summary of the invention

[0005] In view of the above deficiencies in the prior art, the present invention proposes a high linearity low noise amplifier and a radio frequency chip to solve the problems of the existing low noise amplifier having trouble in gain adjustment and poor linearity improvement effect.

[0006] In order to solve the above technical problems, the present invention adopts the following technical solutions: An embodiment of the present invention provides a high linearity low noise amplifier, comprising an input selection module, a first amplifier circuit module, a second amplifier circuit module, a first linear adjustment network, a second linear adjustment network, a first output matching adjustment module, and a second output matching adjustment module; The input end of the input selection module is used to receive a radio frequency signal, and the output end of the input selection module is used to connect to the input end of the first amplifier circuit module or the input end of the second amplifier circuit module to achieve different gain adjustment functions; the output end of the first amplifier circuit module is respectively connected to the input end of the first linear adjustment network and the first output matching adjustment module, and the output end of the first output matching adjustment module outputs a load; the output end of the second amplifier circuit module is respectively connected to the input end of the second linear adjustment network and the second output matching adjustment module, and the output end of the second output matching adjustment module outputs a load; The input selection module includes a first switch, a second switch, a third switch, a first capacitor and a second capacitor; The control end of the first switch serves as the input end of the input selection module; the output end of the first switch is used to connect to the control end of the second switch or the control end of the third switch according to the received first control signal; the first end of the first capacitor is connected to the control end of the second switch, and the output end of the second switch is grounded; the first end of the second capacitor is connected to the control end of the third switch, and the output end of the third switch is grounded; the second end of the first capacitor and the second end of the second capacitor serve as two output ends of the input selection module respectively; the second end of the first capacitor is used to connect to the input end of the first amplifier circuit module, and the second end of the second capacitor is used to connect to the input end of the second amplifier circuit module.

[0007] Preferably, the high linearity low noise amplifier also includes at least one first control unit and at least one second control unit; the input end of the first control unit and the input end of the second control unit are respectively used to receive the second control signal; the output end of the first control unit is connected to the output end of the first capacitor, and the first control unit is used to output the second control signal to the input end of the first amplifier circuit module; the output end of the second control unit is connected to the output end of the second capacitor, and the second control unit is used to output the second control signal to the input end of the second amplifier circuit module.

[0008] Preferably, the first control unit includes a fourth switch, a fifth switch and a third capacitor; the control end of the fourth switch is connected to the control end of the fifth switch and serves as the input end of the first control unit, the output end of the fourth switch is grounded, the output end of the fifth switch is connected to the first end of the third capacitor, and the second end of the third capacitor serves as the output end of the first control unit; The second control unit includes a sixth switch, a seventh switch and a fourth capacitor; the control end of the sixth switch is connected to the control end of the seventh switch and serves as the input end of the second control unit, the output end of the sixth switch is grounded, the output end of the seventh switch is connected to the second end of the fourth capacitor, and the second end of the fourth capacitor serves as the output end of the second control unit.

[0009] Preferably, the circuits of the first amplifier circuit module and the second amplifier circuit module are the same; The first amplifier circuit module includes a first bias circuit, a first resistor, a second resistor, a fifth capacitor, a first MOS transistor, a second MOS transistor, a first capacitor adjustment circuit and a first inductance adjustment circuit; The first end of the first resistor is respectively connected to the gate of the first MOS tube and the first end of the first capacitor adjustment circuit and serves as the input end of the first amplifier circuit module; the second end of the first resistor is connected to the first end of the first bias circuit, the second end of the first bias circuit is connected to the first end of the second resistor, the second end of the second resistor is respectively connected to the gate of the second MOS tube and the first end of the fifth capacitor, and the second end of the fifth capacitor is grounded; the drain of the fifth MOS tube serves as the output end of the first amplifier circuit module; The source of the second MOS tube is respectively connected to the drain of the first MOS tube and the first linear regulation network; the source of the first MOS tube is respectively connected to the second end of the first capacitance regulation circuit and the first end of the first inductance regulation circuit, and the second end of the first inductance regulation circuit is grounded.

[0010] Preferably, the first capacitance adjustment circuit includes a sixth capacitor, a plurality of eighth switches and a plurality of seventh capacitors; The first end of the sixth capacitor is respectively connected to the control ends of the multiple eighth switches and serves as the first end of the first capacitor adjustment circuit, the output ends of the multiple eighth switches are respectively connected to the first ends of the multiple seventh capacitors in a one-to-one correspondence, and the second end of the sixth capacitor is respectively connected to the second ends of the multiple seventh capacitors and serves as the second end of the first capacitor adjustment circuit.

[0011] Preferably, the first inductance adjustment circuit includes a first inductor, a second inductor, a ninth switch, a tenth switch and an eleventh switch; The first end of the first inductor is connected to the control end of the tenth switch and serves as the first end of the first inductor adjustment circuit. The second end of the first inductor is respectively connected to the control end of the ninth switch and the output end of the eleventh switch. The control end of the eleventh switch is respectively connected to the output end of the tenth switch and the first end of the second inductor. The output end of the ninth switch is connected to the second end of the second inductor and serves as the second end of the first inductor adjustment circuit.

[0012] Preferably, the circuit structure of the first output matching adjustment module is the same as that of the second output matching adjustment module; The first output matching and adjusting module includes an eighth capacitor, a third inductor, a load adjustment circuit, an output matching circuit and an attenuation network; The first end of the eighth capacitor is respectively connected to the first end of the third inductor and the first end of the load regulation circuit and is used to be connected to a power supply; the second end of the eighth capacitor is grounded, and the second end of the third inductor is respectively connected to the second end of the load regulation circuit and the input end of the output matching circuit and serves as the input end of the first output matching adjustment module; the output end of the output matching circuit is connected to the input end of the attenuation network, and the output end of the attenuation network is used to output the load.

[0013] Preferably, the load regulating circuit comprises a third resistor, a plurality of twelfth switches and a plurality of fourth resistors; The first end of the third resistor is respectively connected to the control ends of the multiple twelfth switches and serves as the first end of the load regulation circuit, the output ends of the multiple twelfth switches are respectively connected to the first ends of the multiple fourth resistors, and the second end of the third resistor is respectively connected to the second ends of the multiple fourth resistors and serves as the second end of the load regulation circuit.

[0014] Preferably, the output matching circuit includes a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a thirteenth switch, a fourteenth switch, a fifteenth switch, a sixteenth switch, a seventeenth switch and an eighteenth switch; The control end of the thirteenth switch is respectively connected to the control end of the fourteenth switch, the control end of the fifteenth switch, the control end of the sixteenth switch and the first end of the eleventh capacitor, and the output end of the thirteenth switch and the output end of the fourteenth switch are respectively connected to the ninth capacitor and the tenth capacitor and are grounded; The output end of the fifteenth switch is connected to the first end of the twelfth capacitor, the output end of the sixteenth switch is connected to the first end of the thirteenth capacitor, the second end of the eleventh capacitor is respectively connected to the second end of the twelfth capacitor, the second end of the thirteenth capacitor, the control end of the seventeenth switch and the control end of the eighteenth switch, the output end of the seventeenth switch and the output end of the eighteenth switch are respectively connected to the fourteenth capacitor and the fifteenth capacitor and are grounded; The control end of the thirteenth switch also serves as the input end of the output matching circuit, and the control end of the eighteenth switch also serves as the output end of the output matching circuit.

[0015] Preferably, the circuit structures of the first linear regulation network and the second linear regulation network are the same; The first linear regulation network includes a sixteenth capacitor, a plurality of nineteenth switches and a plurality of fifth resistors, the first end of the sixteenth capacitor is connected to the first amplifier circuit module, the second end of the sixteenth capacitor is respectively connected to the control ends of the plurality of nineteenth switches, and the output ends of the plurality of nineteenth switches are respectively connected to the plurality of fifth resistors and grounded.

[0016] Compared with the related art, in the embodiment of the present invention, different gain adjustment functions are realized by using the input end of the input selection module to receive the radio frequency signal, and the output end of the input selection module to connect the input end of the first amplifier circuit module or the input end of the second amplifier circuit module; the control end of the first switch of the input selection module serves as the input end of the input selection module, and the output end of the first switch is used to connect the control end of the second switch or the control end of the third switch according to the received first control signal, the first end of the first capacitor is connected to the control end of the second switch, and the output end of the second switch is grounded; the first end of the second capacitor is connected to the control end of the third switch, and the output end of the third switch is grounded; the second end of the first capacitor and the second end of the second capacitor are respectively used as two output ends of the input selection module, the second end of the first capacitor is used to connect the input end of the first amplifier circuit module, and the second end of the second capacitor is used to connect the input end of the second amplifier circuit module; thereby, the switching of the input port to different amplifier LNAs can be realized, and the input of multiple amplifier LNAs can be increased according to application requirements, and the gain can be adjusted on the basis of having an area advantage, and good power consumption, NF and linearity can be achieved at different gain levels; and through reasonable gain level adjustment means, the application environment of the low noise amplifier under different antenna receiving powers is helped to meet different indicator requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings: Figure 1 A circuit structure block diagram of a high linearity low noise amplifier provided by an embodiment of the present invention; Figure 2 for Figure 1 A partial enlargement of the part shown in Figure 1 ; Figure 3 for Figure 1 A partial enlargement of the portion shown in B Figure 2 ; Figure 4 for Figure 1 Part C is a partial enlargement of the Figure 3 ; Figure 5 A circuit diagram of a first capacitance adjustment circuit provided by an embodiment of the present invention; Figure 6 A circuit diagram of a first inductance adjustment circuit provided by an embodiment of the present invention; Figure 7 A circuit diagram of a load regulation circuit provided by an embodiment of the present invention; Figure 8 A circuit diagram of an output matching circuit provided by an embodiment of the present invention; Fig. 9 A circuit diagram of a first linear regulation network provided in an embodiment of the present invention.

[0018] Among them, 100, high linearity low noise amplifier, 1, input selection module, 2, first amplifier circuit module, 21, first bias circuit, 22, first capacitance adjustment circuit, 23, first inductance adjustment circuit, 3, second amplifier circuit module, 31, second bias circuit, 32, second capacitance adjustment circuit, 33, second inductance adjustment circuit, 4, first linear adjustment network, 5, second linear adjustment network, 6, first output matching adjustment module, 61, load adjustment circuit, 62, output matching circuit. 63, attenuation network, 7, second output matching adjustment module, 8, first control unit, 9, second control unit. DETAILED DESCRIPTION

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present application; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application; the terms "including" and "having" and any variations thereof in the specification and claims of the present application and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present application or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.

[0020] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0021] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0022] See also Figure 1-Figure 9 As shown, an embodiment of the present invention provides a high linearity low noise amplifier 100, including an input selection module 1, a first amplifier circuit module 2, a second amplifier circuit module 3, a first linear regulation network 4, a second linear regulation network 5, a first output matching regulation module 6 and a second output matching regulation module 7.

[0023] The input end of the input selection module 1 is used to receive the radio frequency signal, and the output end of the input selection module 1 is used to connect to the input end of the first amplifier circuit module 2 or the input end of the second amplifier circuit module 3 to achieve different gain adjustment functions; the output end of the first amplifier circuit module 2 is respectively connected to the input end of the first linear adjustment network 4 and the first output matching adjustment module 6, and is used to amplify the radio frequency signal and then output the load through the output end of the first output matching adjustment module 6; the output end of the second amplifier circuit module 3 is respectively connected to the input end of the second linear adjustment network 5 and the second output matching adjustment module 7, and is used to amplify the radio frequency signal and then output the load through the output end of the second output matching adjustment module 7. The first linear adjustment network 4 and the second linear adjustment network 5 are used to adjust the linearity of the low gain gear, and the linearity and gain can be adjusted without increasing the noise coefficient (NF) too much. The input selection module 1 includes a first switch SPDT, a second switch SW 13 , the third switch SW 23 , a first capacitor C15 and a second capacitor C25. The control end of the first switch SPDT is used as the input end of the input selection module 1, and the output end of the first switch SPDT is used to connect the second switch SW according to the received first control signal (REIN1). 13 The control terminal or the third switch SW 23The first end of the first capacitor C15 is connected to the second switch SW 13 The control terminal of the second switch SW 13 The output end of the second capacitor C25 is connected to the third switch SW 23 The control terminal of the third switch SW 23 The output end of the first capacitor C15 is grounded; the second end of the first capacitor C15 and the second end of the second capacitor C25 are respectively used as the two output ends of the input selection module 1, the second end of the first capacitor C15 is used to connect the input end of the first amplifier circuit module 2, and the second end of the second capacitor C25 is used to connect the input end of the second amplifier circuit module 3. By setting the control end of the first switch SPDT as the common input port of the first amplifier circuit module 2 and the second amplifier circuit module 3, the input selection is first performed through the first output end and the second output end of the first switch SPDT, and then enters the first amplifier circuit module 2 and the second amplifier circuit module 3 respectively through the second switch SW 13 and the third switch SW 23 The non-working input port is screened, and a pull-down is set to shut down the non-working input port, so as to achieve good isolation. Through the input selection setting of the first switch SPDT, the input port can be switched to different amplifier LNAs, and the input of multiple amplifier LNAs can be added according to application requirements. The gain can be adjusted based on the area advantage, and good power consumption, NF and linearity can be achieved at different gain levels; and through reasonable gain level adjustment means, the low noise amplifier can be applied in different antenna receiving power environments to meet different index requirements.

[0024] Specifically, the first capacitor C15 and the second capacitor C25 are connected to the second switch SW 13 and the third switch SW 23 The upper end is connected to the first switch SPDT and finally connected to the common port. By controlling the size of the first switch SPDT to reasonably control the insertion loss and the parasitic capacitance caused, the various performances of the common port can be balanced, and the second switch SW can be pulled down. 13 and the third switch SW 23 It can be ensured that after the first switch SPDT selects one path to be turned on, the other path can be well isolated.

[0025] In this embodiment, the high linearity low noise amplifier 100 also includes at least one first control unit 8 and at least one second control unit 9; the input end of the first control unit 8 and the input end of the second control unit 9 are respectively used to receive the second control signal (REIN2); the output end of the first control unit 8 is connected to the output end of the first capacitor C15, and the first control unit 8 is used to output the second control signal to the input end of the first amplifier circuit module 2; the output end of the second control unit 9 is connected to the output end of the second capacitor C25, and the second control unit 9 is used to output the second control signal to the input end of the second amplifier circuit module 3.

[0026] In this embodiment, the first control unit 8 includes a fourth switch SW 12 , the fifth switch SW 14 and a third capacitor C14; the fourth switch SW 12 The control terminal of the fifth switch SW 14 The control end of the fourth switch SW is connected to the input end of the first control unit 8, and the fourth switch SW 12 The output terminal of the fifth switch SW is grounded. 14 The output end of the first capacitor C14 is connected to the first end of the third capacitor C14, and the second end of the third capacitor C14 serves as the output end of the first control unit 8; the second control unit 9 includes a sixth switch SW 24 , a seventh switch and a fourth capacitor C24; the sixth switch SW 24 The control end of the sixth switch SW is connected to the control end of the seventh switch and serves as the input end of the second control unit 9. 24 The output end of the seventh switch is grounded, the output end of the seventh switch is connected to the second end of the fourth capacitor C24, and the second end of the fourth capacitor C24 serves as the output end of the second control unit 9.

[0027] In this embodiment, the circuits of the first amplifier circuit module 2 and the second amplifier circuit module 3 are the same.

[0028] The first amplifier circuit module 2 includes a first bias circuit 21, a first resistor R11, a second resistor R12, a fifth capacitor C11, a first MOS transistor M11, a second MOS transistor M12, a first capacitance adjustment circuit 22 and a first inductance adjustment circuit 23; the first end of the first resistor R11 is respectively connected to the gate of the first MOS transistor M11 and the first end of the first capacitance adjustment circuit 22 and serves as the input end of the first amplifier circuit module 2; the second end of the first resistor R11 is connected to the first end of the first bias circuit 21, and the second end of the first bias circuit 21 is connected to the second resistor R11. 2, the second end of the second resistor R12 is respectively connected to the gate of the second MOS tube M12 and the first end of the fifth capacitor C11, and the second end of the fifth capacitor C11 is grounded; the drain of the fifth MOS tube serves as the output end of the first amplifier circuit module 2; the source of the second MOS tube M12 is respectively connected to the drain of the first MOS tube M11 and the first linear adjustment network 4; the source of the first MOS tube M11 is respectively connected to the second end of the first capacitance adjustment circuit 22 and the first end of the first inductance adjustment circuit 23, and the second end of the first inductance adjustment circuit 23 is grounded.

[0029] By forming a common source and common gate architecture with the first MOS tube M11 and the second MOS tube M12, the first bias circuit 21 is used to provide a bias voltage through the gates of the first MOS tube M11 and the second MOS tube M12 connected through the first resistor R11 and the second resistor R12, respectively. The second end of the second resistor R12 is connected to the first end of the fifth capacitor C11, so that the second resistor R12 and the fifth capacitor C11 form a filter circuit and provide an AC to ground path. The gate and source of the first MOS tube M11 are connected through the first capacitor adjustment circuit 22 to adjust the input matching and affect the performance of different gain gears. The source of the first MOS tube M11 is connected through the first inductance adjustment circuit 23 and grounded to adjust the input matching and the linearity of different gain gears.

[0030] Specifically, the second amplifier circuit module 3 includes a second bias circuit 31, a resistor R21, a resistor R22, a capacitor C21, a MOS tube M21, a MOS tube M22, a second capacitance adjustment circuit 32 and a second inductance adjustment circuit 33; the first end of the resistor R21 is respectively connected to the gate of the MOS tube M21 and the first end of the second capacitance adjustment circuit 32 and serves as the input end of the second amplifier circuit module 3; the second end of the resistor R21 is connected to the first end of the second bias circuit 31, and the second end of the second bias circuit 31 is connected to the resistor R22 The first end of the resistor R22 is connected to the gate of the MOS tube M22 and the first end of the capacitor C21 respectively, and the second end of the capacitor C21 is grounded; the drain of the fifth MOS tube is used as the output end of the second amplifier circuit module 3; the source of the MOS tube M22 is connected to the drain of the MOS tube M21 and the second linear adjustment network 5 respectively; the source of the MOS tube M21 is connected to the second end of the second capacitance adjustment circuit 32 and the first end of the second inductance adjustment circuit 33 respectively, and the second end of the second inductance adjustment circuit 33 is grounded. By forming a common source and common gate architecture with the MOS tube M21 and the MOS tube M22, the second bias circuit 31 is connected to the gate of the MOS tube M21 and the gate of the MOS tube M22 through the resistor R21 and the resistor R22 respectively to provide a bias voltage, the left end of the resistor R22 is connected to the capacitor C21, and the capacitor C21 and the resistor R22 form a filter capacitor, and provide an AC to ground path at the same time. The second capacitance adjustment circuit 32 is connected to the gate and source of the MOS tube M21 to adjust the input matching and affect the performance of different gain gears. The second inductance adjustment circuit 33 connects the source of the MOS tube M21 to the ground to adjust the input matching and the linearity of different gain levels.

[0031] In this embodiment, the first capacitance adjustment circuit 22 includes a sixth capacitor C31, a plurality of eighth switches S32, and a plurality of seventh capacitors C32; the first end of the sixth capacitor C31 is respectively connected to the control ends of the plurality of eighth switches S32 and serves as the first end of the first capacitance adjustment circuit 22, the output ends of the plurality of eighth switches S32 are respectively connected to the first ends of the plurality of seventh capacitors C32 in a one-to-one correspondence, and the second end of the sixth capacitor C31 is respectively connected to the second ends of the plurality of seventh capacitors C32 and serves as the second end of the first capacitance adjustment circuit 22. By adjusting the on-off of the eighth switch S32 to increase the capacitance of the parallel capacitor, the input matching under different gain gears can be adjusted, and the linearity can also be optimized.

[0032] In this embodiment, the first inductance adjustment circuit 23 includes a first inductance L41, a second inductance L42, a ninth switch S41, a tenth switch S42, and an eleventh switch S43; the first end of the first inductance L41 is connected to the control end of the tenth switch S42 and serves as the first end of the first inductance adjustment circuit 23, the second end of the first inductance L41 is respectively connected to the control end of the ninth switch S41 and the output end of the eleventh switch S43, the control end of the eleventh switch S43 is respectively connected to the output end of the tenth switch S42 and the first end of the second inductance L42, the output end of the ninth switch S41 is connected to the second end of the second inductance L42 and serves as the second end of the first inductance adjustment circuit 23. When the low noise amplifier is working, one of the ninth switch S41 or the tenth switch S42 must be closed to ensure the loop to the ground path. When switching the gain, the ninth switch S41, the tenth switch S42 and the eleventh switch S43 can have three combinations. By designing different inductance values, different gain levels can be adjusted. It is particularly emphasized that at low gain, only when the eleventh switch S43 is closed, the linearity will be greatly improved.

[0033] In this embodiment, the circuit structures of the first output matching adjustment module 6 and the second output matching adjustment module 7 are the same. The first output matching adjustment module 6 and the second output matching adjustment module 7 can provide reasonable output impedance for designing low noise amplifiers in different frequency bands and different gain levels.

[0034] The first output matching adjustment module 6 includes an eighth capacitor C12, a third inductor L01, a load adjustment circuit 61, an output matching circuit 62 and an attenuation network 63; the first end of the eighth capacitor C12 is respectively connected to the first end of the third inductor L01 and the first end of the load adjustment circuit 61 and is used to connect to the power supply; the second end of the eighth capacitor C12 is grounded, the second end of the third inductor L01 is respectively connected to the second end of the load adjustment circuit 61 and the input end of the output matching circuit 62 and serves as the input end of the first output matching adjustment module 6; the output end of the output matching circuit 62 is connected to the input end of the attenuation network 63, and the output end of the attenuation network 63 is used to output the load. In addition to adjusting the gain attenuation, the load adjustment network also provides a suitable load point for the output to ensure good linearity indicators.

[0035] The attenuation network 63 is a π-type attenuation network, which performs attenuation processing on the signal and impedance matching at the same time.

[0036] In this embodiment, the load regulation circuit 61 includes a third resistor R31, a plurality of twelfth switches S12, and a plurality of fourth resistors R32; the first end of the third resistor R31 is respectively connected to the control ends of the plurality of twelfth switches S12 and serves as the first end of the load regulation circuit 61, the output ends of the plurality of twelfth switches S12 are respectively connected to the first ends of the plurality of fourth resistors R32, and the second end of the third resistor R31 is respectively connected to the second ends of the plurality of fourth resistors R32 and serves as the second end of the load regulation circuit 61. When the twelfth switch S12 is not turned on, at least one branch of the fourth resistor R32 exists in the load regulation circuit 61 to give a reasonable maximum initial gain value, and when the low gain gear is adjusted, the value of the parallel resistance is changed through the twelfth switch S12.

[0037] In this embodiment, the output matching circuit 62 includes a ninth capacitor C51, a tenth capacitor C52, an eleventh capacitor C50, a twelfth capacitor C53, a thirteenth capacitor C54, a fourteenth capacitor C55, a fifteenth capacitor C56, a thirteenth switch S51, a fourteenth switch S52, a fifteenth switch S53, a sixteenth switch S54, a seventeenth switch S55 and an eighteenth switch S56; The control end of the thirteenth switch S51 is respectively connected to the control end of the fourteenth switch S52, the control end of the fifteenth switch S53, the control end of the sixteenth switch S54 and the first end of the eleventh capacitor C50, and the output end of the thirteenth switch S51 and the output end of the fourteenth switch S52 are respectively connected to the ninth capacitor C51 and the tenth capacitor C52 and grounded; The output end of the fifteenth switch S53 is connected to the first end of the twelfth capacitor C53, the output end of the sixteenth switch S54 is connected to the first end of the thirteenth capacitor C54, the second end of the eleventh capacitor C50 is respectively connected to the second end of the twelfth capacitor C53, the second end of the thirteenth capacitor C54, the control end of the seventeenth switch S55 and the control end of the eighteenth switch S56, the output end of the seventeenth switch S55 and the output end of the eighteenth switch S56 are respectively connected to the fourteenth capacitor C55 and the fifteenth capacitor C56 and are grounded; The control end of the thirteenth switch S51 also serves as the input end of the output matching circuit 62, and the control end of the eighteenth switch S56 also serves as the output end of the output matching circuit 62. The output matching points of each gain level can be effectively adjusted by controlling the on-off of the ninth capacitor C51, the tenth capacitor C52, the twelfth capacitor C53, the thirteenth capacitor C54, the fourteenth capacitor C55 and the fifteenth capacitor C56 through the thirteenth switch S51, the fourteenth switch S52, the fifteenth switch S53, the sixteenth switch S54, the seventeenth switch S55 and the eighteenth switch S56, respectively.

[0038] Optionally, when all switches are not turned on, at least the eleventh capacitor C50 is retained to serve as a DC blocking capacitor for output matching. By adjusting the on and off of each switch, the optimal output matching point of each gain level can be effectively adjusted.

[0039] In this embodiment, the circuit structures of the first linear adjustment network 4 and the second linear adjustment network 5 are the same; the first linear adjustment network 4 includes a sixteenth capacitor C61, a plurality of nineteenth switches S61 and a plurality of fifth resistors R61, the first end of the sixteenth capacitor C61 is connected to the first amplifier circuit module 2, the second end of the sixteenth capacitor C61 is respectively connected to the control ends of the plurality of nineteenth switches S61, and the output ends of the plurality of nineteenth switches S61 are respectively connected to the plurality of fifth resistors R61 and grounded. The corresponding fifth resistor R61 is controlled by the nineteenth switch S61 to adjust the linearity of the low gain gear, and the linearity and gain can be adjusted without increasing the noise coefficient (NF) too much.

[0040] It should be noted that the various embodiments described above with reference to the accompanying drawings are only used to illustrate the present invention rather than to limit the scope of the present invention. Those skilled in the art should understand that any modification or equivalent substitution of the present invention without departing from the spirit and scope of the present invention should be included within the scope of the present invention. In addition, unless otherwise indicated by the context, words appearing in the singular include the plural form, and vice versa. In addition, unless otherwise specified, all or part of any embodiment may be used in combination with all or part of any other embodiment.

Claims

1. A high linearity low noise amplifier, characterized in that: It includes an input selection module, a first amplifier circuit module, a second amplifier circuit module, a first linear regulation network, a second linear regulation network, a first output matching regulation module and a second output matching regulation module; The input end of the input selection module is used to receive a radio frequency signal, and the output end of the input selection module is used to connect to the input end of the first amplifier circuit module or the input end of the second amplifier circuit module to achieve different gain adjustment functions; the output end of the first amplifier circuit module is respectively connected to the input end of the first linear adjustment network and the first output matching adjustment module, and the output end of the first output matching adjustment module outputs a load; the output end of the second amplifier circuit module is respectively connected to the input end of the second linear adjustment network and the second output matching adjustment module, and the output end of the second output matching adjustment module outputs a load; The input selection module includes a first switch, a second switch, a third switch, a first capacitor and a second capacitor; The control end of the first switch serves as the input end of the input selection module; the output end of the first switch is used to connect to the control end of the second switch or the control end of the third switch according to the received first control signal; the first end of the first capacitor is connected to the control end of the second switch, and the output end of the second switch is grounded; the first end of the second capacitor is connected to the control end of the third switch, and the output end of the third switch is grounded; the second end of the first capacitor and the second end of the second capacitor serve as two output ends of the input selection module respectively; the second end of the first capacitor is used to connect to the input end of the first amplifier circuit module, and the second end of the second capacitor is used to connect to the input end of the second amplifier circuit module.

2. The high linearity low noise amplifier according to claim 1, characterized in that: The high linearity low noise amplifier also includes at least one first control unit and at least one second control unit; the input end of the first control unit and the input end of the second control unit are respectively used to receive a second control signal; the output end of the first control unit is connected to the output end of the first capacitor, and the first control unit is used to output the second control signal to the input end of the first amplifier circuit module; the output end of the second control unit is connected to the output end of the second capacitor, and the second control unit is used to output the second control signal to the input end of the second amplifier circuit module.

3. The high linearity low noise amplifier according to claim 2, characterized in that: The first control unit includes a fourth switch, a fifth switch and a third capacitor; the control end of the fourth switch is connected to the control end of the fifth switch and serves as the input end of the first control unit, the output end of the fourth switch is grounded, the output end of the fifth switch is connected to the first end of the third capacitor, and the second end of the third capacitor serves as the output end of the first control unit; The second control unit includes a sixth switch, a seventh switch and a fourth capacitor; the control end of the sixth switch is connected to the control end of the seventh switch and serves as the input end of the second control unit, the output end of the sixth switch is grounded, the output end of the seventh switch is connected to the second end of the fourth capacitor, and the second end of the fourth capacitor serves as the output end of the second control unit.

4. The high linearity low noise amplifier according to claim 1, characterized in that: The first amplifier circuit module has the same circuit as the second amplifier circuit module; The first amplifier circuit module includes a first bias circuit, a first resistor, a second resistor, a fifth capacitor, a first MOS transistor, a second MOS transistor, a first capacitor adjustment circuit and a first inductance adjustment circuit; The first end of the first resistor is respectively connected to the gate of the first MOS tube and the first end of the first capacitor adjustment circuit and serves as the input end of the first amplifier circuit module; the second end of the first resistor is connected to the first end of the first bias circuit, the second end of the first bias circuit is connected to the first end of the second resistor, the second end of the second resistor is respectively connected to the gate of the second MOS tube and the first end of the fifth capacitor, and the second end of the fifth capacitor is grounded; the drain of the fifth MOS tube serves as the output end of the first amplifier circuit module; The source of the second MOS tube is respectively connected to the drain of the first MOS tube and the first linear regulation network; the source of the first MOS tube is respectively connected to the second end of the first capacitance regulation circuit and the first end of the first inductance regulation circuit, and the second end of the first inductance regulation circuit is grounded.

5. The high linearity low noise amplifier according to claim 4, characterized in that: The first capacitance adjustment circuit includes a sixth capacitor, a plurality of eighth switches and a plurality of seventh capacitors; The first end of the sixth capacitor is respectively connected to the control ends of the multiple eighth switches and serves as the first end of the first capacitor adjustment circuit, the output ends of the multiple eighth switches are respectively connected to the first ends of the multiple seventh capacitors in a one-to-one correspondence, and the second end of the sixth capacitor is respectively connected to the second ends of the multiple seventh capacitors and serves as the second end of the first capacitor adjustment circuit.

6. The high linearity low noise amplifier according to claim 5, characterized in that: The first inductance adjustment circuit includes a first inductor, a second inductor, a ninth switch, a tenth switch and an eleventh switch; The first end of the first inductor is connected to the control end of the tenth switch and serves as the first end of the first inductor adjustment circuit. The second end of the first inductor is respectively connected to the control end of the ninth switch and the output end of the eleventh switch. The control end of the eleventh switch is respectively connected to the output end of the tenth switch and the first end of the second inductor. The output end of the ninth switch is connected to the second end of the second inductor and serves as the second end of the first inductor adjustment circuit.

7. The high linearity low noise amplifier according to claim 1, characterized in that: The circuit structure of the first output matching adjustment module is the same as that of the second output matching adjustment module; The first output matching and adjusting module includes an eighth capacitor, a third inductor, a load adjustment circuit, an output matching circuit and an attenuation network; The first end of the eighth capacitor is respectively connected to the first end of the third inductor and the first end of the load regulation circuit and is used to be connected to a power supply; the second end of the eighth capacitor is grounded, and the second end of the third inductor is respectively connected to the second end of the load regulation circuit and the input end of the output matching circuit and serves as the input end of the first output matching adjustment module; the output end of the output matching circuit is connected to the input end of the attenuation network, and the output end of the attenuation network is used to output the load.

8. The high linearity low noise amplifier according to claim 7, characterized in that: The load regulating circuit includes a third resistor, a plurality of twelfth switches and a plurality of fourth resistors; The first end of the third resistor is respectively connected to the control ends of the multiple twelfth switches and serves as the first end of the load regulation circuit, the output ends of the multiple twelfth switches are respectively connected to the first ends of the multiple fourth resistors, and the second end of the third resistor is respectively connected to the second ends of the multiple fourth resistors and serves as the second end of the load regulation circuit.

9. The high linearity low noise amplifier according to claim 7, characterized in that: The output matching circuit includes a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a thirteenth switch, a fourteenth switch, a fifteenth switch, a sixteenth switch, a seventeenth switch and an eighteenth switch; The control end of the thirteenth switch is respectively connected to the control end of the fourteenth switch, the control end of the fifteenth switch, the control end of the sixteenth switch and the first end of the eleventh capacitor, and the output end of the thirteenth switch and the output end of the fourteenth switch are respectively connected to the ninth capacitor and the tenth capacitor and are grounded; The output end of the fifteenth switch is connected to the first end of the twelfth capacitor, the output end of the sixteenth switch is connected to the first end of the thirteenth capacitor, the second end of the eleventh capacitor is respectively connected to the second end of the twelfth capacitor, the second end of the thirteenth capacitor, the control end of the seventeenth switch and the control end of the eighteenth switch, the output end of the seventeenth switch and the output end of the eighteenth switch are respectively connected to the fourteenth capacitor and the fifteenth capacitor and are grounded; The control end of the thirteenth switch also serves as the input end of the output matching circuit, and the control end of the eighteenth switch also serves as the output end of the output matching circuit.

10. The high linearity low noise amplifier according to claim 1, characterized in that: The circuit structures of the first linear regulation network and the second linear regulation network are the same; The first linear regulation network includes a sixteenth capacitor, a plurality of nineteenth switches and a plurality of fifth resistors, the first end of the sixteenth capacitor is connected to the first amplifier circuit module, the second end of the sixteenth capacitor is respectively connected to the control ends of the plurality of nineteenth switches, and the output ends of the plurality of nineteenth switches are respectively connected to the plurality of fifth resistors and grounded.

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