Fast convergence Rogowski coil integrator under electric energy metering chip

Abstract

The invention provides a fast convergence Rogowski coil integrator under an electric energy metering chip, the electric energy metering chip comprises a Rogowski coil, an ADC module and an electric energy metering processing module which are connected in sequence, the integrator is a bilinear integrator and is arranged between the ADC module and the electric energy metering processing module in the electric energy metering chip, and the Rogowski coil integrator is connected with the Rogowski coil integrator. The processing module is used for processing a current path; wherein the current input into the electric energy metering core is subjected to differential processing through the Rogowski coil to obtain a current differential signal, the current differential signal is sampled through the ADC module and then is reduced into a current signal through the bilinear integrator, and the electric energy metering processing module is used for carrying out electric energy metering operation on the reduced current signal. The bilinear integrator can enable a current signal to gradually approach a stable value in a segmented manner by adjusting two constant coefficients so as to realize rapid convergence under high phase shift precision and realize anti-overflow under different metering bandwidths.

Description

Technical Field

[0001] The invention relates to a Rogowski coil integrator, in particular to a fast-converging Rogowski coil integrator under an electric energy metering chip. Background Art

[0002] This section merely provides background information related to the present disclosure and is not necessarily prior art.

[0003] Rogowski coil is an AC current sensor. It is a hollow ring-shaped coil. It is available in two types: flexible and rigid. It can be directly put on the conductor to measure AC current. Rogowski coil is often used for current measurement, especially high-frequency and large current measurement. It is an indispensable and important device for current measurement. Rogowski coil, also known as current measurement coil and differential current sensor, is a ring-shaped coil uniformly wound on non-ferromagnetic material. The output signal is the differential of current with respect to time. By using a circuit to integrate the output signal of Rogowski coil in the power metering chip, the input current can be truly restored.

[0004] In the field of power metering, the application of differential current sensor, namely Rogowski coil, requires the realization of digital integrator of Rogowski coil output signal in power metering chip. There are three problems to be solved.

[0005] First, the transfer function of the ideal digital integrator contains a pole at z=1, which causes the ideal digital integrator to be unstable and divergent. Therefore, it is necessary to construct a stable and approximate bilinear digital integrator.

[0006] Second, from a system perspective, the above-mentioned bilinear digital integrator can achieve relatively high accuracy, but cannot achieve fast signal convergence. Therefore, it is necessary to achieve fast convergence while meeting the accuracy requirements, and at the same time, the circuit structure is simple to save area overhead.

[0007] Third, power metering chips often need to support different metering bandwidths. Therefore, the filter design often needs to support an anti-overflow design with flexible and adjustable signal frequency, and have good flexibility and portability.

[0008] In electric energy metering, current transformer is an important and indispensable device for measuring current. In addition to the traditional electromagnetic current transformer, the current transformer used in the power system also uses the differential current transformer with Rogowski coil as the current sampling element.

[0009] The new current sensor using Rogowski coil can work in differential state. At this time, the output of the transformer is not the current signal, but the differential of the current signal. When the external sampling circuit adopts the Rogowski coil, the input current signal needs to be integrated to truly restore the sampled current signal. Therefore, designing a suitable integration link to restore the current differential signal output by the Rogowski coil into a current signal is the key link for using Rogowski coil for electric energy metering.

[0010] In the prior art, an integrator for a Rogowski coil and its implementation method (CN1821794A) and a method for quickly and accurately calibrating a Rogowski coil meter (CN115932707A) use analog implementation to implement a stable digital integrator. The following method does not have the ability to solve problem 2 and problem 3.

[0011] In summary, the prior art has the following disadvantages:

[0012] The stability problem of the digital integrator: the ideal digital integrator transfer function has a pole at z=1, and this pole will cause the system to be unstable and diverge.

[0013] The signal convergence speed is slow. Although the existing bilinear digital integrator can achieve high accuracy, it converges slowly when processing signals and cannot track and process rapidly changing signals in a timely manner.

[0014] Lack of flexibility and anti-overflow mechanism: Power metering chips need to support signal measurements of different frequencies. Existing filter designs lack flexibility in dealing with frequency changes, and may cause overflow due to fluctuations in signal bandwidth and filter gain.

[0015] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0016] Purpose of the invention: The technical problem to be solved by the present invention is to provide a Rogowski coil integrator with fast convergence under an electric energy metering chip in view of the deficiencies in the prior art.

[0017] In order to solve the above technical problems, the present invention discloses a fast-converging Rogowski coil integrator under an electric energy metering chip, wherein the electric energy metering chip comprises a Rogowski coil, an ADC module and an electric energy metering processing module connected in sequence, and the integrator is a bilinear integrator, which is arranged between the ADC module and the electric energy metering processing module in the electric energy metering chip and is used to process the current path; wherein,

[0018] The current input into the electric energy metering core is differentiated through the Rogowski coil to obtain a current differential signal. The current differential signal is sampled by the ADC module and then restored to a current signal through the bilinear integrator. The electric energy metering processing module performs electric energy metering operation on the restored current signal.

[0019] Furthermore, the system function of the bilinear integrator is expressed as follows:

[0020]

[0021] Wherein, H(z) is the system function of the bilinear integrator, K a and K b are the first constant coefficient and the second constant coefficient.

[0022] Furthermore, the bilinear integrator comprises:

[0023] 4 registers, 2 adders and 2 multipliers; among them,

[0024] 4 registers, namely the first input register XD0, the second input register XD1, the intermediate result register YD1 and the output result register Y;

[0025] The first adder S1 is used to calculate the sum of the first input register XD0 and the second input register XD1, and the second adder S2 is used to calculate the sum of the output of the first multiplier M1 and the output of the second multiplier M2;

[0026] The second multiplier M2 is used to calculate the intermediate result register YD1 and the second constant coefficient K b The first multiplier M1 is used to add the first adder S1 and the first constant coefficient K a The product of

[0027] The first constant coefficient K a is the coefficient of the first multiplier M1, the second constant coefficient K b is the coefficient of the second multiplier M2.

[0028] Furthermore, the bilinear integrator further includes:

[0029] The second constant coefficient parameter switching module is used to set the second constant coefficient K in different time periods. b .

[0030] Furthermore, the second constant coefficient K is set in different time periods. b , specifically including:

[0031] Set K in the preset T1 time period b, so that the current signal quickly converges to a stable value, and then sets K in the preset T2 time period b , so that the output of the bilinear integrator approaches the target accuracy.

[0032] Furthermore, the second constant coefficient K is set in different time periods. b , including:

[0033] T1 time period setting K b =4095 / 4096; T2 time period set K b =32767 / 32768.

[0034] Furthermore, the bilinear integrator further includes:

[0035] The first constant coefficient parameter adjustment module is used to adjust the first constant coefficient K according to the frequency of the input signal a The value of .

[0036] Furthermore, the first constant coefficient K is adjusted according to the frequency of the input signal. a The specific method is: adjust the first constant coefficient K a The value of is set so that the restored current signal does not exceed the maximum range of the chip.

[0037] Furthermore, the preset T1 time period is a time period in which the error between the current signal and the stable signal is ≥ 10%.

[0038] Furthermore, the preset T2 time period is a time period that satisfies 0.1%≤the error between the current signal and the stable signal≤10%.

[0039] Beneficial effects:

[0040] 1. The bilinear digital integrator designed in the present invention is a relatively simplified design architecture, which focuses on the processing of the current path and ignores the processing of the voltage path, which makes its system architecture more concise and efficient. The bilinear integrator can effectively complete the signal integration operation by processing the current signal, and is suitable for real-time and accurate sampling and analysis of the signal. In terms of design, by adjusting the two important constant parameters of the filter, the integrator can flexibly realize the control of different relative phase shift errors and different stabilization times, thereby meeting the requirements of various application scenarios for filtering performance. Since the design of this filter has good convergence, it can reach the expected steady state in a shorter time, thereby improving the efficiency and accuracy of signal processing.

[0041] 2. In order to further improve the response speed and convergence performance of the integrator, the fast convergence scheme of piecewise successive approximation is introduced into the design of the present invention. The constant parameter Kb can effectively realize this design under the dynamic control of the automatic parameter switching module. Specifically, the system will gradually adjust the value of Kb according to the current stage of signal processing, so that the entire integrator can quickly converge to the target value in a piecewise successive approximation manner. The advantage of this design is that it can greatly shorten the convergence time and ensure that the system can quickly stabilize while meeting the measurement accuracy requirements. It is particularly suitable for application scenarios with high response speed requirements.

[0042] 3. In the process of digital signal processing, the amplitude and frequency of the signal will change with different application requirements, so it is necessary to design an anti-overflow mechanism that can adapt to various frequency changes. To this end, the system introduces the control design of the constant parameter Ka. Through the adjustment of the automatic shift module, the signal frequency can be flexibly adjusted to avoid the overflow problem of the integrator during the processing process. This design not only effectively improves the stability of the system, but also greatly enhances its portability and adaptability in different application environments. Regardless of the changes in the signal frequency, the anti-overflow design can ensure the reliability of the system operation and avoid calculation errors caused by excessive signal amplitude.

[0043] Through the cooperation of the above three designs, the present invention not only has a simple structure, but also has the characteristics of fast convergence and anti-overflow, which can well meet the signal processing requirements of different occasions. This design method not only improves the overall performance of the system, but also provides an efficient and flexible solution for future digital signal processing. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments, and the above and / or other advantages of the present invention will become more clear.

[0045] Figure 1 This is the application block diagram of the Rogowski coil under the electric energy metering chip.

[0046] Figure 2 It is the hardware block diagram of digital bilinear integrator.

[0047] Figure 3 This is a schematic diagram of the amplitude-frequency characteristics of the Rogowski coil differentiator.

[0048] Figure 4 It is a schematic diagram of the amplitude-frequency characteristics of a bilinear integrator.

[0049] Figure 5 This is a schematic diagram of the influence of constant coefficients on the amplitude-frequency characteristics of the bilinear integrator.

[0050] Figure 6It is a schematic diagram of the convergence time of the bilinear integrator under different Kb. DETAILED DESCRIPTION

[0051] The overall design idea of ​​the present invention is as follows:

[0052] Improve the stability of the digital integrator: By constructing a stable and approximate bilinear digital integrator, the pole problem at z = 1 in the ideal integrator is avoided to ensure the stability of the system under various conditions. Accelerate signal convergence: Design a digital integrator that can converge faster while ensuring accuracy, so that it can quickly process changing signals, thereby improving the real-time performance of the system. Enhance flexibility and anti-overflow function: Design a filter that supports flexible frequency adjustment and introduces an anti-overflow mechanism to ensure that the system can work stably at different bandwidths and frequencies, and has strong portability to adapt to application requirements in various power metering environments.

[0053] Specifically, the technical solution of the present invention is designed as follows:

[0054] 1. Design of bilinear integrator with simple structure:

[0055] The bilinear digital integrator is a relatively simplified design architecture that focuses on the processing of the current path and ignores the processing of the voltage path, which makes its system architecture more concise and efficient. The bilinear integrator can effectively complete the signal integration operation by processing the current signal, and is suitable for real-time and accurate sampling and analysis of the signal. In terms of design, by adjusting the two important constant parameters of the filter, the integrator can flexibly realize the control of different relative phase shift errors and different stabilization times, thereby meeting the requirements of filtering performance in various application scenarios. Since the design of this filter has good convergence, it can reach the expected steady state in a shorter time, thereby improving the efficiency and accuracy of signal processing.

[0056] 2. Fast convergence design of piecewise successive approximation:

[0057] In order to further improve the response speed and convergence performance of the integrator, a fast convergence scheme of piecewise successive approximation is introduced in the design. The constant parameter Kb can effectively implement this design under the dynamic control of the automatic parameter switching module. Specifically, the system will gradually adjust the value of Kb according to the current stage of signal processing, so that the entire integrator can quickly converge to the target value in a piecewise successive approximation manner. The advantage of this design is that it can greatly shorten the convergence time while meeting the measurement accuracy requirements, ensuring that the system can quickly stabilize, and is particularly suitable for application scenarios with high response speed requirements.

[0058] 3. Support anti-overflow design with flexible and adjustable signal frequency:

[0059] In the process of digital signal processing, the amplitude and frequency of the signal will change with different application requirements, so it is necessary to design an anti-overflow mechanism that can adapt to various frequency changes. To this end, the system introduces the control design of the constant parameter Ka. Through the adjustment of the automatic shift module, the signal frequency can be flexibly adjusted to avoid the overflow problem of the integrator during the processing process. This design not only effectively improves the stability of the system, but also greatly enhances its portability and adaptability in different application environments. Regardless of the changes in the signal frequency, the anti-overflow design can ensure the reliability of the system operation and avoid calculation errors caused by excessive signal amplitude.

[0060] Through the cooperation of the above three designs, the entire bilinear integrator not only has a simple structure, but also has the characteristics of fast convergence and anti-overflow, which can well meet the signal processing requirements of different occasions. This design method not only improves the overall performance of the system, but also provides an efficient and flexible solution for future digital signal processing.

[0061] Example:

[0062] The application block diagram of the fast-converging Rogowski coil integrator in the energy metering chip is as follows: Figure 1 As shown, the large current in the power system is differentiated through the Rogowski coil, and the output current differential signal is sampled by the ADC of the power metering chip, and is restored to the current signal after being processed by the bilinear integrator, and can then be used for electric energy metering processing and calculation.

[0063] Figure 2 The hardware block diagram of the digital bilinear integrator includes 4 registers, 2 adding units and 2 multiplying units. The 4 registers are the first input register XD0, the second input register XD1, the intermediate result register YD1 and the output result register Y; the first adder S1 is used to calculate the sum of the first input register XD0 and the second input register XD1, and the second adder S2 is used to calculate the sum of the output of the first multiplier M1 and the output of the second multiplier M2; the output of the second multiplier M2 is the intermediate result register YD1 multiplied by the first constant coefficient K b As a result, the output of the first multiplier M1 is the first adder S1 multiplied by the first constant coefficient K a Ka and Kb are the coefficients of M1 and M2 multipliers respectively.

[0064] Part 1: Design of a simple bilinear integrator

[0065] The behavior of the Rogowski coil (di / dt) sensor in the current channel is analyzed. It performs differential processing on the large current in the power system and outputs a small current. The system function is as follows:

[0066] H(z)=1-Z -1

[0067] Its frequency response is Figure 3 As shown in the figure, after passing through the Rogowski coil, the current signal phase angle increases by 90°, and the amplitude increases by 20dB every 10 times the frequency. In the wide bandwidth range, the amplitude has a high linearity with frequency changes, and the phase has a 90° phase shift characteristic in the frequency range less than 10KHz. Since power metering mainly detects the 50Hz fundamental wave and its higher harmonics, the 10KHz frequency range obviously meets the bandwidth requirements of power metering.

[0068] Given that the amplitude-frequency characteristic of the differentiator of the Rogowski coil is that the phase angle increases by 90°, and the amplitude increases by 20dB every 10 times the frequency. Therefore, the subsequent bilinear integrator needs to reduce the current by 20dB every 10 times the frequency, and reduce the phase difference between the current and voltage by 90°. The bilinear integrator can achieve the above requirements. It integrates the differential current of the Rogowski coil and outputs the original current. The system function of the bilinear integrator is shown below, where Ka and Kb are constant coefficients.

[0069]

[0070] Its frequency response is Figure 4 As shown in the figure, after passing through the bilinear integrator, the current signal phase angle is reduced by 90°, and the amplitude is reduced by 20dB every 10 times the frequency. In the wide bandwidth range, the amplitude has a high linearity with frequency change, and the phase has a 90° phase shift feature in the frequency range greater than 100Hz, but the phase shift at the fundamental frequency of 50Hz is close to 90°.

[0071] Obviously, the differential current signal obtained by the Rogowski coil to differentiate the current can be restored to the original current signal after passing through the bilinear integrator. The pole of the transfer function of the bilinear integrator is not at z = 1, but near z = 1. This makes the bilinear integrator a stable and approximate digital integrator. The position of the pole of the bilinear integrator depends on the constant coefficient Kb, and the gain of the filter is adjusted by the constant coefficient Ka.

[0072] Part II: Fast Convergence Design of Piecewise Successive Approximation

[0073] So far, the above-mentioned bilinear integrator meets the first requirement of a stable and approximate bilinear digital integrator. The following discusses how the present invention can achieve fast convergence while meeting the accuracy requirements, and the circuit structure is simple to save area cost.

[0074] like Figure 5As shown in the figure, the constant coefficient Kb has an impact on the phase shift characteristics of the bilinear integrator. The pole position is adjusted by adjusting Kb, and the pole moves. As Kb approaches 1, the pole moves to the left, and the phase shift of the bilinear integrator in the low-frequency part approaches 90°. Specifically, for the fundamental wave 50Hz, the relative error between the phase of the restored current signal and the original current signal is reduced, which can reduce the power error in the power metering operation.

[0075] For Kb, when its value gradually approaches 1, the relative phase shift error introduced gradually decreases, and the impact on the measurement result also gradually decreases. For example, when Kb is 4095 / 4096, 16383 / 16384, and 32767 / 32768, the relative phase shift error introduced is 0.57°, 0.14°, and 0.07°.

[0076] However, the closer Kb is to 1 relative phase shift error, the pole shifts leftward, causing the integrator to require a longer stabilization time. For example, when Kb is 4095 / 4096, 16383 / 16384, 32767 / 32768, the relative phase shift error introduced is 0.57°, 0.14°, 0.07°, but the stabilization time also becomes 1.5s, 8.5s, 15s. Obviously, in power metering applications, high-precision metering needs to be taken into account at the same time, and the entire metering process needs to have a faster stabilization time.

[0077] At present, both the measurement accuracy and the stabilization time depend on the coefficient Kb. The larger the Kb is, the closer it is to 1, and the closer the integrator is to the ideal integrator, the longer the stabilization time. ① Considering the measurement accuracy requirements, the constant coefficient Kb needs to be increased. ② Considering the measurement stabilization time requirements, the constant coefficient Kb needs to be reduced. Figure 6 As shown, the stabilization time when the Kb parameter is 32767 / 32768 is much longer than the stabilization time when the Kb parameter is 4095 / 4096. In view of this contradiction, the present invention further proposes a fast convergence design of piecewise successive approximation.

[0078] Through the automatic Kb parameter switching module, Kb uses two sets of coefficients, 4095 / 4096 and 32767 / 32768. In the T1 time period, Kb=4095 / 4096, so that the current signal quickly converges to the stable value. Then in the T2 time period, Kb=32767 / 32768, so that the output of the bilinear integrator gradually approaches the target accuracy. The stabilization time can be shortened from 15s to 7s. While the metering time is significantly shortened, the metering accuracy will not be affected. A good solution can meet the accuracy requirements while achieving rapid convergence.

[0079] The measurement standard for the T1 time period is that the difference between the current signal value and the current stable value is 10%. At this time, it is basically considered that the current signal is close to the stable range. Next, Kb can be switched to make the current signal further approach the current stable value. The measurement standard for the T2 time period is that the difference between the current signal value and the current stable value is 0.1%. At this time, it is basically considered that the current signal has achieved stability, and the result calculated using this signal is slightly different from the correct result.

[0080] Part 3: Anti-overflow design that supports flexible and adjustable signal frequency

[0081] The power metering chip uses a special signal amplitude adjustment method when processing signals of different frequencies. Through the action of the differentiator of the Rogowski coil, the signal amplitude will increase by 20dB every time the frequency increases by 10 times; correspondingly, using a bilinear integrator, the signal amplitude can be reduced by 20dB every time the frequency increases by 10 times, thereby maintaining the stability of the signal amplitude. However, the gain of the bilinear integrator will change with the signal frequency, resulting in inconsistent gain effects on the signal at different frequencies. For example, Figure 5 As shown in the figure, when the signal frequency reaches 128000Hz, the gain of the bilinear integrator is 38.22dB, and when the signal frequency is 400Hz, the gain of the filter drops to 7.657dB. This gain change is particularly significant in the variable bandwidth metering mode of the power metering chip, so anti-overflow measures must be taken to prevent overflow errors in the calculation results caused by changes in the filter gain, thereby affecting the metering accuracy.

[0082] To solve this problem, the power metering chip introduces an automatic adjustment mechanism for the constant coefficient Ka. The data size is adjusted by adjusting the Ka value of the multiplier M2 of the bilinear integrator to achieve an anti-overflow function, that is, the restored current signal does not exceed the maximum range of the chip. Specifically, according to the different frequencies of the input signal, the chip can automatically perform shift operations and adjust the value of Ka to effectively cope with filter gain fluctuations caused by frequency changes. Through this dynamic adjustment, the chip can ensure accurate power metering over a wide frequency range and avoid calculation errors caused by gain changes. This design greatly improves the flexibility of the chip, allowing high-precision signal processing at a variety of frequencies.

[0083] In addition, the regulation effect of the constant coefficient Ka on anti-overflow can be achieved by configuring the register parameter register or by configuring the software. It not only has good flexibility, but also has strong portability. Users can flexibly configure the metering bandwidth according to specific application scenarios and requirements to meet the high-precision metering requirements of power signals at different frequencies. At the same time, due to the fast convergence characteristics of the design, users can achieve accurate calculation of power signals in a short time. This design not only enhances the adaptability and application scope of the power metering chip, but also greatly simplifies the user's configuration operation, making the chip more competitive in practical applications.

[0084] In a specific implementation, the present application provides a computer storage medium and a corresponding data processing unit, wherein the computer storage medium can store a computer program, and when the computer program is executed by the data processing unit, the invention content of a fast-converging Rogowski coil integrator under an electric energy metering chip provided by the present invention and some or all of the steps in each embodiment can be executed. The storage medium can be a disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.

[0085] Those skilled in the art can clearly understand that the technical solutions in the embodiments of the present invention can be implemented by means of computer programs and their corresponding general hardware platforms. Based on such an understanding, the technical solutions in the embodiments of the present invention can be essentially or partly contributed to the prior art in the form of computer programs, i.e., software products, which can be stored in a storage medium and include several instructions for enabling a device including a data processing unit (which can be a personal computer, a server, a single-chip microcomputer, an MCU or a network device, etc.) to execute the methods described in various embodiments of the present invention or certain parts of the embodiments.

[0086] The present invention provides a concept and method of a fast-converging Rogowski coil integrator under an electric energy metering chip. There are many methods and ways to implement the technical solution. The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the protection scope of the present invention. All components not specified in this embodiment can be implemented using existing technologies.

Claims

1. A fast-converging Rogowski coil integrator in an electric energy metering chip, wherein the electric energy metering chip comprises a Rogowski coil, an ADC module and an electric energy metering processing module connected in sequence, characterized in that: The integrator is a bilinear integrator, which is arranged between the ADC module and the electric energy measurement processing module in the electric energy measurement chip and is used to process the current path; wherein, The current input into the electric energy metering core is differentiated through the Rogowski coil to obtain a current differential signal. The current differential signal is sampled by the ADC module and then restored to a current signal through the bilinear integrator. The electric energy metering processing module performs electric energy metering operation on the restored current signal.

2. The Rogowski coil integrator with fast convergence under an electric energy metering chip according to claim 1 is characterized in that: The system function of the bilinear integrator is expressed as follows: Wherein, H(z) is the system function of the bilinear integrator, K a and K b are the first constant coefficient and the second constant coefficient.

3. The Rogowski coil integrator with fast convergence under an electric energy metering chip according to claim 2 is characterized in that: The bilinear integrator comprises: 4 registers, 2 adders and 2 multipliers; among them, 4 registers, namely the first input register XD0, the second input register XD1, the intermediate result register YD1 and the output result register Y; The first adder S1 is used to calculate the sum of the first input register XD0 and the second input register XD1, and the second adder S2 is used to calculate the sum of the output of the first multiplier M1 and the output of the second multiplier M2; The second multiplier M2 is used to calculate the intermediate result register YD1 and the second constant coefficient K b The first multiplier M1 is used to add the first adder S1 and the first constant coefficient K a The product of The first constant coefficient K a is the coefficient of the first multiplier M1, the second constant coefficient K b is the coefficient of the second multiplier M2.

4. The Rogowski coil integrator with fast convergence under an electric energy metering chip according to claim 3 is characterized in that: The bilinear integrator further comprises: The second constant coefficient parameter switching module is used to set the second constant coefficient K in different time periods. b .

5. The Rogowski coil integrator with fast convergence under an electric energy metering chip according to claim 4 is characterized in that: The second constant coefficient K is set in different time periods b , specifically including: Set K in the preset T1 time period b , so that the current signal quickly converges to a stable value, and then sets K in the preset T2 time period b , so that the output of the bilinear integrator approaches the target accuracy.

6. The Rogowski coil integrator with fast convergence under an electric energy metering chip according to claim 5, characterized in that: The second constant coefficient K is set in different time periods b , specifically including: T1 time period setting K b =4095 / 4096; T2 time period set K b =32767 / 32768.

7. The Rogowski coil integrator with fast convergence under an electric energy metering chip according to claim 3 is characterized in that: The bilinear integrator further comprises: The first constant coefficient parameter adjustment module is used to adjust the first constant coefficient K according to the frequency of the input signal a The value of .

8. The Rogowski coil integrator with fast convergence under an electric energy metering chip according to claim 7, characterized in that: The first constant coefficient K is adjusted according to the frequency of the input signal a The specific method is: adjust the first constant coefficient K a The value of is set so that the restored current signal does not exceed the maximum range of the chip.

9. The Rogowski coil integrator with fast convergence under an electric energy metering chip according to claim 5, characterized in that: The preset T1 time period is a time period in which the error between the current signal and the stable signal is ≥ 10%.

10. The Rogowski coil integrator with fast convergence under an electric energy metering chip according to claim 5, characterized in that: The preset T2 time period is a time period that satisfies 0.1%≤the error between the current signal and the stable signal≤10%.

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