Function testing method

Abstract

The invention relates to a function test method, which is suitable for an object to be tested and comprises the following steps: a main control chip acquires a test script from a database server according to identification information of the object to be tested, the test script comprises a plurality of test items of different types, and the object to be tested is tested according to the test script.

Description

Technical Field

[0001] The invention relates to a function testing method. Background Art

[0002] In server product manufacturing, the test station for function board test (FBT) is the last product verification station. The production process and product function can be confirmed through the test station. The operation of the test station is mainly responsible for connecting the various components required on the server motherboard or peripheral function card to the connector of the test station for testing.

[0003] The current test machine needs to use a real motherboard for testing, and needs to be turned on and enter the operating system before testing. In addition, only one server motherboard or peripheral function card can be tested at a time. Not only is the testing time and cost high, but in the future, with the increasing demand for server motherboards or peripheral function cards, this will make it impossible to achieve a balance between supply and demand. Summary of the invention

[0004] In view of the above, the present invention provides a functional testing method to meet the above requirements.

[0005] A functional testing method according to one embodiment of the present invention is applicable to a DUT, and includes being executed by a main control chip: obtaining a test script from a database server according to identification information of the DUT, wherein the test script includes multiple test items of different types, and testing the DUT according to the test script.

[0006] According to the functional testing method of one or more embodiments above, multiple tests can be performed on one or more DUTs at the same time, thereby reducing the testing time. In addition, since the functional testing method of the above embodiments does not need to be tested through the motherboard, the testing cost can be reduced.

[0007] The above description of the disclosed content and the following description of the implementation modes are used to demonstrate and explain the spirit and principle of the present invention, and to provide a further explanation of the scope of the patent application of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a block diagram of a functional testing device according to an embodiment of the present invention;

[0009] Figure 2 is a block diagram of a baseboard management control module according to an embodiment of the present invention;

[0010] Figure 3 is a block diagram of an input-output module according to an embodiment of the present invention;

[0011] Figure 4 is a three-dimensional schematic diagram of a functional testing device according to an embodiment of the present invention;

[0012] Figure 5 To illustrate Figure 4 A top view of a functional test device;

[0013] Figure 6 is a block diagram of a functional testing system according to an embodiment of the present invention;

[0014] Figure 7 is a block diagram of a functional testing system according to another embodiment of the present invention;

[0015] Fig. 8A A block diagram of a housing, a power signal input port, and a test signal input port of an adapter card according to an embodiment of the present invention;

[0016] Figure 8B is a block diagram of a signal output port of an adapter card according to an embodiment of the present invention;

[0017] Fig. 9 is a block diagram of a functional testing device according to another embodiment of the present invention;

[0018] Fig.10 is a block diagram of a main control module according to an embodiment of the present invention;

[0019] Fig.11 To illustrate Fig. 9 A schematic diagram of a functional test device;

[0020] Fig.12 is a block diagram of a functional testing system according to another embodiment of the present invention;

[0021] Fig.13 is a flow chart of a functional testing method according to an embodiment of the present invention;

[0022] Fig.14 It is a flow chart of a method for testing an object to be tested according to an embodiment of the present invention;

[0023] Fig.15 is a flow chart of a method for generating a first packet according to an embodiment of the present invention;

[0024] Fig.16 It is a schematic diagram of a functional testing method according to an embodiment of the present invention.

[0025] Explanation of symbols

[0026] 1,1',3: Functional test system

[0027] 11,21: Functional test device

[0028] 110,210:Substrate

[0029] 111,211,311: Input and output modules

[0030] 1111,2111: First communication port

[0031] 1112,2112: Second communication port

[0032] 1113,2113: The third communication port

[0033] 112a,112b: Functional test module

[0034] 113: Baseboard management control module

[0035] 1130: Expansion board

[0036] 1131: First storage element

[0037] 1132: Second storage element

[0038] 1133: Control chip

[0039] 1134,212a,212b,312a,312b: Connection port

[0040] 114,214,314: Power module

[0041] 1141,2141: Power input port

[0042] 1142,2142: Power output port

[0043] 12,12a,12b,12c,32a,32b: Objects to be tested

[0044] 13: Adapter card

[0045] 130: Shell

[0046] 1301: First side

[0047] 1302: Second side

[0048] 131: Power signal input port

[0049] 132: Test signal input port

[0050] 133:Signal output port

[0051] 1331: Power signal subport

[0052] 1332: Test signal subport

[0053] 213,313: Main control module

[0054] 2131:Processor

[0055] 2132: First connection port

[0056] 2133: Second connection port

[0057] 215: Slave Module

[0058] A1: Database Server

[0059] A2: Scanning device

[0060] A3: User input devices

[0061] S101, S103, S201, S203, S205, S207, S209, S211, S301, S303, S305: Steps DETAILED DESCRIPTION

[0062] The detailed features and advantages of the present invention are described in detail in the following embodiments, and the contents are sufficient to enable any person skilled in the art to understand the technical content of the present invention and implement it accordingly, and according to the contents disclosed in this specification, the scope of the patent application and the drawings, any person skilled in the art can easily understand the relevant purposes and advantages of the present invention. The following examples are to further illustrate the viewpoints of the present invention in detail, but are not intended to limit the scope of the present invention in any viewpoint.

[0063] The function test device, system and method disclosed in one or more embodiments of the present invention can be applied to a function board test (FBT) station for testing a mainboard or a peripheral function card, especially a mainboard or a peripheral function card of a server.

[0064] Please refer to Figure 1 , Figure 1 FIG. 1 is a block diagram of a functional testing device according to an embodiment of the present invention. Figure 1 As shown, the functional testing device 11 includes a substrate 110 , an input / output module 111 , a plurality of functional testing modules 112 a and 112 b , a substrate management control module 113 , and a power module 114 . Figure 1Two functional test modules are presented as an example, but the present invention does not limit the number of functional test modules. The input and output module 111, the baseboard management and control module 113 and the power module 114 are arranged on the baseboard 110, and the functional test modules 112a and 112b are pluggable and arranged on the baseboard 110. The functional test modules 112a and 112b can have different test functions, and each can execute one or more test items. For example, the functional test modules 112a and 112b can be arranged on the baseboard 110 through a peripheral component interconnect express (PCIe) connection port. The specifications of the functional test modules 112a and 112b can be half-height half-length (HHHL) in height, width and length or full-height half-length (FHHL) in height, width and length. The baseboard management control module 113 is connected to the input / output module 111 , the function test modules 112 a and 112 b , and the power module 114 .

[0065] The input-output module 111 may include one or more communication ports for accessing a test script. In other words, the input-output module 111 is used to receive a test script. Specifically, the input-output module 111 may be communicatively connected to a user input device to receive a test script input by a user, or / and communicatively connected to a database server to obtain a test script, wherein the communication connection may be via a wired or wireless method. The test script may indicate test items and corresponding test processes, including the execution order of multiple test items of the functional test modules 112a and 112b. The power module 114 is used to receive and transmit power to the functional test modules 112a and 112b and the baseboard management control module 113. Furthermore, the power module 114 may also transmit power to the object under test.

[0066] The baseboard management control module 113 may include a baseboard management controller (BMC) and a memory, wherein the embedded memory of the baseboard management controller may pre-store the test instructions (commands) corresponding to the test items of the functional test modules 112a and 112b, and the memory may be used to store the test script. Specifically, the embedded memory may be a non-volatile memory such as an embedded multimedia card (eMMC), and the memory may be a volatile memory such as a double data rate fourth generation synchronous dynamic random-access memory (DDR4). The baseboard management control module 113 is used to control the functional test modules 112a and 112b to output a plurality of test signals according to the test script, wherein the test signals may be output to the object under test. The baseboard management control module 113 may further obtain the response signal of the object under test to the test signal through the functional test modules 112a and 112b, and generate a pass or fail test result accordingly.

[0067] After the input-output module 111 receives the test script, the baseboard management controller of the baseboard management control module 113 can store the test script in the memory of the baseboard management controller, and when the test is to be executed, read the test script in the memory, and use at least a portion of the test instructions stored in the embedded memory of the baseboard management controller to control the functional test modules 112a and 112b to output test signals according to the read test script.

[0068] For example, the test items may include test items of the quick peripheral component interconnect. The test items of the quick peripheral component interconnect may include one or more of link transmission speed and width, link speed change test, data transmission performance, receiver channel margin test, receiver eye diagram, packet generator and error injection. The baseboard management control module 113 may obtain the response signal of the quick peripheral component interconnect to the above test items through the functional test modules 112a and 112b, and generate test results accordingly.

[0069] In addition, the input-output module 111 can be further used to obtain identification information of the object under test. The baseboard management controller of the baseboard management control module 113 obtains the test script corresponding to the identification information from the database server through the input-output module 111, and then stores the test script in the memory of the baseboard management controller. The read-only memory (ROM) of the object under test can store the identification information of the object under test, and the input-output module 111 can obtain the identification information by directly reading the read-only memory of the object under test. The identification information can be the name and / or serial number of the object under test, etc., and the present invention is not limited thereto.

[0070] Please refer to Figure 1 and Figure 2 ,in Figure 2 FIG. 1 is a block diagram of a baseboard management control module according to an embodiment of the present invention. Figure 2 As shown, the baseboard management control module 113 may include an expansion board 1130, a first storage element 1131, a second storage element 1132, a control chip 1133, and a connection port 1134, wherein the first storage element 1131, the second storage element 1132, the control chip 1133, and the connection port 1134 are disposed on the expansion board 1130. Specifically, the first storage element 1131 may be the aforementioned memory for storing test scripts, the second storage element 1132 may be the aforementioned memory for storing test instructions corresponding to a plurality of test items, and the control chip 1133 may be a chip for executing baseboard management control (RunBMC). The control chip 1133 may be connected to the circuit on the baseboard 110 through the connection port 1134, and the connection port 1134 may be, for example, a dual in-line memory module (DIMM) interface. In other words, the baseboard management control module 113 may be pluggably connected to the baseboard 110 . In another embodiment, the baseboard management control module 113 may include a first storage element 1131 , a second storage element 1132 and a control chip 1133 directly disposed on the baseboard 110 .

[0071] Please refer to Figures 1 to 3 ,in Figure 3 FIG. 1 is a block diagram of an input / output module according to an embodiment of the present invention. Figure 3As shown, the input-output module 111 may include a first communication port 1111, a second communication port 1112, and a third communication port 1113. The first communication port 1111 is used to connect to the database server A1, the second communication port 1112 is used to connect to the scanning device A2, and the third communication port 1113 is used to connect to the user input device A3. For example, the first communication port 1111 may be RJ45, the second communication port 1112 may be a universal serial bus (USB) interface. The third communication port 1113 may be one of a universal serial bus interface, RS232, and RS485. Figure 3 The embodiment only illustrates three types of communication ports by way of example. In other embodiments, the functional testing device 11 may include one or two types of communication ports among the three types of communication ports, and the number of each type of communication ports is not limited.

[0072] The database server A1 may be a cloud database server, storing multiple test scripts corresponding to different objects to be tested. The scanning device A2 may be a barcode scanning device, which can be used to scan the barcode on the object to be tested to obtain the aforementioned identification information. The user input device A3 may be a keyboard, a mouse, a touch screen, etc., for receiving information input by the user.

[0073] The baseboard management control module 113 can obtain the test script corresponding to the identification information (i.e., corresponding to the object under test) from the database server A1 through the first communication port 1111 according to the identification information. In addition, the third communication port 1113 can also be used to receive the test script from the user input device A3. In other words, the input / output module 111 can include both the first communication port 1111 and the third communication port 1113, or only one of them.

[0074] Please refer to Figure 4 and Figure 5 , Figure 4 is a three-dimensional schematic diagram of a functional testing device according to an embodiment of the present invention. Figure 5 To illustrate Figure 4 Top view of the functional test device. Figures 1 to 3 The arrangement of the substrate 110, the input / output module 111, the function test modules 112a and 112b, the substrate management control module 113 and the power module 114 can be as follows: Figure 4 and Figure 5 In addition, the power module 114 may include a power input port 1141 and a power output port 1142. The power input port 1141 is used to receive power from an external power source to supply power to each module on the substrate 110, and output power to the DUT through the power output port 1142.

[0075] Please refer to Figure 6 , Figure 6 FIG. 1 is a block diagram of a functional testing system according to an embodiment of the present invention. Figure 6 As shown, the functional testing system 1 includes Figure 1 The functional test device 11 and the object under test 12 are shown. The functional test modules 112a and 112b are pluggably disposed on the substrate 110 and pluggably connected to the object under test 12. The object under test 12 is connected to the power module 114, and the power module 114 is used to receive and output power to the object under test 12. The input-output module 111 is used to receive a plurality of test scripts corresponding to the object under test 12. The baseboard management control module 113 is used to test the object under test 12 through the functional test modules 112a and 112b according to the test scripts. In other words, the baseboard management control module 113 controls the functional test modules 112a and 112b to output test signals to the object under test 12 according to the test scripts.

[0076] Please refer to Figure 7 , Figure 7 FIG. 1 is a block diagram of a functional testing system according to another embodiment of the present invention. Figure 7 As shown, the functional testing system 1' comprises Figure 1 The functional testing device 11 , a plurality of DUTs 12 a to 12 c and an adapter card 13 are shown. Figure 7 The number of functional test modules and the number of objects to be tested shown are only examples. The number of functional test modules may be greater than 2, and the number of objects to be tested may be between 1 and 3, or may be greater than 3. For example, each of the objects to be tested 12a to 12c may include a non-volatile memory for storing identification information. The adapter card 13 is used to connect the functional test modules 112a and 112b to the objects to be tested 12a to 12c. The functional test modules 112a and 112b may be connected to the adapter card 13 via a mini cooled I / O (MCIO) transmission line. Specifically, in Figure 3 In the architecture, the adapter card 13 can be used to transmit the power output by the power module 114 and the test signals output by the function test modules 112a and 112b to the DUTs 12a to 12c.

[0077] Please refer to Figure 7 , Fig. 8A and 8B ,in Fig. 8A FIG. 1 is a block diagram of a housing, a power signal input port, and a test signal input port of an adapter card according to an embodiment of the present invention. Figure 8B FIG. 1 is a block diagram of a signal output port of an adapter card according to an embodiment of the present invention. Fig. 8A and Figure 8BAs shown, the adapter card 13 has a housing 130, a power signal input port 131, one or more test signal input ports 132 and one or more signal output ports 133. The signal output port 133 includes a power signal sub-port 1331 corresponding to the power signal input port 131 and one or more test signal sub-ports 1332 corresponding to the test signal input port 132. The power signal input port 131 is electrically connected to the power module 114 and the power signal sub-port 1331. The test signal input port 132 is electrically connected to the test signal sub-port 1332 and the functional test modules 112a and 112b. Specifically, the power signal input port 131 and the test signal input port 132 can be arranged on the first surface 1301 of the housing 130, and the signal output port 133 can be arranged on the second surface 1302 of the adapter card 13. More specifically, the second surface 1302 can be opposite to the first surface 1301. The signal output port 133 can be connected to the object under test through a flat cable. Fig. 8A and 8B The arrangement positions of the power signal input port 131 , the test signal input port 132 and the signal output port 133 of the adapter card are presented by way of example, but the arrangement method of the power signal input port 131 , the test signal input port 132 and the signal output port 133 of the present invention is not limited thereto.

[0078] The power signal input port 131 is used to receive power from the power module 114, and output the power to the DUTs 12a to 12c via the power signal sub-port 1331. The test signal input port 132 is used to receive test signals from the functional test modules 112a and 112b, and output the test signals to the DUTs 12a to 12c via the test signal sub-port 1332. Fig. 8A and Figure 8B In the embodiment, a test signal input port 132 can be used to receive a test signal from one of the functional test modules 112a and 112b, or a test signal input port 132 can be used to receive test signals from both the functional test modules 112a and 112b; a signal output port 133 can be used to output power and a test signal to one of the objects under test 12a to 12c, or a signal output port 133 can be used to output power and a test signal to each of the objects under test 12a to 12c.

[0079] Please refer to Fig. 9 , Fig. 9 FIG. 1 is a block diagram of a functional testing device according to another embodiment of the present invention. Fig. 9 As shown, the functional testing device 21 includes a substrate 210 , an input / output module 211 , a plurality of connection ports 212 a and 212 b , a main control module 213 and a power module 214 . Fig. 9Two connection ports are shown as an example, but the present invention does not limit the number of connection ports. The substrate 210 and the input / output module 211 of the functional testing device 21 can be connected to Figure 1 The substrate 110 and the input / output module 111 of the embodiment of FIG. 8 are the same and thus will not be described in detail herein.

[0080] The connection ports 212a and 212b and the main control module 213 are disposed on the substrate 210, and the main control module 213 is connected to the connection ports 212a and 212b. The main control module 213 is used to output a plurality of test signals to the connection ports 212a and 212b according to the test script received by the input / output module 211. Further, the connection ports 212a and 212b can be quick peripheral component interconnection connection ports, respectively used to connect the objects under test.

[0081] Please refer to Fig. 9 and Fig.10 ,in Fig.10 FIG. 1 is a block diagram of a main control module according to an embodiment of the present invention. Fig.10 As shown, the main control module 213 includes a processor 2131 , a first connection port 2132 , and a second connection port 2133 . The processor 2131 is connected to the first connection port 2132 and the second connection port 2133 . Fig.10 Two connection ports are shown as an example, but the present invention does not limit the number of connection ports. The first connection port 2132 may be a quick peripheral component interconnection connection port, and the second connection port 2133 may be an RJ45.

[0082] Please refer to Figures 9 to 11 ,in Fig.11 To illustrate Fig. 9 Schematic diagram of the functional test device. Fig.11 As shown, the input-output module 211 includes a first communication port 2111, a second communication port 2112 and a third communication port 2113, and the power module 214 includes a power input port 2141 and a power output port 2142, wherein the first communication port 2111, the second communication port 2112 and the third communication port 2113 can be respectively connected to Figures 3 to 5 The first communication port 1111, the second communication port 1112 and the third communication port 1113 are the same as the power input port 2141 and the power output port 2142 can be respectively Figure 4 and Figure 5 The power input port 1141 and the power output port 1142 are the same.

[0083] Furthermore, the power module 214 may include a power input port 2141 , and the power input port 2141 is used to receive power from the outside, supply the power to the main control module 213 , and supply the power to the DUT via the connection ports 212 a and 212 b .

[0084] In addition, the functional testing device 21 can also be used as follows Figure 6 8 is connected to the DUT. In this embodiment, the connection ports 212a and 212b are used to connect to the functional test module, and the power module 214 further includes a power output port 2142 for outputting power to the DUT.

[0085] In the functional test device 21, the main control module 213 may be a module with a central processing unit (CPU) as the main operating component, and is connected to the circuit of the substrate 210 through a quick peripheral component interconnection connection port (first connection port 2132). In one embodiment, the main control module 213 may be a module with a baseboard management controller as the main operating component, and is connected to the circuit of the substrate 210 through a quick peripheral component interconnection connection port (first connection port 2132). In addition, the functional test device 21 may further include a slave module 215, which is disposed on the substrate 210, and the slave module 215 may be a baseboard management control module. The implementation method of the baseboard management control module can be the same as Figure 2 The implementation method is the same.

[0086] In addition, the master module 213 may have a first connection port 2132, and the slave module 215 may have another communication port for obtaining a test script, wherein the communication port of the slave module 215 may also be an RJ45. The master module 213 may output a test signal to one of the connection ports 212a and 212b according to a portion of the test script, and the slave module 215 may output a test signal to the other of the connection ports 212a and 212b according to another portion of the test script. In other words, the test script may indicate the test content that the master module 213 and the slave module 215 need to execute respectively, and the master module 213 and the slave module 215 may obtain the same test script, and the master module 213 and the slave module 215 determine the test signals that they need to output via the connection ports 212a and 212b respectively according to the test script.

[0087] Please refer to Fig.12 , Fig.12 FIG. 1 is a block diagram of a functional testing system according to another embodiment of the present invention. Fig.12As shown, the functional test system 3 includes a substrate 310, an input / output module 311, a plurality of connection ports 312a and 312b, a main control module 313, and a plurality of DUTs 32a and 32b. The substrate 310, the input / output module 311, the connection ports 312a and 312b, and the main control module 313 of the functional test system 3 can be connected to Figures 9 to 11 The substrate 210, the input / output module 211, the connection ports 212a and 212b, and the main control module 213 of the embodiment are the same, so they are not described here. In addition, the functional test system 3 may further include a slave module, and its implementation method may be the same as Fig.11 The same as the embodiment.

[0088] like Fig.12 As shown, the DUT 32a is connected to the connection port 312a, and the DUT 32b is connected to the connection port 312b, wherein the DUT 32a and the DUT 32b can be the same or different from each other. As mentioned above, the main control module 313 can be a central processing unit, which is used to output a test signal to the connection ports 312a and 312b according to the test script, so as to output the test signal from the connection ports 312a and 312b to the DUT 32a and 32b respectively.

[0089] The functional test system 3 may also include a slave module, which can be connected to the Fig.11 In other words, the slave module of the functional test system 3 may be a baseboard management control module, the master module 313 and the slave module each correspond to a communication port (e.g., RJ45) of the input / output module 311, for obtaining the test script; and the master module 313 and the slave module may each output a test signal to the connection ports 312a and 312b according to the test script.

[0090] In addition, the DUT tested by the master module 313 may be one or more of a network interface card (NIC) and a graphics processor card; the DUT tested by the slave module may be a DUT without active components, such as a riser card. In other words, the master module 313 is used to test the DUT 32a, and the slave module is used to test the DUT 32b, and the DUT 32b does not have active components.

[0091] Please refer to Fig.13 ,in Fig.13 FIG. 4 is a flow chart of a functional testing method according to an embodiment of the present invention. Fig.13The functional test method shown is applicable to the object under test, and can be executed by a device connected to the functional test module, or by a device directly connected to the object under test. In other words, the functional test method can be executed by the baseboard management control module, the master control module, and the slave module of one or more embodiments, and is applicable to the functional test device and the functional test system of all the above embodiments. Fig.12 The functional testing method is described by taking the functional testing system 3 as an example. The functional testing method comprises: step S101: obtaining a test script from a cloud database server according to identification information of the object to be tested, wherein the test script comprises multiple test items of different types; and step S103: testing the object to be tested according to the test script.

[0092] In step S101, the main control module 313 obtains the identification information of the object to be tested from the cloud database server (for example, Figure 3 As described above, the method by which the main control module 313 obtains the identification information of the object under test may be through a scanning device or by reading the read-only memory of the object under test. The test script includes multiple test items of different types, such as a peripheral component interconnect interface type test item, a power type test item, a network connection type test item, etc.

[0093] In step S103, the main control module 313 tests the DUTs 32a and 32b according to the test script. Taking the DUT 32a as an example, the main control module 313 can output a corresponding test signal to the connection port 312a according to the test script to output the test signal to the DUT 32a.

[0094] Furthermore, taking the object under test 32a as an example, the implementation of step S103 may also include the main control module 313 controlling the functional test module (eg, Figure 1 The main control module 313 can be used to test the object under test 32a by using the functional test modules 112a and 112b, wherein each of the functional test modules can execute at least one of the test items. In addition, the main control module 313 can transmit a plurality of control signals corresponding to the test items to the functional test modules in a time-sharing multitasking manner to control the functional test modules to test the object under test 32a. In other words, the main control module 313 can control the functional test modules to test the object under test 32a in a time-sharing multitasking manner.

[0095] Please refer to Fig.14 ,in Fig.14 The figure is a flow chart of a method for testing an object to be tested according to an embodiment of the present invention. Fig.14 Can be considered as Fig.13 The following is a detailed flow chart of an embodiment of step S103. Fig.12 The functional test system 3 and its DUT 32a are used as examples for explanation. The method for testing the DUT comprises: step S201: generating a first packet; step S203: outputting the first packet to the DUT via the rapid peripheral component interconnect interface, wherein the first packet includes a first verification code; step S205: receiving a second packet from the DUT via the rapid peripheral component interconnect interface, wherein the second packet includes a second verification code; step S207: determining whether the first verification code is consistent with the second verification code; if the determination result of step S207 is "yes", executing step S209: generating a positive test result about the DUT; and if the determination result of step S207 is "no", executing step S211: generating a negative test result about the DUT.

[0096] In step S201, the first packet generated by the main control module 313 may be included in the test signal. The first packet includes a first check code, wherein the first check code may be a function of a cyclic redundancy check (CRC). In addition, the first packet may also include data such as a packet sequence number, which is not limited by the present invention.

[0097] In step S203, the main control module 313 outputs the first packet to the DUT 32a via the PICR interface (connection port 312a), wherein the PICR interface can be the connection port 312a. Step S203 is equivalent to outputting the test signal to the DUT via the connection port / functional test module.

[0098] In step S205, the main control module 313 receives a second packet from the DUT 32a via the same rapid peripheral component interconnect interface. The second packet includes a second check code, wherein the second check code may be a function of a cyclic redundancy check. In addition, the second packet may also include data such as a packet sequence number, which is not limited by the present invention.

[0099] In step S207, the main control module 313 determines whether the first verification code is consistent with the second verification code. If the first verification code is consistent with the second verification code, the main control module 313 determines that the test of the object under test 32a is successful, so step S209 is executed to generate a positive test result about the object under test 32a. On the contrary, if the first verification code is inconsistent with the second verification code, the main control module 313 determines that the test of the object under test 32a is unsuccessful, so step S211 is executed to generate a negative test result about the object under test 32a.

[0100] Please refer to Fig.15 and Fig.16 ,in Fig.15 is a flow chart of a method for generating a first packet according to an embodiment of the present invention. Fig.16It is a schematic diagram of a functional testing method according to an embodiment of the present invention. Fig.15 Can be considered as Fig.14 The following is also a detailed flow chart of an embodiment of step S201. Fig.12 The method for generating the first packet includes: step S301: generating a first check code by the data link layer; step S303: generating a link layer packet by the data link layer based on the transport layer packet and the first check code; and step S305: generating a first packet by the physical layer based on the link layer packet.

[0101] In step S301, the data link layer of the main control module 313 generates a first check code. In step S303, the data link layer of the main control module 313 generates a link layer packet based on a transaction layer packet and the first check code, wherein the transaction layer packet is generated by the transaction layer of the main control module 313. In other words, in step S303, the main control module 313 adds the first check code to the end of the transaction layer packet to generate a link layer packet, and may add a packet sequence number to the head of the transaction layer packet.

[0102] In step S305, the physical layer of the main control module 313 generates a first packet based on the link layer packet. Specifically, the physical layer of the main control module 313 may add a start to the header frame of the link layer packet and an end to the tail frame of the link layer packet to generate the first packet.

[0103] The objects under test described in the above embodiments may be various components such as a server mainboard, a power board, a peripheral component interconnect Express (PCIe) interface, a network interface card (NIC), a graphics processor card or an adapter card, etc., and the present invention is not limited thereto.

[0104] According to the functional testing device, system and method of one or more embodiments above, multiple tests can be performed on one or more DUTs at the same time, thereby reducing the testing time. In addition, since the functional testing device, system and method of one or more embodiments above do not need to pass through the motherboard, the testing cost can be reduced.

[0105] Although the present invention is disclosed as above with the aforementioned embodiments, it is not intended to limit the present invention. Without departing from the spirit and scope of the present invention, all changes and modifications are within the scope of patent protection of the present invention. Please refer to the attached patent application for the scope of protection defined by the present invention.

Claims

1. A functional testing method, characterized in that: Applicable to a device under test, including being executed by a main control chip: Obtaining a test script from a database server according to identification information of the object to be tested, wherein the test script includes a plurality of test items of different types; and The object under test is tested according to the test script.

2. The functional testing method according to claim 1, characterized in that: Testing the object under test according to the test script includes: controlling a plurality of functional test modules to test the object under test according to the test items, wherein each of the functional test modules is capable of executing at least one of the test items.

3. The functional testing method according to claim 2, characterized in that: Controlling the functional test modules to test the object under test according to the test items includes: transmitting a plurality of control signals corresponding to the test items to the functional test modules in a time-sharing multitasking manner.

4. The functional testing method according to claim 1, characterized in that: The test on the object to be tested includes: generating a first packet; Outputting the first packet to the DUT via a PIC32R interface, wherein the first packet includes a first verification code; receiving a second packet from the DUT via the PIC32 Express interface, wherein the second packet includes a second verification code; Determining whether the first verification code is consistent with the second verification code; If the first verification code is consistent with the second verification code, a positive test result about the object to be tested is generated; as well as If the first verification code is inconsistent with the second verification code, a negative test result is generated for the object under test.

5. The functional testing method according to claim 4, characterized in that: The first packet is generated including: The first check code is generated by a data link layer; The data link layer generates a link layer packet based on a transport layer packet and the first check code; as well as The first packet is generated by a physical layer based on the link layer packet.

6. The functional testing method according to claim 1, characterized in that: Also includes: The identification information is obtained by scanning the identifier of the object to be tested with a scanning device.

7. The functional testing method according to claim 1, characterized in that: The main control chip also executes: A memory of the object to be tested is read to obtain the identification information.

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