Bus channel splitting mode obtaining method and device, equipment and medium

Abstract

The invention discloses a bus channel splitting mode obtaining method and device, equipment and a medium, relates to the technical field of computer link configuration, is applied to a server, and comprises the steps that after the server is powered on, a bus controller and bus equipment corresponding to a target bus are initialized based on a unified extensible firmware interface, and the bus controller and the bus equipment are initialized; executing the step of switching a chip channel of the first integrated circuit chip to one side where the unified extensible firmware interface is located through the bus controller to obtain a corresponding channel switching result; if the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, the chip channel is switched to a preset downlink channel expanded through the second integrated circuit chip, the channel splitting condition of each bus device in the third integrated circuit chip on a target bus on the current adapter card is accessed through a preset downlink channel; and writing the channel splitting condition into preset firmware to complete acquisition of the channel splitting mode of the target bus.

Description

Technical Field

[0001] The present invention relates to the technical field of computer link configuration, and in particular to a method, device, equipment and medium for obtaining a bus channel splitting mode. Background Art

[0002] When obtaining the PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) split mode during the server startup process, the current common solution is to use the GPIO (General-Purpose Input / Output) pins directly output from the CPU (Central Processing Unit / Processor) on the hardware. When configured into different PCIe split modes, the corresponding level state of the GPIO pins is changed to allow the UEFI (Unified Extensible Firmware Interface) to distinguish the current corresponding split mode. However, if there are not enough GPIO pins reserved on the hardware, then the UEFI cannot obtain the corresponding split mode information in this way.

[0003] It can be seen that when there are not enough GPIO pins reserved on the hardware, how to obtain accurate PCIe channel splitting information is a problem that technical personnel in this field need to solve. Summary of the invention

[0004] The purpose of the embodiments of the present invention is to provide a bus channel splitting mode acquisition method, device, equipment and medium, which can solve the problem of how to obtain accurate PCIE channel splitting information when there are not enough GPIO pins reserved on the hardware.

[0005] To solve the above technical problems, an embodiment of the present invention provides a bus channel splitting mode acquisition method, which is applied to a server, wherein the server includes a mainboard with an adapter card inserted in a physical slot of a target bus, and the adapter card is sequentially connected to a first integrated circuit chip, a second integrated circuit chip, and a third integrated circuit chip through a preset communication bus, and the method includes:

[0006] When the server is powered on, the bus controller and bus device corresponding to the target bus are initialized based on the unified extensible firmware interface, and the chip channel of the first integrated circuit chip is switched to the side where the unified extensible firmware interface is located through the bus controller to obtain a corresponding channel switching result;

[0007] If the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, the chip channel is switched to a preset downstream channel extended by the second integrated circuit chip, so as to access the channel splitting status of the target bus of each bus device in the third integrated circuit chip on the current adapter card through the preset downstream channel;

[0008] The channel splitting situation is written into a preset firmware to complete the acquisition of the channel splitting mode of the target bus.

[0009] Optionally, the executing the step of switching the chip channel of the first integrated circuit chip to the side where the unified extensible firmware interface is located through the bus controller to obtain a corresponding channel switching result includes:

[0010] Writing a target value representing a chip control signal to a register of the first integrated circuit chip through a first chip control function to obtain chip control rights of the first integrated circuit chip, so that the unified extensible firmware interface executes a step of switching a chip channel of the first integrated circuit chip to a side where the unified extensible firmware interface is located through the bus controller based on the chip control rights to obtain a corresponding channel switching result;

[0011] Correspondingly, if the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, the chip channel is switched to a preset downstream channel extended by the second integrated circuit chip, so as to access the channel splitting status of the target bus of each bus device in the third integrated circuit chip on the current adapter card through the preset downstream channel, including:

[0012] If the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, the chip channel is switched to any preset downstream channel of the preset number of preset downstream channels extended by the second integrated circuit chip through the preset communication bus through the second chip control function, so as to access the channel splitting status of the target bus of each bus device in the third integrated circuit chip on the current adapter card through any preset downstream channel and the chip access function.

[0013] Optionally, after determining whether the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located to obtain the corresponding channel switching result under the current channel switching operation, it also includes:

[0014] If the channel switching result is that the chip channel of the first integrated circuit chip is not successfully switched to the side where the unified extensible firmware interface is located, a current chip switching state corresponding to the current channel switching operation is marked by a state variable;

[0015] When the state variable is 1, the channel splitting situation obtained from the preset manager when the server was started last time is written into the preset firmware to complete the acquisition of the channel splitting mode of the target bus;

[0016] When the state variable is 0, the channel splitting status corresponding to each bus device in the third integrated circuit chip is sent to the unified extensible firmware interface through the preset manager, and the server is restarted.

[0017] Optionally, the third integrated circuit chip has 16 preset input / output pins; wherein the preset input / output pins are used to transmit the channel splitting status corresponding to each of the bus devices to the unified extensible firmware interface.

[0018] Optionally, when the state variable is 1, the channel splitting situation obtained from the preset manager when the server was last started is written into the preset firmware to complete the acquisition of the channel splitting mode of the target bus, including:

[0019] When the state variable is 1, it is determined that the current server startup is not the first server startup, and the current state variable is rewritten to 0. Then, the channel splitting situation obtained from the preset manager during the last server startup is written into the preset firmware through the firmware writing function to complete the acquisition of the channel splitting method of the target bus.

[0020] Optionally, the bus channel splitting mode acquisition method further includes:

[0021] When designing the physical slot of the target bus, the pins of a bus controller in the central processor are led out so that the total channel resources of the complete target bus can be obtained through the adapter card inserted in the physical slot of the target bus.

[0022] Optionally, the step of writing the channel splitting condition into a preset firmware to complete the acquisition of the channel splitting mode of the target bus includes:

[0023] The corresponding channel width parameters are set according to the target bus channel width information required by each bus device, and the parameter values ​​in each channel width parameter are written into the preset firmware through a firmware writing function to complete the acquisition of the channel splitting method of the target bus.

[0024] In a second aspect, an embodiment of the present invention provides a bus channel splitting mode acquisition device, which is applied to a server, wherein the server includes a mainboard with an adapter card inserted in a physical slot of a target bus, and the adapter card is sequentially connected to a first integrated circuit chip, a second integrated circuit chip, and a third integrated circuit chip through a preset communication bus, and the device includes:

[0025] a channel switching module, configured to initialize the bus controller and bus device corresponding to the target bus based on the unified extensible firmware interface after the server is powered on, and execute the step of switching the chip channel of the first integrated circuit chip to the side where the unified extensible firmware interface is located through the bus controller to obtain a corresponding channel switching result;

[0026] an access module, configured to switch the chip channel to a preset downstream channel extended by the second integrated circuit chip if the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, so as to access the channel splitting status of the target bus of each bus device in the third integrated circuit chip on the current adapter card through the preset downstream channel;

[0027] The result acquisition module is used to write the channel splitting situation into a preset firmware to complete the acquisition of the channel splitting mode of the target bus.

[0028] In a third aspect, an embodiment of the present invention provides an electronic device, including:

[0029] Memory for storing computer programs;

[0030] A processor is used to execute the computer program to implement the steps of the bus channel splitting mode acquisition method disclosed above.

[0031] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the method for obtaining the bus channel splitting method disclosed above are implemented.

[0032] It can be seen that the present invention discloses a method for obtaining a bus channel splitting mode, which is applied to a server, wherein the server includes a mainboard with an adapter card inserted in a physical slot of a target bus, and the adapter card is connected to a first integrated circuit chip, a second integrated circuit chip and a third integrated circuit chip in sequence through a preset communication bus. The method includes: when the server is powered on, the bus controller and the bus device corresponding to the target bus are initialized based on a unified extensible firmware interface, and the step of switching the chip channel of the first integrated circuit chip to the side where the unified extensible firmware interface is located through the bus controller is executed to obtain a corresponding channel switching result; if the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, then the chip channel is switched to a preset downstream channel extended by the second integrated circuit chip, so as to access the channel splitting status of each bus device in the third integrated circuit chip on the target bus on the current adapter card through the preset downstream channel; the channel splitting status is written into the preset firmware to complete the acquisition of the channel splitting mode of the target bus.

[0033] It can be seen from the above technical solution that by clarifying the access logic of the third integrated circuit chip, UEFI issues instructions to access chip data layer by layer, and correctly sets the PCIE split mode through the hardware information fed back by the motherboard, thereby ensuring the normal use of PCIE devices and the reporting of device information. In the chip access process, considering the situation that multiple firmwares access chip data together, reasonable switching is achieved, avoiding the channel control arbitration problem involved in the first integrated circuit chip cutting the channel, thereby ensuring the normal operation of the motherboard hardware. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0035] Figure 1 A flow chart of a method for obtaining a bus channel splitting mode provided by an embodiment of the present invention;

[0036] Figure 2 A flow chart of a specific method for obtaining a PCIe bus channel splitting mode provided by an embodiment of the present invention;

[0037] Figure 3 A schematic diagram of a bus channel splitting method acquisition device provided by an embodiment of the present invention;

[0038] Figure 4A diagram of an electronic device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0039] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0040] The terms "including" and "having" in the specification of the present invention and the above-mentioned drawings, as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but may include steps or units that are not listed.

[0041] When obtaining the PCIe split mode during the server startup process, the current common solution is to use the CPU direct GPIO pins on the hardware. When configured to different PCIe split modes, the corresponding level state of the GPIO pins is changed to allow UEFI to distinguish the current corresponding split mode. However, if there are not enough GPIO pins reserved on the hardware, then UEFI cannot obtain the corresponding split mode information in this way.

[0042] To this end, the present invention provides a bus channel splitting mode acquisition solution, which can obtain accurate PCIe channel splitting information when there are not enough GPIO pins reserved on the hardware.

[0043] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0044] Next, a method for obtaining a bus channel splitting mode provided by an embodiment of the present invention is described in detail. Figure 1 A bus channel splitting mode acquisition method provided in an embodiment of the present invention is applied to a server, wherein the server includes a mainboard with an adapter card inserted in a physical slot of a target bus, and the adapter card is sequentially connected to a first integrated circuit chip, a second integrated circuit chip, and a third integrated circuit chip through a preset communication bus, and the method includes:

[0045] Step S11: When the server is powered on, the bus controller and bus device corresponding to the target bus are initialized based on the unified extensible firmware interface, and the step of switching the chip channel of the first integrated circuit chip to the side where the unified extensible firmware interface is located is executed through the bus controller to obtain a corresponding channel switching result.

[0046] In this embodiment, in the startup link of the server, the main function of UEFI is to guide the system to start up, and after power-on, before starting up, the CPU, memory, peripheral interface, PCIe controller and PCIe device will be initialized. The onboard devices of the motherboard belong to PCIe devices, including all external cards that use PCIe interfaces. The CPU provides PCIe link resources, and the hardware connects the corresponding PCIe controller in the CPU to the motherboard device by connecting the pins on the motherboard. In order to reasonably allocate resources, most onboard devices are connected to the X1 controller in the PCIE controller, and the remaining PCIe controllers are converted into the form of PCIE slots. At this time, the hardware can use the Riser card (adapter card) on the slot to dynamically split the PCIE resources again, and dynamically select for different scenarios to achieve the purpose of reasonable use of resources. Therefore, when designing the physical slot of the target bus, the pins of a bus controller in the central processing unit are led out so that the total channel resources of the complete target bus can be obtained through the adapter card inserted in the physical slot of the target bus. The present invention inserts a riser card into the physical slot of the PCIe of the motherboard, and the riser card is connected to the PCA9641 chip through the I2C (Inter-Integrated Circuit, two-wire serial bus) channel, and is connected to the PCA9546 chip downward, and the bottom layer is connected to the PCA9555 chip. In this way, by leading out the pins of a complete PCIe controller inside the CPU, it is equivalent to leading out a complete PCIE resource, and it is used with the riser card for PCIE link splitting, which meets the needs of various application scenarios.

[0047] In this embodiment, the target value representing the chip control signal is written to the register of the first integrated circuit chip through the first chip control function to obtain the chip control right of the first integrated circuit chip, so that the unified extensible firmware interface executes the step of switching the chip channel of the first integrated circuit chip to the side where the unified extensible firmware interface is located through the bus controller and based on the chip control right, so as to obtain the corresponding channel switching result. Figure 2As shown, the UEFI firmware initializes the PCIe controller through the PcieInit initialization function, and then writes 1 (target value) to the register through the Pca9641Ctrl function (first chip control function) to obtain the chip control right of the first integrated circuit chip, so that the UEFI executes the step of switching the chip channel of the PCA9641 chip to the side where the UEFI is located through the PCIe controller and based on the chip control right. It should be noted that the PCA9641 selection chip is a two-choice I2C controller demultiplexer with an arbitration function. It is designed for high-reliability dual-controller I2C bus applications, where correct system operation is required, even if two I2C bus controllers issue commands at the same time. The arbitration function will select a winner and let it work uninterruptedly. The failed bus controller will control the I2C bus after the winning bus controller completes the command. The PCA9641 chip is used in the present invention to switch channels between the UEFI side and the BMC (Baseboard Management Controller) side.

[0048] In this embodiment, if the channel switching result is that the chip channel of the first integrated circuit chip is not successfully switched to the side where the unified extensible firmware interface is located, the current chip switching state corresponding to the current channel switching operation is marked by a state variable. It can be understood that, referring to Figure 2 As shown in the figure, when executing channel switching, if the BMC is also accessing the PCA9641 chip, or the chip control is not released during access, then UEFI will not be able to obtain control to switch channels, that is, it will not be able to access the bottom-level PCA9555 chip data, and then it will not be able to obtain PCIE split data. Therefore, when the Pca9641Ctrl function returns a failed state, that is, when the channel switching result is that the chip channel of the PCA9641 chip is successfully switched to the side where the BMC is located, a state variable A is required to mark the state.

[0049] Furthermore, when the state variable is 1, the channel splitting situation obtained from the preset manager at the last server startup is written into the preset firmware to complete the acquisition of the channel splitting method of the target bus. Specifically, when the state variable is 1, it is determined that the current server startup is not the first server startup, and the current state variable is rewritten to 0, and then the channel splitting situation obtained from the preset manager at the last server startup is written into the preset firmware through the firmware writing function to complete the acquisition of the channel splitting method of the target bus. It can be understood that, with reference to Figure 2As shown, if the state variable A is 1, it means that the current server is not started for the first time and has obtained data from the BMC. In this case, the state variable A needs to be rewritten to 0 to restore the state. Then, through the PssiPcieInit function, the PCIE split parameter BifMode (Bifurcation Mode) value obtained from the BMC in the last startup is written into the PBF (Phytium Base Firmware) firmware to complete the acquisition of the channel splitting method. Among them, the BifMode value represents the bifurcation mode or split configuration of PCIe.

[0050] In this embodiment, when the state variable is 0, the channel splitting status corresponding to each bus device in the third integrated circuit chip is sent to the unified extensible firmware interface through the preset manager, and the server is restarted. Figure 2 As shown, if the state variable A is 0, after completing the initialization of IPMI (Intelligent Platform Management Interface), the BMC sends the channel splitting parameter BifMode corresponding to the PCA9555 data to UEFI for storage through the IpmiLibExecuteIpmiCmd function, and restarts UEFI through the SystemReset event. It should be noted that if there is no IPMI in the server or IPMI is not intended to be used to obtain the split mode, other methods can be used to obtain or set the PCIe splitting parameters. For example, it can be achieved through UEFI settings, hardware jumpers, external configuration files, or other system-related mechanisms.

[0051] In addition, when the first integrated circuit chip does not switch to the side where the UEFI in the solution of the present invention is located, when the state marking method using 1 or 0 does not satisfy the current chip switching state representation, the channel switching failure is handled by using a more complex state machine or event-driven method. For example, multiple states are defined to represent different failure reasons and corresponding processing strategies. Specifically, INITIAL_STATE is defined: the initial state, indicating that the channel switching operation has not yet been performed. CHANNEL_SWITCH_ATTEMPTED is defined: the state of attempting to switch channels. CHANNEL_SWITCH_FAILED_BUSY is defined: the state in which the channel switch fails due to busy resources. CHANNEL_SWITCH_FAILED_HARDWARE_ERROR is defined: the state in which the channel switch fails due to hardware failure. CHANNEL_SWITCH_FAILED_UNKNOWN is defined: the state in which the channel switch fails due to unknown reasons. When the server is powered on, the state is initialized to INITIAL_STATE. When the channel switching operation starts, the state switches to CHANNEL_SWITCH_ATTEMPTED.

[0052] If the channel switch fails, the state switches to the corresponding failure state according to the specific failure reason. For example, if the failure is caused by other processes occupying resources and being busy, the state switches to CHANNEL_SWITCH_FAILED_BUSY; if the failure is caused by a hardware failure, the state switches to CHANNEL_SWITCH_FAILED_HARDWARE_ERROR; if the specific reason cannot be determined, the state switches to CHANNEL_SWITCH_FAILED_UNKNOWN.

[0053] There are corresponding processing strategies for different states:

[0054] In the CHANNEL_SWITCH_FAILED_BUSY state, the system will wait for a while before trying to switch channels again.

[0055] In the CHANNEL_SWITCH_FAILED_HARDWARE_ERROR state, the system will trigger a hardware failure alarm and notify the administrator to perform repairs.

[0056] In the CHANNEL_SWITCH_FAILED_UNKNOWN state, the system will record detailed error logs for subsequent analysis and troubleshooting.

[0057] This more complex state machine approach can handle various situations where channel switching failures occur in a more sophisticated manner, improving the system's ability to cope with and fault tolerance for different types of errors. For example, if switching fails multiple times in a row due to busy resources, the system can adopt a more aggressive resource release strategy or adjust priorities to complete channel switching as quickly as possible. For hardware failures, alarms can be issued in a timely manner to avoid potential larger problems. For failures with unknown causes, detailed error logs help with subsequent problem diagnosis and resolution.

[0058] Step S12: If the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, the chip channel is switched to the preset downstream channel extended by the second integrated circuit chip, so as to access the channel splitting status of the target bus of each bus device in the third integrated circuit chip on the current adapter card through the preset downstream channel.

[0059] In this embodiment, if the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, the chip channel is switched to any preset downstream channel of the preset number of preset downstream channels extended by the second integrated circuit chip through the preset communication bus through the second chip control function, so as to access the channel splitting status of the target bus of each bus device in the third integrated circuit chip on the current adapter card through any preset downstream channel and chip access function. It can be understood that, referring to Figure 2 As shown, if the channel switching result is that the chip channel of the PCA9641 chip is successfully switched to the side where the UEFI is located, the Pca9546Ctrl function (the second chip control function) is used to switch to the I2C0 channel extended from the PCA9546 chip (the second integrated circuit chip); finally, the ReadPca9555 (chip access function) function is used to continue to access the data of the IO pins in the downstream PCA9555 chip (the third integrated circuit chip). The different PCIe splitting situations are distinguished by the read data. It should be noted that the PCA9546 chip is a four-way bidirectional conversion switch controlled by the I2C bus, which is extended to four downstream pairs (or channels) through a set of clock line / data line upstream pairs for I2C expansion. The present invention extends 4 Channels (preset downstream channels). The active low reset (RESET) input enables the PCA9546 chip to recover from a prolonged low state on any downstream I2C bus. Pulling RESET low resets the I2C state machine and deselects all preset downstream channels. The same is true for the internal power-on reset function. In the case of insufficient CPU I2C resources, multiple I2C channels can be expanded and provided to UEFI and BMC for access respectively.

[0060] The third integrated circuit chip has 16 preset input / output pins; wherein the preset input / output pins are used to transmit the channel splitting status corresponding to each bus device to the unified extensible firmware interface. Specifically, the PCA9555 chip is a 16-bit GPIO expansion chip based on the I2C bus. The address of the device is determined by 3 hardware pins in the chip. It is connected to the Channel 0 channel in the PCA9546 chip, and the 16 GPIO pins extended from the chip transmit data to UEFI to distinguish the current usage of the PCIE device on the Riser card and the current split setting.

[0061] Step S13: writing the channel splitting situation into a preset firmware to complete the acquisition of the channel splitting mode of the target bus.

[0062] In this embodiment, the corresponding channel width parameters are set according to the target bus channel width information required by each bus device, and the parameter values ​​in each channel width parameter are written into the preset firmware through the firmware writing function to complete the acquisition of the channel splitting mode of the target bus. It can be understood that the BifMode parameter is set, and the current PCIE parameter BifMode value to be split corresponding to each PCIE device obtained from the I / O (Input / output) pin is written into the PBF firmware to complete the setting through the PssiPcieInit function to complete the setting. In this way, by setting the BifMode value, the system can reasonably allocate PCIe channel resources according to actual needs to adapt to different hardware device connection requirements, such as connecting multiple graphics cards, NVMe (Non-Volatile Memory Express, storage interface protocol), SSD (Solid State Drive, hard disk) and other PCIe devices.

[0063] The present invention clarifies the access logic of the PCA9555 chip, accesses the chip data layer by layer through the instructions under the I2C channel, and correctly sets the PCIE split mode through the hardware information fed back by the mainboard, thereby ensuring the normal use of the PCIE device and the reporting of the device information. In the chip access process, it is also necessary to consider the situation that multiple firmwares (UEFI, BMC) jointly access the chip data, and avoid the channel control right arbitration problem involved in the PCA9641 chip cutting the channel, so as to ensure the normal operation of the mainboard hardware. In this way, the present invention is another method for obtaining PCIE split information in addition to the existing method of obtaining PCIE splitting through the CPU directly outputting GPIO. As a crucial interface on the motherboard, the PCIE interface involves the use of a variety of commonly used devices such as the motherboard network card, GPU (Graphics Processing Unit), and Raid card (Redundant Array of Independent Disks Controller). If the correct information of the motherboard is obtained to split and set for specific configurations, it will affect the normal identification and use of these devices, and even cause disorder in the onboard device information transmitted to the system due to incorrect initialization, affecting the normal function of the onboard network port under the system, and producing a series of adverse effects. When the CPU platform GPIO pins are insufficient and the motherboard hardware is not reserved, the present invention can transmit the split information of PCIE according to the expansion chip.

[0064] It can be seen that the present invention discloses a method for obtaining a bus channel splitting mode, which is applied to a server, wherein the server includes a mainboard with an adapter card inserted in a physical slot of a target bus, and the adapter card is connected to a first integrated circuit chip, a second integrated circuit chip and a third integrated circuit chip in sequence through a preset communication bus. The method includes: when the server is powered on, the bus controller and the bus device corresponding to the target bus are initialized based on a unified extensible firmware interface, and the step of switching the chip channel of the first integrated circuit chip to the side where the unified extensible firmware interface is located through the bus controller is executed to obtain a corresponding channel switching result; if the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, then the chip channel is switched to a preset downstream channel extended by the second integrated circuit chip, so as to access the channel splitting status of each bus device in the third integrated circuit chip on the target bus on the current adapter card through the preset downstream channel; the channel splitting status is written into the preset firmware to complete the acquisition of the channel splitting mode of the target bus. It can be seen that by clarifying the access logic of the third integrated circuit chip, UEFI issues instructions to access chip data layer by layer, and correctly sets the PCIE split mode through the hardware information fed back by the motherboard, thereby ensuring the normal use of PCIE devices and the reporting of device information. In the chip access process, considering the situation that multiple firmwares access chip data together, reasonable switching is achieved, avoiding the channel control arbitration problem involved in the first integrated circuit chip cutting channel, thereby ensuring the normal operation of the motherboard hardware.

[0065] Figure 3 A bus channel splitting mode acquisition device provided in an embodiment of the present invention is applied to a server, wherein the server includes a mainboard with an adapter card inserted in a physical slot of a target bus, the adapter card is sequentially connected to a first integrated circuit chip, a second integrated circuit chip, and a third integrated circuit chip through a preset communication bus, and the device includes:

[0066] The channel switching module 11 is used for initializing the bus controller and bus device corresponding to the target bus based on the unified extensible firmware interface after the server is powered on, and executing the step of switching the chip channel of the first integrated circuit chip to the side where the unified extensible firmware interface is located through the bus controller to obtain a corresponding channel switching result;

[0067] The access module 12 is configured to switch the chip channel to a preset downstream channel extended by the second integrated circuit chip if the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, so as to access the channel splitting status of the target bus of each bus device in the third integrated circuit chip on the current adapter card through the preset downstream channel;

[0068] The result acquisition module 13 is used to write the channel splitting situation into a preset firmware to complete the acquisition of the channel splitting mode of the target bus.

[0069] in, Figure 3 The description of the features in the corresponding embodiments can be found in Figure 1 The relevant descriptions of the corresponding embodiments will not be repeated here one by one.

[0070] It can be seen that the present invention discloses that when the server is powered on, the bus controller and bus device corresponding to the target bus are initialized based on the unified extensible firmware interface, and the step of switching the chip channel of the first integrated circuit chip to the side where the unified extensible firmware interface is located through the bus controller is executed to obtain the corresponding channel switching result; if the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, the chip channel is switched to the preset downlink channel extended by the second integrated circuit chip, so as to access the channel splitting situation of each bus device in the third integrated circuit chip on the current adapter card through the preset downlink channel; the channel splitting situation is written into the preset firmware to complete the acquisition of the channel splitting method of the target bus. It can be seen that by clarifying the access logic of the third integrated circuit chip, UEFI sends instructions to access chip data layer by layer, and correctly sets the PCIE split mode through the hardware information fed back by the motherboard, thereby ensuring the normal use of the PCIE device, the reporting of device information, etc. During the chip access process, the situation where multiple firmwares access chip data together is taken into consideration, and reasonable switching is achieved to avoid the channel control arbitration problem involved when the first integrated circuit chip cuts the channel, thereby ensuring the normal operation of the motherboard hardware.

[0071] Figure 4 A structural diagram of an electronic device provided by an embodiment of the present invention, such as Figure 4 As shown, the electronic device includes: a memory 20 for storing a computer program;

[0072] The processor 21 is used to implement the steps of the bus channel splitting mode acquisition method in the above embodiment when executing the computer program.

[0073] The electronic device provided in this embodiment may include but is not limited to a smart phone, a tablet computer, a laptop computer or a desktop computer.

[0074] Among them, the processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 21 can be implemented in at least one hardware form of digital signal processing (DSP), field-programmable gate array (FPGA), and programmable logic array (PLA). The processor 21 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 21 may be integrated with a graphics processing unit (GPU), and the GPU is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 21 may also include an artificial intelligence (AI) processor, which is used to process computing operations related to machine learning.

[0075] The memory 20 may include one or more computer-readable storage media, which may be non-transitory. The memory 20 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 20 is at least used to store the following computer program 201, wherein, after the computer program is loaded and executed by the processor 21, the relevant steps of the bus channel splitting method acquisition method disclosed in any of the aforementioned embodiments can be implemented. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 202 may include Windows, Unix, Linux, etc. The data 203 may include but is not limited to data transmitted by an external device received by the electronic device, data collected by its own input and output interface 23, and the like.

[0076] In some embodiments, the electronic device may further include a display screen 22 , an input / output interface 23 , a communication interface 24 , a power source 25 , and a communication bus 26 .

[0077] It is understandable that if the bus channel splitting mode acquisition method in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention is essentially or the part that contributes to the current technology or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium to execute all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), electrically erasable programmable ROM, register, hard disk, removable disk, CD-ROM, magnetic disk or optical disk and other media that can store program codes.

[0078] Based on this, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the method for obtaining the bus channel splitting method as described above are implemented.

[0079] The above is a detailed introduction to the scheme provided by the embodiment of the present invention. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0080] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0081] The above is a detailed introduction to the scheme provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, the present invention can also be improved and modified in a number of ways, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A method for obtaining a bus channel splitting mode, characterized in that: Applied to a server, wherein the server includes a mainboard having an adapter card inserted into a physical slot of a target bus, the adapter card sequentially connecting a first integrated circuit chip, a second integrated circuit chip, and a third integrated circuit chip via a preset communication bus, the method comprising: When the server is powered on, the bus controller and bus device corresponding to the target bus are initialized based on the unified extensible firmware interface, and the chip channel of the first integrated circuit chip is switched to the side where the unified extensible firmware interface is located through the bus controller to obtain a corresponding channel switching result; If the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, the chip channel is switched to a preset downstream channel extended by the second integrated circuit chip, so as to access the channel splitting status of the target bus of each bus device in the third integrated circuit chip on the current adapter card through the preset downstream channel; The channel splitting situation is written into a preset firmware to complete the acquisition of the channel splitting mode of the target bus.

2. The bus channel splitting mode acquisition method according to claim 1, characterized in that: The step of switching the chip channel of the first integrated circuit chip to the side where the unified extensible firmware interface is located through the bus controller to obtain a corresponding channel switching result includes: Writing a target value representing a chip control signal to a register of the first integrated circuit chip through a first chip control function to obtain chip control rights of the first integrated circuit chip, so that the unified extensible firmware interface executes a step of switching a chip channel of the first integrated circuit chip to a side where the unified extensible firmware interface is located through the bus controller based on the chip control rights to obtain a corresponding channel switching result; Correspondingly, if the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, the chip channel is switched to a preset downstream channel extended by the second integrated circuit chip, so as to access the channel splitting status of the target bus of each bus device in the third integrated circuit chip on the current adapter card through the preset downstream channel, including: If the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, the chip channel is switched to any preset downstream channel of the preset number of preset downstream channels extended by the second integrated circuit chip through the preset communication bus through the second chip control function, so as to access the channel splitting status of the target bus of each bus device in the third integrated circuit chip on the current adapter card through any preset downstream channel and the chip access function.

3. The bus channel splitting mode acquisition method according to claim 2, characterized in that: After determining whether the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located to obtain the corresponding channel switching result under the current channel switching operation, it also includes: If the channel switching result is that the chip channel of the first integrated circuit chip is not successfully switched to the side where the unified extensible firmware interface is located, a current chip switching state corresponding to the current channel switching operation is marked by a state variable; When the state variable is 1, the channel splitting situation obtained from the preset manager when the server was started last time is written into the preset firmware to complete the acquisition of the channel splitting mode of the target bus; When the state variable is 0, the channel splitting status corresponding to each bus device in the third integrated circuit chip is sent to the unified extensible firmware interface through the preset manager, and the server is restarted.

4. The bus channel splitting mode acquisition method according to claim 3, characterized in that: The third integrated circuit chip has 16 preset input / output pins; wherein the preset input / output pins are used to transmit the channel splitting status corresponding to each of the bus devices to the unified extensible firmware interface.

5. The method for obtaining a bus channel splitting mode according to claim 3, characterized in that: When the state variable is 1, the channel splitting situation obtained from the preset manager when the server was started last time is written into the preset firmware to complete the acquisition of the channel splitting mode of the target bus, including: When the state variable is 1, it is determined that the current server startup is not the first server startup, and the current state variable is rewritten to 0. Then, the channel splitting situation obtained from the preset manager during the last server startup is written into the preset firmware through the firmware writing function to complete the acquisition of the channel splitting method of the target bus.

6. The bus channel splitting mode acquisition method according to claim 1, characterized in that: Also includes: When designing the physical slot of the target bus, the pins of a bus controller in the central processor are led out so that the total channel resources of the complete target bus can be obtained through the adapter card inserted in the physical slot of the target bus.

7. The method for obtaining a bus channel splitting mode according to any one of claims 1 to 6, characterized in that: The step of writing the channel splitting situation into a preset firmware to complete the acquisition of the channel splitting mode of the target bus includes: The corresponding channel width parameters are set according to the target bus channel width information required by each bus device, and the parameter values ​​in each channel width parameter are written into the preset firmware through a firmware writing function to complete the acquisition of the channel splitting method of the target bus.

8. A bus channel splitting mode acquisition device, characterized in that: Applied to a server, wherein the server includes a mainboard with an adapter card inserted into a physical slot of a target bus, the adapter card sequentially connecting a first integrated circuit chip, a second integrated circuit chip, and a third integrated circuit chip via a preset communication bus, the device comprising: a channel switching module, configured to initialize the bus controller and bus device corresponding to the target bus based on the unified extensible firmware interface after the server is powered on, and execute the step of switching the chip channel of the first integrated circuit chip to the side where the unified extensible firmware interface is located through the bus controller to obtain a corresponding channel switching result; an access module, configured to switch the chip channel to a preset downstream channel extended by the second integrated circuit chip if the channel switching result is that the chip channel of the first integrated circuit chip is successfully switched to the side where the unified extensible firmware interface is located, so as to access the channel splitting status of the target bus of each bus device in the third integrated circuit chip on the current adapter card through the preset downstream channel; The result acquisition module is used to write the channel splitting situation into a preset firmware to complete the acquisition of the channel splitting mode of the target bus.

9. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to execute the computer program to implement the steps of the method for obtaining the bus channel splitting mode as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method for obtaining the bus channel splitting mode according to any one of claims 1 to 7 are implemented.

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