Coordinate homogenization hardware construction method and system based on FPGA (Field Programmable Gate Array) and medium

Abstract

The invention discloses a coordinate homogenization hardware construction method and system based on an FPGA and a medium, the FPGA carries out coordinate homogenization processing on original image data after three-dimensional reconstruction through abscissa to obtain equidistant interpolation points, and the method comprises the following steps: adding type identification data of the interpolation points to corresponding ordinate interpolation data; storing the ordinate interpolation data containing the type identification data to the first FIFO; and vertical coordinate interpolation data corresponding to the effective point type identification data in the first FIFO are screened and stored in the second FIFO in sequence. Invalid points, valid points and abnormal filling points can be quickly analyzed and confirmed, resource waste is effectively avoided, and a large number of invalid points do not need to be output; according to the method, data of a plurality of interpolation points can be stored at the same time, pipeline operation is not affected, the parallel processing characteristic of the FPGA is effectively utilized, and the overall processing efficiency is improved.

Description

Technical Field

[0001] The present invention belongs to the field of machine vision, and in particular relates to a coordinate homogenization hardware construction method, system and medium based on FPGA. Background Art

[0002] In recent years, with the advancement of machine vision technology, cameras used for 3D reconstruction have been further optimized. For example, with the improvement of the centerline extraction algorithm, it can work effectively in a noisy environment while maintaining high accuracy, providing a reliable data basis for subsequent 3D reconstruction. However, after 3D reconstruction, the X and Z values ​​in the world coordinate system are output. At this time, the density of the X coordinate value is uneven. On the one hand, in order to reduce the data output bandwidth (only output Z), on the other hand, in order to be compatible with third-party software, it is necessary to construct non-uniformly spaced coordinate points into equally spaced coordinate points for output, and linear interpolation is generally used.

[0003] Chinese patent document CN118827820A discloses a point coordinate homogenization method, system and medium that can be used for FPGA implementation. The method includes: obtaining coordinate point data to be homogenized, setting a sampling point set uniformly distributed along the horizontal axis direction, so that the sampling point set corresponding to the horizontal axis area can cover the coordinate point data; collecting any two adjacent coordinate point data, calculating the number and position of the sampling points between the two adjacent coordinate points; calculating the slope of the straight line connecting the two adjacent coordinate points; counting the positions of each sampling point between the two adjacent coordinate points, and calculating the vertical coordinate interpolation of each sampling point between the two adjacent coordinate points as the output result of all sampling points. The patent interpolates and outputs the sampling points by constructing a horizontal axis area covering the coordinate point data, and the horizontal coordinates of the left and right boundaries of the sampling points are generally symmetrical relative to the origin. It can be seen that for scenes with a large number of invalid points, this method will cause a lot of resource waste. Secondly, for FPGA, if the multiple interpolation points obtained in each cycle are saved serially, it will disrupt the pipeline rhythm and affect the overall pipeline operation. Therefore, how to implement coordinate homogenization processing from the hardware level based on FPGA has become a technical problem that needs to be solved urgently.

[0004] Therefore, in order to solve the above problems, the present invention provides a coordinate homogenization hardware construction method, system and medium based on FPGA. Summary of the invention

[0005] The purpose of the present invention is to overcome the above problems existing in the prior art and provide a coordinate homogenization hardware construction method, system and medium based on FPGA.

[0006] In order to achieve the above technical objectives and the above technical effects, the present invention is implemented through the following technical solutions: A coordinate homogenization hardware construction method based on FPGA, wherein the FPGA processes the original image data after three-dimensional reconstruction by coordinate homogenization of the horizontal coordinate to obtain equidistant interpolation points, and the method comprises: Adding the type identification data of the interpolation point to the corresponding ordinate interpolation data, so as to facilitate identification of the type identification data during subsequent screening; storing the ordinate interpolation data including the type identification data into a first FIFO to synchronously and parallelly store the ordinate interpolation data; Filtering and sequentially storing the vertical coordinate interpolation data corresponding to the valid point type identification data in the first FIFO into the second FIFO, so as to continuously output as the final result; The valid points are interpolation points that meet the threshold requirement of the number of interpolation points between adjacent horizontal coordinates and are within the overlapping area between the coverage range of the original image data along the horizontal coordinate direction and the range of the equally spaced interpolation points.

[0007] Furthermore, the corresponding ordinate interpolation data is calculated through the abscissa rounding data corresponding to the abscissa data one by one, and the abscissa rounding data is obtained by rounding down the quotient of the abscissa data and the interpolation point spacing value.

[0008] Furthermore, the horizontal coordinate data is traversed and read and rounding deviation data is obtained at the same time, the rounding deviation data represents the deviation value between the horizontal coordinate data and the corresponding value of the horizontal coordinate rounding data, so as to calculate the vertical coordinate interpolation data corresponding to the interpolation point based on the rounding deviation data.

[0009] Furthermore, after obtaining the rounded deviation data, the corresponding abscissa data is discarded.

[0010] Furthermore, a threshold value of the number of interpolation points is preset, and the corresponding ordinate interpolation data exceeding the threshold value of the number of interpolation points is identified as an abnormal filling point.

[0011] Furthermore, the type identification data is determined in the following manner: determine the size relationship between the rounded horizontal coordinate data corresponding to the interpolation point and the left and right boundaries of the equally spaced interpolation point area, and record the interpolation points that are smaller than the left boundary of the equally spaced interpolation point area or larger than the right boundary of the equally spaced interpolation point area as invalid points; When the first horizontal coordinate rounding data is larger than the left boundary of the equally spaced interpolation point area, the interpolation point between the first horizontal coordinate rounding data and the left boundary of the equally spaced interpolation point area is marked as an abnormal filling point; When the last horizontal coordinate rounding data is greater than the left boundary of the equally spaced interpolation point area, the interpolation point between the last horizontal coordinate rounding data and the left boundary of the equally spaced interpolation point area is identified as an abnormal filling point.

[0012] Furthermore, the ordinate interpolation data corresponding to the invalid points and abnormal filling points are maximum values ​​or minimum values.

[0013] Furthermore, the type identification data represents three different high-bit information by adding two bits of data before the vertical coordinate interpolation data, thereby identifying the invalid point, valid point or abnormal filling point.

[0014] The present invention also provides a coordinate homogenization hardware construction system based on FPGA, comprising: An interpolation identification module, used to add the type identification data of the interpolation point to the corresponding ordinate interpolation data; A data storage module, used for storing the vertical coordinate interpolation data including the type identification data into a first FIFO; The data screening module screens and sequentially stores the vertical coordinate interpolation data corresponding to the valid point type identification data in the first FIFO into the second FIFO.

[0015] The present invention also provides a computer-readable storage medium, comprising a computer program, wherein the computer program implements the above-mentioned construction method when executed by a processor.

[0016] The beneficial effects of the present invention are: (1) The present invention can flexibly confirm the range of the equally spaced interpolation point area by presetting boundary parameters and spacing parameters, and can quickly analyze and confirm invalid points, valid points and abnormal filling points by comparing with the horizontal coordinate rounding data, thereby providing a basis for the subsequent screening of valid points, effectively avoiding resource waste, and eliminating the need to output a large number of invalid points; by introducing the horizontal coordinate rounding data, it can be synchronously obtained from the horizontal coordinate data read by traversal, and can also facilitate the subsequent rapid analysis and confirmation of invalid points, valid points and abnormal filling points, and quantify them in a coordinate manner under a new coordinate system, which is convenient for subsequent data output; by recording the type identification data of the interpolation point in the current cycle to the corresponding vertical coordinate interpolation data, all output data can be identified, which is convenient for rapid identification and classification during subsequent data analysis and reading, and related valid point output or discard operations; through the coordinated operation of the first FIFO and the second FIFO, multiple interpolation point data can be saved at the same time without affecting the pipeline operation, effectively utilizing the parallel processing characteristics of the FPGA and improving the overall processing efficiency.

[0017] (2) The present invention can obtain the rounding deviation data at the same time, so as to quickly obtain the valid data and provide the data basis for the synchronous calculation of the vertical coordinate interpolation data. It can also discard the corresponding horizontal coordinate data to provide redundant storage space for the limited storage resources and improve the resource utilization.

[0018] (3) The present invention can quickly analyze and process any situation in the current cycle through the type identification data judgment method, providing support for the efficient identification of invalid points, valid points and abnormal filling points.

[0019] (4) The present invention uses the ordinate interpolation data corresponding to the invalid points and abnormal filling points to be the maximum or minimum value, thereby avoiding unnecessary waste of computing resources and enabling efficient data output.

[0020] (5) The present invention adds two bits of data before the vertical coordinate interpolation data, and cooperates with the operation logic of FPGA to quickly record the type and perform efficient data storage based on binary, providing a basis for subsequent rapid data recognition. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings: Figure 1 is a flow chart of the construction method in the present invention; Figure 2 It is a schematic diagram of the homogenization principle in the present invention; Figure 3 It is a partial flow diagram of the construction method of the present invention; Figure 4 It is a partial flow diagram of the construction method of the present invention; Figure 5 It is a partial flow diagram of the construction method of the present invention; Figure 6 It is a structural block diagram of the construction system in the present invention. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] like Figure 1 As shown, this embodiment first provides a coordinate homogenization hardware construction method based on FPGA, including: The FPGA processes the original image data after three-dimensional reconstruction by homogenizing the coordinates of the horizontal axis to obtain equally spaced interpolation points.

[0024] The basic idea of ​​the coordinate homogenization algorithm is: given some scattered non-equally spaced coordinate points, how to construct equally spaced coordinate points. The traditional method is to set the total number of points to be constructed as n=2K (required to be an even number), assuming that the maximum and minimum values ​​of the X coordinates are maxX and minX. If maxX and minX are used as the construction area here, there will be a problem, that is, the two values ​​of the scan lines output before and after will change. The scan line is the scan data corresponding to the contour of the object to be measured obtained by coordinate homogenization processing of the point cloud data corresponding to the original image data after 3D reconstruction. The scan line constructed in this way cannot be aligned, which will cause the 3D point cloud to be misaligned. Therefore, the maximum and minimum values ​​of the scan line actually detected cannot be used as the construction area, but a fixed area must be used.

[0025] In this regard, this method does not require the total number of interpolation points n=2K after construction, breaking the restriction of an even number, nor does it have to make the horizontal coordinates corresponding to the left and right boundaries of the interpolation points symmetrical relative to the origin. Instead, K1 is flexibly set to limit the left boundary of the equally spaced interpolation point area, and K2 is set to limit the right boundary of the equally spaced interpolation point area, where K1 and K2 are both integers, that is, there are K1 points located on the left side of the origin (negative semi-axis), K2-1 points located on the right side of the origin (positive semi-axis), and one point located on the origin, and the spacing between the defined points is u.

[0026] As a specific implementation of the present invention, the corresponding ordinate interpolation data is calculated by the abscissa rounding data U(i) corresponding to the abscissa data X(i), and the abscissa rounding data U(i) is obtained by rounding down the quotient of the abscissa data X(i) and the interpolation point spacing value u, as follows: Calculate the coordinate value of the original X coordinate in the new preset coordinate system U (in units of spacing u) , Indicates rounding down.

[0027] At this time, the effective range of U is U(i)∈[-K1,K2-1], and the corresponding equally spaced interpolation point area is [-u•K1, u•(K2-1)], which is more flexible. Points outside the range of [-K1,K2-1] are considered invalid original points. If two consecutive points, namely U(i) and U(i+1), are both outside the range, that is, U(i) and U(i+1) do not belong to [-K1,K2-1], it means that there is no new valid point between the two points, and no interpolation operation is required.

[0028] From the above, it can be seen that the output result is the horizontal coordinate rounding data U(i), that is, each horizontal coordinate data X(i) has its horizontal coordinate rounding data U(i), and is stored in the RAM.

[0029] This step can be completed when X(i) is output, so that the lower-level module can simultaneously obtain three arrays of original ordinate data Z(i), abscissa data X(i) and abscissa rounding data U(i), which is convenient for subsequent homogenization operations.

[0030] By traversing the above three arrays at the same time, each time reading the Z(i), X(i) and U(i) elements at the same position, let C(i) = U(i) - U(i-1), then C(i) represents the number of points that need to be interpolated between the two original points X(i-1) and X(i), and make the following judgment: If C(i)=0, there is no valid point, and the next element is read. This situation corresponds to two consecutive original points that are very close to each other and there is no interpolation point between them (such as Figure 2 Two points at the position X(j) in the matrix, the two points have the same U value).

[0031] If C(i)>0, it means that there are C(i) points that need to be interpolated between the two original points X(i-1) and X(i). In this case, the interpolation operation is performed according to the following steps, using the linear interpolation method: Calculate the slope A i =(Z i -Z i-1 ) / (X i -X i-1 ); Calculate the vertical coordinate interpolation data ZU(1) of the first interpolation point: ZU(1)=Z(i-1)+Ai•[U(i-1)•u+1•uX(i-1)]=Z(i-1)+Ai•{1•u-[X(i-1)-U(i-1)•u]}, It can be seen that X(i-1)-U(i-1)•u is the previously calculated The deviation of the rounded result from the original value.

[0032] Let R(i)=X(i)-U(i)•u. It can be considered to save R(i) while saving U(i). As a specific implementation of the present invention, when traversing and reading the horizontal coordinate data X(i), the rounding deviation data R(i) is obtained at the same time. The rounding deviation data R(i) represents the deviation value between the horizontal coordinate data X(i) and the corresponding value U(i)•u of the horizontal coordinate rounding data. Therefore, the vertical coordinate interpolation data corresponding to the interpolation point is calculated based on the rounding deviation data, thus: ZU(1)=Z(i-1)+Ai•{1•uR(i-1)}, Among them, Z(i-1), u, R(i-1) are all known in advance, and the only thing that needs to be calculated in real time is the slope A i .

[0033] In addition, it can be seen from the calculation formula ZU(1) that the calculation of multiple interpolation points can be completed in parallel, that is, ZU(s)= Z(i-1)+A i •{s•uR(i-1)}, where s=1,2… C(i). The maximum number of interpolation points between two original points can be agreed to be s.

[0034] There are 5 arrays X, Z, U, A, R. X and A are signed numbers, Z, U, R are positive numbers. From the calculation formula of ZU(s), ZU(s)=Z(i-1)+A i •{s•uR(i-1)}, you can directly use signed number operations to avoid consuming more resources (one more adder) in unsigned operations.

[0035] At the same time, as a specific implementation of the present invention, after obtaining the rounding deviation data R(i), the corresponding horizontal coordinate data X(i) can be discarded to solve the storage resource problem. As can be seen from the above, there is no X array parameter in the ZU(s) calculation formula, so the X array can be not saved and discarded after calculating the U, R, A arrays to save RAM resources.

[0036] Add the type identification data of the interpolation point to the corresponding ordinate interpolation data for subsequent screening to identify the type identification data, that is, according to the arbitration logic preset by the FPGA, the ordinate interpolation data of the interpolation point is finally output as the encoded T(s), such as Figure 3-5 As shown, the specific arbitration logic is as follows: From the above, it can be seen that the maximum number of interpolation points between two original points can be agreed to be s, that is, the preset interpolation point number threshold is s, and the corresponding ordinate interpolation data that exceeds the valid interpolation point number threshold in the current cycle is recorded as abnormal filling points. The cycle represents the time period of the current FPGA data processing, that is, when C(i)>s, the first s valid interpolation points are saved, and the s+1th to C(i)th points are determined as abnormal filling points and stored in a specific storage format to facilitate subsequent analysis and expansion into C(i)-s abnormal points, which are equivalent to the areas where the scan lines are disconnected.

[0037] As a specific implementation of the present invention, the type identification data judgment method is as follows: determine the size relationship between the horizontal coordinate rounding data corresponding to the interpolation point in the current period and the left and right boundaries of the equally spaced interpolation point area, and record the interpolation points that are smaller than the left boundary of the equally spaced interpolation point area or larger than the right boundary of the equally spaced interpolation point area as invalid points; when the first horizontal coordinate rounding data is larger than the left boundary of the equally spaced interpolation point area, identify the interpolation point between the first horizontal coordinate rounding data and the left boundary of the equally spaced interpolation point area as an abnormal filling point; when the last horizontal coordinate rounding data is larger than the left boundary of the equally spaced interpolation point area, identify the interpolation point between the last horizontal coordinate rounding data and the left boundary of the equally spaced interpolation point area as an abnormal filling point. Specifically as follows: When U(i) < -K1, it means that there is no valid point to output in the current cycle.

[0038] When U(i - 1) < -K1 and U(i) ≥ -K1, the number of valid points to be output is U(i) + K1 + 1. In principle, points need to be taken by moving to the left from the U(i) position at this time. For the sake of simplifying the logic, points can be taken by moving to the right from the U(i - 1) position.

[0039] When U(i - 1) ≥ -K1, U(i) ≥ -K1 and i = 1, it is necessary to fill and output U(i - 1) + K1 + 1 abnormal filling points; the number of valid points is C(i) = U(i) - U(i - 1), and the total number of points is U(i - 1) + K1 + 1 + C(i).

[0040] When processing the last element U(i), if there is still U(i) < K2 - 1, the remaining number of abnormal filling points is K2 - 1 - U(i), and abnormal point filling and output are performed.

[0041] When U(i) ≥ K2 - 1 and U(i - 1) < K2 - 1, the remaining number of valid points is C(i) = K2 - 1 - U(i - 1), and it is processed in the manner in 1.

[0042] When U(i) ≥ K2 - 1 and U(i - 1) ≥ K2 - 1, the interpolation operation can be terminated in advance as all points within the valid region have been interpolated.

[0043] For the specific method of the above arbitration logic, it can also be analyzed in combination with the first abscissa rounded data U(0), specifically including the following two cases: Case 1: U(0) < -K1 If the second point has the same result as the first point, that is, U(1) < -K1, and this remains the case until the i-th point, that is, U(i) < -K1, then no points are output; If U(1) ≥ -K1, the number of points to be output at this time is the points from the -K1 coordinate to the U(1) coordinate, that is, U(1) - (-K1) + 1 = U(1) + K1 + 1. For example, if U(1) = -K1, then 1 point is output; if U(1) = -K1 + 1, then 2 points are output; Thus, when U(i - 1) < -K1 and U(i) ≥ -K1, the number of points to be output is U(i) + K1 + 1.

[0044] Case 2: U(0) ≥ -K1 Then the second point U(1) also satisfies U(1) ≥ -K1. Corresponding to U(i - 1) ≥ -K1, U(i) ≥ -K1 and i = 1, at this time, the points lost before U(0) need to be supplemented; starting from the third point, the size judgment and processing of C(i) and s can be fully entered.

[0045] As a specific implementation of the present invention, the vertical coordinate interpolation data corresponding to the invalid points and abnormal filling points can be directly assigned as maximum values ​​or minimum values, and the corresponding ZU(s) can be quickly obtained and output without interpolation calculation.

[0046] As a specific implementation of the present invention, the above-mentioned specific storage format is specifically implemented as follows: the type identification data is identified as an invalid point, a valid point, or an abnormal filling point by adding two bits of data before the vertical coordinate interpolation data to represent three different high-bit information. In this regard, for invalid points, valid points, and abnormal filling points, 2 bits of high-bit information can be added to the corresponding ZU(s) to become T(s). T(s) outputs not only the coordinates of a single point, but a predefined special encoding method (SP). For the added 2 bits of high-bit information, the encoding method can be designed as follows: 00: Indicates invalid points and needs to be discarded; 01: indicates a single valid point, which needs to be saved and output; 10: Indicates abnormal filling points. When indicating invalid filling point information, the data portion is the number of invalid filling points.

[0047] All T(s) data are expanded by the subsequent parsing module, and invalid ZU(s) point information is also discarded by the subsequent parsing module.

[0048] The vertical coordinate interpolation data including the type identification data is stored in a first FIFO to synchronously and parallelly store the vertical coordinate interpolation data; then the vertical coordinate interpolation data corresponding to the valid point type identification data in the first FIFO is screened and sequentially stored in a second FIFO; wherein the valid point is an interpolation point that meets the threshold requirement of the number of interpolation points between adjacent horizontal coordinates within the overlapping area of ​​the coverage range of the original image data along the horizontal coordinate direction and the range of the equally spaced interpolation points.

[0049] In the above, whether A i Whether it is R(i), it can be completed synchronously when outputting X(i) and Z(i), that is, outputting a total of 5 arrays of X, Z, U, A, and R to the lower-level module, reading these 5 data at the same time when constructing the homogenized coordinates, and synchronously calculating up to s ZU(s) values.

[0050] The problem is when C(i)>1, how to save C(i) ZU(s) values ​​at the same time. If they are saved serially, the pipeline rhythm will be disrupted. Therefore, multiple ZU(s) values ​​must be saved in a single cycle. They can be converted through FIFOs of different bit widths, that is, using a FIFO that inputs multiple ZU(s) values ​​and outputs 1 ZU(s) value. The FIFO depth and read and write clock frequency must be ensured that the FIFO does not overflow, and the serial output of the ZU(s) value is completed at the read end.

[0051] FIFO is a buffer that follows the first-in-first-out principle. In digital systems, FIFO is often used to transfer data between different clock domains, match the bit width of data interfaces, cache continuous data streams, etc. to prevent data loss or reduce the burden on the CPU. FIFO is usually managed by read and write pointers, which automatically increase by 1 to track the write and read locations of data.

[0052] Because the original X and Z arrays are continuously input in units of rows, after calculation, a total of 5 arrays X, Z, U, A, and R (there can be multiple clock delays between them) can be output in parallel and synchronously. After considering the maximum delay N between them, the reading and uniform construction work can be started after writing N cycles. Since all ZU(s) are increased by 2 bits of high-order information to become T(s), several T(s) values ​​are output in parallel in each cycle and written into FIFO1 (with different bit widths). The reading end, i.e., the parsing module, determines the legality of the T(s) value and outputs the ZU(s) value corresponding to the valid point (a maximum of s and a minimum of 0 per cycle) to FIFO2 (cache for continuous output). By reading FIFO2 according to the specified reading length, the final output of the uniform ZU(s) value can be completed.

[0053] like Figure 6 As shown, the second aspect of the present invention further provides a coordinate homogenization hardware construction system based on FPGA, comprising: An interpolation identification module, used to add the type identification data of the interpolation point to the corresponding ordinate interpolation data; A data storage module, used for storing the vertical coordinate interpolation data including the type identification data into a first FIFO; The data screening module screens and sequentially stores the vertical coordinate interpolation data corresponding to the valid point type identification data in the first FIFO into the second FIFO.

[0054] The specific operation methods of the interpolation identification module, the data storage module, the data screening module and the storage analysis module can refer to the above-mentioned construction method for operation.

[0055] The third aspect of the present invention further provides a computer-readable storage medium, comprising a computer program, wherein the computer program implements the above-mentioned construction method when executed by a processor.

[0056] In practical applications, the computer-readable storage medium may adopt any combination of one or more computer-readable media. The computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium may be, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, device or device.

[0057] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, which carry computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device.

Claims

1. A method for constructing coordinate homogenization hardware based on FPGA, wherein the FPGA processes the coordinate homogenization of the horizontal coordinate of the original image data after three-dimensional reconstruction to obtain equally spaced interpolation points, characterized in that: The method comprises: Adding the type identification data of the interpolation point to the corresponding ordinate interpolation data, so as to facilitate identification of the type identification data during subsequent screening; storing the ordinate interpolation data including the type identification data into a first FIFO to synchronously and parallelly store the ordinate interpolation data; Filtering and sequentially storing the vertical coordinate interpolation data corresponding to the valid point type identification data in the first FIFO into the second FIFO, so as to continuously output as the final result; The valid points are interpolation points that meet the threshold requirement of the number of interpolation points between adjacent horizontal coordinates and are within the overlapping area between the coverage range of the original image data along the horizontal coordinate direction and the range of the equally spaced interpolation points.

2. The FPGA-based coordinate homogenization hardware construction method according to claim 1, characterized in that: The corresponding ordinate interpolation data is calculated by using the abscissa rounding data corresponding to the abscissa data one by one, and the abscissa rounding data is obtained by taking the quotient of the abscissa data and the interpolation point spacing value and then rounding down.

3. The FPGA-based coordinate homogenization hardware construction method according to claim 2, characterized in that: The horizontal coordinate data is traversed and read and rounding deviation data is obtained at the same time, the rounding deviation data represents the deviation value between the horizontal coordinate data and the corresponding value of the horizontal coordinate rounding data, so as to calculate the vertical coordinate interpolation data corresponding to the interpolation point based on the rounding deviation data.

4. The FPGA-based coordinate homogenization hardware construction method according to claim 3, characterized in that: After obtaining the rounded deviation data, the corresponding horizontal coordinate data is discarded.

5. The method for constructing coordinate homogenization hardware based on FPGA according to any one of claims 1 to 4, characterized in that: A threshold value of the number of interpolation points is preset, and the corresponding ordinate interpolation data exceeding the threshold value of the number of interpolation points is identified as an abnormal filling point.

6. The FPGA-based coordinate homogenization hardware construction method according to claim 4, characterized in that: The type identification data is determined in the following manner: determine the size relationship between the abscissa rounding data corresponding to the interpolation point and the left and right boundaries of the equally spaced interpolation point area, and record the interpolation points that are smaller than the left boundary of the equally spaced interpolation point area or larger than the right boundary of the equally spaced interpolation point area as invalid points; When the first horizontal coordinate rounding data is larger than the left boundary of the equally spaced interpolation point area, the interpolation point between the first horizontal coordinate rounding data and the left boundary of the equally spaced interpolation point area is marked as an abnormal filling point; When the last horizontal coordinate rounding data is greater than the left boundary of the equally spaced interpolation point area, the interpolation point between the last horizontal coordinate rounding data and the left boundary of the equally spaced interpolation point area is identified as an abnormal filling point.

7. The FPGA-based coordinate homogenization hardware construction method according to claim 6, characterized in that: The vertical coordinate interpolation data corresponding to the invalid points and abnormal filling points are maximum or minimum values.

8. The FPGA-based coordinate homogenization hardware construction method according to claim 6, characterized in that: The type identification data represents three different high-bit information by adding two bits of data before the vertical coordinate interpolation data, thereby identifying an invalid point, a valid point, or an abnormal filling point.

9. A coordinate homogenization hardware construction system based on FPGA, characterized in that: include: An interpolation identification module, used to add the type identification data of the interpolation point to the corresponding ordinate interpolation data; A data storage module, used for storing the vertical coordinate interpolation data including the type identification data into a first FIFO; The data screening module screens and sequentially stores the vertical coordinate interpolation data corresponding to the valid point type identification data in the first FIFO into the second FIFO.

10. A computer-readable storage medium comprising a computer program, characterized in that: When the computer program is executed by a processor, the construction method according to any one of claims 1 to 8 is implemented.

Images