Multi-input BUCK circuit, charging circuit, chip and electronic equipment
By using the common source back-to-back NMOS tube and upper switch tube driving circuit with common source in the multi-input BUCK circuit, flexible input source selection and system efficiency are achieved, and the problems of inflexible input source selection and low system efficiency in the prior art are solved.
Patent Information
- Application Number
- CN202411953851.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-27
- Publication Date
- 2025-04-11
AI Technical Summary
The existing multi-input BUCK circuit cannot achieve flexible power-geting logic when selecting an input source, and the system efficiency is low due to the large forward conduction voltage drop of the diode.
Multiple power supply circuits, conversion circuits and driving circuits are adopted to use back-to-back NMOS tubes of the common source as isolation tubes, and control of the power supply circuits based on the upper switch tube driving circuits and multiple isolation tube driving circuits, flexible input source selection is realized, and the number of NMOS tubes is reduced to improve system efficiency.
The function of flexibly selecting input sources from multiple input sources is realized, which improves the efficiency of the system, reduces the number of NMOS tubes, and reduces heat generation and power consumption.
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Figure CN119813777A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of integrated circuits, and in particular to a multi-input BUCK circuit, a charging circuit, a chip and an electronic device. Background Art
[0002] In traditional applications such as power banks and energy storage devices, a low-dropout regulator (LDO) with multiple input sources is required to generate a power rail to provide power to the microcontroller unit (MCU). Normally, the voltage of the power rail is 3.3V. The input source of the low-dropout regulator can be an adapter or battery with a type-C interface, and it is necessary to ensure that the MCU can work normally when the adapter or battery has power. The multiple input sources can be multiple adapters with type-C interfaces, multiple batteries, or multiple adapters with type-C interfaces and multiple batteries.
[0003] However, in some high-power applications, the battery is usually 4 or more lithium batteries in series, where the voltage of each lithium battery string can be 4.2V, and the voltage of the adapter may be as high as 28V. When the battery or adapter is used as the input source of the low-dropout regulator, the voltage drop of the low-dropout regulator will be very large, and the corresponding power consumption will also be very large. Based on this, a BUCK (step-down) circuit is needed to replace the low-dropout regulator. Figure 1 , Figure 1 A BUCK circuit is provided for related technologies, such as Figure 1 As shown, the circuit reuses the logic of the low-dropout regulator and uses diodes as the logic for obtaining high voltages among multiple input sources, that is, the input source with the higher voltage is selected as the input voltage of the BUCK circuit according to which of the multiple input sources has the higher voltage. Figure 1 An example of using two adapters with type-C interfaces as input sources is shown in FIG.
[0004] See also Figure 1 The solutions provided in the related art have two problems. First, the use of diodes in multiple input sources can only be used for high voltage logic, and flexible power supply logic cannot be achieved, and it cannot meet the need to select a lower voltage input source as the input voltage of the BUCK circuit. Second, the use of diodes in multiple input sources will make the efficiency of the entire system relatively low due to the large forward conduction voltage drop of the diode. In the case of large current, the heat generated by the diode will also be very large. Summary of the invention
[0005] The present application provides a multi-input BUCK circuit, a charging circuit, a chip and an electronic device to realize flexible power supply logic and improve efficiency. The specific technical solution is as follows:
[0006] In a first aspect, the present application provides a multi-input BUCK circuit, the multi-input BUCK circuit comprising: a plurality of power supply circuits, a conversion circuit and a drive circuit; the power supply circuit comprises an isolation tube and an input power supply terminal, the drive circuit comprises an upper switch tube drive circuit and a plurality of isolation tube drive circuits, the isolation tube drive circuit corresponds to the power supply circuit one by one, the conversion circuit and the isolation tube constitute a BUCK circuit, wherein the isolation tube is a back-to-back NMOS tube with a common source;
[0007] The output end of each power supply circuit is electrically connected to the input end of the conversion circuit; the input end of each isolation tube driving circuit is electrically connected to the output end of the upper switch tube driving circuit, and the output end of each isolation tube driving circuit is electrically connected to the control end of the corresponding power supply circuit;
[0008] The input power supply terminal is used to access the power supply voltage;
[0009] The isolation tube is used to isolate the power supply voltage connected to each power supply circuit;
[0010] The upper switch tube driving circuit is used to output a first driving signal according to a first logic signal, and transmit the first driving signal to the isolation tube driving circuit;
[0011] The isolation tube driving circuit is used to transmit the first driving signal to the corresponding power supply circuit based on the system selection signal;
[0012] The power supply circuit is used to transmit the power supply voltage to the BUCK circuit according to the first driving signal;
[0013] The BUCK circuit is used to perform voltage conversion on the power supply voltage to obtain an output voltage.
[0014] In a possible design, each of the power supply circuits further includes: a first capacitor;
[0015] The first end of the first capacitor is electrically connected to the input power supply end and the first end of the isolation tube respectively, and the second end of the first capacitor is grounded;
[0016] The second end of the isolation tube is electrically connected to the output end of the power supply circuit, and the grid of the isolation tube is electrically connected to the control end of the power supply circuit.
[0017] In a possible design, the conversion circuit includes: a second capacitor, a third capacitor, a lower switch tube, an inductor, and a resistor;
[0018] The first end of the second capacitor is electrically connected to the input end of the conversion circuit, the first end of the lower switch tube, and the first end of the inductor respectively;
[0019] The control end of the lower switch tube is electrically connected to the control end of the conversion circuit;
[0020] The second end of the inductor is electrically connected to the first end of the third capacitor, the first end of the resistor, and the output end of the BUCK circuit respectively;
[0021] The second end of the second capacitor, the second end of the lower switch tube, the second end of the third capacitor and the second end of the resistor are all grounded.
[0022] In a possible design, the upper switch tube driving circuit includes: a first driver, a bootstrap capacitor terminal, a switch node terminal, and an upper switch tube logic signal terminal;
[0023] The input end of the first driver is electrically connected to the logic signal end of the upper switch tube, and is used to receive the first logic signal;
[0024] A first terminal of the first driver is electrically connected to the bootstrap capacitor terminal, and a second terminal of the first driver is electrically connected to the switch node terminal;
[0025] The output end of the first driver is electrically connected to the output end of the upper switch tube driving circuit.
[0026] In a possible design, the isolation tube driving circuit includes: a first switch tube and a second switch tube;
[0027] The second end of the first switch tube is electrically connected to the input end of the isolation tube driving circuit, and the first end of the first switch tube is electrically connected to the first end of the second switch tube and the output end of the isolation tube driving circuit respectively;
[0028] The control end of the first switch tube is electrically connected to the control end of the second switch tube for receiving the system selection signal, and the second end of the second switch tube is grounded.
[0029] In a possible design, the driving circuit further includes: a lower switch tube driving circuit;
[0030] The lower switch tube driving circuit is used to output a second driving signal according to a second logic signal, and transmit the second driving signal to the BUCK circuit.
[0031] In a possible design, the lower switch tube driving circuit includes: a second driver and a lower switch tube logic signal terminal;
[0032] The first end of the second driver is used to access the power supply voltage, the second end of the second driver is grounded, and the input end of the second driver is electrically connected to the logic signal end of the lower switch tube for accessing the second logic signal;
[0033] The output end of the second driver is electrically connected to the output end of the lower switch tube driving circuit.
[0034] In a second aspect, the present application provides a charging circuit, the charging circuit comprising: the multi-input BUCK circuit as described in the first aspect, further comprising: a bootstrap capacitor and a diode;
[0035] The anode of the diode is used to access the power supply voltage, and the cathode of the diode is electrically connected to the first end of the bootstrap capacitor and the bootstrap capacitor end respectively;
[0036] The second terminal of the bootstrap capacitor is electrically connected to the switch node terminal.
[0037] In a third aspect, the present application provides a chip, comprising: a multi-input BUCK circuit as described in the first aspect above.
[0038] In a fourth aspect, the present application provides an electronic device, comprising: a chip as described in the third aspect above.
[0039] Beneficial effects of the embodiments of the present application:
[0040] In the embodiment of the present application, by using back-to-back NMOS tubes with a common source as isolation tubes in each power supply circuit, and based on the control of the power supply circuit by the upper switch tube driving circuit and multiple isolation tube driving circuits, one of the power supply circuits can be selected to power the BUCK circuit, that is, one of the input sources can be selected from multiple input sources to power the BUCK circuit, thereby realizing flexible power supply logic; on this basis, by multiplexing the back-to-back NMOS tubes with a common source with the upper switch tube of the BUCK circuit, the number of NMOS tubes is reduced, and the NMOS tube has a smaller on-impedance than the PMOS tube, thereby improving the efficiency of the system.
[0041] The beneficial effects provided in the above-mentioned second aspect and various possible designs of the above-mentioned second aspect can refer to the beneficial effects brought about by the above-mentioned first aspect and various possible implementation methods of the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0042] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other embodiments can also be obtained based on these drawings.
[0043] Figure 1 A BUCK circuit is provided for related technology;
[0044] Figure 2 Another BUCK circuit provided for related art;
[0045] Figure 3 A schematic diagram of a multi-input BUCK circuit structure provided in an embodiment of the present application;
[0046] Figure 4 A multi-input BUCK circuit diagram provided in an embodiment of the present application. DETAILED DESCRIPTION
[0047] In this application, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c alone can represent: a, b, c, a and b, a and c, or a, b, and c, where a, b, and c can be single or multiple. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.
[0048] The directions or positional relationships indicated by terms such as "center", "longitudinal", "lateral", "up", "down", "left", "right", "front", and "back" are based on the directions or positional relationships shown in the accompanying drawings and are only for the convenience of describing the present application and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present application.
[0049] The terms "connected" and "connected" should be understood in a broad sense. For example, the "connected" or "connected" of a circuit structure can refer to not only physical connection, but also electrical connection or signal connection. For example, it can be directly connected, that is, physically connected, or indirectly connected through at least one intermediate element, as long as the circuit is connected, or it can be the internal connection of two elements; signal connection can refer to signal connection through a circuit or through a media medium, such as radio waves. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0050] To implement flexible power-off logic, see Figure 2 , Figure 2 Another BUCK circuit provided in the related art, such as Figure 2 As shown, the scheme is to Figure 1 The diodes in the circuit are replaced with back-to-back PMOS tubes with a common source. This solution can select a lower voltage input source as the input voltage of the BUCK circuit to achieve flexible power supply. However, due to the large size of the PMOS tube, the drain-source on-resistance per unit area (i.e., Rds) is also large, making the efficiency of the entire system relatively low.
[0051] In order to solve the problems in the related art that flexible power supply logic cannot be implemented, the situation where a lower voltage input source needs to be selected as the input voltage of the BUCK circuit cannot be met, and the efficiency of the system is relatively low.
[0052] To this end, the embodiments of the present application provide a multi-input BUCK circuit, a charging circuit, a chip, and an electronic device to implement flexible power supply logic and improve efficiency.
[0053] The multi-input BUCK circuit may be a chip or a circuit module.
[0054] The charging circuit may be a circuit module.
[0055] The chip may include a multi-input BUCK circuit.
[0056] In this application, electronic devices may include, but are not limited to: adapters, chargers, tablet computers, smart home devices, vehicles, and wearable devices.
[0057] See also Figure 3 , Figure 3 A schematic diagram of a multi-input BUCK circuit structure provided in an embodiment of the present application is shown in FIG. Figure 3As shown, the multi-input BUCK circuit 1000 includes: multiple power supply circuits 100, a conversion circuit 200 and a drive circuit 300; the power supply circuit 100 includes an isolation transistor and an input power supply terminal IN, the drive circuit 300 includes an upper switch transistor drive circuit 301 and multiple isolation transistor drive circuits 302, the isolation transistor drive circuit 302 corresponds to the power supply circuit 100 one by one, the conversion circuit 200 and the isolation transistor constitute a BUCK circuit, wherein the isolation transistor is a back-to-back NMOS transistor with a common source.
[0058] The output end of each power supply circuit 100 is electrically connected to the input end of the conversion circuit 200; the input end of each isolation tube driving circuit 302 is electrically connected to the output end of the upper switch tube driving circuit 301, and the output end of each isolation tube driving circuit 302 is electrically connected to the control end of the corresponding power supply circuit 100.
[0059] The input power terminal IN is used to access the power supply voltage.
[0060] Isolation tubes are used to isolate the power supply voltages connected to each power supply circuit.
[0061] The upper switch tube driving circuit 301 is used for outputting a first driving signal according to a first logic signal HS_ON, and transmitting the first driving signal to the isolation tube driving circuit 302 .
[0062] The isolation transistor driving circuit 302 is used to transmit the first driving signal to the corresponding power supply circuit 100 based on the system selection signal.
[0063] The power supply circuit 100 is used to transmit the power supply voltage to the BUCK circuit according to the first driving signal.
[0064] The BUCK circuit is used to perform voltage conversion on the power supply voltage to obtain an output voltage VOUT.
[0065] The multi-input BUCK circuit in the present application includes multiple power supply circuits, and the input power supply terminal of each power supply circuit is used to access the power supply voltage. Each input power supply terminal IN can access the power supply voltage output by an adapter with a type-C interface, or can access the power supply voltage output by multiple batteries. The multiple input sources formed by the multiple power supply circuits can be multiple adapters with type-C interfaces, or multiple batteries, or multiple adapters with type-C interfaces and multiple batteries. The present application does not specifically limit the type of input source connected to each power supply circuit and the number of input sources.
[0066] Each power supply circuit includes an isolation tube, which is a back-to-back NMOS tube with a common source. Based on the existence of the internal body diode of the back-to-back NMOS tube with a common source, when the output ends of multiple power supply circuits are connected together, the power supply circuits are not affected by the power supply circuit corresponding to the high power supply voltage among them. The isolation tube is used to isolate the power supply voltage connected to each power supply circuit.
[0067] The upper switch tube driving circuit is used to output a first driving signal according to the first logic signal HS_ON, and the first driving signal can be transmitted to each isolation tube driving circuit based on the input end of each isolation tube driving circuit being electrically connected to the output end of the upper switch tube driving circuit. The driving circuit in the present application includes a plurality of isolation tube driving circuits, each isolation tube driving circuit corresponds to a power supply circuit, for example, isolation tube driving circuit 1 corresponds to power supply circuit 1, isolation tube driving circuit 2 corresponds to power supply circuit 2, and so on, isolation tube driving circuit n corresponds to power supply circuit n.
[0068] Each isolation transistor driving circuit transmits a first driving signal to a corresponding power supply circuit based on a system selection signal (i.e., VC1_ON, VC2_ON, ... VCn_ON). For example, isolation transistor driving circuit 1 transmits a first driving signal to power supply circuit 1 based on VC1_ON, isolation transistor driving circuit 2 transmits a first driving signal to power supply circuit 2 based on VC2_ON, and so on, isolation transistor driving circuit n transmits a first driving signal to power supply circuit n based on VCn_ON.
[0069] The power supply circuit can transmit the power supply voltage to the BUCK circuit according to the first driving signal. For multiple power supply circuits, one of the power supply circuits is selected according to the first driving signal to transmit the power supply voltage corresponding to the power supply circuit to the BUCK circuit.
[0070] Normally, the BUCK circuit periodically controls the upper and lower switches to turn on or off through different duty cycles to achieve voltage conversion. Figure 2 If the back-to-back PMOS tubes with a common source are directly replaced with back-to-back NMOS tubes with a common source, not only an additional charge pump driving circuit is required to drive the back-to-back NMOS tubes with a common source, but also Figure 2 The switch tube GH_1 in the embodiment also needs to be driven by a bootstrap driving circuit. In this application, see Figure 3 Since the isolation tube is a back-to-back NMOS tube with a common source, the conversion circuit 200 and the isolation tube form a BUCK circuit, and the back-to-back NMOS tube with a common source can be reused as an upper switch tube in the BUCK circuit. In this way, the upper switch tube can be omitted in the conversion circuit 200, and the conversion circuit 200 and the isolation tube form a BUCK circuit to convert the power supply voltage to obtain the output voltage VOUT.
[0071] In addition, in the present application, the driving method for the back-to-back NMOS tubes with a common source is to use multiple isolation tube driving circuits to share one upper switch tube driving circuit. There is no need to add an additional charging pump driving circuit to drive the back-to-back NMOS tubes with a common source, making the driving circuit simpler.
[0072] In the embodiment of the present application, by using back-to-back NMOS tubes with a common source as isolation tubes in each power supply circuit, and based on the control of the power supply circuit by the upper switch tube driving circuit and multiple isolation tube driving circuits, one of the power supply circuits can be selected to power the BUCK circuit, that is, one of the input sources can be selected from multiple input sources to power the BUCK circuit, thereby realizing flexible power supply logic; on this basis, by multiplexing the back-to-back NMOS tubes with a common source with the upper switch tube of the BUCK circuit, the number of NMOS tubes is reduced, and the NMOS tube has a smaller on-impedance than the PMOS tube, thereby improving the efficiency of the system.
[0073] In one possible embodiment, see Figure 4 , Figure 4 A multi-input BUCK circuit diagram provided in an embodiment of the present application. It should be noted that, in order to facilitate the introduction of the solution of the present application, Figure 4 In the example, two input sources are used as an example, and both input sources are adapters with type-C interfaces (i.e., TYPEC-1 and TYPEC-2), and two power supply circuits and two isolation tube driving circuits are shown. Figure 4 As shown, the electrical connection method is described by taking the first power supply circuit as an example. Each power supply circuit 100 further includes: a first capacitor C1.
[0074] A first end of the first capacitor C1 is electrically connected to the input power supply terminal IN and a first end of the isolation tube QC1 respectively, and a second end of the first capacitor C1 is grounded.
[0075] The second end of the isolation transistor QC1 is electrically connected to the output end of the power supply circuit 100 , and the gate of the isolation transistor QC1 is electrically connected to the control end of the power supply circuit 100 .
[0076] It can be understood that the electrical connection method of each power supply circuit is the same. The isolation tube in the present application is a back-to-back NMOS tube with a common source. Since the back-to-back NMOS tube has a common source, the first end of the isolation tube is a drain of the back-to-back NMOS tube, the second end of the isolation tube is another drain of the back-to-back NMOS tube, and the gate of the isolation tube is the gate of the back-to-back NMOS tube.
[0077] In one possible embodiment, see Figure 4 The conversion circuit 200 includes: a second capacitor C2, a third capacitor C3, a lower switch tube QL, an inductor L and a resistor R1.
[0078] The first end of the second capacitor C2 is electrically connected to the input end of the conversion circuit, the first end of the lower switch tube QL, and the first end of the inductor L respectively.
[0079] The control end of the lower switch tube QL is electrically connected to the control end of the conversion circuit 200 .
[0080] The second end of the inductor L is electrically connected to the first end of the third capacitor C3, the first end of the resistor R1, and the output end of the BUCK circuit respectively.
[0081] The second end of the second capacitor C2, the second end of the lower switch tube QL, the second end of the third capacitor C3 and the second end of the resistor R1 are all grounded.
[0082] The lower switch tube QL in the embodiment of the present application may be a bipolar transistor or a field effect transistor, etc. For example, when the lower switch tube QL is a bipolar transistor, the control end of the lower switch tube QL refers to the base of the bipolar transistor, the first end of the lower switch tube QL may be the collector or emitter of the bipolar transistor, and correspondingly, the second end of the lower switch tube QL may be the emitter or collector of the bipolar transistor; when the lower switch tube QL is a field effect transistor, the control end of the lower switch tube QL refers to the gate of the field effect transistor, the first end of the lower switch tube QL may be the drain or source of the field effect transistor, and correspondingly, the second end of the lower switch tube QL may be the source or drain of the field effect transistor.
[0083] The transistor in this application can be an N-type transistor or a P-type transistor. This application does not make specific restrictions on this. However, in actual project applications, due to the small on-resistance of the N-type transistor, the N-type transistor is usually selected. In a specific embodiment, when the lower switch tube QL is an N-type transistor, the first end of the lower switch tube QL is the drain, the second end of the lower switch tube QL is the source, and the control end of the lower switch tube QL is the gate.
[0084] In the embodiment of the present application, since the upper switch tube in the BUCK circuit is reused with the back-to-back NMOS tube with a common source, the upper switch tube is not included in the conversion circuit. By reusing the upper switch tube with the back-to-back NMOS tube with a common source, the upper switch tube in the BUCK circuit is omitted, and as few NMOS tubes as possible are used, which simplifies the circuit, improves efficiency, and saves circuit area.
[0085] In one possible embodiment, see Figure 4 The upper switch tube driving circuit 301 includes: a first driver Driver1, a bootstrap capacitor terminal BOOT, a switch node terminal SW and an upper switch tube logic signal terminal HS.
[0086] The input terminal of the first driver Driver1 is electrically connected to the upper switch logic signal terminal HS for receiving the first logic signal HS_ON.
[0087] A first terminal of the first driver Driver1 is electrically connected to the bootstrap capacitor terminal BOOT, and a second terminal of the first driver Driver1 is electrically connected to the switch node terminal SW.
[0088] The output end of the first driver Driver1 is electrically connected to the output end of the upper switch tube driving circuit 301 .
[0089] The buck chip used in the buck circuit usually includes a BOOT pin and a SW pin, which are used to connect the bootstrap capacitor outside the chip and drive the upper switch tube through the bootstrap capacitor.
[0090] In one possible embodiment, see Figure 4 Taking the first isolation tube driving circuit as an example to explain the electrical connection method, the isolation tube driving circuit 302 includes: a first switch tube Q1 and a second switch tube Q2.
[0091] The second end of the first switch tube Q1 is electrically connected to the input end of the isolation tube driving circuit 302 , and the first end of the first switch tube Q1 is electrically connected to the first end of the second switch tube Q2 and the output end of the isolation tube driving circuit 302 .
[0092] The control end of the first switch tube Q1 is electrically connected to the control end of the second switch tube Q2 for accessing the system selection signal VC1_ON, and the second end of the second switch tube Q2 is grounded.
[0093] In the embodiment of the present application, the first switch tube Q1 and the second switch tube Q2 may be bipolar transistors or field effect transistors, etc. For example, when the first switch tube Q1 and the second switch tube Q2 are bipolar transistors, the control end of the first switch tube Q1 and the second switch tube Q2 refers to the base of the bipolar transistor, the first end of the first switch tube Q1 and the second switch tube Q2 may be the collector or emitter of the bipolar transistor, and correspondingly, the second end of the first switch tube Q1 and the second switch tube Q2 may be the emitter or collector of the bipolar transistor; when the first switch tube Q1 and the second switch tube Q2 are field effect transistors, the control end of the first switch tube Q1 and the second switch tube Q2 refers to the gate of the field effect transistor, the first end of the first switch tube Q1 and the second switch tube Q2 may be the drain or source of the field effect transistor, and correspondingly, the second end of the first switch tube Q1 and the second switch tube Q2 may be the source or drain of the field effect transistor.
[0094] In a specific embodiment, the first switch tube Q1 is a PMOS (P-type Metal Oxide Semiconductor Field-Effect Transistor), the first end of the first switch tube Q1 is a drain, the second end of the first switch tube Q1 is a source, and the control end of the first switch tube Q1 is a gate; the second switch tube Q2 is an NMOS (N-type Metal Oxide Semiconductor Field-Effect Transistor), the first end of the first switch tube Q2 is a drain, the second end of the first switch tube Q2 is a source, and the control end of the first switch tube Q2 is a gate.
[0095] In an embodiment of the present application, the output end of the isolation tube driving circuit is electrically connected to the control end of the corresponding power supply circuit, that is, the output end of the isolation tube driving circuit is electrically connected to the gate of the isolation tube in the corresponding power supply circuit. The isolation tube driving circuit is controlled by a system selection signal, and the first drive signal output by the upper switch tube driving circuit is transmitted to the isolation tube. By controlling the on or off state of the isolation tube, one of the input sources is selected to power the BUCK circuit, thereby realizing flexible power supply logic.
[0096] In addition, the input ends of the plurality of isolation tube driving circuits are electrically connected to the output end of the upper switch tube driving circuit, and the upper switch tube driving circuit includes a BOOT foot and a SW foot for connecting the bootstrap capacitor outside the chip. That is, the plurality of isolation tube driving circuits reuse a bootstrap capacitor to drive the power supply circuit. Compared with the solution of using a charge pump circuit to drive the power supply circuit, the circuit structure is simpler.
[0097] In one possible embodiment, see Figure 4 The driving circuit 300 also includes: a lower switch tube driving circuit 303.
[0098] The lower switch tube driving circuit 303 is used for outputting a second driving signal GL according to the second logic signal LS_ON, and transmitting the second driving signal GL to the BUCK circuit.
[0099] In the embodiment of the present application, the lower switch tube driving circuit 303 generates a driving signal for driving the gate of the lower switch tube QL.
[0100] In one possible embodiment, see Figure 4 The lower switch tube driving circuit 303 includes: a second driver Driver2 and a lower switch tube logic signal terminal LS.
[0101] The first end of the second driver Driver2 is used to access the power supply voltage VCC, the second end of the second driver Driver2 is grounded, and the input end of the second driver Driver2 is electrically connected to the lower switch logic signal end LS for accessing the second logic signal LS_ON.
[0102] The output end of the second driver Driver2 is electrically connected to the output end of the lower switch tube driving circuit 303 .
[0103] The power supply voltage VCC is the power supply voltage inside the chip.
[0104] See also Figure 4 , the meaning of each mark is explained: VC1 is the voltage of TYPEC-1; VC2 is the voltage of TYPEC-2; GC1 is the driving signal of the isolation tube QC1; GC2 is the driving signal of the isolation tube QC2; GL is the driving signal of the lower switch tube QL; VOUT is the output voltage; VCC is the power supply voltage inside the chip; LS_ON is the logic signal for turning on the lower switch tube QL; HS_ON is the logic signal for turning on the upper switch tube QL.
[0105] Figure 4 The working principle of the multi-input BUCK circuit is as follows: when the system logic selects VC1 as the input voltage, the isolation tube QC1 is reused as the upper switch tube of the BUCK circuit, and the lower switch tube QL, the inductor L, and the third capacitor C3 form a BUCK circuit. At this time, the system selection signal VC1_ON is at a low level. Since the first switch tube Q1 adopts PMOS, the first switch tube Q1 is turned on, and the second switch tube Q2 adopts NMOS, the second switch tube Q2 is turned off. The first drive signal is transmitted to the gate of the isolation tube QC1, and the isolation tube QC1 is periodically driven, so that the BUCK circuit performs voltage conversion on the voltage VC1 of TYPEC-1 based on the isolation tube QC1 to obtain an output Voltage VOUT; Similarly, when the system logic selects VC2 as the input voltage, the isolation tube QC2 is reused as the upper switch tube of the BUCK circuit, and the lower switch tube QL, the inductor L, and the third capacitor C3 form a BUCK circuit. At this time, the system selection signal VC2_ON is low level. Since the third switch tube Q3 adopts PMOS, the third switch tube Q3 is turned on, and the fourth switch tube Q4 adopts NMOS, the fourth switch tube Q4 is turned off, and the first drive signal is transmitted to the gate of the isolation tube QC2, and the isolation tube QC2 is periodically driven, so that the BUCK circuit performs voltage conversion on the voltage VC2 of TYPEC-2 based on the isolation tube QC2 to obtain the output voltage VOUT. It should be noted that VC1_ON and VC2_ON cannot be low levels at the same time, otherwise the voltage VC1 of TYPEC-1 is directly connected to the voltage VC2 of TYPEC-2, and the isolation effect is lost.
[0106] The present application also provides a charging circuit. Figure 4 The charging circuit includes: the multi-input BUCK circuit mentioned above, and also includes: a bootstrap capacitor CBOOT and a diode D1.
[0107] The anode of the diode D1 is used to access the power supply voltage VCC, and the cathode of the diode D1 is electrically connected to the first end of the bootstrap capacitor CBOOT and the bootstrap capacitor end BOOT respectively.
[0108] A second terminal of the bootstrap capacitor CBOOT is electrically connected to the switch node terminal SW.
[0109] The buck chip used in the buck circuit usually includes a BOOT pin and a SW pin, which are used to connect the bootstrap capacitor outside the chip. The BOOT pin corresponds to the bootstrap capacitor terminal BOOT, and the SW pin corresponds to the switch node terminal SW. The bootstrap capacitor CBOOT and the diode D1 in the present application are arranged outside the buck chip and are electrically connected to the BOOT pin and the SW pin of the buck chip.
[0110] An embodiment of the present application further provides a chip, including: the multi-input BUCK circuit as described above.
[0111] The chip in this application may be a step-down chip.
[0112] An embodiment of the present application also provides an electronic device, including: the chip as described above.
[0113] Finally, it should be noted that the above embodiments are only specific implementation methods of the present application, but the protection scope of the present application is not limited thereto, and any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
Claims
1. A multi-input BUCK circuit, characterized in that: The multi-input BUCK circuit comprises: a plurality of power supply circuits, a conversion circuit and a driving circuit; the power supply circuit comprises an isolation tube and an input power supply terminal, the driving circuit comprises an upper switch tube driving circuit and a plurality of isolation tube driving circuits, the isolation tube driving circuit corresponds to the power supply circuit one by one, the conversion circuit and the isolation tube constitute a BUCK circuit, wherein the isolation tube is a back-to-back NMOS tube with a common source; The output end of each power supply circuit is electrically connected to the input end of the conversion circuit; the input end of each isolation tube driving circuit is electrically connected to the output end of the upper switch tube driving circuit, and the output end of each isolation tube driving circuit is electrically connected to the control end of the corresponding power supply circuit; The input power supply terminal is used to access the power supply voltage; The isolation tube is used to isolate the power supply voltage connected to each power supply circuit; The upper switch tube driving circuit is used to output a first driving signal according to a first logic signal, and transmit the first driving signal to the isolation tube driving circuit; The isolation tube driving circuit is used to transmit the first driving signal to the corresponding power supply circuit based on the system selection signal; The power supply circuit is used to transmit the power supply voltage to the BUCK circuit according to the first driving signal; The BUCK circuit is used to perform voltage conversion on the power supply voltage to obtain an output voltage.
2. The multi-input BUCK circuit according to claim 1, characterized in that: Each of the power supply circuits further includes: a first capacitor; The first end of the first capacitor is electrically connected to the input power supply end and the first end of the isolation tube respectively, and the second end of the first capacitor is grounded; The second end of the isolation tube is electrically connected to the output end of the power supply circuit, and the grid of the isolation tube is electrically connected to the control end of the power supply circuit.
3. The multi-input BUCK circuit according to claim 1, characterized in that: The conversion circuit includes: a second capacitor, a third capacitor, a lower switch tube, an inductor and a resistor; The first end of the second capacitor is electrically connected to the input end of the conversion circuit, the first end of the lower switch tube, and the first end of the inductor respectively; The control end of the lower switch tube is electrically connected to the control end of the conversion circuit; The second end of the inductor is electrically connected to the first end of the third capacitor, the first end of the resistor, and the output end of the conversion circuit respectively; The second end of the second capacitor, the second end of the lower switch tube, the second end of the third capacitor and the second end of the resistor are all grounded.
4. The multi-input BUCK circuit according to claim 1, characterized in that: The upper switch tube driving circuit comprises: a first driver, a bootstrap capacitor terminal, a switch node terminal and an upper switch tube logic signal terminal; The input end of the first driver is electrically connected to the logic signal end of the upper switch tube, and is used to receive the first logic signal; A first terminal of the first driver is electrically connected to the bootstrap capacitor terminal, and a second terminal of the first driver is electrically connected to the switch node terminal; The output end of the first driver is electrically connected to the output end of the upper switch tube driving circuit.
5. The multi-input BUCK circuit according to claim 1, characterized in that: The isolation tube driving circuit comprises: a first switch tube and a second switch tube; The second end of the first switch tube is electrically connected to the input end of the isolation tube driving circuit, and the first end of the first switch tube is electrically connected to the first end of the second switch tube and the output end of the isolation tube driving circuit respectively; The control end of the first switch tube is electrically connected to the control end of the second switch tube for receiving the system selection signal, and the second end of the second switch tube is grounded.
6. The multi-input BUCK circuit according to claim 1, characterized in that: The driving circuit further comprises: a lower switch tube driving circuit; The lower switch tube driving circuit is used to output a second driving signal according to a second logic signal, and transmit the second driving signal to the BUCK circuit.
7. The multi-input BUCK circuit according to claim 6, characterized in that: The lower switch tube driving circuit comprises: a second driver and a lower switch tube logic signal terminal; The first end of the second driver is used to access the power supply voltage, the second end of the second driver is grounded, and the input end of the second driver is electrically connected to the logic signal end of the lower switch tube for accessing the second logic signal; The output end of the second driver is electrically connected to the output end of the lower switch tube driving circuit.
8. A charging circuit, characterized in that: The charging circuit comprises: the multi-input BUCK circuit according to any one of claims 1 to 7, further comprising: a bootstrap capacitor and a diode; The anode of the diode is used to access the power supply voltage, and the cathode of the diode is electrically connected to the first end of the bootstrap capacitor and the bootstrap capacitor end respectively; The second terminal of the bootstrap capacitor is electrically connected to the switch node terminal.
9. A chip, characterized in that: include: A multi-input BUCK circuit as claimed in any one of claims 1 to 7.
10. An electronic device, characterized in that: include: The chip as claimed in claim 9.
Citation Information
Cited By
Power supply device and control method thereof
TWI940251B
